From 9f9f27248bf464b465fd4f05112a5b479503e83a Mon Sep 17 00:00:00 2001 From: Joseph Myers Date: Wed, 4 Nov 2015 21:34:36 +0000 Subject: Remove miscellaneous GCC >= 4.7 version conditionals. This patch removes miscellaneous __GNUC_PREREQ (4, 7) conditionals that are now dead. Tested for x86_64 and x86 (testsuite, and that installed stripped shared libraries are unchanged by the patch). * sysdeps/arm/atomic-machine.h [__GNUC_PREREQ (4, 7) && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4]: Change conditional to [__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4]. [__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 && !__GNUC_PREREQ (4, 7)]: Remove conditional code. [!__GNUC_PREREQ (4, 7) || !__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4]: Change conditional to [!__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4]. * sysdeps/i386/sysdep.h [__ASSEMBLER__ && __GNUC_PREREQ (4, 7)]: Change conditional to [__ASSEMBLER__]. [__ASSEMBLER__ && !__GNUC_PREREQ (4, 7)]: Remove conditional code. [!__ASSEMBLER__ && __GNUC_PREREQ (4, 7)]: Change conditional to [!__ASSEMBLER__]. [!__ASSEMBLER__ && !__GNUC_PREREQ (4, 7)]: Remove conditional code. * sysdeps/unix/sysv/linux/sh/atomic-machine.h (rNOSP): Remove conditional macro definitions. (__arch_compare_and_exchange_val_8_acq): Use "u" instead of rNOSP. (__arch_compare_and_exchange_val_16_acq): Likewise. (__arch_compare_and_exchange_val_32_acq): Likewise. (atomic_exchange_and_add): Likewise. (atomic_add): Likewise. (atomic_add_negative): Likewise. (atomic_add_zero): Likewise. (atomic_bit_set): Likewise. (atomic_bit_test_set): Likewise. * sysdeps/x86_64/atomic-machine.h [__GNUC_PREREQ (4, 7)]: Make code unconditional. [!__GNUC_PREREQ (4, 7)]: Remove conditional code. --- sysdeps/arm/atomic-machine.h | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'sysdeps/arm/atomic-machine.h') diff --git a/sysdeps/arm/atomic-machine.h b/sysdeps/arm/atomic-machine.h index 2a89a73f5b..12551bc4db 100644 --- a/sysdeps/arm/atomic-machine.h +++ b/sysdeps/arm/atomic-machine.h @@ -53,7 +53,7 @@ void __arm_link_error (void); /* Use the atomic builtins provided by GCC in case the backend provides a pattern to do this efficiently. */ -#if __GNUC_PREREQ (4, 7) && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 +#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 # define atomic_exchange_acq(mem, value) \ __atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_ACQUIRE) @@ -131,16 +131,12 @@ void __arm_link_error (void); # define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \ ({__arm_link_error (); oldval; }) -#elif defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 -/* Atomic compare and exchange. */ -# define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ - __sync_val_compare_and_swap ((mem), (oldval), (newval)) #else # define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ __arm_assisted_compare_and_exchange_val_32_acq ((mem), (newval), (oldval)) #endif -#if !__GNUC_PREREQ (4, 7) || !defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) +#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 /* We don't support atomic operations on any non-word types. So make them link errors. */ # define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \ -- cgit 1.4.1