From 302949e2940a9da3f6364a1574619e621b7e1e71 Mon Sep 17 00:00:00 2001 From: Marcus Shawcroft Date: Fri, 7 Mar 2014 14:05:20 +0000 Subject: [PATCH] [AArch64] Optional trapping exceptions support. Trapping exceptions in AArch64 are optional. The relevant exception control bits in FPCR are are defined as RES0 hence the absence of support can be detected by reading back the FPCR and comparing with the desired value. --- sysdeps/aarch64/fpu/feenablxcpt.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'sysdeps/aarch64/fpu/feenablxcpt.c') diff --git a/sysdeps/aarch64/fpu/feenablxcpt.c b/sysdeps/aarch64/fpu/feenablxcpt.c index d97699981f..07a4bbb58e 100644 --- a/sysdeps/aarch64/fpu/feenablxcpt.c +++ b/sysdeps/aarch64/fpu/feenablxcpt.c @@ -35,5 +35,18 @@ feenableexcept (int excepts) _FPU_SETCW (fpcr); + /* Trapping exceptions are optional in AArch64 the relevant enable + bits in FPCR are RES0 hence the absence of support can be + detected by reading back the FPCR and comparing with the required + value. */ + if (excepts) + { + fpu_control_t updated_fpcr; + + _FPU_GETCW (updated_fpcr); + if (((updated_fpcr >> FE_EXCEPT_SHIFT) & excepts) != excepts) + return -1; + } + return original_excepts; } -- cgit 1.4.1