From 9c84384cc18ff589233628c193953ca8d7a39f5c Mon Sep 17 00:00:00 2001 From: Joseph Myers Date: Wed, 5 Jun 2013 20:44:03 +0000 Subject: Remove trailing whitespace. --- soft-fp/extended.h | 4 ++-- soft-fp/op-1.h | 8 ++++---- soft-fp/op-2.h | 8 ++++---- soft-fp/op-4.h | 12 ++++++------ soft-fp/op-8.h | 2 +- soft-fp/testit.c | 10 +++++----- 6 files changed, 22 insertions(+), 22 deletions(-) (limited to 'soft-fp') diff --git a/soft-fp/extended.h b/soft-fp/extended.h index a4bd7e86e7..74927550eb 100644 --- a/soft-fp/extended.h +++ b/soft-fp/extended.h @@ -203,7 +203,7 @@ union _FP_UNION_E * anyway, we optimize it by doing most of the calculations * in two UWtype registers instead of four. */ - + #define _FP_SQRT_MEAT_E(R, S, T, X, q) \ do { \ q = (_FP_W_TYPE)1 << (_FP_W_TYPE_SIZE - 1); \ @@ -416,7 +416,7 @@ union _FP_UNION_E R##_f0 |= _FP_WORK_STICKY; \ } \ } while (0) - + #define FP_CMP_E(r,X,Y,un) _FP_CMP(E,2,r,X,Y,un) #define FP_CMP_EQ_E(r,X,Y) _FP_CMP_EQ(E,2,r,X,Y) #define FP_CMP_UNORD_E(r,X,Y) _FP_CMP_UNORD(E,2,r,X,Y) diff --git a/soft-fp/op-1.h b/soft-fp/op-1.h index 30e60638c0..b9035ee821 100644 --- a/soft-fp/op-1.h +++ b/soft-fp/op-1.h @@ -255,14 +255,14 @@ do { \ udiv_qrnnd(_q, _r, _nh, _nl, Y##_f); \ R##_f = _q | (_r != 0); \ } while (0) - - + + /* * Square root algorithms: * We have just one right now, maybe Newton approximation * should be added for those machines where division is fast. */ - + #define _FP_SQRT_MEAT_1(R, S, T, X, q) \ do { \ while (q != _FP_WORK_ROUND) \ @@ -286,7 +286,7 @@ do { \ } while (0) /* - * Assembly/disassembly for converting to/from integral types. + * Assembly/disassembly for converting to/from integral types. * No shifting or overflow handled here. */ diff --git a/soft-fp/op-2.h b/soft-fp/op-2.h index 1b63c8cca3..f25af19f7f 100644 --- a/soft-fp/op-2.h +++ b/soft-fp/op-2.h @@ -145,7 +145,7 @@ #define _FP_MAXFRAC_2 (~(_FP_WS_TYPE)0), (~(_FP_WS_TYPE)0) /* - * Internals + * Internals */ #define __FP_FRAC_SET_2(X,I1,I0) (X##_f0 = I0, X##_f1 = I1) @@ -348,7 +348,7 @@ point multiplication. This is useful if floating point multiplication has much bigger throughput than integer multiply. It is supposed to work for _FP_W_TYPE_SIZE 64 and wfracbits - between 106 and 120 only. + between 106 and 120 only. Caller guarantees that X and Y has (1LLL << (wfracbits - 1)) set. SETFETZ is a macro which will disable all FPU exceptions and set rounding towards zero, RESETFE should optionally reset it back. */ @@ -544,7 +544,7 @@ * We have just one right now, maybe Newton approximation * should be added for those machines where division is fast. */ - + #define _FP_SQRT_MEAT_2(R, S, T, X, q) \ do { \ while (q) \ @@ -586,7 +586,7 @@ /* - * Assembly/disassembly for converting to/from integral types. + * Assembly/disassembly for converting to/from integral types. * No shifting or overflow handled here. */ diff --git a/soft-fp/op-4.h b/soft-fp/op-4.h index a9d421a3b6..9b5caa7388 100644 --- a/soft-fp/op-4.h +++ b/soft-fp/op-4.h @@ -81,7 +81,7 @@ } while (0) -/* Right shift with sticky-lsb. +/* Right shift with sticky-lsb. * What this actually means is that we do a standard right-shift, * but that if any of the bits that fall off the right hand side * were one then we always set the LSbit. @@ -435,7 +435,7 @@ * We have just one right now, maybe Newton approximation * should be added for those machines where division is fast. */ - + #define _FP_SQRT_MEAT_4(R, S, T, X, q) \ do { \ while (q) \ @@ -516,7 +516,7 @@ /* - * Internals + * Internals */ #define __FP_FRAC_SET_4(X,I3,I2,I1,I0) \ @@ -618,9 +618,9 @@ /* Convert FP values between word sizes. This appears to be more * complicated than I'd have expected it to be, so these might be * wrong... These macros are in any case somewhat bogus because they - * use information about what various FRAC_n variables look like + * use information about what various FRAC_n variables look like * internally [eg, that 2 word vars are X_f0 and x_f1]. But so do - * the ones in op-2.h and op-1.h. + * the ones in op-2.h and op-1.h. */ #define _FP_FRAC_COPY_1_4(D, S) (D##_f = S##_f[0]) @@ -630,7 +630,7 @@ do { \ D##_f1 = S##_f[1]; \ } while (0) -/* Assembly/disassembly for converting to/from integral types. +/* Assembly/disassembly for converting to/from integral types. * No shifting or overflow handled here. */ /* Put the FP value X into r, which is an integer of size rsize. */ diff --git a/soft-fp/op-8.h b/soft-fp/op-8.h index 9bb92320ee..8890d02201 100644 --- a/soft-fp/op-8.h +++ b/soft-fp/op-8.h @@ -77,7 +77,7 @@ } while (0) -/* Right shift with sticky-lsb. +/* Right shift with sticky-lsb. * What this actually means is that we do a standard right-shift, * but that if any of the bits that fall off the right hand side * were one then we always set the LSbit. diff --git a/soft-fp/testit.c b/soft-fp/testit.c index f1e9b54758..1aaf8b45c8 100644 --- a/soft-fp/testit.c +++ b/soft-fp/testit.c @@ -244,7 +244,7 @@ float build_float(const char *s, const char *e, const char *f) return u.flt; } - + double build_double(const char *s, const char *e, const char *f) { union _FP_UNION_D u; @@ -264,10 +264,10 @@ double build_double(const char *s, const char *e, const char *f) #else u.bits.frac = strtoul(f, 0, 16); #endif - + return u.flt; } - + /*======================================================================*/ fpu_control_t fcw0, fcw1; @@ -303,7 +303,7 @@ void test_double_arith(double (*tf)(double, double), _FPU_GETCW(fcw0); fcw1 = ((fcw0 & ~_FPU_EXTENDED) | _FPU_DOUBLE); _FPU_SETCW(fcw1); -#endif +#endif rr = (*rf)(x, y); #ifdef __i386__ _FPU_SETCW(fcw0); @@ -386,7 +386,7 @@ void test_float_int_conv(float x) printf("\n\ttrue = %d\n\tfalse = %d\n", rr, tr); } } - + void test_double_int_conv(double x) { int tr, rr; -- cgit 1.4.1