From d90b43a4ed475dac5b0cd6e01ceb35c7b0f7f2ff Mon Sep 17 00:00:00 2001 From: Noah Goldstein Date: Wed, 20 Sep 2023 15:44:50 -0500 Subject: x86: Add support for AVX10 preset and vec size in cpu-features This commit add support for the new AVX10 cpu features: https://cdrdv2-public.intel.com/784267/355989-intel-avx10-spec.pdf We add checks for: - `AVX10`: Check if AVX10 is present. - `AVX10_{X,Y,Z}MM`: Check if a given vec class has AVX10 support. `make check` passes and cpuid output was checked against GNR/DMR on an emulator. --- manual/platform.texi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'manual') diff --git a/manual/platform.texi b/manual/platform.texi index 2a2d557067..478b6fdcdf 100644 --- a/manual/platform.texi +++ b/manual/platform.texi @@ -222,6 +222,18 @@ Leaf (EAX = 23H). @item @code{AVX} -- The AVX instruction extensions. +@item +@code{AVX10} -- The AVX10 instruction extensions. + +@item +@code{AVX10_XMM} -- Whether AVX10 includes xmm registers. + +@item +@code{AVX10_YMM} -- Whether AVX10 includes ymm registers. + +@item +@code{AVX10_ZMM} -- Whether AVX10 includes zmm registers. + @item @code{AVX2} -- The AVX2 instruction extensions. -- cgit 1.4.1