From ba9e25a62bd662ce8c7ed6c8d1c072110f1ffae5 Mon Sep 17 00:00:00 2001
From: Palmer Dabbelt <palmer@dabbelt.com>
Date: Mon, 29 Jan 2018 10:25:23 -0800
Subject: Add documentation for __riscv_flush_icache

This function is used by GCC to enforce ordering between data writes and
instruction fetches, and while we'd prefer that users rely on the GCC
intrinsic when possible this is user visible in case that's not
possible.

2018-01-29  Palmer Dabbelt  <palmer@sifive.com>

        * manual/platform.texi: Add RISC-V documenation for
        __riscv_flush_icache.
---
 ChangeLog | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'ChangeLog')

diff --git a/ChangeLog b/ChangeLog
index ec9b4757d1..ec0cce9c76 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -4,6 +4,8 @@
 	PREINIT_FUNCTION when defined.
 	* manual/math.texi: RISC-V supports _Float128 and _Float64x.
 	* config.h.in: Regenerate.
+	* manual/platform.texi: Add RISC-V documenation for
+	__riscv_flush_icache.
 
 2018-01-29  Florian Weimer  <fweimer@redhat.com>
 
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