From 9f9f27248bf464b465fd4f05112a5b479503e83a Mon Sep 17 00:00:00 2001 From: Joseph Myers Date: Wed, 4 Nov 2015 21:34:36 +0000 Subject: Remove miscellaneous GCC >= 4.7 version conditionals. This patch removes miscellaneous __GNUC_PREREQ (4, 7) conditionals that are now dead. Tested for x86_64 and x86 (testsuite, and that installed stripped shared libraries are unchanged by the patch). * sysdeps/arm/atomic-machine.h [__GNUC_PREREQ (4, 7) && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4]: Change conditional to [__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4]. [__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 && !__GNUC_PREREQ (4, 7)]: Remove conditional code. [!__GNUC_PREREQ (4, 7) || !__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4]: Change conditional to [!__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4]. * sysdeps/i386/sysdep.h [__ASSEMBLER__ && __GNUC_PREREQ (4, 7)]: Change conditional to [__ASSEMBLER__]. [__ASSEMBLER__ && !__GNUC_PREREQ (4, 7)]: Remove conditional code. [!__ASSEMBLER__ && __GNUC_PREREQ (4, 7)]: Change conditional to [!__ASSEMBLER__]. [!__ASSEMBLER__ && !__GNUC_PREREQ (4, 7)]: Remove conditional code. * sysdeps/unix/sysv/linux/sh/atomic-machine.h (rNOSP): Remove conditional macro definitions. (__arch_compare_and_exchange_val_8_acq): Use "u" instead of rNOSP. (__arch_compare_and_exchange_val_16_acq): Likewise. (__arch_compare_and_exchange_val_32_acq): Likewise. (atomic_exchange_and_add): Likewise. (atomic_add): Likewise. (atomic_add_negative): Likewise. (atomic_add_zero): Likewise. (atomic_bit_set): Likewise. (atomic_bit_test_set): Likewise. * sysdeps/x86_64/atomic-machine.h [__GNUC_PREREQ (4, 7)]: Make code unconditional. [!__GNUC_PREREQ (4, 7)]: Remove conditional code. --- ChangeLog | 29 +++++++++++++++++ sysdeps/arm/atomic-machine.h | 8 ++--- sysdeps/i386/sysdep.h | 12 ++------ sysdeps/unix/sysv/linux/sh/atomic-machine.h | 48 +++++++++++++---------------- sysdeps/x86_64/atomic-machine.h | 4 --- 5 files changed, 54 insertions(+), 47 deletions(-) diff --git a/ChangeLog b/ChangeLog index eb29519247..4c0c0c25ce 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,5 +1,34 @@ 2015-11-04 Joseph Myers + * sysdeps/arm/atomic-machine.h + [__GNUC_PREREQ (4, 7) && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4]: + Change conditional to [__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4]. + [__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 && !__GNUC_PREREQ (4, 7)]: + Remove conditional code. + [!__GNUC_PREREQ (4, 7) || !__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4]: + Change conditional to [!__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4]. + * sysdeps/i386/sysdep.h [__ASSEMBLER__ && __GNUC_PREREQ (4, 7)]: + Change conditional to [__ASSEMBLER__]. + [__ASSEMBLER__ && !__GNUC_PREREQ (4, 7)]: Remove conditional code. + [!__ASSEMBLER__ && __GNUC_PREREQ (4, 7)]: Change conditional to + [!__ASSEMBLER__]. + [!__ASSEMBLER__ && !__GNUC_PREREQ (4, 7)]: Remove conditional + code. + * sysdeps/unix/sysv/linux/sh/atomic-machine.h (rNOSP): Remove + conditional macro definitions. + (__arch_compare_and_exchange_val_8_acq): Use "u" instead of rNOSP. + (__arch_compare_and_exchange_val_16_acq): Likewise. + (__arch_compare_and_exchange_val_32_acq): Likewise. + (atomic_exchange_and_add): Likewise. + (atomic_add): Likewise. + (atomic_add_negative): Likewise. + (atomic_add_zero): Likewise. + (atomic_bit_set): Likewise. + (atomic_bit_test_set): Likewise. + * sysdeps/x86_64/atomic-machine.h [__GNUC_PREREQ (4, 7)]: Make + code unconditional. + [!__GNUC_PREREQ (4, 7)]: Remove conditional code. + * math/test-math-errno.h: New file. * math/test-math-inline.h (TEST_INLINE): Define to 1 instead of empty. diff --git a/sysdeps/arm/atomic-machine.h b/sysdeps/arm/atomic-machine.h index 2a89a73f5b..12551bc4db 100644 --- a/sysdeps/arm/atomic-machine.h +++ b/sysdeps/arm/atomic-machine.h @@ -53,7 +53,7 @@ void __arm_link_error (void); /* Use the atomic builtins provided by GCC in case the backend provides a pattern to do this efficiently. */ -#if __GNUC_PREREQ (4, 7) && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 +#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 # define atomic_exchange_acq(mem, value) \ __atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_ACQUIRE) @@ -131,16 +131,12 @@ void __arm_link_error (void); # define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \ ({__arm_link_error (); oldval; }) -#elif defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 -/* Atomic compare and exchange. */ -# define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ - __sync_val_compare_and_swap ((mem), (oldval), (newval)) #else # define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ __arm_assisted_compare_and_exchange_val_32_acq ((mem), (newval), (oldval)) #endif -#if !__GNUC_PREREQ (4, 7) || !defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) +#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 /* We don't support atomic operations on any non-word types. So make them link errors. */ # define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \ diff --git a/sysdeps/i386/sysdep.h b/sysdeps/i386/sysdep.h index bde11bf26f..7c8d30a027 100644 --- a/sysdeps/i386/sysdep.h +++ b/sysdeps/i386/sysdep.h @@ -30,17 +30,9 @@ #endif #ifdef __ASSEMBLER__ -# if __GNUC_PREREQ (4, 7) -# define GET_PC_THUNK(reg) __x86.get_pc_thunk.reg -# else -# define GET_PC_THUNK(reg) __i686.get_pc_thunk.reg -# endif +# define GET_PC_THUNK(reg) __x86.get_pc_thunk.reg #else -# if __GNUC_PREREQ (4, 7) -# define GET_PC_THUNK_STR(reg) "__x86.get_pc_thunk." #reg -# else -# define GET_PC_THUNK_STR(reg) "__i686.get_pc_thunk." #reg -# endif +# define GET_PC_THUNK_STR(reg) "__x86.get_pc_thunk." #reg #endif #ifdef __ASSEMBLER__ diff --git a/sysdeps/unix/sysv/linux/sh/atomic-machine.h b/sysdeps/unix/sysv/linux/sh/atomic-machine.h index 8a188c5675..86cfee8487 100644 --- a/sysdeps/unix/sysv/linux/sh/atomic-machine.h +++ b/sysdeps/unix/sysv/linux/sh/atomic-machine.h @@ -67,12 +67,6 @@ typedef uintmax_t uatomic_max_t; r1: saved stack pointer */ -#if __GNUC_PREREQ (4, 7) -# define rNOSP "u" -#else -# define rNOSP "r" -#endif - #define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \ ({ __typeof (*(mem)) __result; \ __asm __volatile ("\ @@ -85,7 +79,7 @@ typedef uintmax_t uatomic_max_t; bf 1f\n\ mov.b %2,@%1\n\ 1: mov r1,r15"\ - : "=&r" (__result) : rNOSP (mem), rNOSP (newval), rNOSP (oldval) \ + : "=&r" (__result) : "u" (mem), "u" (newval), "u" (oldval) \ : "r0", "r1", "t", "memory"); \ __result; }) @@ -102,7 +96,7 @@ typedef uintmax_t uatomic_max_t; bf 1f\n\ mov.w %2,@%1\n\ 1: mov r1,r15"\ - : "=&r" (__result) : rNOSP (mem), rNOSP (newval), rNOSP (oldval) \ + : "=&r" (__result) : "u" (mem), "u" (newval), "u" (oldval) \ : "r0", "r1", "t", "memory"); \ __result; }) @@ -118,7 +112,7 @@ typedef uintmax_t uatomic_max_t; bf 1f\n\ mov.l %2,@%1\n\ 1: mov r1,r15"\ - : "=&r" (__result) : rNOSP (mem), rNOSP (newval), rNOSP (oldval) \ + : "=&r" (__result) : "u" (mem), "u" (newval), "u" (oldval) \ : "r0", "r1", "t", "memory"); \ __result; }) @@ -143,7 +137,7 @@ typedef uintmax_t uatomic_max_t; add %0,r2\n\ mov.b r2,@%2\n\ 1: mov r1,r15"\ - : "=&r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \ + : "=&r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \ : "r0", "r1", "r2", "memory"); \ else if (sizeof (*(mem)) == 2) \ __asm __volatile ("\ @@ -156,7 +150,7 @@ typedef uintmax_t uatomic_max_t; add %0,r2\n\ mov.w r2,@%2\n\ 1: mov r1,r15"\ - : "=&r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \ + : "=&r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \ : "r0", "r1", "r2", "memory"); \ else if (sizeof (*(mem)) == 4) \ __asm __volatile ("\ @@ -169,7 +163,7 @@ typedef uintmax_t uatomic_max_t; add %0,r2\n\ mov.l r2,@%2\n\ 1: mov r1,r15"\ - : "=&r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \ + : "=&r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \ : "r0", "r1", "r2", "memory"); \ else \ { \ @@ -194,7 +188,7 @@ typedef uintmax_t uatomic_max_t; add %0,r2\n\ mov.b r2,@%1\n\ 1: mov r1,r15"\ - : "=&r" (__tmp) : rNOSP (mem), "0" (__value) \ + : "=&r" (__tmp) : "u" (mem), "0" (__value) \ : "r0", "r1", "r2", "memory"); \ else if (sizeof (*(mem)) == 2) \ __asm __volatile ("\ @@ -206,7 +200,7 @@ typedef uintmax_t uatomic_max_t; add %0,r2\n\ mov.w r2,@%1\n\ 1: mov r1,r15"\ - : "=&r" (__tmp) : rNOSP (mem), "0" (__value) \ + : "=&r" (__tmp) : "u" (mem), "0" (__value) \ : "r0", "r1", "r2", "memory"); \ else if (sizeof (*(mem)) == 4) \ __asm __volatile ("\ @@ -218,7 +212,7 @@ typedef uintmax_t uatomic_max_t; add %0,r2\n\ mov.l r2,@%1\n\ 1: mov r1,r15"\ - : "=&r" (__tmp) : rNOSP (mem), "0" (__value) \ + : "=&r" (__tmp) : "u" (mem), "0" (__value) \ : "r0", "r1", "r2", "memory"); \ else \ { \ @@ -247,7 +241,7 @@ typedef uintmax_t uatomic_max_t; 1: mov r1,r15\n\ shal r2\n\ movt %0"\ - : "=r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \ + : "=r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \ : "r0", "r1", "r2", "t", "memory"); \ else if (sizeof (*(mem)) == 2) \ __asm __volatile ("\ @@ -261,7 +255,7 @@ typedef uintmax_t uatomic_max_t; 1: mov r1,r15\n\ shal r2\n\ movt %0"\ - : "=r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \ + : "=r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \ : "r0", "r1", "r2", "t", "memory"); \ else if (sizeof (*(mem)) == 4) \ __asm __volatile ("\ @@ -275,7 +269,7 @@ typedef uintmax_t uatomic_max_t; 1: mov r1,r15\n\ shal r2\n\ movt %0"\ - : "=r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \ + : "=r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \ : "r0", "r1", "r2", "t", "memory"); \ else \ abort (); \ @@ -296,7 +290,7 @@ typedef uintmax_t uatomic_max_t; 1: mov r1,r15\n\ tst r2,r2\n\ movt %0"\ - : "=r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \ + : "=r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \ : "r0", "r1", "r2", "t", "memory"); \ else if (sizeof (*(mem)) == 2) \ __asm __volatile ("\ @@ -310,7 +304,7 @@ typedef uintmax_t uatomic_max_t; 1: mov r1,r15\n\ tst r2,r2\n\ movt %0"\ - : "=r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \ + : "=r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \ : "r0", "r1", "r2", "t", "memory"); \ else if (sizeof (*(mem)) == 4) \ __asm __volatile ("\ @@ -324,7 +318,7 @@ typedef uintmax_t uatomic_max_t; 1: mov r1,r15\n\ tst r2,r2\n\ movt %0"\ - : "=r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \ + : "=r" (__result), "=&r" (__tmp) : "u" (mem), "1" (__value) \ : "r0", "r1", "r2", "t", "memory"); \ else \ abort (); \ @@ -345,7 +339,7 @@ typedef uintmax_t uatomic_max_t; or %1,r2\n\ mov.b r2,@%0\n\ 1: mov r1,r15"\ - : : rNOSP (mem), rNOSP (__mask) \ + : : "u" (mem), "u" (__mask) \ : "r0", "r1", "r2", "memory"); \ else if (sizeof (*(mem)) == 2) \ __asm __volatile ("\ @@ -357,7 +351,7 @@ typedef uintmax_t uatomic_max_t; or %1,r2\n\ mov.w r2,@%0\n\ 1: mov r1,r15"\ - : : rNOSP (mem), rNOSP (__mask) \ + : : "u" (mem), "u" (__mask) \ : "r0", "r1", "r2", "memory"); \ else if (sizeof (*(mem)) == 4) \ __asm __volatile ("\ @@ -369,7 +363,7 @@ typedef uintmax_t uatomic_max_t; or %1,r2\n\ mov.l r2,@%0\n\ 1: mov r1,r15"\ - : : rNOSP (mem), rNOSP (__mask) \ + : : "u" (mem), "u" (__mask) \ : "r0", "r1", "r2", "memory"); \ else \ abort (); \ @@ -391,7 +385,7 @@ typedef uintmax_t uatomic_max_t; 1: mov r1,r15\n\ and r3,%0"\ : "=&r" (__result), "=&r" (__mask) \ - : rNOSP (mem), "0" (__result), "1" (__mask) \ + : "u" (mem), "0" (__result), "1" (__mask) \ : "r0", "r1", "r2", "r3", "memory"); \ else if (sizeof (*(mem)) == 2) \ __asm __volatile ("\ @@ -406,7 +400,7 @@ typedef uintmax_t uatomic_max_t; 1: mov r1,r15\n\ and r3,%0"\ : "=&r" (__result), "=&r" (__mask) \ - : rNOSP (mem), "0" (__result), "1" (__mask) \ + : "u" (mem), "0" (__result), "1" (__mask) \ : "r0", "r1", "r2", "r3", "memory"); \ else if (sizeof (*(mem)) == 4) \ __asm __volatile ("\ @@ -421,7 +415,7 @@ typedef uintmax_t uatomic_max_t; 1: mov r1,r15\n\ and r3,%0"\ : "=&r" (__result), "=&r" (__mask) \ - : rNOSP (mem), "0" (__result), "1" (__mask) \ + : "u" (mem), "0" (__result), "1" (__mask) \ : "r0", "r1", "r2", "r3", "memory"); \ else \ abort (); \ diff --git a/sysdeps/x86_64/atomic-machine.h b/sysdeps/x86_64/atomic-machine.h index 337b334db1..60128f6a64 100644 --- a/sysdeps/x86_64/atomic-machine.h +++ b/sysdeps/x86_64/atomic-machine.h @@ -56,11 +56,7 @@ typedef uintmax_t uatomic_max_t; #endif #define __HAVE_64B_ATOMICS 1 -#if __GNUC_PREREQ (4, 7) #define USE_ATOMIC_COMPILER_BUILTINS 1 -#else -#define USE_ATOMIC_COMPILER_BUILTINS 0 -#endif #define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \ __sync_val_compare_and_swap (mem, oldval, newval) -- cgit 1.4.1