From 03feacb562650cc3d51e9e76cd97e80e648aad84 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Wed, 21 Jun 2017 10:20:24 -0700 Subject: x86: Rename glibc.tune.ifunc to glibc.tune.hwcaps Rename glibc.tune.ifunc to glibc.tune.hwcaps and move it to sysdeps/x86/dl-tunables.list since it is x86 specicifc. Also change type of data_cache_size, data_cache_size and non_temporal_threshold to unsigned long int to match size_t. Remove usage DEFAULT_STRLEN from cpu-tunables.c. * elf/dl-tunables.list (glibc.tune.ifunc): Removed. * sysdeps/x86/dl-tunables.list (glibc.tune.hwcaps): New. Remove security_level on all fields. * manual/tunables.texi: Replace ifunc with hwcaps. * sysdeps/x86/cpu-features.c (TUNABLE_CALLBACK (set_ifunc)): Renamed to .. (TUNABLE_CALLBACK (set_hwcaps)): This. (init_cpu_features): Updated. * sysdeps/x86/cpu-features.h (cpu_features): Change type of data_cache_size, data_cache_size and non_temporal_threshold to unsigned long int. * sysdeps/x86/cpu-tunables.c (DEFAULT_STRLEN): Removed. (TUNABLE_CALLBACK (set_ifunc)): Renamed to ... (TUNABLE_CALLBACK (set_hwcaps)): This. Update comments. Don't use DEFAULT_STRLEN. --- ChangeLog | 18 ++++++++++++++++++ elf/dl-tunables.list | 4 ---- manual/tunables.texi | 8 ++++---- sysdeps/x86/cpu-features.c | 4 ++-- sysdeps/x86/cpu-features.h | 6 +++--- sysdeps/x86/cpu-tunables.c | 29 +++++++++++------------------ sysdeps/x86/dl-tunables.list | 6 +++--- 7 files changed, 41 insertions(+), 34 deletions(-) diff --git a/ChangeLog b/ChangeLog index 2d07c200fe..a0d07fd13d 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,21 @@ +2017-06-21 H.J. Lu + + * elf/dl-tunables.list (glibc.tune.ifunc): Removed. + * sysdeps/x86/dl-tunables.list (glibc.tune.hwcaps): New. + Remove security_level on all fields. + * manual/tunables.texi: Replace ifunc with hwcaps. + * sysdeps/x86/cpu-features.c (TUNABLE_CALLBACK (set_ifunc)): + Renamed to .. + (TUNABLE_CALLBACK (set_hwcaps)): This. + (init_cpu_features): Updated. + * sysdeps/x86/cpu-features.h (cpu_features): Change type of + data_cache_size, data_cache_size and non_temporal_threshold to + unsigned long int. + * sysdeps/x86/cpu-tunables.c (DEFAULT_STRLEN): Removed. + (TUNABLE_CALLBACK (set_ifunc)): Renamed to ... + (TUNABLE_CALLBACK (set_hwcaps)): This. Update comments. Don't + use DEFAULT_STRLEN. + 2017-06-21 Florian Weimer * intl/dcigettext.c (DCIGETTEXT): Use getcwd (NULL, 0) and diff --git a/elf/dl-tunables.list b/elf/dl-tunables.list index b8b0ce565c..df4f9622b4 100644 --- a/elf/dl-tunables.list +++ b/elf/dl-tunables.list @@ -83,9 +83,5 @@ glibc { env_alias: LD_HWCAP_MASK default: HWCAP_IMPORTANT } - ifunc { - type: STRING - security_level: SXID_IGNORE - } } } diff --git a/manual/tunables.texi b/manual/tunables.texi index 3263f944c5..689e8941e7 100644 --- a/manual/tunables.texi +++ b/manual/tunables.texi @@ -198,8 +198,8 @@ is 8 times the number of cores online. @cindex hardware capability tunables @cindex hwcap tunables @cindex tunables, hwcap -@cindex ifunc tunables -@cindex tunables, ifunc +@cindex hwcaps tunables +@cindex tunables, hwcaps @cindex data_cache_size tunables @cindex tunables, data_cache_size @cindex shared_cache_size tunables @@ -222,8 +222,8 @@ extensions available in the processor at runtime for some architectures. The capabilities at runtime, thus disabling use of those extensions. @end deftp -@deftp Tunable glibc.tune.ifunc -The @code{glibc.tune.ifunc=-xxx,yyy,-zzz...} tunable allows the user to +@deftp Tunable glibc.tune.hwcaps +The @code{glibc.tune.hwcaps=-xxx,yyy,-zzz...} tunable allows the user to enable CPU/ARCH feature @code{yyy}, disable CPU/ARCH feature @code{xxx} and @code{zzz} where the feature name is case-sensitive and has to match the ones in @code{sysdeps/x86/cpu-features.h}. diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 76f053af80..1d087ea732 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -25,7 +25,7 @@ # include /* Get STDOUT_FILENO for _dl_printf. */ # include -extern void TUNABLE_CALLBACK (set_ifunc) (tunable_val_t *) +extern void TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *) attribute_hidden; #endif @@ -322,7 +322,7 @@ no_cpuid: cpu_features->kind = kind; #if HAVE_TUNABLES - TUNABLE_GET (ifunc, tunable_val_t *, TUNABLE_CALLBACK (set_ifunc)); + TUNABLE_GET (hwcaps, tunable_val_t *, TUNABLE_CALLBACK (set_hwcaps)); cpu_features->non_temporal_threshold = TUNABLE_GET (x86_non_temporal_threshold, long int, NULL); cpu_features->data_cache_size diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h index fef5e1894f..3ed67f5800 100644 --- a/sysdeps/x86/cpu-features.h +++ b/sysdeps/x86/cpu-features.h @@ -217,12 +217,12 @@ struct cpu_features unsigned int feature[FEATURE_INDEX_MAX]; /* Data cache size for use in memory and string routines, typically L1 size. */ - long int data_cache_size; + unsigned long int data_cache_size; /* Shared cache size for use in memory and string routines, typically L2 or L3 size. */ - long int shared_cache_size; + unsigned long int shared_cache_size; /* Threshold to use non temporal store. */ - long int non_temporal_threshold; + unsigned long int non_temporal_threshold; }; /* Used from outside of glibc to get access to the CPU features diff --git a/sysdeps/x86/cpu-tunables.c b/sysdeps/x86/cpu-tunables.c index 9258fb41de..872dd1267f 100644 --- a/sysdeps/x86/cpu-tunables.c +++ b/sysdeps/x86/cpu-tunables.c @@ -31,16 +31,12 @@ # if defined USE_MULTIARCH && !defined SHARED # ifdef __x86_64__ # define DEFAULT_MEMCMP __memcmp_sse2 -# define DEFAULT_STRLEN __strlen_sse2 # else # define DEFAULT_MEMCMP __memcmp_ia32 -# define DEFAULT_STRLEN strlen # endif extern __typeof (memcmp) DEFAULT_MEMCMP; -extern __typeof (strlen) DEFAULT_STRLEN; # else # define DEFAULT_MEMCMP memcmp -# define DEFAULT_STRLEN strlen # endif # define CHECK_GLIBC_IFUNC_CPU_OFF(f, cpu_features, name, len) \ @@ -112,30 +108,27 @@ extern __typeof (strlen) DEFAULT_STRLEN; attribute_hidden void -TUNABLE_CALLBACK (set_ifunc) (tunable_val_t *valp) +TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) { /* The current IFUNC selection is based on microbenchmarks in glibc. It should give the best performance for most workloads. But other choices may have better performance for a particular workload or on the hardware which wasn't available when the selection was made. - The environment variable, GLIBC_IFUNC=-xxx,yyy,-zzz...., can be - used to enable CPU/ARCH feature yyy, disable CPU/ARCH feature yyy - and zzz, where the feature name is case-sensitive and has to match - the ones in cpu-features.h. It can be used by glibc developers to - tune for a new processor or override the IFUNC selection to improve - performance for a particular workload. + The environment variable: - Since all CPU/ARCH features are hardware optimizations without - security implication, except for Prefer_MAP_32BIT_EXEC, which can - only be disabled, we check GLIBC_IFUNC for programs, including - set*id ones. + GLIBC_TUNABLES=glibc.tune.hwcaps=-xxx,yyy,-zzz,.... + + can be used to enable CPU/ARCH feature yyy, disable CPU/ARCH feature + yyy and zzz, where the feature name is case-sensitive and has to + match the ones in cpu-features.h. It can be used by glibc developers + to tune for a new processor or override the IFUNC selection to + improve performance for a particular workload. NOTE: the IFUNC selection may change over time. Please check all multiarch implementations when experimenting. */ const char *p = valp->strval; struct cpu_features *cpu_features = &GLRO(dl_x86_cpu_features); - const char *end = p + DEFAULT_STRLEN (p); size_t len; do @@ -145,7 +138,7 @@ TUNABLE_CALLBACK (set_ifunc) (tunable_val_t *valp) size_t nl; for (c = p; *c != ','; c++) - if (c >= end) + if (*c == '\0') break; len = c - p; @@ -325,6 +318,6 @@ TUNABLE_CALLBACK (set_ifunc) (tunable_val_t *valp) } p += len + 1; } - while (p < end); + while (*p != '\0'); } #endif diff --git a/sysdeps/x86/dl-tunables.list b/sysdeps/x86/dl-tunables.list index 50c130a437..99a9cc42b1 100644 --- a/sysdeps/x86/dl-tunables.list +++ b/sysdeps/x86/dl-tunables.list @@ -18,17 +18,17 @@ glibc { tune { + hwcaps { + type: STRING + } x86_non_temporal_threshold { type: SIZE_T - security_level: SXID_IGNORE } x86_data_cache_size { type: SIZE_T - security_level: SXID_IGNORE } x86_shared_cache_size { type: SIZE_T - security_level: SXID_IGNORE } } } -- cgit 1.4.1