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* malloc: Simplify static malloc interposition [BZ #20432]Florian Weimer2016-08-262-6/+6
| | | | | | | | Existing interposed mallocs do not define the glibc-internal fork callbacks (and they should not), so statically interposed mallocs lead to link failures because the strong reference from fork pulls in glibc's malloc, resulting in multiple definitions of malloc-related symbols.
* X86-64: Correct CFA in _dl_runtime_resolveH.J. Lu2016-08-261-0/+2
| | | | | | | | | When stack is re-aligned in _dl_runtime_resolve, there is no need to adjust CFA when allocating register save area on stack. * sysdeps/x86_64/dl-trampoline.h (_dl_runtime_resolve): Don't adjust CFA when allocating register save area on re-aligned stack.
* Convert _Complex tangent functions to generated codePaul E. Murphy2016-08-1912-64/+32
| | | | | | This converts s_c{,a}tan{,h}{f,,l} into a single templated file c{,a}tan{,h}_template.c with the exception of alpha.
* Convert _Complex sine functions to generated codePaul E. Murphy2016-08-1918-101/+42
| | | | | Refactor s_c{,a}sin{,h}{f,,l} into a single templated macro.
* X86: Change bit_YMM_state to (1 << 2)H.J. Lu2016-08-191-1/+1
| | | | | | | All other state bits, except for bit_YMM_state, are defined as (1 << N). This patch changes bit_YMM_state from (2 << 1) to (1 << 2). * sysdeps/x86/cpu-features.h (bit_YMM_state): Set to (1 << 2).
* Merge common usage of mul_split functionPaul E. Murphy2016-08-1911-346/+22
| | | | | | | | | | | A number of files share identical code for the mul_split function. This moves the duplicated function mul_split into its own header, and refactors the fma usage into a single selection macro. Likewise, mul_split when used by a long double implementation is renamed mul_splitl for clarity.
* Convert _Complex cosine functions to generated codePaul E. Murphy2016-08-1915-79/+38
| | | | | | This is fairly straight fowards. m68k overrides are updated to use the framework, and thus are simplified a bit.
* Fix incorrect double-checked locking related to _res_hconf.initialized.Torvald Riegel2016-08-181-2/+1
| | | | | | | | | | | | | | | | | | _res_hconf.initialized was not suitable for use in a multi-threaded environment due to the lack of atomics and memory barriers. Use of it was also unnecessary because _res_hconf_init did the right thing by using __libc_once. This patch fixes the glibc-internal uses by just calling _res_hconf_init unconditionally, and switches to a release MO atomic store for _res_hconf.initialized to fix the glibc side of the synchronization problem (which will maintain backward compatibility, but cannot fix the lack of acquire MO on any glibc-external loads). [BZ #20477] * resolv/res_hconf.c (do_init): Use atomic access. * resolv/res_hconf.h: Add comments. * nscd/aicache.c (addhstaiX): Call _res_hconf_init unconditionally. * nss/getXXbyYY_r.c (REENTRANT_NAME): Likewise. * sysdeps/posix/getaddrinfo.c (gaih_inet): Likewise.
* Get rid of array-bounds warning in __kernel_rem_pio2[f] with gcc 6.1 -O3.Stefan Liebler2016-08-182-0/+20
| | | | | | | | | | | | | | | | | | On s390x I get the following werror when build with gcc 6.1 (or current gcc head) and -O3: ../sysdeps/ieee754/dbl-64/k_rem_pio2.c: In function ‘__kernel_rem_pio2’: ../sysdeps/ieee754/dbl-64/k_rem_pio2.c:254:18: error: array subscript is below array bounds [-Werror=array-bounds] for (k = 1; iq[jk - k] == 0; k++) ~~^~~~~~~~ I get the same error with sysdeps/ieee754/flt-32/k_rem_pio2f.c. This patch adds DIAG_* macros around it. ChangeLog: * sysdeps/ieee754/dbl-64/k_rem_pio2.c (__kernel_rem_pio2): Use DIAG_*_NEEDS_COMMENT macro to get rid of array-bounds warning. * sysdeps/ieee754/flt-32/k_rem_pio2f.c (__kernel_rem_pio2f): Likewise.
* ldbl-128: Remove unused sqrtl declaration in e_asinl.cPaul E. Murphy2016-08-171-1/+0
| | | | | This did not alter compilation for s390x and aarch64 targets.
* Support for type-generic libm function implementations libmPaul E. Murphy2016-08-1716-60/+320
| | | | | | | | | | | | | | | | | | | | | | | This defines a new classes of libm objects. The <func>_template.c file which is used in conjunction with the new makefile hooks to derive variants for each type supported by the target machine. The headers math-type-macros-TYPE.h are used to supply macros to a common implementation of a function in a file named FUNC_template.c and glued togethor via a generated file matching existing naming in the build directory. This has the properties of preserving the existing override mechanism and not requiring any arcane build system twiddling. Likewise, it enables machines to override these files without any additional work. I have verified the built objects for ppc64, x86_64, alpha, arm, and m68k do not change in any meaningful way with these changes using the Fedora cross toolchains. I have verified the x86_64 and ppc64 changes still run.
* Do not override objects in libc.a in other static libraries [BZ #20452]Florian Weimer2016-08-1713-1/+16
| | | | | With this change, we no longer add sysdep.o and similar objects which are present in libc.a to other static libraries.
* Add fesetexcept: sparc.Joseph Myers2016-08-161-0/+31
| | | | | | This patch adds a SPARC version of fesetexcept. Untested. * sysdeps/sparc/fpu/fesetexcept.c: New file.
* Add fesetexcept: sh.Joseph Myers2016-08-161-0/+32
| | | | | | This patch adds an SH version of fesetexcept. Untested. * sysdeps/sh/sh4/fpu/fesetexcept.c: New file.
* Add fesetexcept: s390.Joseph Myers2016-08-161-0/+33
| | | | | | | This patch adds an S/390 version of fesetexcept. Tested and corrected by Stefan Liebler. * sysdeps/s390/fpu/fesetexcept.c: New file.
* Add fesetexcept: powerpc.Joseph Myers2016-08-163-0/+107
| | | | | | | | This patch adds PowerPC versions of fesetexcept. * sysdeps/powerpc/fpu/fesetexcept.c: New file. * sysdeps/powerpc/nofpu/fesetexcept.c: Likewise. * sysdeps/powerpc/powerpc32/e500/nofpu/fesetexcept.c: Likewise.
* Add fesetexcept: mips.Joseph Myers2016-08-161-0/+32
| | | | | | This patch adds a MIPS version of fesetexcept. * sysdeps/mips/fpu/fesetexcept.c: New file.
* Add fesetexcept: m68k.Joseph Myers2016-08-161-0/+31
| | | | | | This patch adds an M68K version of fesetexcept. Untested. * sysdeps/m68k/fpu/fesetexcept.c: New file.
* Add fesetexcept: ia64.Joseph Myers2016-08-161-0/+31
| | | | | | This patch adds an IA64 version of fesetexcept. Untested. * sysdeps/ia64/fpu/fesetexcept.c: New file.
* Add fesetexcept: hppa.Joseph Myers2016-08-161-0/+35
| | | | | | This patch adds an HPPA version of fesetexcept. Untested. * sysdeps/hppa/fpu/fesetexcept.c: New file.
* Add fesetexcept: arm.Joseph Myers2016-08-161-0/+38
| | | | | | This patch adds an ARM version of fesetexcept. * sysdeps/arm/fesetexcept.c: New file.
* Add fesetexcept: alpha.Joseph Myers2016-08-161-0/+31
| | | | | | This patch adds an Alpha version of fesetexcept. Untested. * sysdeps/alpha/fpu/fesetexcept.c: New file.
* Add fesetexcept: aarch64.Joseph Myers2016-08-161-0/+34
| | | | | | This patch adds an AArch64 version of fesetexcept. Untested. * sysdeps/aarch64/fpu/fesetexcept.c: New file.
* Add fesetexcept.Joseph Myers2016-08-1629-0/+116
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TS 18661-1 defines an fesetexcept function for setting floating-point exception flags without the side-effect of causing enabled traps to be taken. This patch series implements this function for glibc. The present patch adds the fallback stub implementation, x86 and x86_64 implementations, documentation, tests and ABI baseline updates. The remaining patches, some of them untested, add implementations for other architectures. The implementations generally follow those of the fesetexceptflag function. As for fesetexceptflag, the approach taken for architectures where setting flags causes enabled traps to be taken is to set the flags (and potentially cause traps) rather than refusing to set the flags and returning an error. Since ISO C and TS 18661 provide no way to enable traps, this is formally in accordance with the standards. The NEWS entry should be considered a placeholder, since this patch series is intended to be followed by further such series adding other TS 18661-1 features, so that the NEWS entry would end up looking more like * New <fenv.h> features from TS 18661-1:2014 are added to libm: the fesetexcept, fetestexceptflag, fegetmode and fesetmode functions, the femode_t type and the FE_DFL_MODE macro. with hopefully more such entries for other features, rather than having an entry for a single function in the end. I believe we have consensus for adding TS 18661-1 interfaces as per <https://sourceware.org/ml/libc-alpha/2016-06/msg00421.html>. Tested for x86_64, x86, mips64 (hard float, and soft float to test the fallback version), arm (hard float) and powerpc (hard float, soft float and e500). * math/fesetexcept.c: New file. * sysdeps/i386/fpu/fesetexcept.c: Likewise. * sysdeps/x86_64/fpu/fesetexcept.c: Likewise. * math/fenv.h: Define __GLIBC_INTERNAL_STARTING_HEADER_IMPLEMENTATION and include <bits/libc-header-start.h> instead of including <features.h>. [__GLIBC_USE (IEC_60559_BFP_EXT)] (fesetexcept): New function declaration. * manual/arith.texi (fesetexcept): Document function. * math/Versions (fesetexcept): New libm symbol at version GLIBC_2.25. * math/Makefile (libm-support): Add fesetexcept. (tests): Add test-fesetexcept and test-fesetexcept-traps. * math/test-fesetexcept.c: New file. * math/test-fesetexcept-traps.c: Likewise. * sysdeps/nacl/libm.abilist: Update. * sysdeps/unix/sysv/linux/aarch64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/alpha/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/arm/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/hppa/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/i386/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/ia64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/m68k/coldfire/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/m68k/m680x0/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/microblaze/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/mips/mips32/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/mips/mips64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/nios2/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc32/nofpu/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc64/libm-le.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/s390/s390-32/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/s390/s390-64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/sh/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/sparc/sparc32/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/sparc/sparc64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilegx/tilegx32/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilegx/tilegx64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/x86_64/64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/x86_64/x32/libm.abilist: Likewise.
* arm: mark __startcontext as .cantunwind (bug 20435)Andreas Schwab2016-08-151-0/+7
| | | | | __startcontext marks the bottom of the call stack of the contexts created by makecontext.
* Add comment from sysdeps/powerpc/fpu/fraiseexcpt.c to fsetexcptflg.c.Joseph Myers2016-08-121-0/+1
| | | | | * sysdeps/powerpc/fpu/fsetexcptflg.c (__fesetexceptflag): Add comment from fraiseexcpt.c.
* Fix powerpc fesetexceptflag clearing FE_INVALID (bug 20455).Joseph Myers2016-08-101-1/+4
| | | | | | | | | | | | | | | | As shown by the test math/test-fexcept, the powerpc fesetexceptflag implementation fails to clear a previously set FE_INVALID flag, when that flag is clear in the saved exceptions and FE_INVALID is included in the mask of flags to restore, because it fails to mask out the sub-exceptions of FE_INVALID from the FPSCR state. This patch fixes the masking logic accordingly. Tested for powerpc. [BZ #20455] * sysdeps/powerpc/fpu/fsetexcptflg.c (__fesetexceptflag): Mask out all FE_INVALID sub-exceptions from FPSCR when FE_INVALID specified to be restored.
* Add tests for fegetexceptflag, fesetexceptflag.Joseph Myers2016-08-102-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | I noticed that there was no meaningful test coverage for fegetexceptflag and fesetexceptflag (one test ensures that calls to them compile and link, but nothing to verify they work correctly). This patch adds tests for these functions. fesetexceptflag is meant to set the relevant exception flag bits to the saved state without causing enabled traps to be taken. On some architectures, it is not possible to set exception flag bits without causing enabled traps to occur. Such architectures need to define EXCEPTION_SET_FORCES_TRAP to 1 in their math-tests.h, as is done in this patch for powerpc. x86 avoids needing to define this because the traps resulting from setting exception bits don't occur until the next floating-point operation or fwait instruction. Tested for x86_64, x86 and powerpc. Note that test-fexcept fails for powerpc because of a pre-existing bug in fesetexceptflag for powerpc, which I'll fix separately. * math/test-fexcept-traps.c: New file. * math/test-fexcept.c: Likewise. * math/Makefile (tests): Add test-fexcept and test-fexcept-traps. * sysdeps/generic/math-tests.h (EXCEPTION_SET_FORCES_TRAP): New macro. * sysdeps/powerpc/math-tests.h [!__NO_FPRS__] (EXCEPTION_SET_FORCES_TRAP): Likewise.
* Fix recvmsg returning SIGLOST on PF_LOCAL socketsSamuel Thibault2016-08-091-1/+3
| | | | | | | when msg_name is not NULL. * sysdeps/mach/hurd/recvmsg.c (__libc_recvmsg): Cope with aport being MACH_PORT_NULL.
* sparc32/sparcv9: add a VIS3 version of fdimAurelien Jarno2016-08-055-1/+114
| | | | | | | | | | | | | | | | | | | sparc32 passes floating point values in the integer registers. VIS3 instructions gives access to the movwtos instruction to directly transfer a value from an integer register to a floating point register. Therefore it makes sense to provide a VIS3 version consisting in the generic version compiled with -mvis3. Changelog: * math/s_fdim.c: Avoid alias renamed. * math/s_fdimf.c: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile [$(subdir) = math && $(have-as-vis3) = yes] (libm-sysdep_routines): Add s_fdimf-vis3, s_fdim-vis3. (CFLAGS-s_fdimf-vis3.c): New. Set to -Wa,-Av9d -mvis3. (CFLAGS-s_fdim-vis3.c): Likewise. sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-vis3.c: New file. sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c: Likewise.
* sparc: remove fdim sparc specific implementationsAurelien Jarno2016-08-0511-314/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fdim and fdimf functions on sparc do not fully follow the standard and do not set errno to ERANGE when the result overflows. Since glibc 2.24 this causes the two following tests to fail: Failure: fdim (max_value, -max_value): errno set to 0, expected 34 (ERANGE) Failure: fdim_upward (max_value, -max_value): errno set to 0, expected 34 (ERANGE) It happens that using GCC with the generic C code generates very similar code to the sparc specific implementations. Therefore this patches remove them. Note it might still worth adding a vis3 specific version of fdim on sparc32/sparcv9, this is done in a following patch to ease backporting. Changelog: * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile [$(subdir) = math && $(have-as-vis3) = yes] (libm-sysdep_routines): Remove s_fdimf-vis3, s_fdim-vis3. * sysdeps/sparc/sparc32/fpu/s_fdim.S: Delete file. * sysdeps/sparc/sparc32/fpu/s_fdimf.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-vis3.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf-vis3.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/s_fdim.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/s_fdimf.S: Likewise. * sysdeps/sparc/sparc64/fpu/s_fdim.S: Likewise. * sysdeps/sparc/sparc64/fpu/s_fdimf.S: Likewise.
* sparc: build with -mvis on sparc32/sparcv9 and sparc64Aurelien Jarno2016-08-052-1/+3
| | | | | | | | | | | | | | When building for sparc32/sparcv9 or sparc64, we assume that VIS instructions are available and use them in the sparc specific assembly code. However we do not tell GCC to use such instructions, resulting in slightly suboptimal code. Fix that by passing -Wa,-Av9a -mvis to GCC. Changelog: * sysdeps/sparc/sparc32/sparcv9/Makefile (sysdep-CFLAGS): Add -mvis. * sysdeps/sparc/sparc64/Makefile (sysdep-CFLAGS): New. Define to -Wa,-Av9a -mvis.
* x86: Use sysdep.o from libc.a in static librariesFlorian Weimer2016-08-041-0/+2
| | | | | | | | | Static libraries can use the sysdep.o copy in libc.a without a performance penalty. This results in a visible difference if libpthread.a is relinked into a single object file (which is needed to support libraries which check for the presence of certain symbols to enable threading support, which generally fails with static linking unless libpthread.a is relinked).
* Minimize sysdeps code involved in defining major/minor/makedev.Zack Weinberg2016-08-0333-136/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Presently sys/sysmacros.h is entirely defined in sysdeps. This would mean that the deprecation logic coming up in the next patch would have to be written twice (in generic/ and unix/sysv/linux/). To avoid that, hoist all but the unavoidably system-dependent logic to misc/, leaving a bits/ header behind. This also promotes the Linux-specific encoding of dev_t, which accommodates 32-bit major and minor numbers in a 64-bit dev_t, to generic, as glibc's dev_t is always 64 bits wide. The former Linux implementation used inline functions to avoid evaluating arguments more than once. After this change, all platforms use inline functions, which means that three new symbols are added to the generic ABI. (These symbols are in the user namespace, which is how they have always been on Linux. They begin with "gnu_dev_", so collisions with user code are pretty unlikely.) New ports henceforth need only provide a bits/sysmacros.h defining internal macros __SYSMACROS_{DECLARE,DEFINE}_{MAJOR,MINOR,MAKEDEV}. This is only necessary if the kernel encoding is incompatible with the now-generic encoding (for instance, it would be necessary for FreeBSD). While I was at it, I added a basic round-trip test for these functions. * sysdeps/generic/sys/sysmacros.h: Delete file. * sysdeps/unix/sysv/linux/makedev.c: Delete file. * sysdeps/unix/sysv/linux/sys/sysmacros.h: Move file ... * bits/sysmacros.h: ... here; this encoding is now the generic encoding. Now defines only the following macros: __SYSMACROS_DECLARE_MAJOR, __SYSMACROS_DEFINE_MAJOR, __SYSMACROS_DECLARE_MINOR, __SYSMACROS_DEFINE_MINOR, __SYSMACROS_DECLARE_MAKEDEV, __SYSMACROS_DEFINE_MAKEDEV. * misc/sys/sysmacros.h, misc/makedev.c: New files that use bits/sysmacros.h and the above new macros to generate the public implementations of major, minor, and makedev. * misc/tst-makedev.c: New test. * include/sys/sysmacros.h: New wrapper. * misc/Makefile (headers): Add sys/sysmacros.h, bits/sysmacros.h. (routines): Add makedev. (tests): Add tst-makedev. * misc/Versions [GLIBC_2.25]: Add gnu_dev_major, gnu_dev_minor, gnu_dev_makedev. * posix/Makefile (headers): Remove sys/sysmacros.h. * sysdeps/unix/sysv/linux/Makefile (sysdep_routines): Remove makedev. * sysdeps/arm/nacl/libc.abilist: Add GLIBC_2.25, gnu_dev_major, gnu_dev_makedev, gnu_dev_minor. * sysdeps/unix/sysv/linux/aarch64/libc.abilist * sysdeps/unix/sysv/linux/alpha/libc.abilist * sysdeps/unix/sysv/linux/arm/libc.abilist * sysdeps/unix/sysv/linux/hppa/libc.abilist * sysdeps/unix/sysv/linux/i386/libc.abilist * sysdeps/unix/sysv/linux/ia64/libc.abilist * sysdeps/unix/sysv/linux/m68k/coldfire/libc.abilist * sysdeps/unix/sysv/linux/m68k/m680x0/libc.abilist * sysdeps/unix/sysv/linux/microblaze/libc.abilist * sysdeps/unix/sysv/linux/mips/mips32/fpu/libc.abilist * sysdeps/unix/sysv/linux/mips/mips32/nofpu/libc.abilist * sysdeps/unix/sysv/linux/mips/mips64/n32/libc.abilist * sysdeps/unix/sysv/linux/mips/mips64/n64/libc.abilist * sysdeps/unix/sysv/linux/nios2/libc.abilist * sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/libc.abilist * sysdeps/unix/sysv/linux/powerpc/powerpc32/nofpu/libc.abilist * sysdeps/unix/sysv/linux/powerpc/powerpc64/libc-le.abilist * sysdeps/unix/sysv/linux/powerpc/powerpc64/libc.abilist * sysdeps/unix/sysv/linux/s390/s390-32/libc.abilist * sysdeps/unix/sysv/linux/s390/s390-64/libc.abilist * sysdeps/unix/sysv/linux/sh/libc.abilist * sysdeps/unix/sysv/linux/sparc/sparc32/libc.abilist * sysdeps/unix/sysv/linux/sparc/sparc64/libc.abilist * sysdeps/unix/sysv/linux/tile/tilegx/tilegx32/libc.abilist * sysdeps/unix/sysv/linux/tile/tilegx/tilegx64/libc.abilist * sysdeps/unix/sysv/linux/tile/tilepro/libc.abilist * sysdeps/unix/sysv/linux/x86_64/64/libc.abilist * sysdeps/unix/sysv/linux/x86_64/x32/libc.abilist: Add GLIBC_2.25.
* Remove tacit double usage in ldbl-128Paul E. Murphy2016-08-033-3/+3
| | | | | | There is quiet truncation to double arithmetic in several files. I noticed them when building ldbl-128 in a soft-fp context. This did not change any test results.
* elf: Avoid using memalign for TLS allocations [BZ #17730]Florian Weimer2016-08-031-5/+7
| | | | | | | | | | | | Instead of a flag which indicates the pointer can be freed, dtv_t now includes the pointer which should be freed. Due to padding, the size of dtv_t does not increase. To avoid using memalign, the new allocate_dtv_entry function allocates a sufficiently large buffer so that a sub-buffer can be found in it which starts with an aligned pointer. Both the aligned and original pointers are kept, the latter for calling free later.
* Define UDP_ENCAP_* from Linux 4.7 in netinet/udp.h.Joseph Myers2016-08-031-0/+2
| | | | | | | | | | | This patch adds the new UDP_ENCAP_GTP0 and UDP_ENCAP_GTP1U from Linux 4.7 to sysdeps/gnu/netinet/udp.h. Tested for x86_64 and x86 (testsuite, and that installed stripped shared libraries are unchanged by the patch). * sysdeps/gnu/netinet/udp.h (UDP_ENCAP_GTP0): New macro. (UDP_ENCAP_GTP1U): Likewise.
* Define PF_QIPCRTR, AF_QIPCRTR from Linux 4.7 in bits/socket.h.Joseph Myers2016-08-031-1/+3
| | | | | | | | | | | | This patch adds the new PF_QIPCRTR and AF_QIPCRTR from Linux 4.7 to sysdeps/unix/sysv/linux/bits/socket.h. Tested for x86_64 and x86 (testsuite, and that installed stripped shared libraries are unchanged by the patch). * sysdeps/unix/sysv/linux/bits/socket.h (PF_QIPCRTR): New macro. (PF_MAX): Update value. (AF_QIPCRTR): New macro.
* sparc64: add a VIS3 version of ceil, floor and truncAurelien Jarno2016-08-0316-3/+348
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sparc64 passes floating point values in the floating point registers. As the the generic ceil, floor and trunc functions use integer instructions, it makes sense to provide a VIS3 version consisting in the the generic version compiled with -mvis3. GCC will then use movdtox, movxtod, movwtos and movstow instructions. sparc32 passes the floating point values in the integer registers, so it doesn't make sense to do the same. Changelog: * sysdeps/ieee754/dbl-64/s_trunc.c: Avoid alias renamed. * sysdeps/ieee754/dbl-64/wordsize-64/s_trunc.c: Likewise. * sysdeps/ieee754/flt-32/s_truncf.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile [$(subdir) = math && $(have-as-vis3) = yes] (libm-sysdep_routines): Add s_ceilf-vis3, s_ceil-vis3, s_floorf-vis3, s_floor-vis3, s_truncf-vis3, s_trunc-vis3. (CFLAGS-s_ceilf-vis3.c): New. Set to -Wa,-Av9d -mvis3. (CFLAGS-s_ceil-vis3.c): Likewise. (CFLAGS-s_floorf-vis3.c): Likewise. (CFLAGS-s_floor-vis3.c): Likewise. (CFLAGS-s_truncf-vis3.c): Likewise. (CFLAGS-s_trunc-vis3.c): Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis3.c: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis3.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floor.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis3.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-vis3.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-vis3.c: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.c: Likewise.
* Fix sNaN handling in nearbyint on 32-bit sparc.David S. Miller2016-08-024-10/+10
| | | | | | | | | | | | * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S (__nearbyint_vis3): Don't check for sNaN before float register is loaded with the incoming argument. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S (__nearbyintf_vis3): Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S (__nearbyint): Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S (__nearbyintf): Likewise.
* powerpc: fix ifunc-sel.h fix asm constraints and clobber listAurelien Jarno2016-08-031-2/+4
| | | | | | | | | | | | | | | As pointer out on the mailing list, the inline assembly code in sysdeps/powerpc/ifunc-sel.h doesn't have a list of clobbered registers and used wrong constraints. This patch fixes that. I verified it doesn't introduce any change in the generated code. Changelog: * sysdeps/powerpc/ifunc-sel.h (ifunc_sel): Add "11", "12", "cr0" to the clobber list. Use "i" constraint instead of "X". (ifunc_one): Add "12" to the clobber list. Use "i" constraint instead of "X".
* powerpc: fix ifunc-sel.h with GCC 6Aurelien Jarno2016-08-031-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On 32-bit PowerPC GCC 6 always saves the PIC register on the stack in the prologue and adjust the stack in the epilogue. It is therefore not possible anymore to just exit the function in the inline asm code, otherwise it corrupts the stack pointer. This causes the following tests to fail when using GCC 6: FAIL: elf/ifuncmain1 FAIL: elf/ifuncmain1pic FAIL: elf/ifuncmain1picstatic FAIL: elf/ifuncmain1pie FAIL: elf/ifuncmain1staticpic FAIL: elf/ifuncmain1staticpie FAIL: elf/ifuncmain1vis FAIL: elf/ifuncmain1vispic FAIL: elf/ifuncmain1vispie FAIL: elf/ifuncmain2pic FAIL: elf/ifuncmain2picstatic FAIL: elf/ifuncmain3 FAIL: elf/ifuncmain4picstatic FAIL: elf/ifuncmain5 FAIL: elf/ifuncmain5picstatic FAIL: elf/ifuncmain5staticpic The solution is to replace the beqlr instructions by a beq to the end of the inline asm code. This fixes all the above failures. ChangeLog: * sysdeps/powerpc/ifunc-sel.h (ifunc_sel): Replace beqlr instructions by beq instructions jumping to the end of the function.
* x86_64: Call finite scalar versions in vectorized log, pow, exp (bz #20033).Andrew Senkevich2016-08-0224-54/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Vector math functions require -ffast-math which sets -ffinite-math-only, so it is needed to call finite scalar versions (which are called from vector functions in some cases). Since finite version of pow() returns qNaN instead of 1.0 for several inputs, those inputs are excluded for tests of vector math functions. [BZ #20033] * sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core_sse4.S: Call finite version. * sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core_avx2.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_log2_core_sse4.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_log4_core_avx2.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core_sse4.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core_avx2.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core_sse4.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core_avx2.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core_sse4.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core_avx2.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S: Likewise. * sysdeps/x86_64/fpu/svml_d_exp2_core.S: Likewise. * sysdeps/x86_64/fpu/svml_d_log2_core.S: Likewise. * sysdeps/x86_64/fpu/svml_d_pow2_core.S: Likewise. * sysdeps/x86_64/fpu/svml_s_expf4_core.S: Likewise. * sysdeps/x86_64/fpu/svml_s_logf4_core.S: Likewise. * sysdeps/x86_64/fpu/svml_s_powf4_core.S: Likewise. * math/libm-test.inc (pow_test_data): Exclude tests for qNaN in power zero.
* alpha: fix trunc for big input valuesAurelien Jarno2016-08-022-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The alpha specific version of trunc and truncf always add and subtract 0x1.0p23 or 0x1.0p52 even for big values. This causes this kind of errors in the testsuite: Failure: Test: trunc_towardzero (0x1p107) Result: is: 1.6225927682921334e+32 0x1.fffffffffffffp+106 should be: 1.6225927682921336e+32 0x1.0000000000000p+107 difference: 1.8014398509481984e+16 0x1.0000000000000p+54 ulp : 0.5000 max.ulp : 0.0000 Change this by returning the input value when its absolute value is greater than 0x1.0p23 or 0x1.0p52. NaN have to go through the add and subtract operations to get possibly silenced. Finally remove the code to handle inexact exception, trunc should never generate such an exception. Changelog: * sysdeps/alpha/fpu/s_trunc.c (__trunc): Return the input value when its absolute value is greater than 0x1.0p52. [_IEEE_FP_INEXACT] Remove. * sysdeps/alpha/fpu/s_truncf.c (__truncf): Return the input value when its absolute value is greater than 0x1.0p23. [_IEEE_FP_INEXACT] Remove.
* alpha: fix rint on sNaN inputAurelien Jarno2016-08-022-0/+6
| | | | | | | | | | | The alpha version of rint wrongly return sNaN for sNaN input. Fix that by checking for NaN and by returning the input value added with itself in that case. Changelog: * sysdeps/alpha/fpu/s_rint.c (__rint): Add argument with itself when it is a NaN. * sysdeps/alpha/fpu/s_rintf.c (__rintf): Likewise.
* alpha: fix floor on sNaN inputAurelien Jarno2016-08-022-8/+6
| | | | | | | | | | | | | | | The alpha version of floor wrongly return sNaN for sNaN input. Fix that by checking for NaN and by returning the input value added with itself in that case. Finally remove the code to handle inexact exception, floor should never generate such an exception. Changelog: * sysdeps/alpha/fpu/s_floor.c (__floor): Add argument with itself when it is a NaN. [_IEEE_FP_INEXACT] Remove. * sysdeps/alpha/fpu/s_floorf.c (__floorf): Likewise.
* alpha: fix ceil on sNaN inputAurelien Jarno2016-08-022-8/+6
| | | | | | | | | | | | | | | The alpha version of ceil wrongly return sNaN for sNaN input. Fix that by checking for NaN and by returning the input value added with itself in that case. Finally remove the code to handle inexact exception, ceil should never generate such an exception. Changelog: * sysdeps/alpha/fpu/s_ceil.c (__ceil): Add argument with itself when it is a NaN. [_IEEE_FP_INEXACT] Remove. * sysdeps/alpha/fpu/s_ceilf.c (__ceilf): Likewise.
* sparc: remove ceil, floor, trunc sparc specific implementationsAurelien Jarno2016-08-0246-2245/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ceil, floor and trunc functions on sparc do not fully follow the standard and trigger an inexact exception when presented a value which is not an integer. Since glibc 2.24 this causes a few tests to fail, for instance: testing double (without inline functions) Failure: ceil (lit_pi): Exception "Inexact" set Failure: ceil (-lit_pi): Exception "Inexact" set Failure: ceil (min_subnorm_value): Exception "Inexact" set Failure: ceil (min_value): Exception "Inexact" set Failure: ceil (0.1): Exception "Inexact" set Failure: ceil (0.25): Exception "Inexact" set Failure: ceil (0.625): Exception "Inexact" set Failure: ceil (-min_subnorm_value): Exception "Inexact" set Failure: ceil (-min_value): Exception "Inexact" set Failure: ceil (-0.1): Exception "Inexact" set Failure: ceil (-0.25): Exception "Inexact" set Failure: ceil (-0.625): Exception "Inexact" set I tried to fix that by using the same strategy than used on other architectures, that is by saving the FSR register at the beginning and restoring it at the end of the function. When doing so I noticed a comment that this operation might be very costly, so I decided to do some benchmarks. The benchmarks below represent the time required to run each of the function 60 millions of times with different input value. I have done that in the basic V9 code, the VIS2 code, and using the default C implementation of the libc, for both sparc32 and sparc64, on a Niagara T1 based machine and an UltraSparc IIIi. Given I don't have access to a more recent machine), I haven't been able to test the VIS3 version. Also it should be noted that it doesn't make sense to do this benchmark for V8 or earlier as in that case we use the default C implementation. The results are available in the table below, the "+ fix" version correspond to the one saving and restoring the FSR. Niagara T1 / sparc32 -------------------- ceilf ceil floorf floor truncf trunc V9 19.10 22.48 19.10 22.48 16.59 19.27 V9 + fix 19.77 23.34 19.77 23.33 17.27 20.12 VIS2 16.87 19.62 16.87 19.62 VIS2 + fix 17.55 20.47 17.55 20.47 C impl 11.39 13.80 11.40 13.80 10.88 10.84 Niagara T1 / sparc64 -------------------- ceilf ceil floorf floor truncf trunc V9 18.14 22.23 18.14 22.23 15.64 19.02 V9 + fix 18.82 23.08 18.82 23.08 16.32 19.87 VIS2 15.92 19.37 15.92 19.37 VIS2 + fix 16.59 20.22 16.59 20.22 C impl 11.39 13.60 11.39 15.36 10.88 12.65 UltraSparc IIIi / sparc32 ------------------------- ceilf ceil floorf floor truncf trunc V9 4.81 7.09 6.61 11.64 4.91 7.05 V9 + fix 7.20 10.42 7.14 10.54 6.76 9.47 VIS2 4.81 7.03 4.76 7.13 VIS2 + fix 6.76 9.51 6.71 9.63 C impl 3.88 8.62 3.90 9.45 3.57 6.62 UltraSparc IIIi / sparc64 ------------------------- ceilf ceil floorf floor truncf trunc V9 3.48 4.39 3.48 4.41 3.01 3.85 V9 + fix 4.76 5.90 4.76 5.90 4.86 6.26 VIS2 2.95 3.61 2.95 3.61 VIS2 + fix 4.24 5.37 4.30 7.97 C impl 3.63 4.89 3.62 6.38 3.33 4.03 The first thing that should be noted is that the C implementation is always faster on the Niagara T1 based machine. On the UltraSparc IIIi the float version on sparc32 is also faster. Coming back about the fix saving and restoring the FSR, it appears it has a big impact as expected. In that case the C implementation is always faster than the fixed implementations. This patch therefore removes the sparc specific implementations in favor of the generic ones. Changelog: * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile [$(subdir) = math] (libm-sysdep_routines): Remove. [$(subdir) = math && $(have-as-vis3) = yes] (libm-sysdep_routines): Remove s_ceilf-vis3, s_ceil-vis3, s_floorf-vis3, s_floor-vis3, s_truncf-vis3, s_trunc-vis3. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceil-vis2.S: Delete file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceil-vis3.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceil.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceilf-vis2.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceilf-vis3.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_ceilf.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floor-vis2.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floor-vis3.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floor.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floorf-vis2.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floorf-vis3.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_floorf.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_trunc-vis3.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_trunc.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_truncf-vis3.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_truncf.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/s_ceil.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/s_ceilf.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/s_floor.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/s_floorf.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/s_trunc.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/s_truncf.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis2.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis3.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis2.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis2.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis3.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floor.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis2.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis3.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-vis3.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-vis3.S: Likewise. * sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.S: Likewise. * sysdeps/sparc/sparc64/fpu/s_ceil.S: Likewise. * sysdeps/sparc/sparc64/fpu/s_ceilf.S: Likewise. * sysdeps/sparc/sparc64/fpu/s_floor.S: Likewise. * sysdeps/sparc/sparc64/fpu/s_floorf.S: Likewise. * sysdeps/sparc/sparc64/fpu/s_trunc.S: Likewise. * sysdeps/sparc/sparc64/fpu/s_truncf.S: Likewise.
* Don't compile do_test with -mavx/-mavx/-mavx512H.J. Lu2016-07-2711-78/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't compile do_test with -mavx, -mavx nor -mavx512 since they won't run on non-AVX machines. [BZ #20384] * sysdeps/x86_64/fpu/Makefile (extra-test-objs): Add test-double-libmvec-sincos-avx-main.o, test-double-libmvec-sincos-avx2-main.o, test-double-libmvec-sincos-main.o, test-float-libmvec-sincosf-avx-main.o, test-float-libmvec-sincosf-avx2-main.o and test-float-libmvec-sincosf-main.o. test-float-libmvec-sincosf-avx512-main.o. ($(objpfx)test-double-libmvec-sincos): Also link with $(objpfx)test-double-libmvec-sincos-main.o. ($(objpfx)test-double-libmvec-sincos-avx): Also link with $(objpfx)test-double-libmvec-sincos-avx-main.o. ($(objpfx)test-double-libmvec-sincos-avx2): Also link with $(objpfx)test-double-libmvec-sincos-avx2-main.o. ($(objpfx)test-float-libmvec-sincosf): Also link with $(objpfx)test-float-libmvec-sincosf-main.o. ($(objpfx)test-float-libmvec-sincosf-avx): Also link with $(objpfx)test-float-libmvec-sincosf-avx2-main.o. [$(config-cflags-avx512) == yes] (extra-test-objs): Add test-double-libmvec-sincos-avx512-main.o and ($(objpfx)test-double-libmvec-sincos-avx512): Also link with $(objpfx)test-double-libmvec-sincos-avx512-main.o. ($(objpfx)test-float-libmvec-sincosf-avx512): Also link with $(objpfx)test-float-libmvec-sincosf-avx512-main.o. (CFLAGS-test-double-libmvec-sincos.c): Removed. (CFLAGS-test-float-libmvec-sincosf.c): Likewise. (CFLAGS-test-double-libmvec-sincos-main.c): New. (CFLAGS-test-double-libmvec-sincos-avx-main.c): Likewise. (CFLAGS-test-double-libmvec-sincos-avx2-main.c): Likewise. (CFLAGS-test-float-libmvec-sincosf-main.c): Likewise. (CFLAGS-test-float-libmvec-sincosf-avx-main.c): Likewise. (CFLAGS-test-float-libmvec-sincosf-avx2-main.c): Likewise. (CFLAGS-test-float-libmvec-sincosf-avx512-main.c): Likewise. (CFLAGS-test-double-libmvec-sincos-avx.c): Set to -DREQUIRE_AVX. (CFLAGS-test-float-libmvec-sincosf-avx.c ): Likewise. (CFLAGS-test-double-libmvec-sincos-avx2.c): Set to -DREQUIRE_AVX2. (CFLAGS-test-float-libmvec-sincosf-avx2.c ): Likewise. (CFLAGS-test-double-libmvec-sincos-avx512.c): Set to -DREQUIRE_AVX512F. (CFLAGS-test-float-libmvec-sincosf-avx512.c): Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-sincos.c: Rewritten. * sysdeps/x86_64/fpu/test-float-libmvec-sincosf.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx-main.c: New file. * sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx2-main.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx512-main.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-sincos-main.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx-main.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx2-main.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx512-main.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-sincosf-main.c: Likewise.
* Nios II localplt.data update: remove __eqsf2Chung-Lin Tang2016-07-271-1/+0
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