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* arm: Enable USE_ATOMIC_COMPILER_BUILTINS (BZ #24774)Adhemerval Zanella2022-10-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per other architectures. I have checked on a armv8 hardware with the following configurations: arm-linux-gnueabihf (gcc built with --with-float=hard --with-cpu=arm926ej-s) armv5-linux-gnueabihf (-march=armv5te -mfpu=vfpv3) armv7-linux-gnueabihf (-march=armv7-a -mfpu=vfpv3) armv7-thumb-linux-gnueabihf (-march=armv7-a -mfpu=vfpv3 -mthumb) armv7-neon-linux-gnueabihf (-march=armv7-a -mfpu=neon) armv7-neonhard-linux-gnueabihf (-march=armv7-a -mfpu=neon -mfloat-abi=hard) Without any regression. I haven't dig into the code, but since Linux atomic-machine.h handle pre-ARMv6 and ARMv6 I expect the compiler might have some small room to optimize. The code size also improves is most of the configurations: * master text data bss dec hex filename 1727801 9720 37928 1775449 1b1759 arm-linux-gnueabihf/libc.so 1691729 9720 37928 1739377 1a8a71 arm-linux-gnueabihf-armv7-disable-multi-arch/libc.so 1725509 9720 37928 1773157 1b0e65 armv5-linux-gnueabihf/libc.so 1700757 9720 37928 1748405 1aadb5 armv6-linux-gnueabihf/libc.so 1698973 9720 37928 1746621 1aa6bd armv6t2-linux-gnueabihf/libc.so 1695481 9752 37928 1743161 1a9939 armv7-linux-gnueabihf/libc.so 1692917 9744 37928 1740589 1a8f2d armv7-neonhard-linux-gnueabihf/libc.so 1692917 9744 37928 1740589 1a8f2d armv7-neon-linux-gnueabihf/libc.so 1225353 9752 37928 1273033 136cc9 armv7-thumb-linux-gnueabihf/libc.so * patched text data bss dec hex filename 1726805 9720 37928 1774453 1b1375 arm-linux-gnueabihf/libc.so 1689321 9720 37928 1736969 1a8109 arm-linux-gnueabihf-armv7-disable-multi-arch/libc.so 1724433 9720 37928 1772081 1b0a31 armv5-linux-gnueabihf/libc.so 1698301 9720 37928 1745949 1aa41d armv6-linux-gnueabihf/libc.so 1696525 9720 37928 1744173 1a9d2d armv6t2-linux-gnueabihf/libc.so 1693009 9752 37928 1740689 1a8f91 armv7-linux-gnueabihf/libc.so 1690493 9744 37928 1738165 1a85b5 armv7-neonhard-linux-gnueabihf/libc.so 1690493 9744 37928 1738165 1a85b5 armv7-neon-linux-gnueabihf/libc.so 1223837 9752 37928 1271517 1366dd armv7-thumb-linux-gnueabihf/libc.so The idea is eventually move all architectures to use compiler builtins. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Tested-by: Aurelien Jarno <aurelien@aurel32.net>
* elf: Remove _dl_string_hwcapJavier Pello2022-10-0610-83/+0
| | | | | | | | Removal of legacy hwcaps support from the dynamic loader left no users of _dl_string_hwcap. Signed-off-by: Javier Pello <devel@otheo.eu> Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* elf: Remove hwcap parameter from add_to_cache signatureJavier Pello2022-10-061-1/+1
| | | | | | | | Last commit made it so that the value passed for that parameter was always 0 at its only call site. Signed-off-by: Javier Pello <devel@otheo.eu> Reviewed-by: Florian Weimer <fweimer@redhat.com>
* x86_64: Remove platform directory library loading testJavier Pello2022-10-063-64/+0
| | | | | | | | | This was to test loading of shared libraries from platform subdirectories, but this functionality is going away in the following commits. Signed-off-by: Javier Pello <devel@otheo.eu> Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* Update kernel version to 6.0 in header constant testsJoseph Myers2022-10-053-4/+4
| | | | | | | | | This patch updates the kernel version in the tests tst-mman-consts.py, tst-mount-consts.py and tst-pidfd-consts.py to 6.0. (There are no new constants covered by these tests in 6.0 that need any other header changes.) Tested with build-many-glibcs.py.
* x86: Fix -Os build (BZ #29576)Adhemerval Zanella Netto2022-10-051-0/+18
| | | | | | | | | | | The compiler might transform __stpcpy calls (which are routed to __builtin_stpcpy as an optimization) to strcpy and x86_64 strcpy multiarch implementation does not build any working symbol due ISA_SHOULD_BUILD not being evaluated for IS_IN(rtld). Checked on x86_64-linux-gnu. Reviewed-by: Carlos O'Donell <carlos@redhat.com> Tested-by: Carlos O'Donell <carlos@redhat.com>
* Regenerate sysdeps/mach/hurd/bits/errno.hJoseph Myers2022-10-051-0/+1
| | | | | | | This addition to the list of source headers in sysdeps/mach/hurd/bits/errno.h appears in the source tree after build-many-glibcs.py runs, I'm guessing resulting from gnumach commit c566ad85a2d6728ebc8ec0f461a3b35df300e96e.
* Update syscall lists for Linux 6.0Joseph Myers2022-10-051-2/+2
| | | | | | | Linux 6.0 has no new syscalls. Update the version number in syscall-names.list to reflect that it is still current for 6.0. Tested with build-many-glibcs.py.
* x86-64: Require BMI1/BMI2 for AVX2 strrchr and wcsrchr implementationsAurelien Jarno2022-10-033-3/+16
| | | | | | | | | | | The AVX2 strrchr and wcsrchr implementation uses the 'blsmsk' instruction which belongs to the BMI1 CPU feature and the 'shrx' instruction, which belongs to the BMI2 CPU feature. Fixes: df7e295d18ff ("x86: Optimize {str|wcs}rchr-avx2") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
* x86-64: Require BMI2 and LZCNT for AVX2 memrchr implementationAurelien Jarno2022-10-033-2/+10
| | | | | | | | | | | The AVX2 memrchr implementation uses the 'shlxl' instruction, which belongs to the BMI2 CPU feature and uses the 'lzcnt' instruction, which belongs to the LZCNT CPU feature. Fixes: af5306a735eb ("x86: Optimize memrchr-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
* x86-64: Require BMI2 for AVX2 (raw|w)memchr implementationsAurelien Jarno2022-10-031-3/+9
| | | | | | | | | | The AVX2 memchr, rawmemchr and wmemchr implementations use the 'bzhi' and 'sarx' instructions, which belongs to the BMI2 CPU feature. Fixes: acfd088a1963 ("x86: Optimize memchr-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
* x86-64: Require BMI2 for AVX2 wcs(n)cmp implementationsAurelien Jarno2022-10-031-2/+6
| | | | | | | | | | | | | | The AVX2 wcs(n)cmp implementations use the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
* x86-64: Require BMI2 for AVX2 strncmp implementationAurelien Jarno2022-10-032-4/+7
| | | | | | | | | | | | | | The AVX2 strncmp implementations uses the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
* x86-64: Require BMI2 for AVX2 strcmp implementationAurelien Jarno2022-10-032-3/+5
| | | | | | | | | | | | | | The AVX2 strcmp implementation uses the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
* x86-64: Require BMI2 for AVX2 str(n)casecmp implementationsAurelien Jarno2022-10-032-8/+21
| | | | | | | | | | | | | | The AVX2 str(n)casecmp implementations use the 'bzhi' instruction, which belongs to the BMI2 CPU feature. NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF as BSF if the CPU doesn't support TZCNT, and produces the same result for non-zero input. Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S") Partially resolves: BZ #29611 Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
* x86: include BMI1 and BMI2 in x86-64-v3 levelAurelien Jarno2022-10-031-0/+2
| | | | | | | | The "System V Application Binary Interface AMD64 Architecture Processor Supplement" mandates the BMI1 and BMI2 CPU features for the x86-64-v3 level. Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
* x86: Cleanup pthread_spin_{try}lock.SNoah Goldstein2022-10-032-12/+29
| | | | | | | | | | | | | Save a jmp on the lock path coming from an initial failure in pthread_spin_lock.S. This costs 4-bytes of code but since the function still fits in the same number of 16-byte blocks (default function alignment) it does not have affect on the total binary size of libc.so (unchanged after this commit). pthread_spin_trylock was using a CAS when a simple xchg works which is often more expensive. Full check passes on x86-64.
* x86: Remove .tfloat usageAdhemerval Zanella2022-10-039-26/+47
| | | | | Some compiler does not support it (such as clang integrated assembler) neither gcc emits it.
* hppa: Fix initialization of dp register [BZ 29635]John David Anglin2022-10-011-5/+19
| | | | | | | | | | | | | After upgrading glibc to Debian 2.35-1, gdb faulted on startup and dropped core in a function call in the main application. This was caused by not initializing the global dp register for the main application early enough. Restore the code to initialize dp in _dl_start_user. It was removed when code was added to initialize dp in elf_machine_runtime_setup. Signed-off-by: John David Anglin <dave.anglin@bell.net>
* malloc: Do not clobber errno on __getrandom_nocancel (BZ #29624)Adhemerval Zanella2022-09-302-3/+11
| | | | | | | | | | Use INTERNAL_SYSCALL_CALL instead of INLINE_SYSCALL_CALL. This requires emulate the semantic for hurd call (so __arc4random_buf uses the fallback). Checked on x86_64-linux-gnu. Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
* stdlib: Fix __getrandom_nocancel type and arc4random usage (BZ #29638)Adhemerval Zanella2022-09-301-1/+1
| | | | | | | | | Using an unsigned type prevents the fallback to be used if kernel does not support getrandom syscall. Checked on x86_64-linux-gnu. Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
* LoongArch: Add static PIE supportXi Ruoyao2022-09-303-3/+95
| | | | | | | If the compiler is new enough, enable static PIE support. In the static PIE version of _start (in rcrt1.o), use la.pcrel instead of la.got because in a static PIE we cannot use GOT entries until the dynamic relocations for GOT are resolved.
* x86: Fix wcsnlen-avx2 page cross length comparison [BZ #29591]Noah Goldstein2022-09-281-5/+2
| | | | | | | | | | | Previous implementation was adjusting length (rsi) to match bytes (eax), but since there is no bound to length this can cause overflow. Fix is to just convert the byte-count (eax) to length by dividing by sizeof (wchar_t) before the comparison. Full check passes on x86-64 and build succeeds w/ and w/o multiarch.
* Update _FloatN header support for C++ in GCC 13Joseph Myers2022-09-285-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GCC 13 adds support for _FloatN and _FloatNx types in C++, so breaking the installed glibc headers that assume such support is not present. GCC mostly works around this with fixincludes, but that doesn't help for building glibc and its tests (glibc doesn't itself contain C++ code, but there's C++ code built for tests). Update glibc's bits/floatn-common.h and bits/floatn.h headers to handle the GCC 13 support directly. In general the changes match those made by fixincludes, though I think the ones in sysdeps/powerpc/bits/floatn.h, where the header tests __LDBL_MANT_DIG__ == 113 or uses #elif, wouldn't match the existing fixincludes patterns. Some places involving special C++ handling in relation to _FloatN support are not changed. There's no need to change the __HAVE_FLOATN_NOT_TYPEDEF definition (also in a form that wouldn't be matched by the fixincludes fixes) because it's only used in relation to macro definitions using features not supported for C++ (__builtin_types_compatible_p and _Generic). And there's no need to change the inline function overloads for issignaling, iszero and iscanonical in C++ because cases where types have the same format but are no longer compatible types are handled automatically by the C++ overload resolution rules. This patch also does not change the overload handling for iseqsig, and there I think changes *are* needed, beyond those in this patch or made by fixincludes. The way that overload is defined, via a template parameter to a structure type, requires overloads whenever the types are incompatible, even if they have the same format. So I think we need to add overloads with GCC 13 for every supported _FloatN and _FloatNx type, rather than just having one for _Float128 when it has a different ABI to long double as at present (but for older GCC, such overloads must not be defined for types that end up defined as typedefs for another type). Tested with build-many-glibcs.py: compilers build for aarch64-linux-gnu ia64-linux-gnu mips64-linux-gnu powerpc-linux-gnu powerpc64le-linux-gnu x86_64-linux-gnu; glibcs build for aarch64-linux-gnu ia64-linux-gnu i686-linux-gnu mips-linux-gnu mips64-linux-gnu-n32 powerpc-linux-gnu powerpc64le-linux-gnu x86_64-linux-gnu.
* hurd: Fix typoSamuel Thibault2022-09-281-1/+1
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* get_nscd_addresses: Fix subscript typos [BZ #29605]Jörg Sonnenberger2022-09-281-3/+3
| | | | | | | | | Fix the subscript on air->family, which was accidentally set to COUNT when it should have remained as I. Resolves: BZ #29605 Reviewed-by: Siddhesh Poyarekar <siddhesh@sourceware.org>
* hurd: Increase SOMAXCONN to 4096Samuel Thibault2022-09-271-1/+1
| | | | Notably fakeroot-tcp may introduce a lot of parallel connections.
* Use atomic_exchange_release/acquireWilco Dijkstra2022-09-2623-28/+28
| | | | | | | Rename atomic_exchange_rel/acq to use atomic_exchange_release/acquire since these map to the standard C11 atomic builtins. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* Use C11 atomics instead of atomic_decrement_and_testWilco Dijkstra2022-09-231-1/+1
| | | | | | | | | | Replace atomic_decrement_and_test with atomic_fetch_add_relaxed. These are simple counters which do not protect any shared data from concurrent accesses. Also remove the unused file cond-perf.c. Passes regress on AArch64. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* Use C11 atomics instead of atomic_increment(_val)Wilco Dijkstra2022-09-231-3/+3
| | | | | | | | | | | Replace atomic_increment and atomic_increment_val with atomic_fetch_add_relaxed. One case in sem_post.c uses release semantics (see comment above it). The others are simple counters and do not protect any shared data from concurrent accesses. Passes regress on AArch64. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* riscv: Remove RV32 floating point functionsAlistair Francis2022-09-218-132/+40
| | | | | | | We don't need RV32 specific floating point functions, instead make them generic for RISC-V. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* riscv: Consolidate the libm-test-ulpsAlistair Francis2022-09-214-1406/+0
| | | | | | | Both RV32 and RV64 should have the same libm-test-ulps, so consolidate them into a single file. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* hurd: Fix SIOCADD/DELRT ioctlsSamuel Thibault2022-09-211-2/+2
| | | | The hurd network stack uses struct ifrtreq rather than ortentry.
* hurd: Drop struct rtentry and in6_rtmsgSamuel Thibault2022-09-211-38/+0
| | | | These were cargo-culted, they are not used at all in Hurd interfaces.
* hurd: Add _IOT_ifrtreq to <net/route.h>Damien Zammit2022-09-211-0/+1
| | | | So that we can use struct ifrtreq in ioctls.
* hurd: Use IF_NAMESIZE rather than IFNAMSIZSamuel Thibault2022-09-211-1/+1
| | | | The latter is not available without __USE_MISC.
* hurd: Add ifrtreq structure to net/route.hDamien Zammit2022-09-211-0/+17
| | | | As used by the hurdish route ioctls.
* hppa: undef __ASSUME_SET_ROBUST_LISTJohn David Anglin2022-09-201-0/+3
| | | | | | | QEMU does not support support set_robust_list. Thus, we need to enable detection of set_robust_list system call. Signed-off-by: John David Anglin <dave.anglin@bell.net>
* linux: Use same type for MMAP2_PAGE_UNITAdhemerval Zanella2022-09-204-4/+4
| | | | | | | It avoid a possible compiler warning where right size of operator is converted from a negative value to unsigned. Reviewed-by: Florian Weimer <fweimer@redhat.com>
* m68k: Enforce 4-byte alignment on internal locks (BZ #29537)Adhemerval Zanella2022-09-204-2/+59
| | | | | | | | | A new internal definition, __LIBC_LOCK_ALIGNMENT, is used to force the 4-byte alignment only for m68k, other architecture keep the natural alignment of the type used internally (and hppa does not require 16-byte alignment for kernel-assisted CAS). Reviewed-by: Florian Weimer <fweimer@redhat.com>
* Linux: Do not skip d_ino == 0 entries in readdir, readdir64 (bug 12165)Florian Weimer2022-09-192-108/+69
| | | | | | | | POSIX does not say this value is special. For example, old XFS file systems may still use inode number zero. Also update the comment regarding ENOENT. Linux may return ENOENT for some file systems.
* hurd: Factorize at/non-at functionsSamuel Thibault2022-09-1726-226/+116
| | | | | | | | | | | | | | | | | | Non-at functions can be implemented by just calling the corresponding at function with AT_FDCWD and zero at_flags. In the linkat case, the at behavior is different (O_NOLINK), so this introduces __linkat_common to pass O_NOLINK as appropriate. lstat functions can also be implemented with fstatat by adding __fstatat64_common which takes a flags parameter in addition to the at_flags parameter, In the end this factorizes chmod, chown, link, lstat64, mkdir, readlink, rename, stat64, symlink, unlink, utimes. This also makes __lstat, __lxstat64, __stat and __xstat64 directly use __fstatat64_common instead of __lstat64 or __stat64.
* RISC-V: Allow long jumps to __syscall_errorŁukasz Stelmach2022-09-166-6/+6
| | | | | | | | | | __syscall_error may end up farther than 1MiB away from a caller, especially when linking statically large binaries. tail allows for 4GiB jumps and is reduced to j when a linked symbol is within range. Fixes: 36960f0c76 ("RISC-V: Linux Syscall Interface") Fixes: 7f33b09c65 ("RISC-V: Linux ABI") Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
* hurd: Make readlink* just reopen the file used for statSamuel Thibault2022-09-152-24/+40
| | | | | | | 9e5c991106cb ("hurd: Fix readlink() hanging on fifo") separated opening the file for the stat call from opening the file for the read call. That however opened a small window for the file to change. Better make this atomic by reopening the file with O_READ.
* hurd: Fix readlink() hanging on fifoSamuel Thibault2022-09-142-2/+8
| | | | | | | | readlink() opens the target with O_READ to be able to read the symlink content. When the target is actually a fifo, that would hang waiting for a writer (caught in the coreutils testsuite). We thus have to first lookup the target without O_READ to perform io_stat and lookout for fifos, and only after checking the symlink type, we can re-lookup with O_READ.
* Use relaxed atomics since there is no MO dependenceWilco Dijkstra2022-09-131-7/+1
| | | | | | | | Replace the 3 uses of atomic_bit_set and atomic_bit_test_set with atomic_fetch_or_relaxed. Using relaxed MO is correct since the atomics are used to ensure memory is released only once. Reviewed-by: Florian Weimer <fweimer@redhat.com>
* Use C11 atomics instead atomic_add(_zero)Wilco Dijkstra2022-09-091-3/+3
| | | | | | Replace atomic_add and atomic_add_zero with atomic_fetch_add_relaxed. Reviewed-by: DJ Delorie <dj@redhat.com>
* errlist: add missing entry for EDEADLOCK (bug 29545)Andreas Schwab2022-09-081-0/+3
| | | | | | | Some architectures (mips, powerpc and sparc) define separate values for EDEADLOCK and EDEADLK. Readd the errlist entry for EDEADLOCK for those configurations. Also use the dependency files from generating the auxiliary errlist and siglist files.
* Do not define static_assert or thread_local in headers for C2xJoseph Myers2022-09-071-1/+3
| | | | | | | | | | | | | | | | | | | | | C2x makes static_assert and thread_local into keywords, removing the definitions as macros in assert.h and threads.h. Thus, disable those macros in those glibc headers for C2x. The disabling is done based on a combination of language version and __GNUC_PREREQ, *not* based on __GLIBC_USE (ISOC2X), on the principle that users of the header (when requesting C11 or later APIs - not assert.h for C99 and older API versions) should always have the names static_assert or thread_local available after inclusion of the header, whether as a keyword or as a macro. Thus, when using a compiler without the keywords (whether an older compiler, possibly in C2x mode, or _GNU_SOURCE with any compiler but in an older language mode, for example) the macros should be defined, even when C2x APIs have been requested. The __GNUC_PREREQ conditionals here may well need updating with the versions of other compilers that gained support for these keywords in C2x mode. Tested for x86_64.
* elf: Rename _dl_sort_maps parameter from skip to force_firstFlorian Weimer2022-09-061-2/+4
| | | | | | | The new implementation will not be able to skip an arbitrary number of objects. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>