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* math: Improve fmodfAdhemerval Zanella Netto2023-04-032-93/+187
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This uses a new algorithm similar to already proposed earlier [1]. With x = mx * 2^ex and y = my * 2^ey (mx, my, ex, ey being integers), the simplest implementation is: mx * 2^ex == 2 * mx * 2^(ex - 1) while (ex > ey) { mx *= 2; --ex; mx %= my; } With mx/my being mantissa of double floating pointer, on each step the argument reduction can be improved 8 (which is sizeof of uint32_t minus MANTISSA_WIDTH plus the signal bit): while (ex > ey) { mx << 8; ex -= 8; mx %= my; } */ The implementation uses builtin clz and ctz, along with shifts to convert hx/hy back to doubles. Different than the original patch, this path assume modulo/divide operation is slow, so use multiplication with invert values. I see the following performance improvements using fmod benchtests (result only show the 'mean' result): Architecture | Input | master | patch -----------------|-----------------|----------|-------- x86_64 (Ryzen 9) | subnormals | 17.2549 | 12.0318 x86_64 (Ryzen 9) | normal | 85.4096 | 49.9641 x86_64 (Ryzen 9) | close-exponents | 19.1072 | 15.8224 aarch64 (N1) | subnormal | 10.2182 | 6.81778 aarch64 (N1) | normal | 60.0616 | 20.3667 aarch64 (N1) | close-exponents | 11.5256 | 8.39685 I also see similar improvements on arm-linux-gnueabihf when running on the N1 aarch64 chips, where it a lot of soft-fp implementation (for modulo, and multiplication): Architecture | Input | master | patch -----------------|-----------------|----------|-------- armhf (N1) | subnormal | 11.6662 | 10.8955 armhf (N1) | normal | 69.2759 | 34.1524 armhf (N1) | close-exponents | 13.6472 | 18.2131 Instead of using the math_private.h definitions, I used the math_config.h instead which is used on newer math implementations. Co-authored-by: kirill <kirill.okhotnikov@gmail.com> [1] https://sourceware.org/pipermail/libc-alpha/2020-November/119794.html Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
* math: Improve fmodAdhemerval Zanella Netto2023-04-032-96/+208
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This uses a new algorithm similar to already proposed earlier [1]. With x = mx * 2^ex and y = my * 2^ey (mx, my, ex, ey being integers), the simplest implementation is: mx * 2^ex == 2 * mx * 2^(ex - 1) while (ex > ey) { mx *= 2; --ex; mx %= my; } With mx/my being mantissa of double floating pointer, on each step the argument reduction can be improved 11 (which is sizeo of uint64_t minus MANTISSA_WIDTH plus the signal bit): while (ex > ey) { mx << 11; ex -= 11; mx %= my; } */ The implementation uses builtin clz and ctz, along with shifts to convert hx/hy back to doubles. Different than the original patch, this path assume modulo/divide operation is slow, so use multiplication with invert values. I see the following performance improvements using fmod benchtests (result only show the 'mean' result): Architecture | Input | master | patch -----------------|-----------------|----------|-------- x86_64 (Ryzen 9) | subnormals | 19.1584 | 12.5049 x86_64 (Ryzen 9) | normal | 1016.51 | 296.939 x86_64 (Ryzen 9) | close-exponents | 18.4428 | 16.0244 aarch64 (N1) | subnormal | 11.153 | 6.81778 aarch64 (N1) | normal | 528.649 | 155.62 aarch64 (N1) | close-exponents | 11.4517 | 8.21306 I also see similar improvements on arm-linux-gnueabihf when running on the N1 aarch64 chips, where it a lot of soft-fp implementation (for modulo, clz, ctz, and multiplication): Architecture | Input | master | patch -----------------|-----------------|----------|-------- armhf (N1) | subnormal | 15.908 | 15.1083 armhf (N1) | normal | 837.525 | 244.833 armhf (N1) | close-exponents | 16.2111 | 21.8182 Instead of using the math_private.h definitions, I used the math_config.h instead which is used on newer math implementations. Co-authored-by: kirill <kirill.okhotnikov@gmail.com> [1] https://sourceware.org/pipermail/libc-alpha/2020-November/119794.html Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
* x86: Set FSGSBASE to active if enabled by kernelH.J. Lu2023-04-034-0/+58
| | | | | | | | | | | | | Linux kernel uses AT_HWCAP2 to indicate if FSGSBASE instructions are enabled. If the HWCAP2_FSGSBASE bit in AT_HWCAP2 is set, FSGSBASE instructions can be used in user space. Define dl_check_hwcap2 to set the FSGSBASE feature to active on Linux when the HWCAP2_FSGSBASE bit is set. Add a test to verify that FSGSBASE is active on current kernels. NB: This test will fail if the kernel doesn't set the HWCAP2_FSGSBASE bit in AT_HWCAP2 while fsgsbase shows up in /proc/cpuinfo. Reviewed-by: Florian Weimer <fweimer@redhat.com>
* x86_64: Fix asm constraints in feraiseexcept (bug 30305)Florian Weimer2023-04-031-2/+2
| | | | | | | | | The divss instruction clobbers its first argument, and the constraints need to reflect that. Fortunately, with GCC 12, generated code does not actually change, so there is no externally visible bug. Suggested-by: Jakub Jelinek <jakub@redhat.com> Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
* hurd: Add vm_param.h for x86_64Sergey Bugaev2023-04-031-0/+24
| | | | | Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-Id: <20230319151017.531737-30-bugaevc@gmail.com>
* hurd: Implement _hurd_longjmp_thread_state for x86_64Sergey Bugaev2023-04-031-0/+41
| | | | | Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-Id: <20230319151017.531737-29-bugaevc@gmail.com>
* htl: Implement thread_set_pcsptp for x86_64Sergey Bugaev2023-04-031-0/+73
| | | | | Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-Id: <20230319151017.531737-23-bugaevc@gmail.com>
* x86_64: Add rtld-stpncpy & rtld-strncpySergey Bugaev2023-04-032-0/+36
| | | | | | | | Just like the other existing rtld-str* files, this provides rtld with usable versions of stpncpy and strncpy. Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-Id: <20230319151017.531737-22-bugaevc@gmail.com>
* htl: Add tcb-offsets.sym for x86_64Sergey Bugaev2023-04-032-0/+28
| | | | | | | | The source code is the same as sysdeps/i386/htl/tcb-offsets.sym, but of course the produced tcb-offsets.h will be different. Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-Id: <20230319151017.531737-21-bugaevc@gmail.com>
* hurd: Move a couple of signal-related files to x86Sergey Bugaev2023-04-032-0/+0
| | | | | | | These do not need any changes to be used on x86_64. Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-Id: <20230319151017.531737-20-bugaevc@gmail.com>
* hurd: Use uintptr_t for register values in trampoline.cSergey Bugaev2023-04-031-7/+6
| | | | | | | | | | | | This is more correct, if only because these fields are defined as having the type unsigned int in the Mach headers, so casting them to a signed int and then back is suboptimal. Also, remove an extra reassignment of uesp -- this is another remnant of the ecx kludge. Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-Id: <20230319151017.531737-16-bugaevc@gmail.com>
* hurd: Move rtld-strncpy-c.c out of mach/hurd/Sergey Bugaev2023-04-031-0/+0
| | | | | | | | There's nothing Mach- or Hurd-specific about it; any port that ends up with rtld pulling in strncpy will need this. Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-Id: <20230319151017.531737-15-bugaevc@gmail.com>
* hurd: More 64-bit integer casting fixesSergey Bugaev2023-04-032-4/+4
| | | | | Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-Id: <20230319151017.531737-13-bugaevc@gmail.com>
* mach, hurd: Drop __libc_lock_self0Sergey Bugaev2023-04-033-8/+3
| | | | | | | | | | | This was used for the value of libc-lock's owner when TLS is not yet set up, so THREAD_SELF can not be used. Since the value need not be anything specific -- it just has to be non-NULL -- we can just use a plain constant, such as (void *) 1, for this. This avoids accessing the symbol through GOT, and exporting it from libc.so in the first place. Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-Id: <20230319151017.531737-12-bugaevc@gmail.com>
* hurd: Remove __hurd_threadvar_stack_{offset,mask}Sergey Bugaev2023-04-034-26/+2
| | | | | | | | | | | Noone is or should be using __hurd_threadvar_stack_{offset,mask}, we have proper TLS now. These two remaining variables are never set to anything other than zero, so any code that would try to use them as described would just dereference a zero pointer and crash. So remove them entirely. Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-Id: <20230319151017.531737-6-bugaevc@gmail.com>
* Update arm libm-tests-ulpsAdhemerval Zanella2023-03-301-0/+1
| | | | For the next test from cf7ffdd8a5f6da55397e10b3860062944312824c.
* getlogin_r: fix missing fallback if loginuid is unset (bug 30235)Andreas Schwab2023-03-301-4/+1
| | | | | When /proc/self/loginuid is not set, we should still fall back to using the traditional utmp lookup, instead of failing right away.
* Remove --enable-tunables configure optionAdhemerval Zanella Netto2023-03-2921-162/+45
| | | | | | | | | | | | And make always supported. The configure option was added on glibc 2.25 and some features require it (such as hwcap mask, huge pages support, and lock elisition tuning). It also simplifies the build permutations. Changes from v1: * Remove glibc.rtld.dynamic_sort changes, it is orthogonal and needs more discussion. * Cleanup more code. Reviewed-by: Siddhesh Poyarekar <siddhesh@sourceware.org>
* system: Add "--" after "-c" for sh (BZ #28519)Joe Simmons-Talbott2023-03-281-0/+1
| | | | | | | | | | | Prevent sh from interpreting a user string as shell options if it starts with '-' or '+'. Since the version of /bin/sh used for testing system() is different from the full-fledged system /bin/sh add support to it for handling "--" after "-c". Add a testcase to ensure the expected behavior. Signed-off-by: Joe Simmons-Talbott <josimmon@redhat.com> Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* LoongArch: ldconfig: Add comments for using EF_LARCH_OBJABI_V1caiyinyu2023-03-281-0/+6
| | | | | We added Adhemerval Zanella's comment to explain the reason for using EF_LARCH_OBJABI_V1.
* libio: Do not autogenerate stdio_lim.hAdhemerval Zanella Netto2023-03-273-5/+56
| | | | | | | | | | | | | Instead define the required fields in system dependend files. The only system dependent definition is FILENAME_MAX, which should match POSIX PATH_MAX, and it is obtained from either kernel UAPI or mach headers. Currently set pre-defined value from current kernels. It avoids a circular dependendy when including stdio.h in gen-as-const-headers files. Checked on x86_64-linux-gnu and i686-linux-gnu Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* Move libc_freeres_ptrs and libc_subfreeres to hidden/weak functionsAdhemerval Zanella Netto2023-03-2714-11/+125
| | | | | | | | | | | | | | | | | | | | They are both used by __libc_freeres to free all library malloc allocated resources to help tooling like mtrace or valgrind with memory leak tracking. The current scheme uses assembly markers and linker script entries to consolidate the free routine function pointers in the RELRO segment and to be freed buffers in BSS. This patch changes it to use specific free functions for libc_freeres_ptrs buffers and call the function pointer array directly with call_function_static_weak. It allows the removal of both the internal macros and the linker script sections. Checked on x86_64-linux-gnu, i686-linux-gnu, and aarch64-linux-gnu. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* benchtests: Move libmvec benchtest inputs to benchtests directoryJoe Ramsay2023-03-2753-213201/+1
| | | | | | | This allows other targets to use the same inputs for their own libmvec microbenchmarks without having to duplicate them in their own subdirectory. Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* LoongArch: ldconfig: Ignore EF_LARCH_OBJABI_V1 in shared objectsXi Ruoyao2023-03-271-1/+1
| | | | | | | | | | | | | | | | Binutils 2.40 sets EF_LARCH_OBJABI_V1 for shared objects: $ ld --version | head -n1 GNU ld (GNU Binutils) 2.40 $ echo 'int dummy;' > dummy.c $ cc dummy.c -shared $ readelf -h a.out | grep Flags Flags: 0x43, DOUBLE-FLOAT, OBJ-v1 We need to ignore it in ldconfig or ldconfig will consider all shared objects linked by Binutils 2.40 "unsupported". Maybe we should stop setting EF_LARCH_OBJABI_V1 for shared objects, but Binutils 2.40 is already released and we cannot change it.
* hppa: Drop 16-byte pthread lock alignmentJohn David Anglin2023-03-262-3/+9
| | | | | | | | | | | | | | | | | Linux threads were removed about 12 years ago and the current nptl implementation only requires 4-byte alignment for pthread locks. The 16-byte alignment causes various issues. For example in building ignition-msgs, we have: /usr/include/google/protobuf/map.h:124:37: error: static assertion failed 124 | static_assert(alignof(value_type) <= 8, ""); | ~~~~~~~~~~~~~~~~~~~~^~~~ This is caused by the 16-byte pthread lock alignment. Signed-off-by: John David Anglin <dave.anglin@bell.net>
* x86: Don't check PREFETCHWT1 in tst-cpu-features-cpuinfo.cDJ Delorie2023-03-211-0/+3
| | | | | | | Don't check PREFETCHWT1 against /proc/cpuinfo since kernel doesn't report PREFETCHWT1 in /proc/cpuinfo. Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
* ARC: run child from the separate start block in __clonePavel Kozlov2023-03-131-15/+25
| | | | | | | For better debug experience use separate code block with extra cfi_* directives to run child (same as in __clone3). Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* ARC: Add the clone3 wrapperPavel Kozlov2023-03-132-0/+92
| | | | | | | | | | | Use the clone3 wrapper on ARC. It doesn't care about stack alignment. All callers should provide an aligned stack. It follows the internal signature: extern int clone3 (struct clone_args *__cl_args, size_t __size, int (*__func) (void *__arg), void *__arg); Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* LoongArch: Add get_rounding_mode.caiyinyu2023-03-131-0/+38
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* LoongArch: Add support for ldconfig.caiyinyu2023-03-133-1/+155
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* linux: fix ntp_gettime abi break (BZ# 30156)Kacper PiwiƄski2023-03-101-2/+9
| | | | | | | | | | | | | | | | Between versions v2.11 and v2.12 struct ntptimeval got new fields. That wasn't a problem because new function ntp_gettimex was created (and made default) to support new struct. Old ntp_gettime was not using new fields so it was safe to call with old struct definition. Then commits 5613afe9e3dff and b6ad64b907a (added for 64 bit time_t support), ntp_gettime start setting new fields. Sets fields manually to maintain compatibility with v2.11 struct definition. Resolves #30156 Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* rt: fix shm_open not set ENAMETOOLONG when name exceeds {_POSIX_PATH_MAX}abushwang2023-03-081-2/+3
| | | | | | | | according to man-pages-posix-2017, shm_open() function may fail if the length of the name argument exceeds {_POSIX_PATH_MAX} and set ENAMETOOLONG Signed-off-by: abushwang <abushwangs@gmail.com> Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* x86: Fix bug about glibc.cpu.hwcaps.caiyinyu2023-03-071-3/+3
| | | | | | | | | | | | | | | | | | | Recorded in [BZ #30183]: 1. export GLIBC_TUNABLES=glibc.cpu.hwcaps=-AVX512 2. Add _dl_printf("p -- %s\n", p); just before switch(nl) in sysdeps/x86/cpu-tunables.c 3. compiled and run ./testrun.sh /usr/bin/ls you will get: p -- -AVX512 p -- LC_ADDRESS=en_US.UTF-8 p -- LC_NUMERIC=C ... The function, TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp), checks far more than it should and it should stop at end of "-AVX512".
* posix: Fix system blocks SIGCHLD erroneously [BZ #30163]Adam Yi2023-03-071-3/+3
| | | | | | | | | | | | | | | | | | | | | Fix bug that SIGCHLD is erroneously blocked forever in the following scenario: 1. Thread A calls system but hasn't returned yet 2. Thread B calls another system but returns SIGCHLD would be blocked forever in thread B after its system() returns, even after the system() in thread A returns. Although POSIX does not require, glibc system implementation aims to be thread and cancellation safe. This bug was introduced in 5fb7fc96350575c9adb1316833e48ca11553be49 when we moved reverting signal mask to happen when the last concurrently running system returns, despite that signal mask is per thread. This commit reverts this logic and adds a test. Signed-off-by: Adam Yi <ayi@janestreet.com> Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* Update kernel version to 6.2 in header constant testsJoseph Myers2023-03-063-4/+4
| | | | | | | | | | This patch updates the kernel version in the tests tst-mman-consts.py, tst-mount-consts.py and tst-pidfd-consts.py to 6.2. (There are no new constants covered by these tests in 6.2 that need any other header changes, and the removed MAP_VARIABLE for hppa was addressed separately.) Tested with build-many-glibcs.py.
* arm: Remove __builtin_arm_uqsub8 usage on string-fza.hAdhemerval Zanella Netto2023-03-021-4/+0
| | | | | | | | | | The __builtin_arm_uqsub8 is an internal GCC builtin which might change in future release (the correct way is to include "arm_acle.h" and use __uqsub8 ()). Since not all compilers support it, just use the inline assembler instead. Checked on armv7a-linux-gnueabihf. Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
* alpha: Remove strncmp optimizationAdhemerval Zanella Netto2023-03-021-276/+0
| | | | | | | The generic implementation already cover word access along with cmpbge for both aligned and unaligned, so use it instead. Checked qemu static for alpha-linux-gnu.
* powerpc: Remove powerpc64 strncmp variantsAdhemerval Zanella Netto2023-03-028-494/+9
| | | | | | | | | | | | | The default, and power7 implementation just adds word aligned access when inputs have the same aligment. The unaligned case is still done by byte operations. This is already covered by the generic implementation, which also add the unaligned input optimization. Checked on powerpc64-linux-gnu built without multi-arch for powerpc64, power7, power8, and power9 (build for le). Reviewed-by: Rajalakshmi Srinivasaraghavan <rajis@linux.ibm.com>
* powerpc: Remove strncmp variantsAdhemerval Zanella Netto2023-03-028-701/+1
| | | | | | | | | | | | | The default, power4, and power7 implementation just adds word aligned access when inputs have the same aligment. The unaligned case is still done by byte operations. This is already covered by the generic implementation, which also add the unaligned input optimization. Checked on powerpc-linux-gnu built without multi-arch for powerpc, power4, and power7. Reviewed-by: Rajalakshmi Srinivasaraghavan <rajis@linux.ibm.com>
* C2x scanf binary constant handlingJoseph Myers2023-03-0289-2/+1459
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | C2x adds binary integer constants starting with 0b or 0B, and supports those constants for the %i scanf format (in addition to the %b format, which isn't yet implemented for scanf in glibc). Implement that scanf support for glibc. As with the strtol support, this is incompatible with previous C standard versions, in that such an input string starting with 0b or 0B was previously required to be parsed as 0 (with the rest of the input potentially matching subsequent parts of the scanf format string). Thus this patch adds 12 new __isoc23_* functions per long double format (12, 24 or 36 depending on how many long double formats the glibc configuration supports), with appropriate header redirection support (generally very closely following that for the __isoc99_* scanf functions - note that __GLIBC_USE (DEPRECATED_SCANF) takes precedence over __GLIBC_USE (C2X_STRTOL), so the case of GNU extensions to C89 continues to get old-style GNU %a and does not get this new feature). The function names would remain as __isoc23_* even if C2x ends up published in 2024 rather than 2023. When scanf %b support is added, I think it will be appropriate for all versions of scanf to follow C2x rules for inputs to the %b format (given that there are no compatibility concerns for a new format). Tested for x86_64 (full glibc testsuite). The first version was also tested for powerpc (32-bit) and powerpc64le (stdio-common/ and wcsmbs/ tests), and with build-many-glibcs.py.
* LoongArch: Update libm-test-ulps.caiyinyu2023-03-021-0/+1
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* LoongArch: Further refine the condition to enable static PIEXi Ruoyao2023-03-022-0/+7
| | | | | | | | | | | | Before GCC r13-2728, it would produce a normal dynamic-linked executable with -static-pie. I mistakely believed it would produce a static-linked executable, so failed to detect the breakage. Then with Binutils 2.40 and (vanilla) GCC 12, libc_cv_static_pie_on_loongarch is mistakenly enabled and cause a building failure with "undefined reference to _DYNAMIC". Fix the issue by disabling static PIE if -static-pie creates something with a INTERP header.
* hurd: Remove the ecx kludgeSergey Bugaev2023-03-022-43/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "We don't need it any more" The INTR_MSG_TRAP macro in intr-msg.h used to play little trick with the stack pointer: it would temporarily save the "real" stack pointer into ecx, while setting esp to point to just before the message buffer, and then invoke the mach_msg trap. This way, INTR_MSG_TRAP reused the on-stack arguments laid out for the containing call of _hurd_intr_rpc_mach_msg (), passing them to the mach_msg trap directly. This, however, required special support in hurdsig.c and trampoline.c, since they now had to recognize when a thread is inside the piece of code where esp doesn't point to the real tip of the stack, and handle this situation specially. Commit 1d20f33ff4fb634310f27493b7b87d0b20f4a0b0 has removed the actual temporary change of esp by actually re-pushing mach_msg arguments onto the stack, and popping them back at end. It did not, however, deal with the rest of "the ecx kludge" code in other files, resulting in potential crashes if a signal arrives in the middle of pushing arguments onto the stack. Fix that by removing "the ecx kludge". Instead, when we want a thread to skip the RPC, but cannot make just make it jump to after the trap since it's not done adjusting the stack yet, set the SYSRETURN register to MACH_SEND_INTERRUPTED (as we do anyway), and rely on the thread itself for detecting this case and skipping the RPC. This simplifies things somewhat and paves the way for a future x86_64 port of this code. Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-Id: <20230301162355.426887-1-bugaevc@gmail.com>
* Add AArch64 HWCAP2 values from Linux 6.2 to bits/hwcap.hJoseph Myers2023-02-281-0/+3
| | | | | | | Linux 6.2 adds three new AArch64 HWCAP2 values; add them to glibc's AArch64 bits/hwcap.h. Tested with build-many-glibcs.py for aarch64-linux-gnu.
* S390: Fix _FPU_SETCW/GETCW when compiling with Clang [BZ #30130]Andreas Arnez2023-02-281-2/+2
| | | | | | | | The _FPU_SETCW and _FPU_GETCW macros are defined with inline assemblies. They use the sfpc and efpc instructions, respectively. But both contain a spurious second operand that leads to a compile error with Clang. Removing this operand works both with gcc/gas (since binutils 2.18) as well as with clang/llvm.
* s390x: Regenerate ULPs.Stefan Liebler2023-02-281-0/+1
| | | | | | | | | Needed due to recent commits: - "added pair of inputs for hypotf in binary32" commit ID cf7ffdd8a5f6da55397e10b3860062944312824c - "update auto-libm-test-out-hypot" commit ID 3efbf11fdf15ed991d2c41743921c524a867e145
* Add Arm HWCAP values from Linux 6.2 to bits/hwcap.hJoseph Myers2023-02-283-6/+13
| | | | | | | | Linux 6.2 adds six new Arm HWCAP values and two new HWCAP2 values; add them to glibc's Arm bits/hwcap.h, with corresponding dl-procinfo.c and dl-procinfo.h updates. Tested with build-many-glibcs.py for arm-linux-gnueabi.
* htl: Add pthreadtypes-arch.h for x86_64Sergey Bugaev2023-02-271-0/+36
| | | | | Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-Id: <20230221211932.296459-5-bugaevc@gmail.com>
* hurd: Implement TLS for x86_64Sergey Bugaev2023-02-272-1/+228
| | | | | Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-Id: <20230221211932.296459-4-bugaevc@gmail.com>
* htl: Make pthread_mutex_t pointer-alignedSergey Bugaev2023-02-271-5/+8
| | | | | | | | This is for future-proofing. On i386, it is 4-byte aligned anyway, but on x86_64, we want it 8-byte aligned, not 4-byte aligned. Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-Id: <20230214173722.428140-4-bugaevc@gmail.com>