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* Do not raise "inexact" from powerpc64 ceil, floor, trunc (bug 15479).Joseph Myers2016-05-256-18/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Continuing fixes for ceil, floor and trunc functions not to raise the "inexact" exception, this patch fixes the versions used on older powerpc64 processors. As was done with the round implementations some time ago, the save of floating-point state is moved after the first floating-point operation on the input to ensure that any "invalid" exception from signaling NaN input is included in the saved state, and then the whole state gets restored rather than just the rounding mode. This has no effect on configurations using the power5+ code, since such processors can do these operations with a single instruction (and those instructions do not set "inexact", so are correct for TS 18661-1 semantics). Tested for powerpc64. [BZ #15479] * sysdeps/powerpc/powerpc64/fpu/s_ceil.S (__ceil): Move save of floating-point state after first floating-point operation on input. Restore full floating-point state instead of just rounding mode. * sysdeps/powerpc/powerpc64/fpu/s_ceilf.S (__ceilf): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floor.S (__floor): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floorf.S (__floorf): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_trunc.S (__trunc): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_truncf.S (__truncf): Likewise.
* Do not raise "inexact" from powerpc32 ceil, floor, trunc (bug 15479).Joseph Myers2016-05-256-18/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Continuing fixes for ceil, floor and trunc functions not to raise the "inexact" exception, this patch fixes the versions used on older powerpc32 processors. As was done with the round implementations some time ago, the save of floating-point state is moved after the first floating-point operation on the input to ensure that any "invalid" exception from signaling NaN input is included in the saved state, and then the whole state gets restored rather than just the rounding mode. This has no effect on configurations using the power5+ code, since such processors can do these operations with a single instruction (and those instructions do not set "inexact", so are correct for TS 18661-1 semantics). Tested for powerpc32. [BZ #15479] * sysdeps/powerpc/powerpc32/fpu/s_ceil.S (__ceil): Move save of floating-point state after first floating-point operation on input. Restore full floating-point state instead of just rounding mode. * sysdeps/powerpc/powerpc32/fpu/s_ceilf.S (__ceilf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_floor.S (__floor): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_floorf.S (__floorf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_trunc.S (__trunc): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_truncf.S (__truncf): Likewise.
* S390: Fix utf32 to utf16 handling of low surrogates (disable cu42).Stefan Liebler2016-05-251-93/+62
| | | | | | | | | | | | | | | | | According to the latest Unicode standard, a conversion from/to UTF-xx has to report an error if the character value is in range of an utf16 surrogate (0xd800..0xdfff). See https://sourceware.org/ml/libc-help/2015-12/msg00015.html. Thus the cu42 instruction, which converts from utf32 to utf16, has to be disabled because it does not report an error in case of a value in range of a low surrogate (0xdc00..0xdfff). The etf3eh variant is removed and the c, vector variant is adjusted to handle the value in range of an utf16 low surrogate correctly. ChangeLog: * sysdeps/s390/utf16-utf32-z9.c: Disable cu42 instruction and report an error in case of a value in range of an utf16 low surrogate.
* S390: Fix utf32 to utf8 handling of low surrogates (disable cu41).Stefan Liebler2016-05-251-73/+115
| | | | | | | | | | | | | | | | | According to the latest Unicode standard, a conversion from/to UTF-xx has to report an error if the character value is in range of an utf16 surrogate (0xd800..0xdfff). See https://sourceware.org/ml/libc-help/2015-12/msg00015.html. Thus the cu41 instruction, which converts from utf32 to utf8, has to be disabled because it does not report an error in case of a value in range of a low surrogate (0xdc00..0xdfff). The etf3eh variant is removed and the c, vector variant is adjusted to handle the value in range of an utf16 low surrogate correctly. ChangeLog: * sysdeps/s390/utf8-utf32-z9.c: Disable cu41 instruction and report an error in case of a value in range of an utf16 low surrogate.
* S390: Use s390-64 specific ionv-modules on s390-32, too.Stefan Liebler2016-05-256-46/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch reworks the existing s390 64bit specific iconv modules in order to use them on s390 31bit, too. Thus the parts for subdirectory iconvdata in sysdeps/s390/s390-64/Makefile were moved to sysdeps/s390/Makefile so that they apply on 31bit, too. All those modules are moved from sysdeps/s390/s390-64 directory to sysdeps/s390. The iso-8859-1 to/from cp037 module was adjusted, to use brct (branch relative on count) instruction on 31bit s390 instead of brctg, because the brctg is a zarch instruction and is not available on a 31bit kernel. The utf modules are using zarch instructions, thus the directive machinemode zarch_nohighgprs was added to the inline assemblies to omit the high-gprs flag in the shared libraries. Otherwise they can't be loaded on a 31bit kernel. The ifunc resolvers were adjusted in order to call the etf3eh or vector variants only if zarch instructions are available (64bit kernel in 31bit compat-mode). Furthermore some variable types were changed. E.g. unsigned long long would be a register pair on s390 31bit, but we want only one single register. For variables of type size_t the register contents have to be enlarged from a 32bit to a 64bit value on 31bit, because the inline assemblies uses 64bit values in such cases. ChangeLog: * sysdeps/s390/s390-64/Makefile (iconvdata-subdirectory): Move to ... * sysdeps/s390/Makefile: ... here. * sysdeps/s390/s390-64/iso-8859-1_cp037_z900.c: Move to ... * sysdeps/s390/iso-8859-1_cp037_z900.c: ... here. (BRANCH_ON_COUNT): New define. (TR_LOOP): Use BRANCH_ON_COUNT instead of brctg. * sysdeps/s390/s390-64/utf16-utf32-z9.c: Move to ... * sysdeps/s390/utf16-utf32-z9.c: ... here and adjust to run on s390-32, too. * sysdeps/s390/s390-64/utf8-utf16-z9.c: Move to ... * sysdeps/s390/utf8-utf16-z9.c: ... here and adjust to run on s390-32, too. * sysdeps/s390/s390-64/utf8-utf32-z9.c: Move to ... * sysdeps/s390/utf8-utf32-z9.c: ... here and adjust to run on s390-32, too.
* S390: Optimize utf16-utf32 module.Stefan Liebler2016-05-251-92/+379
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch reworks the s390 specific module to convert between utf16 and utf32. Now ifunc is used to choose either the c or etf3eh (with convert utf instruction) variants at runtime. Furthermore a new vector variant for z13 is introduced which will be build and chosen if vector support is available at build / runtime. In case of converting utf 32 to utf16, the vector variant optimizes input of 2byte utf16 characters. The convert utf instruction is used if an utf16 surrogate is found. For the other direction utf16 to utf32, the cu24 instruction can't be re- enabled, because it does not report an error, if the input-stream consists of a single low surrogate utf16 char (e.g. 0xdc00). This applies to the newest z13, too. Thus there is only the c or the new vector variant, which can handle utf16 surrogate characters. This patch also fixes some whitespace errors. Furthermore, the etf3eh variant is handling the "UTF-xx//IGNORE" case now. Before they ignored the ignore-case and always stopped at an error. ChangeLog: * sysdeps/s390/s390-64/utf16-utf32-z9.c: Use ifunc to select c, etf3eh or new vector loop-variant.
* S390: Optimize utf8-utf16 module.Stefan Liebler2016-05-251-106/+441
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch reworks the s390 specific module to convert between utf8 and utf16. Now ifunc is used to choose either the c or etf3eh (with convert utf instruction) variants at runtime. Furthermore a new vector variant for z13 is introduced which will be build and chosen if vector support is available at build / runtime. In case of converting utf 8 to utf16, the vector variant optimizes input of 1byte utf8 characters. The convert utf instruction is used if a multibyte utf8 character is found. For the other direction utf16 to utf8, the cu21 instruction can't be re-enabled, because it does not report an error, if the input-stream consists of a single low surrogate utf16 char (e.g. 0xdc00). This applies to the newest z13, too. Thus there is only the c or the new vector variant, which can handle 1..4 byte utf8 characters. The c variant from utf16 to utf8 has beed fixed. If a high surrogate was at the end of the input-buffer, then errno was set to EINVAL and the input-pointer pointed just after the high surrogate. Now it points to the beginning of the high surrogate. This patch also fixes some whitespace errors. The c variant from utf8 to utf16 is now checking that tail-bytes starts with 0b10... and the value is not in range of an utf16 surrogate. Furthermore, the etf3eh variants are handling the "UTF-xx//IGNORE" case now. Before they ignored the ignore-case and always stopped at an error. ChangeLog: * sysdeps/s390/s390-64/utf8-utf16-z9.c: Use ifunc to select c, etf3eh or new vector loop-variant.
* S390: Optimize utf8-utf32 module.Stefan Liebler2016-05-251-184/+480
| | | | | | | | | | | | | | | | | | | | This patch reworks the s390 specific module to convert between utf8 and utf32. Now ifunc is used to choose either the c or etf3eh (with convert utf instruction) variants at runtime. Furthermore a new vector variant for z13 is introduced which will be build and chosen if vector support is available at build / runtime. The vector variants optimize input of 1byte utf8 characters. The convert utf instruction is used if a multibyte utf8 character is found. This patch also fixes some whitespace errors. The c variants are rejecting UTF-16 surrogates and values above 0x10ffff now. Furthermore, the etf3eh variants are handling the "UTF-xx//IGNORE" case now. Before they ignored the ignore-case and always stopped at an error. ChangeLog: * sysdeps/s390/s390-64/utf8-utf32-z9.c: Use ifunc to select c, etf3eh or new vector loop-variant.
* S390: Optimize iso-8859-1 to ibm037 iconv-module.Stefan Liebler2016-05-251-37/+56
| | | | | | | | | | | This patch reworks the s390 specific module which used the z900 translate one to one instruction. Now the g5 translate instruction is used, because it outperforms the troo instruction. ChangeLog: * sysdeps/s390/s390-64/iso-8859-1_cp037_z900.c (TROO_LOOP): Rename to TR_LOOP and usage of tr instead of troo instruction.
* S390: Optimize builtin iconv-modules.Stefan Liebler2016-05-252-0/+1270
| | | | | | | | | | | | | | | | | This patch introduces a s390 specific gconv_simple.c file which provides optimized versions for z13 with vector instructions, which will be chosen at runtime via ifunc. The optimized conversions can convert between internal and ascii, ucs4, ucs4le, ucs2, ucs2le. If the build-environment lacks vector support, then iconv/gconv_simple.c is used wihtout any change. Otherwise iconvdata/gconv_simple.c is used to create conversion loop routines without vector instructions as fallback, if vector instructions aren't available at runtime. ChangeLog: * sysdeps/s390/multiarch/gconv_simple.c: New File. * sysdeps/s390/multiarch/Makefile (sysdep_routines): Add gconv_simple.
* S390: Optimize 8bit-generic iconv modules.Stefan Liebler2016-05-254-0/+452
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a s390 specific 8bit-generic.c file which provides an optimized version for z13 with translate-/vector-instructions, which will be chosen at runtime via ifunc. If the build-environment lacks vector support, then iconvdata/8bit-generic.c is used wihtout any change. Otherwise iconvdata/8bit-generic.c is used to create conversion loop routines without vector instructions as fallback, if vector instructions aren't available at runtime. The vector routines can only be used with charsets where the maximum UCS4 value fits in 1 byte size. Then the hardware translate-instruction is used to translate between up to 256 generic characters and "1 byte UCS4" characters at once. The vector instructions are used to convert between the "1 byte UCS4" and UCS4. The gen-8bit.sh script in sysdeps/s390/multiarch generates the conversion table to_ucs1. Therefore in sysdeps/s390/multiarch/Makefile is added an override define generate-8bit-table, which is originally defined in iconvdata/Makefile. This version calls the gen-8bit.sh in iconvdata folder and the s390 one. ChangeLog: * sysdeps/s390/multiarch/8bit-generic.c: New File. * sysdeps/s390/multiarch/gen-8bit.sh: New File. * sysdeps/s390/multiarch/Makefile (generate-8bit-table): New override define. * sysdeps/s390/multiarch/iconv/skeleton.c: Likewise.
* S390: Configure check for vector support in gcc.Stefan Liebler2016-05-252-0/+53
| | | | | | | | | | | | | | | The S390 specific test checks if the gcc has support for vector registers by compiling an inline assembly which clobbers vector registers. On success the macro HAVE_S390_VX_GCC_SUPPORT is defined. This macro can be used to determine if e.g. clobbering vector registers is allowed or not. ChangeLog: * config.h.in (HAVE_S390_VX_GCC_SUPPORT): New macro undefine. * sysdeps/s390/configure.ac: Add test for S390 vector register support in gcc. * sysdeps/s390/configure: Regenerated.
* S390: Get rid of make warning: overriding recipe for target gconv-modules.Stefan Liebler2016-05-252-50/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a way to provide an architecture dependent gconv-modules file. Before this patch, the gconv-modules file was normally installed from src-dir/iconvdata/gconv-modules. The S390 Makefile had overridden the installation recipe (with a make warning) in order to install the gconv-module-s390 file from build-dir. The iconvdata/Makefile provides another recipe, which copies the gconv-modules file from src to build dir, which are used by the testcases. Thus the testcases does not use the currently build s390-modules. This patch uses build-dir/iconvdata/gconv-modules for installation, which is generated by concatenating src-dir/iconvdata/gconv-modules and the architecture specific one. The latter one can be specified by setting the variable sysdeps-gconv-modules in sysdeps/.../Makefile. The architecture specific gconv-modules file is emitted before the common one because these modules aren't used in all possible conversions. E.g. the converting from INTERNAL to UTF-16 used the common UTF-16.so module instead of UTF16_UTF32_Z9.so. This way, the s390-Makefile does not need to override the recipe for gconv-modules and no warning is emitted anymore. Since we no longer support empty objpfx the conditional test in iconvdata/Makefile is removed. ChangeLog: * iconvdata/Makefile ($(inst_gconvdir)/gconv-modules): Install file from $(objpfx)gconv-modules. ($(objpfx)gconv-modules): Concatenate architecture specific file in variable sysdeps-gconv-modules and gconv-modules in src dir. * sysdeps/s390/gconv-modules: New file. * sysdeps/s390/s390-64/Makefile: ($(inst_gconvdir)/gconv-modules): Deleted. ($(objpfx)gconv-modules-s390): Deleted. (sysdeps-gconv-modules): New variable.
* Do not raise "inexact" from x86_64 SSE4.1 ceil, floor (bug 15479).Joseph Myers2016-05-244-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | Continuing fixes for ceil and floor functions not to raise the "inexact" exception, this patch fixes the x86_64 SSE4.1 versions. The roundss / roundsd instructions take an immediate operand that determines the rounding mode and whether to raise "inexact"; this just needs bit 3 set to disable "inexact", which this patch does. Remark: we don't have an SSE4.1 version of trunc / truncf (using this instruction with operand 11); I'd expect one to make sense, but of course it should be benchmarked against the existing C code. I'll file a bug in Bugzilla for the lack of such a version. Tested for x86_64. [BZ #15479] * sysdeps/x86_64/fpu/multiarch/s_ceil.S (__ceil_sse41): Set bit 3 of immediate operand to rounding instruction. * sysdeps/x86_64/fpu/multiarch/s_ceilf.S (__ceilf_sse41): Likewise. * sysdeps/x86_64/fpu/multiarch/s_floor.S (__floor_sse41): Likewise. * sysdeps/x86_64/fpu/multiarch/s_floorf.S (__floorf_sse41): Likewise.
* Do not raise "inexact" from generic round (bug 15479).Joseph Myers2016-05-245-56/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | C99 and C11 allow but do not require ceil, floor, round and trunc to raise the "inexact" exception for noninteger arguments. TS 18661-1 requires that this exception not be raised by these functions. This aligns them with general IEEE semantics, where "inexact" is only raised if the final step of rounding the infinite-precision result to the result type is inexact; for these functions, the infinite-precision integer result is always representable in the result type, so "inexact" should never be raised. The generic implementations of ceil, floor and round functions contain code to force "inexact" to be raised. This patch removes it for round functions to align them with TS 18661-1 in this regard. The tests *are* updated by this patch; there are fewer architecture-specific versions than for ceil and floor, and I fixed the powerpc ones some time ago. If any others still have the issue, as shown by tests for round failing with spurious exceptions, they can be fixed separately by architecture maintainers or others. Tested for x86_64, x86 and mips64. [BZ #15479] * sysdeps/ieee754/dbl-64/s_round.c (huge): Remove variable. (__round): Do not force "inexact" exception. * sysdeps/ieee754/dbl-64/wordsize-64/s_round.c (huge): Remove variable. (__round): Do not force "inexact" exception. * sysdeps/ieee754/flt-32/s_roundf.c (huge): Remove variable. (__roundf): Do not force "inexact" exception. * sysdeps/ieee754/ldbl-128/s_roundl.c (huge): Remove variable. (__roundl): Do not force "inexact" exception. * sysdeps/ieee754/ldbl-96/s_roundl.c (huge): Remove variable. (__roundl): Do not force "inexact" exception. * math/libm-test.inc (round_test_data): Do not allow spurious "inexact" exceptions.
* Do not raise "inexact" from generic floor (bug 15479).Joseph Myers2016-05-244-45/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | C99 and C11 allow but do not require ceil, floor, round and trunc to raise the "inexact" exception for noninteger arguments. TS 18661-1 requires that this exception not be raised by these functions. This aligns them with general IEEE semantics, where "inexact" is only raised if the final step of rounding the infinite-precision result to the result type is inexact; for these functions, the infinite-precision integer result is always representable in the result type, so "inexact" should never be raised. The generic implementations of ceil, floor and round functions contain code to force "inexact" to be raised. This patch removes it for floor functions to align them with TS 18661-1 in this regard. Note that some architecture-specific versions may still raise "inexact", so the tests are not updated and the bug is not yet fixed. Tested for x86_64, x86 and mips64. [BZ #15479] * sysdeps/ieee754/dbl-64/s_floor.c: Do not mention "inexact" exception in comment. (huge): Remove variable. (__floor): Do not force "inexact" exception. * sysdeps/ieee754/dbl-64/wordsize-64/s_floor.c: Do not mention "inexact" exception in comment. (huge): Remove variable. (__floor): Do not force "inexact" exception. * sysdeps/ieee754/flt-32/s_floorf.c: Do not mention "inexact" exception in comment. (huge): Remove variable. (__floorf): Do not force "inexact" exception. * sysdeps/ieee754/ldbl-128/s_floorl.c: Do not mention "inexact" exception in comment. (huge): Remove variable. (__floorl): Do not force "inexact" exception.
* Do not raise "inexact" from generic ceil (bug 15479).Joseph Myers2016-05-244-42/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | C99 and C11 allow but do not require ceil, floor, round and trunc to raise the "inexact" exception for noninteger arguments. TS 18661-1 requires that this exception not be raised by these functions. This aligns them with general IEEE semantics, where "inexact" is only raised if the final step of rounding the infinite-precision result to the result type is inexact; for these functions, the infinite-precision integer result is always representable in the result type, so "inexact" should never be raised. The generic implementations of ceil, floor and round functions contain code to force "inexact" to be raised. This patch removes it for ceil functions to align them with TS 18661-1 in this regard. Note that some architecture-specific versions may still raise "inexact", so the tests are not updated and the bug is not yet fixed. Tested for x86_64, x86 and mips64. [BZ #15479] * sysdeps/ieee754/dbl-64/s_ceil.c: Do not mention "inexact" exception in comment. (huge): Remove variable. (__ceil): Do not force "inexact" exception. * sysdeps/ieee754/dbl-64/wordsize-64/s_ceil.c: Do not mention "inexact" exception in comment. (huge): Remove variable. (__ceil): Do not force "inexact" exception. * sysdeps/ieee754/flt-32/s_ceilf.c (huge): Remove variable. (__ceilf): Do not force "inexact" exception. * sysdeps/ieee754/ldbl-128/s_ceill.c: Do not mention "inexact" exception in comment. (huge): Remove variable. (__ceill): Do not force "inexact" exception.
* Avoid an extra branch to PLT for -z nowH.J. Lu2016-05-241-2/+6
| | | | | | | | | | | | | | | | | | | When --enable-bind-now is used to configure glibc build, we can avoid an extra branch to the PLT entry by using indirect branch via the GOT slot instead, which is similar to the first instructuon in the PLT entry. Changes in the shared library sizes in text sections: Shared library Before (bytes) After (bytes) libm.so 1060813 1060797 libmvec.so 160881 160805 libpthread.so 94992 94984 librt.so 25064 25048 * config.h.in (BIND_NOW): New. * configure.ac (BIND_NOW): New. Defined for --enable-bind-now. * configure: Regenerated. * sysdeps/x86_64/sysdep.h (JUMPTARGET)[BIND_NOW]: Defined to indirect branch via the GOT slot.
* S390: Implement mempcpy with help of memcpy. [BZ #19765]Stefan Liebler2016-05-248-45/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There exist optimized memcpy functions on s390, but no optimized mempcpy. This patch adds mempcpy entry points in memcpy.S files, which use the memcpy implementation. Now mempcpy itself is also an IFUNC function as memcpy is and the variants are listed in ifunc-impl-list.c. The s390 string.h does not define _HAVE_STRING_ARCH_mempcpy. Instead mempcpy string/string.h inlines memcpy() + n. If n is constant and small enough, GCC emits instructions like mvi or mvc and avoids the function call to memcpy. If n is not constant, then memcpy is called and n is added afterwards. If _HAVE_STRING_ARCH_mempcpy would be defined, mempcpy would be called in every case. According to PR70140 "Inefficient expansion of __builtin_mempcpy" (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70140) GCC should handle a call to mempcpy in the same way as memcpy. Then either the mempcpy macro in string/string.h has to be removed or _HAVE_STRING_ARCH_mempcpy has to be defined for S390. ChangeLog: [BZ #19765] * sysdeps/s390/mempcpy.S: New File. * sysdeps/s390/multiarch/mempcpy.c: Likewise. * sysdeps/s390/multiarch/Makefile (sysdep_routines): Add mempcpy. * sysdeps/s390/multiarch/ifunc-impl-list.c (__libc_ifunc_impl_list): Add mempcpy variants. * sysdeps/s390/s390-32/memcpy.S: Add mempcpy entry point. (memcpy): Adjust to be usable from mempcpy entry point. (__memcpy_mvcle): Likewise. * sysdeps/s390/s390-64/memcpy.S: Likewise. * sysdeps/s390/s390-32/multiarch/memcpy-s390.S: Add entry points ____mempcpy_z196, ____mempcpy_z10 and add __GI_ symbols for mempcpy. (__memcpy_z196): Adjust to be usable from mempcpy entry point. (__memcpy_z10): Likewise. * sysdeps/s390/s390-64/multiarch/memcpy-s390x.S: Likewise.
* S390: Do not call memcpy, memcmp, memset within libc.so via ifunc-plt.Stefan Liebler2016-05-247-5/+21
| | | | | | | | | | | | | | | | | | | | | | | | On s390, the memcpy, memcmp, memset functions are IFUNC symbols, which are created with s390_libc_ifunc-macro. This macro creates a __GI_ symbol which is set to the ifunced symbol. Thus calls within libc.so to e.g. memcpy result in a call to *ABS*+0x954c0@plt stub and afterwards to the resolved memcpy-ifunc-variant. This patch sets the __GI_ symbol to the default-ifunc-variant to avoid the plt call. The __GI_ symbols are now created at the default variant of ifunced function. ChangeLog: * sysdeps/s390/multiarch/ifunc-resolve.h (s390_libc_ifunc): Remove __GI_ symbol. * sysdeps/s390/s390-32/multiarch/memcmp-s390.S: Add __GI_memcmp symbol. * sysdeps/s390/s390-64/multiarch/memcmp-s390x.S: Likewise. * sysdeps/s390/s390-32/multiarch/memcpy-s390.S: Add __GI_memcpy symbol. * sysdeps/s390/s390-64/multiarch/memcpy-s390x.S: Likewise. * sysdeps/s390/s390-32/multiarch/memset-s390.S: Add __GI_memset symbol. * sysdeps/s390/s390-64/multiarch/memset-s390x.S: Likewise.
* S390: Use 64bit instruction to check for copies of > 1MB with mvcle.Stefan Liebler2016-05-241-1/+1
| | | | | | | | | | | | | The __memcpy_default variant on s390 64bit calculates the number of 256byte blocks in a 64bit register and checks, if they exceed 1MB to jump to mvcle. Otherwise a mvc-loop is used. The compare-instruction only checks a 32bit value. This patch uses a 64bit compare. ChangeLog: * sysdeps/s390/s390-64/memcpy.S (memcpy): Use cghi instead of chi to compare 64bit value.
* S390: Use mvcle for copies > 1MB on 32bit with default memcpy variant.Stefan Liebler2016-05-241-1/+1
| | | | | | | | | | | | If more than 255 bytes should be copied, the algorithm jumps away. Before this patch, it jumps to the mvc-loop (.L_G5_12). Now it jumps first to the "> 1MB" check, which jumps away to __memcpy_mvcle. Otherwise, the mvc-loop (.L_G5_12) copies the bytes. ChangeLog: * sysdeps/s390/s390-32/memcpy.S (memcpy): Jump to 1MB check before executing mvc-loop.
* Make padding in struct sockaddr_storage explicit [BZ #20111]Florian Weimer2016-05-234-9/+54
| | | | | | | | | | This avoids aliasing issues with GCC 6 in -fno-strict-aliasing mode. (With implicit padding, not all data is copied.) This change makes it explicit that struct sockaddr_storage is only 126 bytes large on m68k (unlike elsewhere, where we end up with the requested 128 bytes). The new test case makes sure that this does not happen on other architectures.
* Update sysdeps/unix/sysv/linux/bits/socket.h for Linux 4.6.Joseph Myers2016-05-231-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates sysdeps/unix/sysv/linux/bits/socket.h for new constants added in Linux 4.6. AF_KCM / PF_KCM are added. SOL_KCM is new, and I added a lot of SOL_* values postdating the last one present in the header, since I saw no apparent reason for the set in glibc to stop at SOL_IRDA. MSG_BATCH is added; Linux also has MSG_SENDPAGE_NOTLAST which is not in glibc, but given the comment starts "sendpage() internal" I presume it's correct for it not to be in glibc. (Note that this is a case where the Linux kernel header with userspace relevant values is *not* a uapi header but include/linux/socket.h - I don't know why, but at least this header, as well as uapi headers, needs reviewing for glibc-relevant changes each release.) Tested for x86_64 and x86 (testsuite, and that installed stripped shared libraries are unchanged by the patch). * sysdeps/unix/sysv/linux/bits/socket.h (PF_KCM): New macro. (PF_MAX): Update value. (AF_KCM): New macro. (SOL_NETBEUI): Likewise. (SOL_LLC): Likewise. (SOL_DCCP): Likewise. (SOL_NETLINK): Likewise. (SOL_TIPC): Likewise. (SOL_RXRPC): Likewise. (SOL_PPPOL2TP): Likewise. (SOL_BLUETOOTH): Likewise. (SOL_PNPIPE): Likewise. (SOL_RDS): Likewise. (SOL_IUCV): Likewise. (SOL_CAIF): Likewise. (SOL_ALG): Likewise. (SOL_NFC): Likewise. (SOL_KCM): Likewise. (MSG_BATCH): New enum value and macro.
* Remove special L2 cache case for Knights LandingH.J. Lu2016-05-201-2/+0
| | | | | | | | | | | | | | L2 cache is shared by 2 cores on Knights Landing, which has 4 threads per core: https://en.wikipedia.org/wiki/Xeon_Phi#Knights_Landing So L2 cache is shared by 8 threads on Knights Landing as reported by CPUID. We should remove special L2 cache case for Knights Landing. [BZ #18185] * sysdeps/x86/cacheinfo.c (init_cacheinfo): Don't limit threads sharing L2 cache to 2 for Knights Landing.
* Implement proper fmal for ldbl-128ibm (bug 13304).Joseph Myers2016-05-191-11/+249
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ldbl-128ibm had an implementation of fmal that just did (x * y) + z in most cases, with no attempt at actually being a fused operation. This patch replaces it with a genuine fused operation. It is not necessarily correctly rounding, but should produce a result at least as accurate as the long double arithmetic operations in libgcc, which I think is all that can reasonably be expected for such a non-IEEE format where arithmetic is approximate rather than rounded according to any particular rule for determining the exact result. Like the libgcc arithmetic, it may produce spurious overflow and underflow results, and it falls back to the libgcc multiplication in the case of (finite, finite, zero). This concludes the fixes for bug 13304; any subsequently found fma issues should go in separate Bugzilla bugs. Various other pieces of bug 13304 were fixed in past releases over the past several years. Tested for powerpc. [BZ #13304] * sysdeps/ieee754/ldbl-128ibm/s_fmal.c: Include <fenv.h>, <float.h>, <math_private.h> and <stdlib.h>. (add_split): New function. (mul_split): Likewise. (ext_val): New typedef. (store_ext_val): New function. (mul_ext_val): New function. (compare): New function. (add_split_ext): New function. (__fmal): After checking for Inf, NaN and zero, compute result as an exact sum of scaled double values in round-to-nearest before adding those up and adjusting for other rounding modes. * math/auto-libm-test-in: Remove xfail-rounding:ldbl-128ibm from tests of fma. * math/auto-libm-test-out: Regenerated.
* Correct Intel processor level type mask from CPUIDH.J. Lu2016-05-191-1/+1
| | | | | | | | | | | | | | | Intel CPUID with EAX == 11 returns: ECX Bits 07 - 00: Level number. Same value in ECX input. Bits 15 - 08: Level type. ^^^^^^^^^^^^^^^^^^^^^^^^ This is level type. Bits 31 - 16: Reserved. Intel processor level type mask should be 0xff00, not 0xff0. [BZ #20119] * sysdeps/x86/cacheinfo.c (init_cacheinfo): Correct Intel processor level type mask for CPUID with EAX == 11.
* Check the HTT bit before counting logical threadsH.J. Lu2016-05-192-76/+85
| | | | | | | | | | | Skip counting logical threads for Intel processors if the HTT bit is 0 which indicates there is only a single logical processor. * sysdeps/x86/cacheinfo.c (init_cacheinfo): Skip counting logical threads if the HTT bit is 0. * sysdeps/x86/cpu-features.h (bit_cpu_HTT): New. (index_cpu_HTT): Likewise. (reg_HTT): Likewise.
* Remove alignments on jump targets in memsetH.J. Lu2016-05-191-32/+5
| | | | | | | | | | | | | | | X86-64 memset-vec-unaligned-erms.S aligns many jump targets, which increases code sizes, but not necessarily improve performance. As memset benchtest data of align vs no align on various Intel and AMD processors https://sourceware.org/bugzilla/attachment.cgi?id=9277 shows that aligning jump targets isn't necessary. [BZ #20115] * sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S (__memset): Remove alignments on jump targets.
* Don't call internal _Unwind_Resume via PLTH.J. Lu2016-05-182-2/+2
| | | | | | | | | | | There is no need to call the internal funtion, _Unwind_Resume, which is defined in unwind-forcedunwind.c, via PLT. * sysdeps/unix/sysv/linux/x86_64/pthread_cond_timedwait.S (__condvar_cleanup2): Remove JUMPTARGET from _Unwind_Resume call. * sysdeps/unix/sysv/linux/x86_64/pthread_cond_wait.S (__condvar_cleanup1): Likewise.
* Don't call internal __pthread_unwind via PLTH.J. Lu2016-05-181-2/+4
| | | | | | | | | | | | Add PTHREAD_UNWIND to replace JUMPTARGET(__pthread_unwind) and define it to __GI___pthread_unwind within libpthread. * sysdeps/unix/sysv/linux/x86_64/cancellation.S (PTHREAD_UNWIND): New (__pthread_unwind): Renamed to ... (PTHREAD_UNWIND): This. (__pthread_enable_asynccancel): Replace JUMPTARGET(__pthread_unwind) with PTHREAD_UNWIND.
* Add CLONE_NEWCGROUP from Linux 4.6 to bits/sched.h.Joseph Myers2016-05-181-0/+1
| | | | | | | | | | | This patch adds CLONE_NEWCGROUP, new in Linux 4.6, to sysdeps/unix/sysv/linux/bits/sched.h. Tested for x86_64 and x86 (testsuite, and that installed stripped shared libraries are unchanged by the patch). * sysdeps/unix/sysv/linux/bits/sched.h [__USE_GNU] (CLONE_NEWCGROUP): New macro.
* Add Q_GETNEXTQUOTA from Linux 4.6 to sys/quota.h.Joseph Myers2016-05-181-0/+1
| | | | | | | | | | | This patch adds Q_GETNEXTQUOTA, new in Linux 4.6, to sysdeps/unix/sysv/linux/sys/quota.h. Tested for x86_64 and x86 (testsuite, and that installed shared libraries are unchanged by the patch). * sysdeps/unix/sysv/linux/sys/quota.h [_LINUX_QUOTA_VERSION >= 2] (Q_GETNEXTQUOTA): New macro.
* Call init_cpu_features only if SHARED is definedH.J. Lu2016-05-132-0/+8
| | | | | | | | | | In static executable, since init_cpu_features is called early from __libc_start_main, there is no need to call it again in dl_platform_init. [BZ #20072] * sysdeps/i386/dl-machine.h (dl_platform_init): Call init_cpu_features only if SHARED is defined. * sysdeps/x86_64/dl-machine.h (dl_platform_init): Likewise.
* Support non-inclusive caches on Intel processorsH.J. Lu2016-05-131-1/+11
| | | | | * sysdeps/x86/cacheinfo.c (init_cacheinfo): Check and support non-inclusive caches on Intel processors.
* This is an optimized memset for AArch64. Memset is split into 4 main cases:Wilco Dijkstra2016-05-121-198/+161
| | | | | | | | | | | | | | small sets of up to 16 bytes, medium of 16..96 bytes which are fully unrolled. Large memsets of more than 96 bytes align the destination and use an unrolled loop processing 64 bytes per iteration. Memsets of zero of more than 256 use the dc zva instruction, and there are faster versions for the common ZVA sizes 64 or 128. STP of Q registers is used to reduce codesize without loss of performance. The speedup on test-memset is 1% on Cortex-A57 and 8% on Cortex-A53. * sysdeps/aarch64/memset.S (__memset): Rewrite of optimized memset.
* Increase fork signal safety for single-threaded processes [BZ #19703]Florian Weimer2016-05-121-15/+38
| | | | | | | | | This provides a band-aid and addresses the scenario where fork is called from a signal handler while the process is in the malloc subsystem (or has acquired the libio list lock). It does not address the general issue of async-signal-safety of fork; multi-threaded processes are not covered, and some glibc subsystems have fork handlers which are not async-signal-safe.
* getaddrinfo: Convert from extend_alloca to struct scratch_bufferFlorian Weimer2016-05-121-92/+59
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* S390: Use fPIC to avoid R_390_GOT12 relocation in gcrt1.o.Stefan Liebler2016-05-112-4/+0
| | | | | | | | | | | | | | | | | | | if glibc is build with -march=z900 | -march=z990, the startup file gcrt1.o (used if you link with gcc -pg) contains R_390_GOT12 | R_390_GOT20 relocations. Thus, an entry in the GOT can be addressed relative to the GOT pointer with a 12 | 20 bit displacement value. The startup files should not contain R_390_GOT12, R_390_GOT20 relocations, but R_390_GOTENT ones. This patch removes the overrides of pic-ccflag and the default pic-ccflag = -fPIC in Makeconfig is used instead to get the R_390_GOTENT relocations in gcrt1.o. ChangeLog: * sysdeps/s390/s390-32/Makefile (pic-ccflag): Remove. * sysdeps/s390/s390-64/Makefile: Likewise.
* Remove x86 ifunc-defines.sym and rtld-global-offsets.symH.J. Lu2016-05-118-51/+18
| | | | | | | | | | | | | | | | | | | | Merge x86 ifunc-defines.sym with x86 cpu-features-offsets.sym. Remove x86 ifunc-defines.sym and rtld-global-offsets.sym. No code changes on i686 and x86-64. * sysdeps/i386/i686/multiarch/Makefile (gen-as-const-headers): Remove ifunc-defines.sym. * sysdeps/x86_64/multiarch/Makefile (gen-as-const-headers): Likewise. * sysdeps/i386/i686/multiarch/ifunc-defines.sym: Removed. * sysdeps/x86/rtld-global-offsets.sym: Likewise. * sysdeps/x86_64/multiarch/ifunc-defines.sym: Likewise. * sysdeps/x86/Makefile (gen-as-const-headers): Remove rtld-global-offsets.sym. * sysdeps/x86_64/multiarch/ifunc-defines.sym: Merged with ... * sysdeps/x86/cpu-features-offsets.sym: This. * sysdeps/x86/cpu-features.h: Include <cpu-features-offsets.h> instead of <ifunc-defines.h> and <rtld-global-offsets.h>.
* getaddrinfo: Restore RES_USE_INET6 flag on error path [BZ #19994]Florian Weimer2016-05-101-0/+1
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* S390: Add support for vdso getcpu symbol.Stefan Liebler2016-05-094-0/+10
| | | | | | | | This patch adds support for symbol __kernel_getcpu in vDSO, which is available with kernel 4.5. Now sched_getcpu is using this symbol if available in mapped vDSO by defining macro HAVE_GETCPU_VSYSCALL. If not available at runtime, the former syscall is used.
* Move sysdeps/x86_64/cacheinfo.c to sysdeps/x86H.J. Lu2016-05-082-1/+1
| | | | | | | | | | Move sysdeps/x86_64/cacheinfo.c to sysdeps/x86. No code changes on x86 and x86_64. * sysdeps/i386/cacheinfo.c: Include <sysdeps/x86/cacheinfo.c> instead of <sysdeps/x86_64/cacheinfo.c>. * sysdeps/x86_64/cacheinfo.c: Moved to ... * sysdeps/x86/cacheinfo.c: Here.
* Revert "aio: fix newp->running data race"Samuel Thibault2016-05-041-5/+3
| | | | This reverts commit fd67a9cf7b733da082e4b6a5f25c19ea7921b4cd.
* aio: fix newp->running data raceSamuel Thibault2016-05-041-3/+5
| | | | | | | * sysdeps/pthread/aio_misc.c (__aio_enqueue_request): Do not write `running` field of `newp` when a thread was started to process it, since that thread will not take `__aio_requests_mutex`, and the field already has the proper value actually.
* powerpc: Fix operand prefixesGabriel F. T. Gomes2016-05-041-4/+4
| | | | | | | | | | | | | | The file sysdeps/powerpc/sysdeps.h defines aliases for condition register operands. E.g.: 'cr7' means condition register 7. On the one hand, this increases readability, as it makes it easier for readers to know whether the operand is a condition register, a general purpose register or an immediate. On the other hand, this permits that condition registers be written as if they were general purpose, and vice-versa, thus reducing the readability of the code. This commit removes some of these unintentional misuses. The changes have no effect on the final code. Checked with objdump.
* CVE-2016-1234: glob: Do not copy d_name field of struct dirent [BZ #19779]Florian Weimer2016-05-041-0/+22
| | | | | | Instead, we store the data we need from the return value of readdir in an object of the new type struct readdir_result. This type is independent of the layout of struct dirent.
* powerpc: Add missing insn in swapcontext [BZ #20004]Paul E. Murphy2016-05-031-0/+1
| | | | | A missing instruction was discovered in the compat version of swapcontext while running the GCC test suite.
* powerpc: Fix clone CLONE_VM compareAdhemerval Zanella2016-05-021-1/+1
| | | | | | | | | | | | This patch fixes the clone CLONE_VM change from 0cb313f (BZ#19957) where the commit changed the register that contains the save flags argument to compare with (from r28 to r29). This patch changes back to correct register. Tested on powerpc32 (thanks to Tulio Magno Quites Machado Filho). * sysdeps/unix/sysv/linux/powerpc/powerpc32/clone.S (__clone): Fix flags CLONE_VM compare.
* m68k: use large PIC model for gcrt1.oAndreas Schwab2016-04-301-0/+5
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generated by cgit-pink 1.4.1 (git 2.36.1) at 2024-08-16 05:56:41 +0000