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* elf: remove redundant is_path argumentDmitry V. Levin2017-12-271-2/+2
| | | | | | | | | | | is_path argument is no longer used and could be safely removed. * elf/dl-dst.h (DL_DST_COUNT): Remove is_path argument, all callers updated. * elf/dl-load.c (is_dst, _dl_dst_count, _dl_dst_substitute, expand_dynamic_string_token): Likewise. * sysdeps/generic/ldsodefs.h (_dl_dst_count, _dl_dst_substitute): Remove is_path argument.
* Deprecate external use of libio.h and _G_config.h.Zack Weinberg2017-12-244-63/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | libio.h was originally the header for a set of supported GNU extensions, but they have not been maintained as such in many years, they are now standing in the way of improvements to stdio, and we don't think there are any remaining external users. _G_config.h was never intended for public use, but predates the bits convention. Move both of these headers into the bits directory and provide stubs at top level which issue deprecation warnings. The contents of (bits/)libio.h and (bits/)_G_config.h are still exposed to external software via stdio.h; changing that requires more complex surgery than I have time to attempt right now. * libio/libio.h, libio/_G_config.h: New stub headers which issue a deprecation warning and then include <bits/libio.h>, <bits/_G_config.h> respectively. * libio/libio.h: Rename the original version of this file to libio/bits/libio.h. Error out if not included by stdio.h or the stub libio.h. * include/libio.h: Move to include/bits. Forward to libio/bits/libio.h. * sysdeps/generic/_G_config.h: Move to top-level bits/. Error out if not included by bits/libio.h or the stub _G_config.h. * sysdeps/unix/sysv/linux/_G_config.h: Move to sysdeps/unix/sysv/linux/bits. Error out if not included by bits/libio.h or the stub _G_config.h. * libio/stdio.h: Include bits/libio.h, not libio.h. * libio/Makefile: Install bits/libio.h and bits/_G_config.h as well as libio.h and _G_config.h. * csu/init.c, libio/fmemopen.c, libio/iolibio.h, libio/oldfmemopen.c * libio/strfile.h, stdio-common/vfscanf.c * sysdeps/pthread/flockfile.c, sysdeps/pthread/funlockfile.c Include stdio.h, not _G_config.h nor libio.h. * libio/iofgetpos.c: Also rename fgetpos64 out of the way. * libio/iofsetpos.c: Also rename fsetpos64 out of the way. * scripts/check-installed-headers.sh: Skip libio.h and _G_config.h.
* getrandom: fix comment [BZ #22347]Dmitry V. Levin2017-12-231-2/+2
| | | | | * stdlib/getrandom.c (getrandom): Fix comment. * sysdeps/unix/sysv/linux/getrandom.c (getrandom): Likewise.
* copy_file_range: New function to copy file dataFlorian Weimer2017-12-2229-0/+77
| | | | | The semantics are based on the Linux system call, but a very close emulation in user space is provided.
* Simplify tile assembly definitionsAdhemerval Zanella2017-12-2016-219/+219
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With tilepro removal, the uppercase instruction are not anymore required to be defines as potentially macros. This is a mechanical change done by the following shell script: --- INSNS="LD LD4U ST ST4 BNEZ BEQZ BEQZT BGTZ CMPEQI CMPEQ CMOVEQZ CMOVNEZ" FILES=$(find sysdeps/tile sysdeps/unix/sysv/linux/tile -iname *.S) for insn in $INSNS; do repl=$(echo $insn | tr '[:upper:]' '[:lower:]') sed -i 's/\b'$insn'\b/'$repl'/g' $FILES done --- Checked with a build for tilegx-linux-gnu and tilegx-linux-gnu-32 with and without the patch, there is no difference in generated binary with a dissassemble. * sysdeps/tile/__longjmp.S (__longjmp): Use lowercase instructions. * sysdeps/tile/__tls_get_addr.S (__tls_get_addr): Likewise. * sysdeps/tile/_mcount.S (__mcount): Likewise. * sysdeps/tile/crti.S (_init, _fini): Likewise. * sysdeps/tile/crtn.S: Likewise. * sysdeps/tile/dl-start.S (_start): Likewise. * sysdeps/tile/dl-trampoline.S: Likewise. * sysdeps/tile/setjmp.S (__sigsetjmp): Likewise. * sysdeps/tile/start.S (_start): Likewise. * sysdeps/unix/sysv/linux/tile/clone.S (_clone): Likewise. * sysdeps/unix/sysv/linux/tile/getcontext.S (__getcontext): Likewise. * sysdeps/unix/sysv/linux/tile/ioctl.S (__ioctl): Likewise. * sysdeps/unix/sysv/linux/tile/setcontext.S (__setcontext): Likewise. * sysdeps/unix/sysv/linux/tile/swapcontext.S (__swapcontext): Likewise. * sysdeps/unix/sysv/linux/tile/syscall.S (syscall): Likewise. * sysdeps/unix/sysv/linux/tile/vfork.S (__vfork): Likewise.
* Simplify tilegx sysdeps folderAdhemerval Zanella2017-12-2066-120/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With tilepro support removal we can now simplify internal tile support by moving the directory structure to avoid the unnecessary directory levels in tile/tilegx both on generic and linux folders. Checked with a build for tilegx-linux-gnu and tilegx-linux-gnu-32 with and without the patch, there is no difference in generated binary with a dissassemble. * stdlib/bug-getcontext.c (do_test): Remove tilepro mention in comment. * sysdeps/tile/preconfigure: Remove tilegx folder. * sysdeps/tile/tilegx/Implies: Move definitions to ... * sysdeps/tile/Implies: ... here. * sysdeps/tile/tilegx/Makefile: Move rules to ... * sysdeps/tile/Makefile: ... here. * sysdeps/tile/tilegx/atomic-machine.h: Move definitions to ... * sysdeps/tile/atomic-machine.h: ... here. Add include guards. * sysdeps/tile/tilegx/bits/wordsize.h: Move to ... * sysdeps/tile/bits/wordsize.h: ... here. * sysdeps/tile/tilegx/*: Move to ... * sysdeps/tile/*: ... here. * sysdeps/tile/tilegx/tilegx32/Implies: Move to ... * sysdeps/tile/tilegx32/Implies: ... here. * sysdeps/tile/tilegx/tilegx64/Implies: Move to ... * sysdeps/tile/tilegx64/Implies: ... here. * sysdeps/unix/sysv/linux/tile/tilegx/Makefile: Move definitions to ... * sysdeps/unix/sysv/linux/tile/Makefile: ... here. * sysdeps/unix/sysv/linux/tile/tilegx/*: Move to ... * sysdeps/unix/sysv/linux/tile/*: ... here. * sysdeps/unix/sysv/linux/tile/tilegx/tilegx32/*: Move to ... * sysdeps/unix/sysv/linux/tile/tilegx32/*: ... here. * sysdeps/unix/sysv/linux/tile/tilegx/tilegx64/*: Move to ... * sysdeps/unix/sysv/linux/tile/tilegx64/*: ... here.
* Remove tilepro-*-linux-gnu supportAdhemerval Zanella2017-12-2049-5103/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As from previous discussions [1] this patch removes tileprox-*-linux-gnu support from GLIBC. This patch is a straigthfoward one, which just remove tilepro specific implementation and configurations (no sysdep simplfication or reorganization is done). * README: Remove tilepro-*-linux-gnu from supported architecture. * scripts/build-many-glibcs.py: Likewise. * sysdeps/tile/__tls_get_addr.S (__tls_get_addr): Likewise. * sysdeps/tile/crti.S (PREINIT_FUNCTION): Likewise. * sysdeps/tile/dl-machine.h (ELF_MACHINE_NAME, elf_machine_matches_host, elf_machine_dynamic, elf_machine_load_address, elf_machine_runtime_setup, reloc_howto howto, elf_machine_rela): Likewise * sysdeps/tile/dl-start.S (_start): Likewise. * sysdeps/tile/memcmp.c (DBLALIGN, REVBYTES): Likewise. * sysdeps/tile/memcopy.h (MEMCPY_OK_FOR_FWD_MEMMOVE, MEMCPY_OK_FOR_FWD_MEMMOVE, op_t): Likewise. * sysdeps/tile/nptl/pthread_spin_lock.c (TNS, CMPTNS): Likewise. * sysdeps/tile/nptl/pthread_spin_trylock.c (TNS): Likewise. * sysdeps/tile/nptl/pthread_spin_unlock.c (pthread_spin_unlock): Likewise. * sysdeps/tile/nptl/tls.h (DB_THREAD_SELF): Likewise. * sysdeps/tile/preconfigure: Likewise. * sysdeps/tile/stackguard-macros.h (STACK_CHK_GUARD, POINTER_CHK_GUARD): Likewise. * sysdeps/tile/stackinfo.h (__stackinfo_sub): Likewise. * sysdeps/tile/start.S (_start): Likewise. * sysdeps/tile/tls-macros.h (TLS_GD_OFFSET, TLS_IE_OFFSET, _TLS_LE): Likewise. * sysdeps/tile/sysdep.h (REGSIZE): Likewise. (LD, LD4U, ST, ST4, BNEZ, BEQZ, BEQZT, BGTZ, CMPEQI, CMPEQ, CMOVEQZ, CMOVNEZ): Remove. * sysdeps/unix/sysv/linux/tile/bits/environments.h (__ILP32_OFF32_CFLAGS, __ILP32_OFFBIG_CFLAGS, __ILP32_OFF32_LDFLAGS, __ILP32_OFFBIG_LDFLAGS, __LP64_OFF64_CFLAGS, __LP64_OFF64_LDFLAGS): Likewise. * sysdeps/tile/wordcopy.c (DBLALIGN): Likewise. * sysdeps/tile/tilepro/Implies: Remove file. * sysdeps/tile/tilepro/atomic-machine.h: Likewise. * sysdeps/tile/tilepro/bits/wordsize.h: Likewise. * sysdeps/tile/tilepro/memchr.c: Likewise. * sysdeps/tile/tilepro/memcpy.S: Likewise. * sysdeps/tile/tilepro/memset.c: Likewise. * sysdeps/tile/tilepro/memusage.h: Likewise. * sysdeps/tile/tilepro/rawmemchr.c: Likewise. * sysdeps/tile/tilepro/strchr.c: Likewise. * sysdeps/tile/tilepro/strchrnul.c: Likewise. * sysdeps/tile/tilepro/strlen.c: Likewise. * sysdeps/tile/tilepro/strrchr.c: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/Implies: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/c++-types.data: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/jmp_buf-macros.h: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/ld.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/ldconfig.h: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/libBrokenLocale.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/libanl.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/libcrypt.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/libdl.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/libnsl.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/libpthread.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/libresolv.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/librt.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/libthread_db.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/libutil.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/register-dump.h: Likewise. * sysdeps/unix/sysv/linux/tile/sysconf.c (linux_sysconf): Remove tilepro mention in comment. [1] https://sourceware.org/ml/libc-alpha/2017-12/msg00038.html
* nptl: Consolidate pthread_{timed,try}join{_np}Adhemerval Zanella2017-12-202-12/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch consolidates the pthread_join and gnu extensions to avoid code duplication. The function pthread_join, pthread_tryjoin_np, and pthread_timedjoin_np are now based on pthread_timedjoin_ex. It also fixes some inconsistencies on ESRCH, EINVAL, EDEADLK handling (where each implementation differs from each other) and also on clenup handler (which now always use a CAS). Checked on i686-linux-gnu and x86_64-linux-gnu. * nptl/pthreadP.h (__pthread_timedjoin_np): Define. * nptl/pthread_join.c (pthread_join): Use __pthread_timedjoin_np. * nptl/pthread_tryjoin.c (pthread_tryjoin): Likewise. * nptl/pthread_timedjoin.c (cleanup): Use CAS on argument setting. (pthread_timedjoin_np): Define internal symbol and common code from pthread_join. * sysdeps/unix/sysv/linux/i386/lowlevellock.h (__lll_timedwait_tid): Remove superflous checks. * sysdeps/unix/sysv/linux/x86_64/lowlevellock.h (__lll_timedwait_tid): Likewise. Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org> Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* aarch64: update libm-test-ulpsSzabolcs Nagy2017-12-201-20/+20
| | | | * sysdeps/aarch64/libm-test-ulps: Update.
* aarch64: fix memset with --disable-multi-archAdhemerval Zanella2017-12-201-0/+4
| | | | * sysdeps/aarch64/memset.S (MEMSET): Define.
* nptl: Implement pthread_self in libc.so [BZ #22635]Florian Weimer2017-12-201-1/+0
| | | | | | | | | | | | | | | | | All binaries use TLS and thus need a properly set up TCB, so we can simply return its address directly, instead of forwarding to the libpthread implementation from libc. For versioned symbols, the dynamic linker checks that the soname matches the name supplied by the link editor, so a compatibility symbol in libpthread is needed. To avoid linking against the libpthread function in all cases, we would have to bump the symbol version of libpthread in libc.so and supply a compat symbol. This commit does not do that because the function implementation is so small, so the overhead by two active copies of the same function might well be smaller than the increase in symbol table size.
* Provide a C++ version of iseqsig (bug 22377)Gabriel F. T. Gomes2017-12-191-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | In C++ mode, __MATH_TG cannot be used for defining iseqsig, because __MATH_TG relies on __builtin_types_compatible_p, which is a C-only builtin. This is true when float128 is provided as an ABI-distinct type from long double. Moreover, the comparison macros from ISO C take two floating-point arguments, which need not have the same type. Choosing what underlying function to call requires evaluating the formats of the arguments, then selecting which is wider. The macro __MATH_EVAL_FMT2 provides this information, however, only the type of the macro expansion is relevant (actually evaluating the expression would be incorrect). This patch provides a C++ version of iseqsig, in which only the type of __MATH_EVAL_FMT2 (__typeof or decltype) is used as a template parameter for __iseqsig_type. This function calls the appropriate underlying function. Tested for powerpc64le and x86_64. [BZ #22377] * math/Makefile [C++] (tests): Add test for iseqsig. * math/math.h [C++] (iseqsig): New implementation, which does not rely on __MATH_TG/__builtin_types_compatible_p. * math/test-math-iseqsig.cc: New file. * sysdeps/powerpc/powerpc64le/Makefile (CFLAGS-test-math-iseqsig.cc): New variable.
* Avoid signed shift overflow in pow (bug 21309).Bernd Edlinger2017-12-191-1/+2
| | | | | | | | | | | | | | As noted in bug 21309, dbl-64/e_pow.c contains signed int shifts that, although the shift count is in the range [0, 31], shift bits into and beyond the sign bit and so are undefined in ISO C. Although this is defined in GNU C, this patch from the bug cleans up the code to avoid those shifts. Tested for x86_64. [BZ #21309] * sysdeps/ieee754/dbl-64/e_pow.c (checkint): Make m and n unsigned.
* Revert exp reimplementation (causes test failures).Joseph Myers2017-12-1917-484/+319
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Revert: 2017-12-19 Joseph Myers <joseph@codesourcery.com> * sysdeps/x86_64/fpu/libm-test-ulps: Update. 2017-12-19 Patrick McGehearty <patrick.mcgehearty@oracle.com> * sysdeps/ieee754/dbl-64/e_exp.c: Include <math-svid-compat.h> and <errno.h>. Include "eexp.tbl". (half): New constant. (one): Likewise. (__ieee754_exp): Rewrite. (__slowexp): Remove prototype. * sysdeps/ieee754/dbl-64/eexp.tbl: New file. * sysdeps/ieee754/dbl-64/slowexp.c: Remove file. * sysdeps/i386/fpu/slowexp.c: Likewise. * sysdeps/ia64/fpu/slowexp.c: Likewise. * sysdeps/m68k/m680x0/fpu/slowexp.c: Likewise. * sysdeps/x86_64/fpu/multiarch/slowexp-avx.c: Likewise. * sysdeps/x86_64/fpu/multiarch/slowexp-fma.c: Likewise. * sysdeps/x86_64/fpu/multiarch/slowexp-fma4.c: Likewise. * sysdeps/generic/math_private.h (__slowexp): Remove prototype. * sysdeps/ieee754/dbl-64/e_pow.c: Remove mention of slowexp.c in comment. * sysdeps/powerpc/power4/fpu/Makefile [$(subdir) = math] (CPPFLAGS-slowexp.c): Remove variable. * sysdeps/x86_64/fpu/multiarch/Makefile (libm-sysdep_routines): Remove slowexp-fma, slowexp-fma4 and slowexp-avx. (CFLAGS-slowexp-fma.c): Remove variable. (CFLAGS-slowexp-fma4.c): Likewise. (CFLAGS-slowexp-avx.c): Likewise. * sysdeps/x86_64/fpu/multiarch/e_exp-avx.c (__slowexp): Do not define as macro. * sysdeps/x86_64/fpu/multiarch/e_exp-fma.c (__slowexp): Likewise. * sysdeps/x86_64/fpu/multiarch/e_exp-fma4.c (__slowexp): Likewise. * math/Makefile (type-double-routines): Remove slowexp. * manual/probes.texi (slowexp_p6): Remove. (slowexp_p32): Likewise.
* Update x86_64 libm-test-ulps.Joseph Myers2017-12-191-8/+10
| | | | * sysdeps/x86_64/fpu/libm-test-ulps: Update.
* Improve __ieee754_exp() performance by greater than 5x on sparc/x86.Patrick McGehearty2017-12-1916-311/+474
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These changes will be active for all platforms that don't provide their own exp() routines. They will also be active for ieee754 versions of ccos, ccosh, cosh, csin, csinh, sinh, exp10, gamma, and erf. Typical performance gains is typically around 5x when measured on Sparc s7 for common values between exp(1) and exp(40). Using the glibc perf tests on sparc, sparc (nsec) x86 (nsec) old new old new max 17629 395 5173 144 min 399 54 15 13 mean 5317 200 1349 23 The extreme max times for the old (ieee754) exp are due to the multiprecision computation in the old algorithm when the true value is very near 0.5 ulp away from an value representable in double precision. The new algorithm does not take special measures for those cases. The current glibc exp perf tests overrepresent those values. Informal testing suggests approximately one in 200 cases might invoke the high cost computation. The performance advantage of the new algorithm for other values is still large but not as large as indicated by the chart above. Glibc correctness tests for exp() and expf() were run. Within the test suite 3 input values were found to cause 1 bit differences (ulp) when "FE_TONEAREST" rounding mode is set. No differences in exp() were seen for the tested values for the other rounding modes. Typical example: exp(-0x1.760cd2p+0) (-1.46113312244415283203125) new code: 2.31973271630014299393707e-01 0x1.db14cd799387ap-3 old code: 2.31973271630014271638132e-01 0x1.db14cd7993879p-3 exp = 2.31973271630014285508337 (high precision) Old delta: off by 0.49 ulp New delta: off by 0.51 ulp In addition, because ieee754_exp() is used by other routines, cexp() showed test results with very small imaginary input values where the imaginary portion of the result was off by 3 ulp when in upward rounding mode, but not in the other rounding modes. For x86, tgamma showed a few values where the ulp increased to 6 (max ulp for tgamma is 5). Sparc tgamma did not show these failures. I presume the tgamma differences are due to compiler optimization differences within the gamma function.The gamma function is known to be difficult to compute accurately. * sysdeps/ieee754/dbl-64/e_exp.c: Include <math-svid-compat.h> and <errno.h>. Include "eexp.tbl". (half): New constant. (one): Likewise. (__ieee754_exp): Rewrite. (__slowexp): Remove prototype. * sysdeps/ieee754/dbl-64/eexp.tbl: New file. * sysdeps/ieee754/dbl-64/slowexp.c: Remove file. * sysdeps/i386/fpu/slowexp.c: Likewise. * sysdeps/ia64/fpu/slowexp.c: Likewise. * sysdeps/m68k/m680x0/fpu/slowexp.c: Likewise. * sysdeps/x86_64/fpu/multiarch/slowexp-avx.c: Likewise. * sysdeps/x86_64/fpu/multiarch/slowexp-fma.c: Likewise. * sysdeps/x86_64/fpu/multiarch/slowexp-fma4.c: Likewise. * sysdeps/generic/math_private.h (__slowexp): Remove prototype. * sysdeps/ieee754/dbl-64/e_pow.c: Remove mention of slowexp.c in comment. * sysdeps/powerpc/power4/fpu/Makefile [$(subdir) = math] (CPPFLAGS-slowexp.c): Remove variable. * sysdeps/x86_64/fpu/multiarch/Makefile (libm-sysdep_routines): Remove slowexp-fma, slowexp-fma4 and slowexp-avx. (CFLAGS-slowexp-fma.c): Remove variable. (CFLAGS-slowexp-fma4.c): Likewise. (CFLAGS-slowexp-avx.c): Likewise. * sysdeps/x86_64/fpu/multiarch/e_exp-avx.c (__slowexp): Do not define as macro. * sysdeps/x86_64/fpu/multiarch/e_exp-fma.c (__slowexp): Likewise. * sysdeps/x86_64/fpu/multiarch/e_exp-fma4.c (__slowexp): Likewise. * math/Makefile (type-double-routines): Remove slowexp. * manual/probes.texi (slowexp_p6): Remove. (slowexp_p32): Likewise.
* ia64: Fix memchr for large input sizes (BZ #22603)Adhemerval Zanella2017-12-191-0/+4
| | | | | | | | | | | | | | | | | | | | | | Current optimized ia64 memchr uses a strategy to check for last address by adding the input one with expected size. However it does not take care for possible overflow. It was triggered by 3038145ca23 where default rawmemchr now uses memchr (p, c, (size_t)-1). This patch fixes it by implement a satured addition where overflows sets the maximum pointer size to UINTPTR_MAX. Checked on ia64-linux-gnu where it fixes both stratcliff and test-rawmemchr failures. Adhemerval Zanella <adhemerval.zanella@linaro.org> James Clarke <jrtc27@jrtc27.com> [BZ #22603] * sysdeps/ia64/memchr.S (__memchr): Avoid overflow in pointer addition.
* sh: Fix clone exit return code (BZ #22605)Adhemerval Zanella2017-12-191-0/+1
| | | | | | | | | | | | | | | | Since 3f823e87cc (Call exit directly in clone (BZ #21512)) SH clone implementation fails to set the exit code resulting in the failures: FAIL: nptl/tst-align-clone FAIL: nptl/tst-getpid1 This patch fixes the both testcases. [BZ #22605] * sysdeps/unix/sysv/linux/sh/clone.S (__clone): Fix exit return code. Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* x86: Add feature_1 to tcbhead_t [BZ #22563]H.J. Lu2017-12-194-1/+10
| | | | | | | | | | | | | | | | | | On x86, padding in struct __jmp_buf_tag is used for shadow stack pointer to support Shadow Stack in Intel Control-flow Enforcemen Technology. cancel_jmp_buf has been updated to include saved_mask so that it is as large as struct __jmp_buf_tag. We must suport the old cancel_jmp_buf in existing binaries. Since symbol versioning doesn't work on cancel_jmp_buf, feature_1 is added to tcbhead_t so that setjmp and longjmp can check if shadow stack is enabled. NB: Shadow stack is enabled only if all modules are shadow stack enabled. [BZ #22563] * sysdeps/i386/nptl/tcb-offsets.sym (FEATURE_1_OFFSET): New. * sysdeps/i386/nptl/tls.h (tcbhead_t): Add feature_1. * sysdeps/x86_64/nptl/tcb-offsets.sym (FEATURE_1_OFFSET): New. * sysdeps/x86_64/nptl/tls.h (tcbhead_t): Rename __glibc_unused1 to feature_1.
* Linux/x86: Update cancel_jmp_buf to match __jmp_buf_tag [BZ #22563]H.J. Lu2017-12-195-10/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On x86, padding in struct __jmp_buf_tag is used for shadow stack pointer to support shadow stack in Intel Control-flow Enforcemen Technology. Since the cancel_jmp_buf array is passed to setjmp and longjmp by casting it to pointer to struct __jmp_buf_tag, it should be as large as struct __jmp_buf_tag. Otherwise when shadow stack is enabled, setjmp and longjmp will write and read beyond cancel_jmp_buf when saving and restoring shadow stack pointer. This patch adds bits/types/__cancel_jmp_buf_tag.h to define struct __cancel_jmp_buf_tag so that Linux/x86 can add saved_mask to cancel_jmp_buf. Tested natively on i386, x86_64 and x32. Tested hppa-linux-gnu with build-many-glibcs.py. [BZ #22563] * bits/types/__cancel_jmp_buf_tag.h: New file. * sysdeps/unix/sysv/linux/x86/bits/types/__cancel_jmp_buf_tag.h * sysdeps/unix/sysv/linux/x86/pthreaddef.h: Likewise. * sysdeps/unix/sysv/linux/x86/nptl/pthreadP.h: Likewise. * nptl/Makefile (headers): Add bits/types/__cancel_jmp_buf_tag.h. * nptl/descr.h [NEED_SAVED_MASK_IN_CANCEL_JMP_BUF] (pthread_unwind_buf): Add saved_mask to cancel_jmp_buf. * sysdeps/nptl/pthread.h: Include <bits/types/__cancel_jmp_buf_tag.h>. (__pthread_unwind_buf_t): Use struct __cancel_jmp_buf_tag with __cancel_jmp_buf. * sysdeps/unix/sysv/linux/hppa/pthread.h: Likewise.
* Fix m68k bits/mathinline.h attributes (bug 22631).Joseph Myers2017-12-192-68/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | m68k bits/mathinline.h declares various functions with const attributes. These are inappropriate for functions that have results depending on the rounding mode; the machine-independent bits/mathcalls.h only uses const attributes for a very few functions with no rounding mode dependence, and the m68k header should do likewise. GCC uses pure for such functions with -frounding-math, resulting in GCC mainline warning for conflicts with between the header and the built-in attributes and glibc failing to build for m68k with GCC mainline. This patch fixes the attributes to avoid using const except when bits/mathcalls.h does so. (There are a few functions where maybe bits/mathcalls.h could do so but doesn't, but keeping the headers in sync in this regard seems to be the safe approach.) Tested compilation with build-many-glibcs.py with GCC mainline. [BZ #22631] * sysdeps/m68k/m680x0/fpu/bits/mathinline.h (__m81_defun): Add argument for attrubutes. All callers changed. (__inline_mathop1): Likewise. All callers changed. (__inline_mathop): Likewise. All callers changed. [__USE_MISC] (scalbn): Use __inline_forward instead of __inline_forward_c. [__USE_ISOC99] (scalbln): Likewise. [__USE_ISOC99] (nearbyint): Likewise. [__USE_ISOC99] (lrint): Likewise. [__USE_MISC] (scalbnf): Likewise. [__USE_ISOC99] (scalblnf): Likewise. [__USE_ISOC99] (nearbyintf): Likewise. [__USE_ISOC99] (lrintf): Likewise. [__USE_MISC] (scalbnl): Likewise. [__USE_ISOC99] (scalblnl): Likewise. [__USE_ISOC99] (nearbyintl): Likewise. [__USE_ISOC99] (lrintl): Likewise. * sysdeps/m68k/m680x0/fpu/mathimpl.h: All callers of __inline_mathop and __m81_defun changed.
* ld.so: Examine GLRO to detect inactive loader [BZ #20204]Florian Weimer2017-12-181-1/+19
| | | | | | | | | | | | GLRO (_rtld_global_ro) is read-only after initialization and can therefore not be patched at run time, unlike the hook table addresses and their contents, so this is a desirable hardening feature. The hooks are only needed if ld.so has not been initialized, and this happens only after static dlopen (dlmopen uses a single ld.so object across all namespaces). Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* mips32: fix clobbering s0 in setjmp() [BZ #22624]Sergei Trofimovich2017-12-181-0/+5
| | | | | | | | | | | Similar to commit 1ab47db00dfbc0128119e3503d3ed640ffc4830b ("mips64: fix clobbering s0 in setjmp() [BZ #22624]") as sysdeps/mips/setjmp_aux.c is almost an identical copy of sysdeps/mips/mips64/setjmp_aux.c. [BZ #22624] * sysdeps/mips/setjmp_aux.c (__sigsetjmp_aux): Use inhibit_stack_protector.
* mips64: fix clobbering s0 in setjmp() [BZ #22624]Sergei Trofimovich2017-12-181-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When configured as --enable-stack-protector=all glibc inserts stack checking canary into every function including __sigsetjmp_aux(). Stack checking code ends up using s0 register to temporary hold address of global canary value. Unfortunately __sigsetjmp_aux assumes no caller' caller-save registers should be clobbered as it stores them as-is. The fix is to disable stack protection of __sigsetjmp_aux. Tested on the following test: #include <setjmp.h> #include <stdio.h> int main() { jmp_buf jb; volatile register long s0 asm ("$s0"); s0 = 1234; if (setjmp(jb) == 0) longjmp(jb, 1); printf ("$s0 = %lu\n", s0); } Without the fix: $ qemu-mipsn32 -L . ./mips-longjmp-bug $s0 = 1082346228 With the fix: $ qemu-mipsn32 -L . ./mips-longjmp-bug $s0 = 1234 [BZ #22624] * sysdeps/mips/mips64/setjmp_aux.c (__sigsetjmp_aux): Use inhibit_stack_protector.
* aarch64: fix start code for static pieSzabolcs Nagy2017-12-181-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | There are three flavors of the crt startup code: 1) crt1.o used for non-pie, 2) Scrt1.o used for dynamic linked pie (dynamic linker relocates), 3) rcrt1.o used for static linked pie (self relocation is needed) In the --enable-static-pie case crt1.o is built with -DPIC and in case of static linking it interposes _dl_relocate_static_pie in libc to avoid self relocation. Scrt1.o is built with -DPIC -DSHARED and it relies on GOT entries that the static linker cannot relax and thus need relocation before the start code is executed, so rcrt1.o needs separate implementation. This implementation does not work for .text > 4G position independent executables, which is fine since the toolchain does not support -mcmodel=large with -fPIE. Tests pass with ld/22269 and ld/22263 binutils bugs fixed. * sysdeps/aarch64/start.S (_start): Handle PIC && !SHARED case.
* s390: Update ulpsRajalakshmi Srinivasaraghavan2017-12-161-20/+20
| | | | * sysdeps/s390/fpu/libm-test-ulps: Update.
* powerpc: Update ulpsRajalakshmi Srinivasaraghavan2017-12-161-20/+20
| | | | * sysdeps/powerpc/fpu/libm-test-ulps: Update.
* New generic sincosfRajalakshmi Srinivasaraghavan2017-12-164-237/+297
| | | | | This implementation is based on generic s_sinf.c and s_cosf.c. Tested on s390x, powerpc64le and powerpc32.
* Add --enable-static-pie configure option to build static PIE [BZ #19574]H.J. Lu2017-12-156-0/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Static PIE extends address space layout randomization to static executables. It provides additional security hardening benefits at the cost of some memory and performance. Dynamic linker, ld.so, is a standalone program which can be loaded at any address. This patch adds a configure option, --enable-static-pie, to embed the part of ld.so in static executable to create static position independent executable (static PIE). A static PIE is similar to static executable, but can be loaded at any address without help from a dynamic linker. When --enable-static-pie is used to configure glibc, libc.a is built as PIE and all static executables, including tests, are built as static PIE. The resulting libc.a can be used together with GCC 8 or above to build static PIE with the compiler option, -static-pie. But GCC 8 isn't required to build glibc with --enable-static-pie. Only GCC with PIE support is needed. When an older GCC is used to build glibc with --enable-static-pie, proper input files are passed to linker to create static executables as static PIE, together with "-z text" to prevent dynamic relocations in read-only segments, which are not allowed in static PIE. The following changes are made for static PIE: 1. Add a new function, _dl_relocate_static_pie, to: a. Get the run-time load address. b. Read the dynamic section. c. Perform dynamic relocations. Dynamic linker also performs these steps. But static PIE doesn't load any shared objects. 2. Call _dl_relocate_static_pie at entrance of LIBC_START_MAIN in libc.a. crt1.o, which is used to create dynamic and non-PIE static executables, is updated to include a dummy _dl_relocate_static_pie. rcrt1.o is added to create static PIE, which will link in the real _dl_relocate_static_pie. grcrt1.o is also added to create static PIE with -pg. GCC 8 has been updated to support rcrt1.o and grcrt1.o for static PIE. Static PIE can work on all architectures which support PIE, provided: 1. Target must support accessing of local functions without dynamic relocations, which is needed in start.S to call __libc_start_main with function addresses of __libc_csu_init, __libc_csu_fini and main. All functions in static PIE are local functions. If PIE start.S can't reach main () defined in a shared object, the code sequence: pass address of local_main to __libc_start_main ... local_main: tail call to main via PLT can be used. 2. start.S is updated to check PIC instead SHARED for PIC code path and avoid dynamic relocation, when PIC is defined and SHARED isn't defined, to support static PIE. 3. All assembly codes are updated check PIC instead SHARED for PIC code path to avoid dynamic relocations in read-only sections. 4. All assembly codes are updated check SHARED instead PIC for static symbol name. 5. elf_machine_load_address in dl-machine.h are updated to support static PIE. 6. __brk works without TLS nor dynamic relocations in read-only section so that it can be used by __libc_setup_tls to initializes TLS in static PIE. NB: When glibc is built with GCC defaulted to PIE, libc.a is compiled with -fPIE, regardless if --enable-static-pie is used to configure glibc. When glibc is configured with --enable-static-pie, libc.a is compiled with -fPIE, regardless whether GCC defaults to PIE or not. The same libc.a can be used to build both static executable and static PIE. There is no need for separate PIE copy of libc.a. On x86-64, the normal static sln: text data bss dec hex filename 625425 8284 5456 639165 9c0bd elf/sln the static PIE sln: text data bss dec hex filename 657626 20636 5392 683654 a6e86 elf/sln The code size is increased by 5% and the binary size is increased by 7%. Linker requirements to build glibc with --enable-static-pie: 1. Linker supports --no-dynamic-linker to remove PT_INTERP segment from static PIE. 2. Linker can create working static PIE. The x86-64 linker needs the fix for https://sourceware.org/bugzilla/show_bug.cgi?id=21782 The i386 linker needs to be able to convert "movl main@GOT(%ebx), %eax" to "leal main@GOTOFF(%ebx), %eax" if main is defined locally. Binutils 2.29 or above are OK for i686 and x86-64. But linker status for other targets need to be verified. 3. Linker should resolve undefined weak symbols to 0 in static PIE: https://sourceware.org/bugzilla/show_bug.cgi?id=22269 4. Many ELF backend linkers incorrectly check bfd_link_pic for TLS relocations, which should check bfd_link_executable instead: https://sourceware.org/bugzilla/show_bug.cgi?id=22263 Tested on aarch64, i686 and x86-64. Using GCC 7 and binutils master branch, build-many-glibcs.py with --enable-static-pie with all patches for static PIE applied have the following build successes: PASS: glibcs-aarch64_be-linux-gnu build PASS: glibcs-aarch64-linux-gnu build PASS: glibcs-armeb-linux-gnueabi-be8 build PASS: glibcs-armeb-linux-gnueabi build PASS: glibcs-armeb-linux-gnueabihf-be8 build PASS: glibcs-armeb-linux-gnueabihf build PASS: glibcs-arm-linux-gnueabi build PASS: glibcs-arm-linux-gnueabihf build PASS: glibcs-arm-linux-gnueabihf-v7a build PASS: glibcs-arm-linux-gnueabihf-v7a-disable-multi-arch build PASS: glibcs-m68k-linux-gnu build PASS: glibcs-microblazeel-linux-gnu build PASS: glibcs-microblaze-linux-gnu build PASS: glibcs-mips64el-linux-gnu-n32 build PASS: glibcs-mips64el-linux-gnu-n32-nan2008 build PASS: glibcs-mips64el-linux-gnu-n32-nan2008-soft build PASS: glibcs-mips64el-linux-gnu-n32-soft build PASS: glibcs-mips64el-linux-gnu-n64 build PASS: glibcs-mips64el-linux-gnu-n64-nan2008 build PASS: glibcs-mips64el-linux-gnu-n64-nan2008-soft build PASS: glibcs-mips64el-linux-gnu-n64-soft build PASS: glibcs-mips64-linux-gnu-n32 build PASS: glibcs-mips64-linux-gnu-n32-nan2008 build PASS: glibcs-mips64-linux-gnu-n32-nan2008-soft build PASS: glibcs-mips64-linux-gnu-n32-soft build PASS: glibcs-mips64-linux-gnu-n64 build PASS: glibcs-mips64-linux-gnu-n64-nan2008 build PASS: glibcs-mips64-linux-gnu-n64-nan2008-soft build PASS: glibcs-mips64-linux-gnu-n64-soft build PASS: glibcs-mipsel-linux-gnu build PASS: glibcs-mipsel-linux-gnu-nan2008 build PASS: glibcs-mipsel-linux-gnu-nan2008-soft build PASS: glibcs-mipsel-linux-gnu-soft build PASS: glibcs-mips-linux-gnu build PASS: glibcs-mips-linux-gnu-nan2008 build PASS: glibcs-mips-linux-gnu-nan2008-soft build PASS: glibcs-mips-linux-gnu-soft build PASS: glibcs-nios2-linux-gnu build PASS: glibcs-powerpc64le-linux-gnu build PASS: glibcs-powerpc64-linux-gnu build PASS: glibcs-tilegxbe-linux-gnu-32 build PASS: glibcs-tilegxbe-linux-gnu build PASS: glibcs-tilegx-linux-gnu-32 build PASS: glibcs-tilegx-linux-gnu build PASS: glibcs-tilepro-linux-gnu build and the following build failures: FAIL: glibcs-alpha-linux-gnu build elf/sln is failed to link due to: assertion fail bfd/elf64-alpha.c:4125 This is caused by linker bug and/or non-PIC code in PIE libc.a. FAIL: glibcs-hppa-linux-gnu build elf/sln is failed to link due to: collect2: fatal error: ld terminated with signal 11 [Segmentation fault] https://sourceware.org/bugzilla/show_bug.cgi?id=22537 FAIL: glibcs-ia64-linux-gnu build elf/sln is failed to link due to: collect2: fatal error: ld terminated with signal 11 [Segmentation fault] FAIL: glibcs-powerpc-linux-gnu build FAIL: glibcs-powerpc-linux-gnu-soft build FAIL: glibcs-powerpc-linux-gnuspe build FAIL: glibcs-powerpc-linux-gnuspe-e500v1 build elf/sln is failed to link due to: ld: read-only segment has dynamic relocations. This is caused by linker bug and/or non-PIC code in PIE libc.a. See: https://sourceware.org/bugzilla/show_bug.cgi?id=22264 FAIL: glibcs-powerpc-linux-gnu-power4 build elf/sln is failed to link due to: findlocale.c:96:(.text+0x22c): @local call to ifunc memchr This is caused by linker bug and/or non-PIC code in PIE libc.a. FAIL: glibcs-s390-linux-gnu build elf/sln is failed to link due to: collect2: fatal error: ld terminated with signal 11 [Segmentation fault], core dumped assertion fail bfd/elflink.c:14299 This is caused by linker bug and/or non-PIC code in PIE libc.a. FAIL: glibcs-sh3eb-linux-gnu build FAIL: glibcs-sh3-linux-gnu build FAIL: glibcs-sh4eb-linux-gnu build FAIL: glibcs-sh4eb-linux-gnu-soft build FAIL: glibcs-sh4-linux-gnu build FAIL: glibcs-sh4-linux-gnu-soft build elf/sln is failed to link due to: ld: read-only segment has dynamic relocations. This is caused by linker bug and/or non-PIC code in PIE libc.a. See: https://sourceware.org/bugzilla/show_bug.cgi?id=22263 Also TLS code sequence in SH assembly syscalls in glibc doesn't match TLS code sequence expected by ld: https://sourceware.org/bugzilla/show_bug.cgi?id=22270 FAIL: glibcs-sparc64-linux-gnu build FAIL: glibcs-sparcv9-linux-gnu build FAIL: glibcs-tilegxbe-linux-gnu build FAIL: glibcs-tilegxbe-linux-gnu-32 build FAIL: glibcs-tilegx-linux-gnu build FAIL: glibcs-tilegx-linux-gnu-32 build FAIL: glibcs-tilepro-linux-gnu build elf/sln is failed to link due to: ld: read-only segment has dynamic relocations. This is caused by linker bug and/or non-PIC code in PIE libc.a. See: https://sourceware.org/bugzilla/show_bug.cgi?id=22263 [BZ #19574] * INSTALL: Regenerated. * Makeconfig (real-static-start-installed-name): New. (pic-default): Updated for --enable-static-pie. (pie-default): New for --enable-static-pie. (default-pie-ldflag): Likewise. (+link-static-before-libc): Replace $(DEFAULT-LDFLAGS-$(@F)) with $(if $($(@F)-no-pie),$(no-pie-ldflag),$(default-pie-ldflag)). Replace $(static-start-installed-name) with $(real-static-start-installed-name). (+prectorT): Updated for --enable-static-pie. (+postctorT): Likewise. (CFLAGS-.o): Add $(pie-default). (CFLAGS-.op): Likewise. * NEWS: Mention --enable-static-pie. * config.h.in (ENABLE_STATIC_PIE): New. * configure.ac (--enable-static-pie): New configure option. (have-no-dynamic-linker): New LIBC_CONFIG_VAR. (have-static-pie): Likewise. Enable static PIE if linker supports --no-dynamic-linker. (ENABLE_STATIC_PIE): New AC_DEFINE. (enable-static-pie): New LIBC_CONFIG_VAR. * configure: Regenerated. * csu/Makefile (omit-deps): Add r$(start-installed-name) and gr$(start-installed-name) for --enable-static-pie. (extra-objs): Likewise. (install-lib): Likewise. (extra-objs): Add static-reloc.o and static-reloc.os ($(objpfx)$(start-installed-name)): Also depend on $(objpfx)static-reloc.o. ($(objpfx)r$(start-installed-name)): New. ($(objpfx)g$(start-installed-name)): Also depend on $(objpfx)static-reloc.os. ($(objpfx)gr$(start-installed-name)): New. * csu/libc-start.c (LIBC_START_MAIN): Call _dl_relocate_static_pie in libc.a. * csu/libc-tls.c (__libc_setup_tls): Add main_map->l_addr to initimage. * csu/static-reloc.c: New file. * elf/Makefile (routines): Add dl-reloc-static-pie. (elide-routines.os): Likewise. (DEFAULT-LDFLAGS-tst-tls1-static-non-pie): Removed. (tst-tls1-static-non-pie-no-pie): New. * elf/dl-reloc-static-pie.c: New file. * elf/dl-support.c (_dl_get_dl_main_map): New function. * elf/dynamic-link.h (ELF_DURING_STARTUP): Also check STATIC_PIE_BOOTSTRAP. * elf/get-dynamic-info.h (elf_get_dynamic_info): Likewise. * gmon/Makefile (tests): Add tst-gmon-static-pie. (tests-static): Likewise. (DEFAULT-LDFLAGS-tst-gmon-static): Removed. (tst-gmon-static-no-pie): New. (CFLAGS-tst-gmon-static-pie.c): Likewise. (CRT-tst-gmon-static-pie): Likewise. (tst-gmon-static-pie-ENV): Likewise. (tests-special): Likewise. ($(objpfx)tst-gmon-static-pie.out): Likewise. (clean-tst-gmon-static-pie-data): Likewise. ($(objpfx)tst-gmon-static-pie-gprof.out): Likewise. * gmon/tst-gmon-static-pie.c: New file. * manual/install.texi: Document --enable-static-pie. * sysdeps/generic/ldsodefs.h (_dl_relocate_static_pie): New. (_dl_get_dl_main_map): Likewise. * sysdeps/i386/configure.ac: Check if linker supports static PIE. * sysdeps/x86_64/configure.ac: Likewise. * sysdeps/i386/configure: Regenerated. * sysdeps/x86_64/configure: Likewise. * sysdeps/mips/Makefile (ASFLAGS-.o): Add $(pie-default). (ASFLAGS-.op): Likewise.
* Don't set errno in Hurd rtld's __access_noerrnoThomas Schwinge2017-12-151-1/+0
| | | | | | | | | * sysdeps/mach/hurd/dl-sysdep.c (__access_noerrno): Don't set errno. Fixes commit 819ea3347e3a30a611488ceeec53650baaeb7961. Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
* Update SPARC divrem generation to match output.Joseph Myers2017-12-156-11/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While working on another patch I noticed that (a) sysdeps/sparc/sparc32/Makefile is the only place with special realclean settings, apart from po/, and (b) the generated files with a rule in that Makefile to generate them (using m4) had been patched manually so no longer corresponded with the output of the generator - so if the timestamps were wrong, a build would result in changes to the files in the source directory. (They also didn't correspond because of changes in make 3.81 to how make handles whitespace at the start of a line in a sequence of backslash-newline continuation lines within a recipe.) This patch fixes the generation and output files to match. The issue with make and whitespace at start of continuation lines is fixed by putting those newlines outside of arguments to echo, so the number of spaces in the argument matches the number in the existing generated files. Then divrem.m4 is changed to avoid generating whitespace-only lines (my fix to the outputs from 2013; this fix to the generator also changes the indentation of a label in the output files) and to generate an alias in udiv.S (Adhemerval's fix from March). build-many-glibcs.py doesn't have a non-v9 SPARC configuration, because non-v9 32-bit SPARC didn't build when I set up build-many-glibcs.py but sparcv9 did build. Whether or not non-v9 32-bit SPARC now builds (or indeed whether or not support for it is obsolete), I tested by removing the sparcv8 and sparcv9 versions of the four files in question, so forcing the generated files to be built and used, and the compilation parts of the glibc testsuite passed. * sysdeps/sparc/sparc32/Makefile ($(divrem:%=$(sysdep_dir)/sparc/sparc32/%.S)): Do not include start-of-line whitespace in argument of echo. * sysdeps/sparc/sparc32/divrem.m4: Avoid generating lines starting with whitespace. Generate __wrap_.udiv alias. * sysdeps/sparc/sparc32/rem.S: Regenerated. * sysdeps/sparc/sparc32/sdiv.S: Likewise. * sysdeps/sparc/sparc32/udiv.S: Likewise. * sysdeps/sparc/sparc32/urem.S: Likewise.
* powerpc: st{r,p}cpy optimization for aligned stringsRajalakshmi Srinivasaraghavan2017-12-151-3/+146
| | | | | | | This patch makes use of vectors for aligned inputs. Improvements upto 30% seen for larger aligned inputs. Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>
* x86-64: Remove sysdeps/x86_64/fpu/s_cosf.SH.J. Lu2017-12-141-533/+0
| | | | | | | | | | | On Ivy Bridge, bench-cosf reports performance improvement: s_cosf.S s_cosf.c Improvement max 114.136 82.401 39% min 13.119 11.301 16% mean 22.1882 21.8938 1% * sysdeps/x86_64/fpu/s_cosf.S: Removed.
* sparc: M7 optimized memset/bzeroPatrick McGehearty2017-12-146-2/+345
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support added to identify Sparc M7/T7/S7/M8/T8 processor capability. Performance tests run on Sparc S7 using new code and old niagara4 code. Optimizations for memset also apply to bzero as they share code. For memset/bzero, performance comparison with niagara4 code: For memset nonzero data, 256-1023 bytes - 60-90% gain (in cache); 5% gain (out of cache) 1K+ bytes - 80-260% gain (in cache); 40-80% gain (out of cache) For memset zero data (and bzero), 256-1023 bytes - 80-120% gain (in cache), 0% gain (out of cache) 1024+ bytes - 2-4x gain (in cache), 10-35% gain (out of cache) Tested in sparcv9-*-* and sparc64-*-* targets in both multi and non-multi arch configurations. Patrick McGehearty <patrick.mcgehearty@oracle.com> Adhemerval Zanella <adhemerval.zanella@linaro.org> * sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile (sysdeps_routines): Add memset-niagara7. * sysdeps/sparc/sparc64/multiarch/Makefile (sysdes_rotuines): Likewise. * sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara7.S: New file. * sysdeps/sparc/sparc64/multiarch/memset-niagara7.S: Likewise. * sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c (__libc_ifunc_impl_list): Add __bzero_niagara7 and __memset_niagara7. * sysdeps/sparc/sparc64/multiarch/ifunc-memset.h (IFUNC_SELECTOR): Add niagara7 option. * NEWS: Mention sparc m7 optimized memcpy, mempcpy, memmove, and memset.
* sparc: M7 optimized memcpy/mempcpy/memmovePatrick McGehearty2017-12-1412-2/+1072
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support added to identify Sparc M7/T7/S7/M8/T8 processor capability. Performance tests run on Sparc S7 using new code and old niagara4 code. Optimizations for memcpy also apply to mempcpy and memmove where they share code. Optimizations for memset also apply to bzero as they share code. For memcpy/mempcpy/memmove, performance comparison with niagara4 code: Long word aligned data 0-127 bytes - minimal changes 128-1023 bytes - 7-30% gain 1024+ bytes - 1-7% gain (in cache); 30-100% gain (out of cache) Word aligned data 0-127 bytes - 50%+ gain 128-1023 bytes - 10-200% gain 1024+ bytes - 0-15% gain (in cache); 5-50% gain (out of cache) Unaligned data 0-127 bytes - 0-70%+ gain 128-447 bytes - 40-80%+ gain 448-511 bytes - 1-3% loss 512-4096 bytes - 2-3% gain (in cache); 0-20% gain (out of cache) 4096+ bytes - ± 3% (in cache); 20-50% gain (out of cache) Tested in sparcv9-*-* and sparc64-*-* targets in both multi and non-multi arch configurations. Patrick McGehearty <patrick.mcgehearty@oracle.com> Adhemerval Zanella <adhemerval.zanella@linaro.org> * sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile (sysdeps_routines): Add memcpy-memmove-niagara7 and memmove-ultra1. * sysdeps/sparc/sparc64/multiarch/Makefile (sysdeps_routines): Likewise. * sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-memmove-niagara7.S: New file. * sysdeps/sparc/sparc32/sparcv9/multiarch/memmove-ultra1.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memmove.c: Likewise. * sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c (__libc_ifunc_impl_list): Add __memcpy_niagara7, __mempcpy_niagara7, and __memmove_niagara7. * sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h (IFUNC_SELECTOR): Add niagara7 option. * sysdeps/sparc/sparc64/multiarch/memmove.c: New file. * sysdeps/sparc/sparc64/multiarch/ifunc-memmove.h: Likewise. * sysdeps/sparc/sparc64/multiarch/memcpy-memmove-niagara7.S: Likewise. * sysdeps/sparc/sparc64/multiarch/memmove-ultra1.S: Likewise. * sysdeps/sparc/sparc64/multiarch/rtld-memmove.c: Likewise.
* sparc: assembly version of memmove for ultra1+Jose E. Marchesi2017-12-144-0/+191
| | | | | | | | | | | | Tested in sparcv9-*-* and sparc64-*-* targets in both non-multi-arch and multi-arch configurations. * sysdeps/sparc/sparc32/sparcv9/memmove.S: New file. * sysdeps/sparc/sparc32/sparcv9/rtld-memmove.c: Likewise. * sysdeps/sparc/sparc64/memmove.S: Likewise. * sysdeps/sparc/sparc64/rtld-memmove.c: Likewise. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sparc: support the ADP hw capabilityJose E. Marchesi2017-12-143-3/+4
| | | | | | | | | | | | | | | This patch adds support for the ADP (also known as adi) hardware capability, as reported by the kernel sparc port when running on M7 machines. Tested in both sparcv9-*-* and sparc64-*-* targets. * sysdeps/sparc/bits/hwcap.h (HWCAP_SPARC_ADP): Defined. * sysdeps/sparc/dl-procinfo.c: Added "adp" to the _dl_sparc_cap_flags array. * sysdeps/sparc/dl-procinfo.h (_DL_HWCAP_COUNT): Increment. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* aarch64: Improve strcmp unaligned performanceSiddhesh Poyarekar2017-12-131-2/+29
| | | | | | | | | | | | | | Replace the simple byte-wise compare in the misaligned case with a dword compare with page boundary checks in place. For simplicity I've chosen a 4K page boundary so that we don't have to query the actual page size on the system. This results in up to 3x improvement in performance in the unaligned case on falkor and about 2.5x improvement on mustang as measured using bench-strcmp. * sysdeps/aarch64/strcmp.S (misaligned8): Compare dword at a time whenever possible.
* Add sysdeps/ieee754/soft-fp.Joseph Myers2017-12-1232-39/+219
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The default sysdeps/ieee754 fma implementations rely on exceptions and rounding modes to achieve correct results through internal use of round-to-odd. Thus, glibc configurations without support for exceptions and rounding modes instead need to use implementations of fma based on soft-fp. At present, this is achieved via having implementation files in soft-fp/ that are #included by sysdeps files for each glibc configuration that needs them. In general this means such a configuration has its own s_fma.c and s_fmaf.c. TS 18661-1 adds functions that do an operation (+ - * / sqrt fma) on arguments wider than the return type, with a single rounding of the infinite-precision result to that return type. These are also naturally implemented using round-to-odd on platforms with hardware support for rounding modes and exceptions but lacking hardware support for these narrowing operations themselves. (Platforms that have direct hardware support for such narrowing operations include at least ia64, and Power ISA 2.07 or later, which I think means POWER8 or later.) So adding the remaining TS 18661-1 functions would mean at least six narrowing function implementations (fadd fsub fmul fdiv ffma fsqrt), with aliases for other types and further implementations in some configurations, that need to be overridden for configurations lacking hardware exceptions and rounding modes. Requiring all such configurations (currently seven of them) to have their own source files for all those functions seems undesirable. Thus, this patch adds a directory sysdeps/ieee754/soft-fp to contain libm function implementations based on soft-fp. This directory is then used via Implies from all the configurations that need it, so no more files need adding to every such configuration when adding more functions with soft-fp implementations. A configuration can still selectively #include a particular file from this directory if desired; thus, the MIPS #include of the fmal implementation is retained, since that's appropriate even for hard float (because long double is always implementated in software for MIPS64, so the soft-fp implementation of fmal is better than the ldbl-128 one). This also provides additional motivation for my recent patch removing --with-fp / --without-fp: previously there was no need for correct use of --without-fp for no-FPU ARM or SH3, and now we have autodetection nofpu/ sysdeps directories can be used by this patch for those configurations without imposing any new requirements on how glibc is configured. (The mips64/*/fpu/s_fma.c files added by this patch are needed to keep the dbl-64 version of fma for double, rather than the ldbl-128 one, used in that case.) Tested with build-many-glibcs.py that installed stripped shared libraries are unchanged by this patch. * soft-fp/fmadf4.c: Move to .... * sysdeps/ieee754/soft-fp/s_fma.c: ... here. * soft-fp/fmasf4.c: Move to .... * sysdeps/ieee754/soft-fp/s_fmaf.c: ... here. * soft-fp/fmatf4.c: Move to .... * sysdeps/ieee754/soft-fp/s_fmal.c: ... here. * sysdeps/ieee754/soft-fp/Makefile: New file. * sysdeps/arm/preconfigure.ac: Define with_fp_cond. * sysdeps/arm/preconfigure: Regenerated. * sysdeps/arm/nofpu/Implies: New file. * sysdeps/arm/s_fma.c: Remove file. * sysdeps/arm/s_fmaf.c: Likewise. * sysdeps/m68k/coldfire/nofpu/Implies: New file. * sysdeps/m68k/coldfire/nofpu/s_fma.c: Remove file. * sysdeps/m68k/coldfire/nofpu/s_fmaf.c: Likewise. * sysdeps/microblaze/Implies: Add ieee754/soft-fp. * sysdeps/microblaze/s_fma.c: Remove file. * sysdeps/microblaze/s_fmaf.c: Likewise. * sysdeps/mips/mips32/nofpu/Implies: New file. * sysdeps/mips/mips64/n32/fpu/s_fma.c: Likewise. * sysdeps/mips/mips64/n32/nofpu/Implies: Likewise. * sysdeps/mips/mips64/n64/fpu/s_fma.c: Likewise. * sysdeps/mips/mips64/n64/nofpu/Implies: Likewise. * sysdeps/mips/ieee754/s_fma.c: Remove file. * sysdeps/mips/ieee754/s_fmaf.c: Likewise. * sysdeps/mips/ieee754/s_fmal.c: Update include for move of fmal implementation. * sysdeps/nios2/Implies: Add ieee754/soft-fp. * sysdeps/nios2/s_fma.c: Remove file. * sysdeps/nios2/s_fmaf.c: Likewise. * sysdeps/sh/nofpu/Implies: New file. * sysdeps/sh/s_fma.c: Remove file. * sysdeps/sh/s_fmaf.c: Likewise. * sysdeps/tile/Implies: Add ieee754/soft-fp. * sysdeps/tile/s_fma.c: Remove file. * sysdeps/tile/s_fmaf.c: Likewise.
* x86-64: Add cosf with FMAH.J. Lu2017-12-124-2/+35
| | | | | | | | | | | | | | | | | | On Skylake, bench-cosf reports performance improvement: Before After Improvement max 135.362 94.552 43% min 8.532 7.688 11% mean 17.1446 11.8128 45% * sysdeps/x86_64/fpu/multiarch/Makefile (libm-sysdep_routines): Add s_cosf-sse2 and s_cosf-fma. (CFLAGS-s_cosf-fma.c): New. * sysdeps/x86_64/fpu/multiarch/s_cosf-fma.c: New file. * sysdeps/x86_64/fpu/multiarch/s_cosf-sse2.c: Likewise. * sysdeps/x86_64/fpu/multiarch/s_cosf.c: Likewise. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* Update IA64 libm-test-ulpsAdhemerval Zanella2017-12-121-26/+1914
| | | | | | | | Ran on Itanium Processor 9020, GCC 7.2.1. * sysdeps/ia64/fpu/libm-test-ulps: Update. Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* ia64: Add ipc_priv.h header to set __IPC_64 to zeroJames Clarke2017-12-121-0/+21
| | | | | | | | | | | | When running strace, IPC_64 was set in the command, but ia64 is an architecture where CONFIG_ARCH_WANT_IPC_PARSE_VERSION *isn't* set in the kernel, so ipc_parse_version just returns IPC_64 without clearing the IPC_64 bit in the command. * sysdeps/unix/sysv/linux/ia64/ipc_priv.h: New file defining __IPC_64 to 0 to avoid IPC_64 being set. Signed-off-by: James Clarke <jrtc27@jrtc27.com>
* Remove --with-fp / --without-fp.Joseph Myers2017-12-124-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a configure option --without-fp that specifies that nofpu sysdeps directories should be used instead of fpu directories. For most glibc configurations, this option is of no use: either there is no valid nofpu variant of that configuration, or there are no fpu or nofpu sysdeps directories for that processor and so the option does nothing. For a few configurations, if you are using a soft-float compiler this option is required, and failing to use it generally results in compilation errors from inline asm using unavailable floating-point instructions. We're moving away from --with-cpu to configuring glibc based on how the compiler generates code, and it is natural to do so for --without-fp as well; in most cases the soft-float and hard-float ABIs are incompatible so you have no hope of building a working glibc with an inappropriately configured compiler or libgcc. This patch eliminates --without-fp, replacing it entirely by automatic configuration based on the compiler. Configurations for which this is relevant (coldfire / mips / powerpc32 / sh) define a variable with_fp_cond in their preconfigure fragments (under the same conditions under which those fragments do anything); this is a preprocessor conditional which the toplevel configure script then uses in a test to determine which sysdeps directories to use. The config.make with-fp variable remains. It's used only by powerpc (sysdeps/powerpc/powerpc32/Makefile) to add -mhard-float to various flags variables. For powerpc, -mcpu= options can imply use of soft-float. That could be an issue if you want to build for e.g. 476fp, but are using --with-cpu=476 because there isn't a 476fp sysdeps directory. If in future we eliminate --with-cpu and replace it entirely by testing the compiler, it would be natural at that point to eliminate that code as well (as the user should then just use a compiler defaulting to 476fp and the 476 sysdeps directory would be used automatically). Tested for x86_64, and tested with build-many-glibcs.py that installed shared libraries are unchanged by this patch. * configure.ac (--with-fp): Remove configure option. (with_fp_cond): New variable. (libc_cv_with_fp): New configure test. Use this variable instead of with_fp. * configure: Regenerated. * config.make.in (with-fp): Use @libc_cv_with_fp@. * manual/install.texi (Configuring and compiling): Remove --without-fp. * INSTALL: Regenerated. * sysdeps/m68k/preconfigure (with_fp_cond): Define for ColdFire. * sysdeps/mips/preconfigure (with_fp_cond): Define. * sysdeps/powerpc/preconfigure (with_fp_cond): Define for 32-bit. * sysdeps/sh/preconfigure (with_fp_cond): Define. * scripts/build-many-glibcs.py (Context.add_all_configs): Do not use --without-fp to configure glibc.
* New generic cosfPaul Clarke2017-12-111-40/+214
| | | | | | | | The same logic used in s_cosf.S version for x86 and powerpc is used to create a generic s_cosf.c, so there is no performance improvement in x86_64 and powerpc64. * sysdeps/ieee754/flt-32/s_cosf.c: New implementation.
* powerpc: POWER8 memcpy optimization for cached memoryAdhemerval Zanella2017-12-1111-13/+310
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On POWER8, unaligned memory accesses to cached memory has little impact on performance as opposed to its ancestors. It is disabled by default and will only be available when the tunable glibc.tune.cached_memopt is set to 1. __memcpy_power8_cached __memcpy_power7 ============================================================ max-size=4096: 33325.70 ( 12.65%) 38153.00 max-size=8192: 32878.20 ( 11.17%) 37012.30 max-size=16384: 33782.20 ( 11.61%) 38219.20 max-size=32768: 33296.20 ( 11.30%) 37538.30 max-size=65536: 33765.60 ( 10.53%) 37738.40 * manual/tunables.texi (Hardware Capability Tunables): Document glibc.tune.cached_memopt. * sysdeps/powerpc/cpu-features.c: New file. * sysdeps/powerpc/cpu-features.h: New file. * sysdeps/powerpc/dl-procinfo.c [!IS_IN(ldconfig)]: Add _dl_powerpc_cpu_features. * sysdeps/powerpc/dl-tunables.list: New file. * sysdeps/powerpc/ldsodefs.h: Include cpu-features.h. * sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h (INIT_ARCH): Initialize use_aligned_memopt. * sysdeps/powerpc/powerpc64/dl-machine.h [defined(SHARED && IS_IN(rtld))]: Restrict dl_platform_init availability and initialize CPU features used by tunables. * sysdeps/powerpc/powerpc64/multiarch/Makefile (sysdep_routines): Add memcpy-power8-cached. * sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c: Add __memcpy_power8_cached. * sysdeps/powerpc/powerpc64/multiarch/memcpy.c: Likewise. * sysdeps/powerpc/powerpc64/multiarch/memcpy-power8-cached.S: New file. Reviewed-by: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
* S390: Add CFI rule in _dl_runtime_resolve[_vx] for unwinding.Stefan Liebler2017-12-112-25/+23
| | | | | | | | | | | | | | | | | | | In _dl_runtime_resolve[_vx], unwinding fails after the new stack frame is created as there is no CFI rule for r15. This is also observeable in GDB: Backtrace stopped: previous frame inner to this frame (corrupt stack?) Therefore this patch is now storing r15 on stack and is using cfi_offset rule. The stmg/lmg instruction is used to store/load r14 and r15 with one instruction. On 64bit, the offsets of the fprs have moved to store r15 directly after r14. On 31bit, the r14/r15 is now stored between the other gprs and fprs as the space wasn't used. ChangeLog: * sysdeps/s390/s390-64/dl-trampoline.h (_dl_runtime_resolve): Store r15 on stack and add cfi rule. * sysdeps/s390/s390-32/dl-trampoline.h (_dl_runtime_resolve): Likewise.
* x86-64: Add sinf with FMAH.J. Lu2017-12-074-1/+36
| | | | | | | | | | | | | | | | On Skylake, bench-sinf reports performance improvement: Before After Improvement max 153.996 100.094 54% min 8.546 6.852 25% mean 18.1223 11.802 54% * sysdeps/x86_64/fpu/multiarch/Makefile (libm-sysdep_routines): Add s_sinf-sse2 and s_sinf-fma. (CFLAGS-s_sinf-fma.c): New. * sysdeps/x86_64/fpu/multiarch/s_sinf-fma.c: New file. * sysdeps/x86_64/fpu/multiarch/s_sinf-sse2.c: Likewise. * sysdeps/x86_64/fpu/multiarch/s_sinf.c: Likewise.
* x86-64: Remove sysdeps/x86_64/fpu/s_sinf.SH.J. Lu2017-12-071-559/+0
| | | | | | | | | | | On Ivy Bridge, bench-sinf reports performance improvement: s_sinf.S s_sinf.c Improvement max 91.521 86.148 6% min 14.061 11.265 25% mean 23.3758 23.3344 0.2% * sysdeps/x86_64/fpu/s_sinf.S: Removed.
* Add _Float32 function aliases.Joseph Myers2017-12-0756-4/+2854
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch concludes filling out TS 18661-3 support for different types by adding *f32 function aliases of float functions to support _Float32. As with _Float64 and _Float32x, this is supported for all glibc configurations. As with the previous such patches there are some x86 ulps updates because of inline functions present for float but not for _Float32. The patch also has the usual bits/floatn-common.h update, symbol versions, ABI baselines updates, test enablement and documentation. Tested for x86_64 and x86, and with build-many-glibcs.py, with both GCC 6 and GCC 7. * bits/floatn-common.h (__HAVE_FLOAT32): Define to 1. * manual/math.texi (Mathematics): Document support for _Float32. * math/Makefile (test-types): Add float32. * math/Versions (GLIBC_2.27): Add _Float32 functions. * stdlib/Versions (GLIBC_2.27): Likewise. * wcsmbs/Versions (GLIBC_2.27): Likewise. * sysdeps/unix/sysv/linux/aarch64/libc.abilist: Update. * sysdeps/unix/sysv/linux/aarch64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/alpha/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/alpha/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/arm/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/arm/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/hppa/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/hppa/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/i386/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/i386/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/ia64/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/ia64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/m68k/coldfire/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/m68k/coldfire/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/m68k/m680x0/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/m68k/m680x0/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/microblaze/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/microblaze/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/mips/mips32/fpu/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/mips/mips32/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/mips/mips32/nofpu/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/mips/mips64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/mips/mips64/n32/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/mips/mips64/n64/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/nios2/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/nios2/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc32/fpu/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc32/nofpu/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc32/nofpu/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc64/libc-le.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc64/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc64/libm-le.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/s390/s390-32/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/s390/s390-32/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/s390/s390-64/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/s390/s390-64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/sh/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/sh/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/sparc/sparc32/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/sparc/sparc32/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/sparc/sparc64/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/sparc/sparc64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilegx/tilegx32/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilegx/tilegx32/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilegx/tilegx64/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilegx/tilegx64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/tile/tilepro/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/x86_64/64/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/x86_64/64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/x86_64/x32/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/x86_64/x32/libm.abilist: Likewise. * sysdeps/i386/fpu/libm-test-ulps: Likewise. * sysdeps/i386/i686/fpu/multiarch/libm-test-ulps: Likewise.
* Support _Float32 in libm_alias_float.Joseph Myers2017-12-061-2/+9
| | | | | | | | | | | | | | This patch makes the libm_alias_float macro support creating _Float32 aliases, in preparation for enabling glibc support for that type. Tested for x86_64; also tested with build-many-glibcs.py in conjunction with other _Float32 changes. * sysdeps/generic/libm-alias-float.h: Include <bits/floatn.h>. [__HAVE_FLOAT32 && !__HAVE_DISTINCT_FLOAT32] (libm_alias_float_other_r): Create f32 alias. (libm_alias_float_r): Use semicolon before call to libm_alias_float_other_r.
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