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* linux: Simplify clock_nanosleepAdhemerval Zanella2020-08-241-22/+11
| | | | | | | | | | | With arch-syscall.h it can now assumes the existance of either __NR_clock_nanosleep or __NR_clock_nanosleep_time64. The 32-bit time_t support is now only build for !__ASSUME_TIME64_SYSCALLS. Checked on x86_64-linux-gnu and i686-linux-gnu (on 5.4 and on 4.15 kernel). Reviewed-by: Lukasz Majewski <lukma@denx.de>
* linux: Simplify clock_gettimeAdhemerval Zanella2020-08-241-25/+17
| | | | | | | | | | | With arch-syscall.h it can now assumes the existance of either __NR_clock_gettime or __NR_clock_gettime_time64. The 32-bit time_t support is now only build for !__ASSUME_TIME64_SYSCALLS. It also uses the time64-support functions to simplify it further. Checked on x86_64-linux-gnu and i686-linux-gnu (on 5.4 and on 4.15 kernel).
* linux: Simplify clock_adjtimeAdhemerval Zanella2020-08-241-13/+10
| | | | | | | | | | | | With arch-syscall.h it can now assumes the existance of either __NR_clock_adjtime or __NR_clock_adjtime_time64. The 32-bit time_t support is now only build for !__ASSUME_TIME64_SYSCALLS. Checked on x86_64-linux-gnu and i686-linux-gnu (on 5.4 and on 4.15 kernel). Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
* linux: Add helper function to optimize 64-bit time_t fallback supportAdhemerval Zanella2020-08-243-1/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These helper functions are used to optimize the 64-bit time_t support on configurations that requires support for 32-bit time_t fallback (!__ASSUME_TIME64_SYSCALLS). The idea is once the kernel advertises that it does not have 64-bit time_t support, glibc will stop to try issue the 64-bit time_t syscall altogether. For instance: #ifndef __NR_symbol_time64 # define __NR_symbol_time64 __NR_symbol #endif int r; if (supports_time64 ()) { r = INLINE_SYSCALL_CALL (symbol, ...); if (r == 0 || errno != ENOSYS) return r; mark_time64_unsupported (); } #ifndef __ASSUME_TIME64_SYSCALLS <32-bit fallback syscall> #endif return r; On configuration with default 64-bit time_t this optimization should be optimized away by the compiler resulting in no overhead.
* S390: Sync HWCAP names with kernel by adding aliases [BZ #25971]Stefan Liebler2020-08-212-0/+6
| | | | | | | Unfortunately some HWCAP names like HWCAP_S390_VX differs between kernel (see <kernel>/arch/s390/include/asm/elf.h) and glibc. Therefore, those HWCAP names from kernel are now introduced as alias
* Update kernel version to 5.8 in tst-mman-consts.py.Joseph Myers2020-08-131-1/+1
| | | | | | | | This patch updates the kernel version in the test tst-mman-consts.py to 5.8. (There are no new MAP_* constants covered by this test in 5.8 that need any other header changes.) Tested with build-many-glibcs.py.
* y2038: nptl: Convert pthread_{clock|timed}join_np to support 64 bit timeLukasz Majewski2020-08-131-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pthread_clockjoin_np and pthread_timedjoin_np have been converted to support 64 bit time. This change introduces new futex_timed_wait_cancel64 function in ./sysdeps/nptl/futex-internal.h, which uses futex_time64 where possible and tries to replace low-level preprocessor macros from lowlevellock-futex.h The pthread_{timed|clock}join_np only accept absolute time. Moreover, there is no need to check for NULL passed as *abstime pointer as clockwait_tid() always passes struct __timespec64. For systems with __TIMESIZE != 64 && __WORDSIZE == 32: - Conversions between 64 bit time to 32 bit are necessary - Redirection to __pthread_{clock|timed}join_np64 will provide support for 64 bit time Build tests: ./src/scripts/build-many-glibcs.py glibcs Run-time tests: - Run specific tests on ARM/x86 32bit systems (qemu): https://github.com/lmajewski/meta-y2038 and run tests: https://github.com/lmajewski/y2038-tests/commits/master Above tests were performed with Y2038 redirection applied as well as without to test the proper usage of both __pthread_{timed|clock}join_np64 and __pthread_{timed|clock}join_np. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
* aarch64: update ulps.Szabolcs Nagy2020-08-131-1/+1
| | | | For new j0 test.
* S390: Regenerate ULPs.Stefan Liebler2020-08-121-1/+1
| | | | | | Updates needed after new j0 test: commit 9bfc225078219521439ec8b0f665915e769d40c2 math: Regenerate auto-libm-test-out-j0
* math: Update x86_64 ulpsAdhemerval Zanella2020-08-082-6/+6
| | | | From new j0 test.
* Linux: Use faccessat2 to implement faccessat (bug 18683)Florian Weimer2020-08-072-3/+19
| | | | | | | This provides correct AT_EACCESS handling and also takes Linux security modules into account. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* math: Fix inaccuracy of j0f for x >= 2^127 when sin(x)+cos(x) is tinyPaul Zimmermann2020-08-071-1/+16
| | | | Checked on x86_64-linux-gnu and i686-linux-gnu.
* Update syscall lists for Linux 5.8.Joseph Myers2020-08-0725-2/+27
| | | | | | | | Linux 5.8 has one new syscall, faccessat2. Update syscall-names.list and regenerate the arch-syscall.h headers with build-many-glibcs.py update-syscalls. Tested with build-many-glibcs.py.
* htl: Enable tst-cancelx?[45]Samuel Thibault2020-08-067-1/+1991
| | | | | | | * nptl/{tst-cancel4-common.c, tst-cancel4-common.h, tst-cancel4.c, tst-cancel5.c, tst-cancelx4.c, tst-cancelx5.c}: Move to sysdeps/pthread/ * nptl/Makefile: Move corresponding rules to... * sysdeps/pthread/Makefile: ... here.
* hurd: Add missing hidden defSamuel Thibault2020-08-061-0/+1
| | | | * sysdeps/mach/hurd/sched_gets.c (__sched_getscheduler): Add hidden def.
* hurd: Rework sbrkSamuel Thibault2020-08-053-9/+32
| | | | | | | | | | | | | | | | | | | | | | | | | Making the brk start exactly at the end of the main application binary was requiring to get it through the _end symbol, which does not work any more with recent toolchains, and actually produces in libc.so a confusing external _end symbol that produces odd results, see https://sourceware.org/bugzilla/show_bug.cgi?id=23499 Trying to do so is quite outdated anyway with the tendency for address randomization. Using _end was also allowing to include the main binary data within the RLIMIT_DATA, but this also seems outdated with dynamic library loading, and nowadays' memory consumption via malloc and mmap rather than statically-allocated data. This adds a BRK_START macro in <vm_param.h> that just tells where we want to start the brk, and thus removes the _end symbol. * sysdeps/mach/hurd/i386/vm_param.h: New file. * sysdeps/mach/hurd/brk.c: Use BRK_START as brk start instead of _end. Also ignore __data_start. * hurd/Versions: Remove _end symbol. * sysdeps/mach/hurd/i386/libc.abilist: Remove _end symbol.
* hurd: Implement basic sched_get/setschedulerSamuel Thibault2020-08-052-0/+75
| | | | | * sysdeps/mach/hurd/sched_gets.c: New file. * sysdeps/mach/hurd/sched_sets.c: New file.
* x86: Rename Intel CPU feature namesH.J. Lu2020-08-052-15/+15
| | | | | | | | | | | | | | | Intel64 and IA-32 Architectures Software Developer’s Manual has changed the following CPU feature names: 1. The CPU feature of Enhanced Intel SpeedStep Technology is renamed from EST to EIST. 2. The CPU feature which supports Platform Quality of Service Monitoring (PQM) capability is changed to Intel Resource Director Technology (Intel RDT) Monitoring capability, i.e. PQM is renamed to RDT_M. 3. The CPU feature which supports Platform Quality of Service Enforcement (PQE) capability is changed to Intel Resource Director Technology (Intel RDT) Allocation capability, i.e. PQE is renamed to RDT_A.
* Regenerate configure scripts.Carlos O'Donell2020-08-042-1/+2
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* RISC-V: Update lp64d libm-test-ulps according to HiFive UnleashedMaciej W. Rozycki2020-08-041-15/+18
| | | | | | | Produced with HiFive Unleashed hardware using Linux 5.8-rc5 exactly and GCC 10.0.1 20200426. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* powerpc: Fix incorrect cache line size load in memset (bug 26332)Florian Weimer2020-08-031-2/+2
| | | | | | | | | | | | | | | | __GLRO loaded the word after the requested variable on big-endian PowerPC, where LOWORD is 4. This can cause the memset implement go wrong because the masking with the cache line size produces wrong results, particularly if the loaded value happens to be 1. The __GLRO macro is not used in any place where loading the lower 32-bit word of a 64-bit value is desired, so the +4 offset is always wrong. Fixes commit 18363b4f010da9ba459b13310b113ac0647c2fcc ("powerpc: Move cache line size to rtld_global_ro") and bug 26332. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* Update Nios II libm-test-ulps file.Chung-Lin Tang2020-08-031-11/+11
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* aarch64: Use future HWCAP2_MTE in ifunc resolverSzabolcs Nagy2020-07-271-2/+8
| | | | | | | | | | | Make glibc MTE-safe on systems where MTE is available. This allows using heap tagging with an LD_PRELOADed malloc implementation that enables MTE. We don't document this as guaranteed contract yet, so glibc may not be MTE safe when HWCAP2_MTE is set (older glibcs certainly aren't). This is mainly for testing and debugging. The HWCAP flag is not exposed in public headers until Linux adds it to its uapi. The HWCAP value reservation will be in Linux 5.9.
* Update x86-64 libm-test-ulpsAndreas K. Hüttel2020-07-251-2/+2
| | | | | | x86_64 Intel(R) Core(TM) i5-8265U gcc (Gentoo 10.1.0-r2 p3) 10.1.0 Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* aarch64: Respect p_flags when protecting code with PROT_BTISzabolcs Nagy2020-07-241-1/+8
| | | | | | | | | | | | Use PROT_READ and PROT_WRITE according to the load segment p_flags when adding PROT_BTI. This is before processing relocations which may drop PROT_BTI in case of textrels. Executable stacks are not protected via PROT_BTI either. PROT_BTI is hardening in case memory corruption happened, it's value is reduced if there is writable and executable memory available so missing it on such memory is fine, but we should respect the p_flags and should not drop PROT_WRITE.
* powerpc: Fix POWER10 selectionTulio Magno Quites Machado Filho2020-07-211-0/+1
| | | | | | | | | | Add a line that was missing from a previous commit. Without increasing str, the null-byte is not validated, and _dl_string_platform returns -1. Fixes: d2ba3677da7a ("powerpc: Add support for POWER10") Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* powerpc64le: guarantee a .gnu.attributes section [BZ #26220]Paul E. Murphy2020-07-211-0/+8
| | | | | | | | | | Upstream GCC 11 development is now building the ibm128 runtime support (in libgcc) without a .gnu.attributes section on ppc64le. Ensure we have one to replace by building one ibm128 file in libc and libm with attributes. Reviewed-by: Carlos O'Donell <carlos@redhat.com> Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
* Update powerpc-nofpu libm-test-ulps.Joseph Myers2020-07-201-30/+30
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* hurd: Fix longjmp check for sigstateSamuel Thibault2020-07-182-2/+2
| | | | | * sysdeps/mach/hurd/i386/____longjmp_chk.S,__longjmp.S: Properly check for sigstate being NULL.
* hurd: Fix longjmp early in initializationSamuel Thibault2020-07-182-2/+16
| | | | | | | | | When e.g. an LD_PRELOAD fails, _dl_signal_exception/error longjmps, but TLS is not initialized yet, let along signal state. We thus mustn't look at them within __longjmp. * sysdeps/mach/hurd/i386/____longjmp_chk.S,__longjmp.S: Check for initialized value of %gs, and that sigstate is non-NULL.
* AArch64: Improve strlen_asimd performance (bug 25824)Wilco Dijkstra2020-07-175-126/+161
| | | | | | | | | | | | | | | | | Optimize strlen using a mix of scalar and SIMD code. On modern micro architectures large strings are 2.6 times faster than existing strlen_asimd and 35% faster than the new MTE version of strlen. On a random strlen benchmark using small sizes the speedup is 7% vs strlen_asimd and 40% vs the MTE strlen. This fixes the main strlen regressions on Cortex-A53 and other cores with a simple Neon unit. Rename __strlen_generic to __strlen_mte, and select strlen_asimd when MTE is not enabled (this is waiting on support for a HWCAP_MTE bit). This fixes big-endian bug 25824. Passes GLIBC regression tests. Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* Linux: Remove rseq supportFlorian Weimer2020-07-1648-1092/+5
| | | | | | | | | | | | | | | | | | The kernel ABI is not finalized, and there are now various proposals to change the size of struct rseq, which would make the glibc ABI dependent on the version of the kernels used for building glibc. This is of course not acceptable. This reverts commit 48699da1c468543ade14777819bd1b4d652709de ("elf: Support at least 32-byte alignment in static dlopen"), commit 8f4632deb3545b2949cec5454afc3cb21a0024ea ("Linux: rseq registration tests"), commit 6e29cb3f61ff5432c78a1c84b0d9b123a350ab36 ("Linux: Use rseq in sched_getcpu if available"), and commit 0c76fc3c2b346dc5401dc055d97d4279632b0fb3 ("Linux: Perform rseq registration at C startup and thread creation"), resolving the conflicts introduced by the ARC port and the TLS static surplus changes. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* arm: remove string/tst-memmove-overflow XFAILAurelien Jarno2020-07-161-5/+0
| | | | | | | | | | | | | The arm string/tst-memmove-overflow XFAIL has been added in commit eca1b233322 ("arm: XFAIL string/tst-memmove-overflow due to bug 25620") as a way to reproduce the reported bug. Now that this bug has been fixed in commits 79a4fa341b8 ("arm: CVE-2020-6096: fix memcpy and memmove for negative length [BZ #25620]") and beea3610507 ("arm: CVE-2020-6096: Fix multiarch memcpy for negative length [BZ #25620]"), let's remove the XFAIL. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* AArch64: Rename IS_ARES to IS_NEOVERSE_N1Wilco Dijkstra2020-07-153-4/+8
| | | | | | Rename IS_ARES to IS_NEOVERSE_N1 since that is a bit clearer. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* AArch64: Add optimized Q-register memcpyWilco Dijkstra2020-07-155-4/+255
| | | | | | | | | | | | | | | | Add a new memcpy using 128-bit Q registers - this is faster on modern cores and reduces codesize. Similar to the generic memcpy, small cases include copies up to 32 bytes. 64-128 byte copies are split into two cases to improve performance of 64-96 byte copies. Large copies align the source rather than the destination. bench-memcpy-random is ~9% faster than memcpy_falkor on Neoverse N1, so make this memcpy the default on N1 (on Centriq it is 15% faster than memcpy_falkor). Passes GLIBC regression tests. Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* AArch64: Align ENTRY to a cachelineWilco Dijkstra2020-07-151-1/+1
| | | | | | | Given almost all uses of ENTRY are for string/memory functions, align ENTRY to a cacheline to simplify things. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* Remove --enable-obsolete-rpc configure flagPetr Vorel2020-07-131-162/+0
| | | | | | | | | | | | | | | | | | | | | | Sun RPC was removed from glibc. This includes rpcgen program, librpcsvc, and Sun RPC headers. Also test for bug #20790 was removed (test for rpcgen). Backward compatibility for old programs is kept only for architectures and ABIs that have been added in or before version 2.28. libtirpc is mature enough, librpcsvc and rpcgen are provided in rpcsvc-proto project. NOTE: libnsl code depends on Sun RPC (installed libnsl headers use installed Sun RPC headers), thus --enable-obsolete-rpc was a dependency for --enable-obsolete-nsl (removed in a previous commit). The arc ABI list file has to be updated because the port was added with the sunrpc symbols Tested-by: Carlos O'Donell <carlos@redhat.com> Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* hurd: Fix build-many-glibcs.pyAdhemerval Zanella2020-07-133-0/+3
| | | | | | | | It fixes the issue report by Joseph [1]. Checked with a build-many-glibcs.py build for i686-gnu. [1] https://sourceware.org/pipermail/libc-alpha/2020-July/116134.html
* x86: Support usable check for all CPU featuresH.J. Lu2020-07-1363-732/+854
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support usable check for all CPU features with the following changes: 1. Change struct cpu_features to struct cpuid_features { struct cpuid_registers cpuid; struct cpuid_registers usable; }; struct cpu_features { struct cpu_features_basic basic; struct cpuid_features features[COMMON_CPUID_INDEX_MAX]; unsigned int preferred[PREFERRED_FEATURE_INDEX_MAX]; ... }; so that there is a usable bit for each cpuid bit. 2. After the cpuid bits have been initialized, copy the known bits to the usable bits. EAX/EBX from INDEX_1 and EAX from INDEX_7 aren't used for CPU feature detection. 3. Clear the usable bits which require OS support. 4. If the feature is supported by OS, copy its cpuid bit to its usable bit. 5. Replace HAS_CPU_FEATURE and CPU_FEATURES_CPU_P with CPU_FEATURE_USABLE and CPU_FEATURE_USABLE_P to check if a feature is usable. 6. Add DEPR_FPU_CS_DS for INDEX_7_EBX_13. 7. Unset MPX feature since it has been deprecated. The results are 1. If the feature is known and doesn't requre OS support, its usable bit is copied from the cpuid bit. 2. Otherwise, its usable bit is copied from the cpuid bit only if the feature is known to supported by OS. 3. CPU_FEATURE_USABLE/CPU_FEATURE_USABLE_P are used to check if the feature can be used. 4. HAS_CPU_FEATURE/CPU_FEATURE_CPU_P are used to check if CPU supports the feature.
* x86: Remove __ASSEMBLER__ check in init-arch.hH.J. Lu2020-07-111-5/+1
| | | | | | | | | | | | | Since commit 430388d5dc0e1861b869096f4f5d946d7d74232a Author: H.J. Lu <hjl.tools@gmail.com> Date: Fri Aug 3 08:04:49 2018 -0700 x86: Don't include <init-arch.h> in assembly codes removed all usages of <init-arch.h> from assembly codes, we can remove __ASSEMBLER__ check in init-arch.h.
* x86: Remove the unused __x86_prefetchwH.J. Lu2020-07-115-24/+5
| | | | | | | | | | | | | Since commit c867597bff2562180a18da4b8dba89d24e8b65c4 Author: H.J. Lu <hjl.tools@gmail.com> Date: Wed Jun 8 13:57:50 2016 -0700 X86-64: Remove previous default/SSE2/AVX2 memcpy/memmove removed the only usage of __x86_prefetchw, we can remove the unused __x86_prefetchw.
* ARC: Build InfrastructureVineet Gupta2020-07-1014-0/+366
| | | | Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* ARC: ABI listsVineet Gupta2020-07-1018-0/+4671
| | | | Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* ARC: Linux Startup and Dynamic LoadingVineet Gupta2020-07-102-0/+116
| | | | | | | | A big shoutout to Cupertino Miranda <cmiranda@synopsys.com> for his valuable contribution in initial bringup and debugging on Linux and later in solving pesky unwinding/cancelation failures in testsuite. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* ARC: Linux ABIVineet Gupta2020-07-1013-0/+600
| | | | Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* ARC: Linux Syscall InterfaceVineet Gupta2020-07-1015-0/+941
| | | | Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* ARC: hardware floating point supportVineet Gupta2020-07-1020-0/+711
| | | | Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* ARC: math soft float supportVineet Gupta2020-07-105-0/+203
| | | | Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* ARC: Atomics and Locking primitivesVineet Gupta2020-07-101-0/+69
| | | | Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* ARC: Thread Local Storage supportVineet Gupta2020-07-105-0/+240
| | | | | | This includes all 4 TLS addressing models Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
generated by cgit-pink 1.4.1 (git 2.36.1) at 2024-11-08 07:18:27 +0000