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* powerpc: drop R_PPC_REL16 checkAdhemerval Zanella2015-02-102-44/+0
| | | | | Current minimum support binutils (2.22) supports R_PPC_REL16 as default, so no need to extra configure checks.
* powerpc: sysdeps/powerpc configure cleanupAdhemerval Zanella2015-02-102-54/+0
| | | | | | Current minimum binutils supported (2.22) has ".machine altivec" support as default, so there is no need to add a configure check for such functionality. This patches removes the configure checks for it.
* powerpc: wordcopy/memmove cleanup for ppc32Adhemerval Zanella2015-02-097-119/+32
| | | | | | | | This patch cleanup some multiarch code related to memmmove optimization. Initial IFUNC support added specialized wordcopy symbols which turned in local IFUNC calls used by memmove default implementation. The patch removes the internal IFUNC for wordcopy symbols and uses local branches in the memmmove optimization instead.
* powerpc: multiarch Makefile cleanup for powerpc32Adhemerval Zanella2015-02-091-4/+10
| | | | | This patch cleanups the multiarch Makefile by putting the wide chars implementation to correct wcsmbs rule.
* powerpc: wordcopy/memmove cleanup for ppc64Adhemerval Zanella2015-02-095-95/+23
| | | | | | | | | | This patch cleanup some multiarch code related to memmmove optimization. Initial IFUNC support added specialized wordcopy symbols which turned in local IFUNC calls used by memmove default implementation. This change by removing then and used the optimized memmove instead for supported chips.
* powerpc: Remove POWER7 wordcopy ifuncAdhemerval Zanella2015-02-093-45/+9
| | | | | | This patch remove the POWER7 ifunc wordcopy function (_wordcopy_*_power7), since now GLIBC provides a optimized memmove/bcopy for POWER7.
* powerpc: Simplify bcopy default implementationAdhemerval Zanella2015-02-091-4/+6
| | | | | | This patch simplify the default bcopy symbol for powerpc64 by just using memmove instead of implementing using the default bcopy. Since the symbol is deprecated, it trades speed by code size.
* powerpc: multiarch Makefile cleanup for powerpc64Adhemerval Zanella2015-02-091-5/+10
| | | | | This patch cleanups the multiarch Makefile by putting the wide chars implementation to correct wcsmbs rule.
* Fix value of O_TMPFILE for architectures with non-default O_DIRECTORY (bug ↵Andreas Schwab2015-02-091-1/+1
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* hurd: fix unwind-resume.c buildSamuel Thibault2015-02-081-0/+4
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* hurd: fix unwind-resume.c buildSamuel Thibault2015-02-081-0/+4
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* hurd: fix tls.h buildSamuel Thibault2015-02-081-0/+2
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* hurd: Ignore bytes beyond sockaddr length for AF_UNIXSamuel Thibault2015-02-084-8/+12
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* hurd: add basic types for ioctlsSamuel Thibault2015-02-071-1/+22
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* hurd: support mmap with PROT_NONESamuel Thibault2015-02-071-2/+9
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* hurd: fix f?chflags prototypes, declare them and their flagsSamuel Thibault2015-02-073-3/+31
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* hurd: fix build with pthread aioSamuel Thibault2015-02-071-1/+4
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* ARM: Add missing sfi_breg in LDR_GLOBAL macro.Roland McGrath2015-02-061-2/+2
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* NPTL: Build tests using clone directly only for Linux.Roland McGrath2015-02-064-1/+225
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* x86: Clean up __vdso_clock_gettime variable.Roland McGrath2015-02-066-232/+6
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* Clean up sysdep-dl-routines variable.Roland McGrath2015-02-0612-24/+4
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* hppa: Sync with pthread.h.Carlos O'Donell2015-02-061-1/+1146
| | | | | | | | This reverts part of the previous commit to refactor pthread.h. The refactoring must be done by having pthread.h include arch bits headers, not the other way around. Then hppa provides the arch bits header. For now we synchronzie again with pthread.h and include the entire contents in the hppa copy.
* glibc 2.21 pre-release update.Carlos O'Donell2015-02-052-3/+3
| | | | | | | | | | | | Update all translations. Update contributions in the manual. Update installation notes with information about newest working tools. Reconfigure using exactly autoconf 2.69. Regenerate INSTALL.
* hppa: Remove warnings and fix conformance errors.Carlos O'Donell2015-02-0513-1212/+131
| | | | | | | | | | | | | | | | | (1) Fix warnings. This is a bulk update to fix all the warnings that were causing build failures with -Werror on hppa. The most egregious problems are in dl-fptr.c which needs to be entirely rewritten, thus I've used -Wno-error for that. (2) Fix conformance errors. The sysdep.c file had __syscall_error and syscall in one file which caused conformance issues by including syscall when __syscall_error was linked to. The fix is obviously to split the file and use syscall.c to implement syscall.
* Function name typo error in non-PIC case, fixed in this patch.Chung-Lin Tang2015-02-051-1/+1
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* Fix two bugs in sparc atomics.David S. Miller2015-01-311-7/+8
| | | | | | | | * sysdeps/sparc/sparc32/bits/atomic.h (__sparc32_atomic_do_unlock24): Put the memory barrier before the unlock not after it. (__v9_compare_and_exchange_val_32_acq): Use unions to avoid getting volatile register usage warnings from the compiler.
* Fix sparc semaphore implementation after recent changes.David S. Miller2015-01-3117-703/+668
| | | | | | | | | | | | | | | | | | | | | | | | * sysdeps/sparc/nptl/sem_init.c: Delete. * sysdeps/sparc/nptl/sem_post.c: Delete. * sysdeps/sparc/nptl/sem_timedwait.c: Delete. * sysdeps/sparc/nptl/sem_wait.c: Delete. * sysdeps/sparc/sparc32/sem_init.c: New file. * sysdeps/sparc/sparc32/sem_waitcommon.c: New file. * sysdeps/sparc/sparc32/sem_open.c: Generic nptl version with padding explicitly initialized. * sysdeps/sparc/sparc32/sem_post.c: Generic nptl version using padding for in-semaphore spinlock. * sysdeps/sparc/sparc32/sem_wait.c: Likewise. * sysdeps/sparc/sparc32/sem_trywait.c: Delete. * sysdeps/sparc/sparc32/sem_timedwait.c: Delete. * sysdeps/sparc/sparc32/sparcv9/sem_init.c: New file. * sysdeps/sparc/sparc32/sparcv9/sem_open.c: New file. * sysdeps/sparc/sparc32/sparcv9/sem_post.c: New file. * sysdeps/sparc/sparc32/sparcv9/sem_waitcommon.c: New file. * sysdeps/sparc/sparc32/sparcv9/sem_wait.c: Redirect to nptl version. * sysdeps/sparc/sparc32/sparcv9/sem_timedwait.c: Delete. * sysdeps/sparc/sparc32/sparcv9/sem_trywait.c: Delete.
* Use AVX unaligned memcpy only if AVX2 is availableH.J. Lu2015-01-308-8/+17
| | | | | | | | | | | | | | | | | | | | | | memcpy with unaligned 256-bit AVX register loads/stores are slow on older processorsl like Sandy Bridge. This patch adds bit_AVX_Fast_Unaligned_Load and sets it only when AVX2 is available. [BZ #17801] * sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features): Set the bit_AVX_Fast_Unaligned_Load bit for AVX2. * sysdeps/x86_64/multiarch/init-arch.h (bit_AVX_Fast_Unaligned_Load): New. (index_AVX_Fast_Unaligned_Load): Likewise. (HAS_AVX_FAST_UNALIGNED_LOAD): Likewise. * sysdeps/x86_64/multiarch/memcpy.S (__new_memcpy): Check the bit_AVX_Fast_Unaligned_Load bit instead of the bit_AVX_Usable bit. * sysdeps/x86_64/multiarch/memcpy_chk.S (__memcpy_chk): Likewise. * sysdeps/x86_64/multiarch/mempcpy.S (__mempcpy): Likewise. * sysdeps/x86_64/multiarch/mempcpy_chk.S (__mempcpy_chk): Likewise. * sysdeps/x86_64/multiarch/memmove.c (__libc_memmove): Replace HAS_AVX with HAS_AVX_FAST_UNALIGNED_LOAD. * sysdeps/x86_64/multiarch/memmove_chk.c (__memmove_chk): Likewise.
* Include <signal.h> in sysdeps/nptl/allocrtsig.cAndreas Schwab2015-01-291-0/+1
| | | | | Architectures which don't use hp-timing-common.h don't include <signal.h> via <sys/param.h>.
* tilegx32: set __HAVE_64B_ATOMICS to 0Chris Metcalf2015-01-281-1/+9
| | | | | | This is because of alignment issues in the sem_t support. tilegx32 does in fact support 64-bit atomics and we will need to revisit this after the 2.21 freeze.
* Disable 64-bit atomics for MIPS n32.Joseph Myers2015-01-281-1/+1
| | | | | | | | | | | | | | | | | | This patch disables use of 64-bit atomics for MIPS n32 to fix the problems with unaligned semaphores. Before 64-bit atomics are used for anything for which such alignment issues do not arise, and before the addition of any new ILP32 ports with 64-bit semaphores for which the ABI can be set to have the greater alignment (AARCH64?), a better approach will need to be established that allows architectures to declare their 64-bit atomics availability accurately, without doing so causing inappropriate use of such atomics on unaligned semaphores. Tested for MIPS n32 that this fixes the nptl/tst-sem3 failure. * sysdeps/mips/bits/atomic.h [_MIPS_SIM == _ABIN32] (__HAVE_64B_ATOMICS): Define to 0.
* powerpc: Fix fesetexceptflag [BZ#17885]Adhemerval Zanella2015-01-281-1/+1
| | | | | | | | | This patch fixes a bug introduced by 18f2945ae9216cfc, where it optimizes the FPSCR set by just issuing a mtfs instruction if new flag is different from older one. The issue is a typo, where the new flag should the the new value, instead of the old one. It fixes BZ#17885.
* powerpc: Fix fsqrt build in libm [BZ#16576]Adhemerval Zanella2015-01-285-102/+24
| | | | | | | | | | Some powerpc64 processors (e5500 core for instance) does not provide the fsqrt instruction, however current check to use in math_private.h is __WORDSIZE and _ARCH_PWR4 (ISA 2.02). This is patch change it to use the compiler flag _ARCH_PPCSQ (which is the same condition GCC uses to decide whether to generate fsqrt instruction). It fixes BZ#16576.
* ia64: avoid set-but-not-used warningAndreas Schwab2015-01-251-0/+3
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* m68k/coldfire: avoid warning about volatile register variablesAndreas Schwab2015-01-251-10/+9
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* m68k: fix missing definition of __feraiseexceptAndreas Schwab2015-01-251-0/+1
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* m68k: force inlining bswap functionsAndreas Schwab2015-01-251-4/+4
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* powerpc: Fix powerpc64 build failure with binutils 2.22Adhemerval Zanella2015-01-241-1/+4
| | | | | | | | | | | | | | GLIBC memset optimization for POWER8 uses the '.machine power8' directive, which is only supported officially on binutils 2.24+. This causes a build failure on older binutils. Since the requirement of .machine power8 is to correctly assembly the 'mtvsrd' instruction and it is already handled by the MTVSRD_V1_R4 macro, there is no really needed of using it. The patch replaces the power8 with power7 for .machine directive. It fixes BZ#17869.
* powerpc: Fix ifuncmain6pie failure with GCC 4.9Adhemerval Zanella2015-01-241-1/+3
| | | | | | | | | | | This patch fix the elf/ifuncmain6pie failure when building with GCC 4.9+. For some reason, the compiler removes the branch taken code at resolve_ifunc (sysdeps/powerpc/powerpc64/dl-machine.h) as dead-code and thus the testcase fails because the ifunc resolves branches to an invalid memory location. It fixes by explicit adding a dependency of value based on odp variable to avoid compiler optimization. It fixes BZ#17868.
* Also treat model numbers 0x5a/0x5d as SilvermontH.J. Lu2015-01-231-0/+2
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* Treat model numbers 0x4a/0x4d as SilvermontH.J. Lu2015-01-231-0/+2
| | | | | * sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features): Treat model numbers 0x4a/0x4d as Intel Silvermont architecture.
* Use uint64_t and (uint64_t) 1 for 64-bit intH.J. Lu2015-01-231-1/+1
| | | | | | | | | | | | | | | This patch replaces unsigned long int and 1UL with uint64_t and (uint64_t) 1 to support ILP32 targets like x32. [BZ #17870] * nptl/sem_post.c (__new_sem_post): Replace unsigned long int with uint64_t. * nptl/sem_waitcommon.c (__sem_wait_cleanup): Replace 1UL with (uint64_t) 1. (__new_sem_wait_slow): Replace unsigned long int with uint64_t. Replace 1UL with (uint64_t) 1. * sysdeps/nptl/internaltypes.h (new_sem): Replace unsigned long int with uint64_t.
* BZ #16418: Fix powerpc get_clockfreq racinessAdhemerval Zanella2015-01-211-69/+59
| | | | | | | | This patch fix powerpc __get_clockfreq racy and cancel-safe issues by dropping internal static cache and by using nocancel file operations. The vDSO failure check is also removed, since kernel code does not return an error (it cleans cr0.so bit on function return) and the static code (to read value /proc) now uses non-cancellable calls.
* Update copyright year to 2015 for new files.Carlos O'Donell2015-01-211-1/+1
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* Fix recursive dlopen.Carlos O'Donell2015-01-211-2/+2
| | | | | | | | | | | | | | | | | | | The ability to recursively call dlopen is useful for malloc implementations that wish to load other dynamic modules that implement reentrant/AS-safe functions to use in their own implementation. Given that a user malloc implementation may be called by an ongoing dlopen to allocate memory the user malloc implementation interrupts dlopen and if it calls dlopen again that's a reentrant call. This patch fixes the issues with the ld.so.cache mapping and the _r_debug assertion which prevent this from working as expected. See: https://sourceware.org/ml/libc-alpha/2014-12/msg00446.html
* Fix semaphore destruction (bug 12674).Carlos O'Donell2015-01-2119-1794/+23
| | | | | | | | | | | | | This commit fixes semaphore destruction by either using 64b atomic operations (where available), or by using two separate fields when only 32b atomic operations are available. In the latter case, we keep a conservative estimate of whether there are any waiting threads in one bit of the field that counts the number of available tokens, thus allowing sem_post to atomically both add a token and determine whether it needs to call futex_wake. See: https://sourceware.org/ml/libc-alpha/2014-12/msg00155.html
* Commit nios2 port to master.Chung-Lin Tang2015-01-1796-0/+7575
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* S390: Get rid of linknamespace failures for utmp functions.Stefan Liebler2015-01-167-14/+42
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* S390: Get rid of linknamespace failures for string functions.Stefan Liebler2015-01-1614-79/+79
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* Fix powerpc-nofpu fesetenv namespace (bug 17748).Joseph Myers2015-01-141-1/+1
| | | | | | | | | | | | | When fixing namespace issues for <fenv.h> functions I missed one call to fesetenv for powerpc-nofpu. This patch changes this to a call to __fesetenv. Tested for powerpc-nofpu; it fixes the previously observed math.h linknamespace test failures. [BZ #17748] * sysdeps/powerpc/nofpu/feholdexcpt.c (__feholdexcept): Call __fesetenv instead of fesetenv.
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