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* Clean up __exit_thread.Roland McGrath2014-05-1312-55/+50
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* Fix typo in assertionAndreas Schwab2014-05-131-1/+1
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* Clean up kernel version conditionals for pre-2.6.32 kernels.Joseph Myers2014-05-127-162/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch does some initial cleanup, following the move to 2.6.32 minimum kernel version, by removing __LINUX_KERNEL_VERSION conditionals that are now always-true or always-false. In the case of __ASSUME_ARG_MAX_STACK_BASED, where the conditional used a kernel version that was itself in a macro, the associated sysconf.c code is also cleaned up and __ASSUME_ARG_MAX_STACK_BASED removed completely. Tested x86_64 that disassembly of installed shared libraries is unchanged by the patch. * sysdeps/unix/sysv/linux/kernel-features.h [__s390__] (__ASSUME_UTIMES): Do not condition on kernel version. (__ASSUME_PSELECT): Define unconditionally. (__ASSUME_PPOLL): Likewise. (__ASSUME_ATFCTS): Likewise. (__ASSUME_SET_ROBUST_LIST): Do not condition on kernel version. (__ASSUME_COMPLETE_READV_WRITEV): Define unconditionally. (__ASSUME_FUTEX_LOCK_PI): Do not condition on kernel version. (__ASSUME_UTIMENSAT): Define unconditionally. (__ASSUME_PRIVATE_FUTEX): Likewise. (__ASSUME_FALLOCATE): Likewise. (__ASSUME_O_CLOEXEC): Likewise. (__LINUX_ARG_MAX_STACK_BASED_MIN_KERNEL): Remove. (__ASSUME_ARG_MAX_STACK_BASED): Likewise. (__ASSUME_ADJ_OFFSET_SS_READ): Define unconditionally. (__ASSUME_SOCK_CLOEXEC): Do not condition on kernel version. (__ASSUME_IN_NONBLOCK): Likewise. (__ASSUME_PIPE2): Likewise. (__ASSUME_EVENTFD2): Likewise. (__ASSUME_SIGNALFD4): Likewise. (__ASSUME_DUP3): Likewise. [__x86_64__ || __sparc__] (__ASSUME_ACCEPT4_SYSCALL): Likewise. (__ASSUME_FUTEX_CLOCK_REALTIME): Define unconditionally. (__ASSUME_AT_RANDOM): Likewise. (__ASSUME_PREADV): Likewise. (__ASSUME_PWRITEV): Likewise. (__ASSUME_REQUEUE_PI): Do not condition on kernel version. (__ASSUME_F_GETOWN_EX): Define unconditionally. (__ASSUME_XFS_RESTRICTED_CHOWN): Likewise. * sysdeps/unix/sysv/linux/sysconf.c (__sysconf) [!__ASSUME_ARG_MAX_STACK_BASED]: Remove conditional code. * sysdeps/unix/sysv/linux/alpha/kernel-features.h (__ASSUME_O_CLOEXEC): Define unconditionally. (__ASSUME_PSELECT): Do not undefine conditionally. (__ASSUME_PPOLL): Likewise. (__ASSUME_ATFCTS): Likewise. (__ASSUME_SET_ROBUST_LIST): Likewise. (__ASSUME_UTIMENSAT): Likewise. (__ASSUME_FDATASYNC): Define unconditionally. * sysdeps/unix/sysv/linux/arm/kernel-features.h (__ASSUME_SIGFRAME_V2): Likewise. )__ASSUME_EVENTFD2): Likewise. (__ASSUME_SIGNALFD4): Likewise. (__ASSUME_PSELECT): Do not undefine conditionally. (__ASSUME_PPOLL): Likewise. * sysdeps/unix/sysv/linux/ia64/kernel-features.h (__ASSUME_PSELECT): Define unconditionally. (__ASSUME_PPOLL): Likewise. (__ASSUME_O_CLOEXEC): Likewise. (__ASSUME_SOCK_CLOEXEC): Likewise. (__ASSUME_IN_NONBLOCK): Likewise. (__ASSUME_PIPE2): Likewise. (__ASSUME_EVENTFD2): Likewise. (__ASSUME_SIGNALFD4): Likewise. (__ASSUME_DUP3): Likewise. * sysdeps/unix/sysv/linux/m68k/kernel-features.h (__ASSUME_O_CLOEXEC): Likewise. (__ASSUME_SOCK_CLOEXEC): Likewise. (__ASSUME_IN_NONBLOCK): Likewise. (__ASSUME_PIPE2): Likewise. (__ASSUME_EVENTFD2): Likewise. (__ASSUME_SIGNALFD4): Likewise. (__ASSUME_DUP3): Likewise. * sysdeps/unix/sysv/linux/mips/kernel-features.h (__ASSUME_EVENTFD2): Likewise. (__ASSUME_SIGNALFD4): Likewise. (__ASSUME_ACCEPT4_SYSCALL): Likewise.
* Make armv7 strcmp assembly compatible with ARM mode and SFI.Roland McGrath2014-05-091-45/+103
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* Silence a missing-noreturn warning for _Unwind_Resume.Roland McGrath2014-05-091-5/+7
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* Include SSE state in i386 fenv_t (bug 16064).Joseph Myers2014-05-095-17/+183
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes bug 16064, i386 fenv_t not including SSE state, using the technique suggested there of storing the state in the existing __eip field of fenv_t to avoid needing to increase the size of fenv_t and add new symbol versions. The included testcase, which previously failed for i386 (but passed for x86_64), illustrates how the previous state was buggy. This patch causes the SSE state to be included *to the extent it is on x86_64*. Where some state should logically be included but isn't for x86_64 (see bug 16068), this patch does not cause it to be included for i386 either. The idea is that any patch fixing that bug should fix it for both x86_64 and i386 at once. Tested i386 and x86_64. (I haven't tested the case of a CPU without SSE2 disabling the test.) [BZ #16064] * sysdeps/i386/fpu/fegetenv.c: Include <unistd.h>, <ldsodefs.h> and <dl-procinfo.h>. (__fegetenv): Save SSE state in envp->__eip if supported. * sysdeps/i386/fpu/feholdexcpt.c (feholdexcept): Save SSE state in envp->__eip if supported. * sysdeps/i386/fpu/fesetenv.c: Include <unistd.h>, <ldsodefs.h> and <dl-procinfo.h>. (__fesetenv): Always set __eip, __cs_selector, __opcode, __data_offset and __data_selector in environment to 0. Set SSE state if supported. * sysdeps/x86/fpu/Makefile [$(subdir) = math] (tests): Add test-fenv-sse. [$(subdir) = math] (CFLAGS-test-fenv-sse.c): Add -msse2 -mfpmath=sse. * sysdeps/x86/fpu/test-fenv-sse.c: New file.
* ARM: Allow auto-detection of linker relro featureWill Newton2014-05-092-0/+16
| | | | | | | | | | | | | | Set values for libc_commonpagesize and libc_relro_required for the ARM port to enable relro by default and suppress a warning at configure time. ChangeLog: 2014-05-09 Will Newton <will.newton@linaro.org> * sysdeps/arm/preconfigure.ac: Set libc_commonpagesize and libc_relro_required for ARM. * sysdeps/arm/preconfigure: Regenerate.
* S/390: Port of lock elision to System/zDominik Vogt2014-05-092-0/+62
| | | | | | | | | | Added support for TX lock elision of pthread mutexes on s390 and s390x. This may improve lock scaling of existing programs on TX capable systems. The lock elision code is only built with --enable-lock-elision=yes and then requires a GCC version supporting the TX builtins. With lock elision default mutexes are elided via __builtin_tbegin, if the cpu supports transactions. By default lock elision is not enabled and the elision code is not built.
* ARM: Add optimized ARMv7 strcmp implementationWill Newton2014-05-091-0/+492
| | | | | | | | | | | | | | | | | | | Add an optimized implementation of strcmp for ARMv7-A cores. This implementation is significantly faster than the current generic C implementation, particularly for strings of 16 bytes and longer. Tested with the glibc string tests for arm-linux-gnueabihf and armeb-linux-gnueabihf. The code was written by ARM, who have agreed to assign the copyright to the FSF for integration into glibc. ChangeLog: 2014-05-09 Will Newton <will.newton@linaro.org> * sysdeps/arm/armv7/strcmp.S: New file. * NEWS: Mention addition of ARMv7 optimized strcmp.
* Some configure-related decrufting.Roland McGrath2014-05-084-16/+0
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* 2014-05-07 Steve Ellcey <sellcey@mips.com>Steve Ellcey2014-05-071-7/+7
| | | | | | | [BZ# 16922] * sysdeps/mips/sys/asm.h (INT_SUB): Fix definition. (LONG_SUB): Ditto. (PTR_SUB): Ditto.
* Fix parsing of getai result from nscd for IPv6-only requestAndreas Schwab2014-05-071-4/+8
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* Move ARM internal unwind.h header to the right sysdeps directory.Roland McGrath2014-05-061-0/+0
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* SPARC: add EFD_SEMAPHORE in <bits/eventfd.h> (BZ #16916)Aurelien Jarno2014-05-071-0/+2
| | | | | EFD_SEMAPHORE has been added in the main <bits/eventfd.h>, but not in the SPARC specific version. Fix that.
* PowerPC: strncpy/stpncpy optimization for PPC64/POWER7Vidya Ranganathan2014-05-0610-1/+593
| | | | | | | | The optimization is achieved by following techniques: > data alignment [gain from aligned memory access on read/write] > POWER7 gains performance with loop unrolling/unwinding [gain by reduction of branch penalty]. > zero padding done by calling optimized memset
* Move rules for Linux-specific pldd program to Linux-specific Makefile.Roland McGrath2014-05-051-0/+4
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* Fix -Wundef issues in generated errlist.c.Roland McGrath2014-05-052-2/+4
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* PowerPC: ifunc improvement for internal callsAdhemerval Zanella2014-05-057-26/+49
| | | | | | | This patch changes de default symbol redirection for internal call of memcpy, memset, memchr, and strlen to the IFUNC resolved ones. The performance improvement is noticeable in algorithms that uses these symbols extensible, like the regex functions.
* Fix -Wundef warning for FEATURE_INDEX_1.Carlos O'Donell2014-05-031-7/+6
| | | | | | | | Define FEATURE_INDEX_1 and FEATURE_INDEX_MAX as macros for use by both assembly and C code. This fixes the -Wundef error for cases where FEATURE_INDEX_1 was not defined but used the correct value of 0 for an undefined macro.
* Fix v9/64-bit strcmp when string ends in multiple zero bytes.David S. Miller2014-05-011-0/+31
| | | | | | | | | | [BZ #16885] * sysdeps/sparc/sparc64/strcmp.S: Fix end comparison handling when multiple zero bytes exist at the end of a string. Reported by Aurelien Jarno <aurelien@aurel32.net> * string/test-strcmp.c (check): Add explicit test for situations where there are multiple zero bytes after the first.
* ARM: Remove lowlevellock.cWill Newton2014-05-011-132/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | lowlevellock.c for arm differs from the generic lowlevellock.c only in insignificant ways, so can be removed. Happily, this fixes BZ 15119 (unnecessary busy loop in __lll_timedlock_wait on arm). The notable differences between the arm and generic implementations are: 1) arm __lll_timedlock_wait has a fast path out if futex has been set to 0 between since the function was called. This seems unlikely to happen very often, so it seems at worst harmless to lose this fast path. 2) Some function in arm's lowlevellock.c set futex to 2 if it was 1. The generic version always sets the futex to 2. As futex can only be 0, 1 or 2 on entry into these functions, the behaviour is equivalent. (If the futex manages to be 0 on entry then we've just lost another unlikely fast path out.) There are no test suite regressions. Note that hppa and sparc also have their own lowlevellock.c. I believe hppa can also be removed, so I'll send a separate patch for that shortly. sparc's seems to be genuinely needed as it uses a different locking structure. Also note that the analysis at https://sourceware.org/ml/libc-ports/2013-02/msg00021.html indicates a further locking performance bug to fix - I've got a partial patch for that which I can submit once I've finished testing. 2014-05-01 Bernard Ogden <bernie.ogden@linaro.org> [BZ #15119] * sysdeps/unix/sysv/linux/arm/nptl/lowlevellock.c: Remove file.
* Add round-mode context support to sparc.David S. Miller2014-04-301-0/+64
| | | | | | | | | | | | | | | | | | | | | | | * sysdeps/sparc/fpu/fenv_private.h (HAVE_RM_CTX): Define. (libc_feholdexcept_setround_sparc_ctx): New function. (libc_fesetenv_sparc_ctx): Likewise. (libc_feupdateenv_sparc_ctx): Likewise. (libc_feholdsetround_sparc_ctx): Likewise. (libc_feholdexcept_setround_ctx): Define. (libc_feholdexcept_setroundf_ctx): Likewise. (libc_feholdexcept_setroundl_ctx): Likewise. (libc_fesetenv_ctx): Likewise. (libc_fesetenvf_ctx): Likewise. (libc_fesetenvl_ctx): Likewise. (libc_feupdateenv_ctx): Likewise. (libc_feupdateenvf_ctx): Likewise. (libc_feupdateenvl_ctx): Likewise. (libc_feresetround_ctx): Likewise. (libc_feresetroundf_ctx): Likewise. (libc_feresetroundl_ctx): Likewise. (libc_feholdsetround_ctx): Likewise. (libc_feholdsetroundf_ctx): Likewise. (libc_feholdsetroundl_ctx): Likewise.
* Correct sparc CPP guards for EMT_TAGOVF.David S. Miller2014-04-301-1/+1
| | | | | * sysdeps/unix/sysv/linux/sparc/bits/siginfo.h (EMT_TAGOVF): Protect with __USE_GNU instead of XOPEN cpp guards.
* Fix some sparc -Wundef build warnings.David S. Miller2014-04-301-0/+3
| | | | | * sysdeps/sparc/bits/string.h (_STRING_ARCH_unaligned): Define to 0.
* Fix some sparc conform test failures in siginfo.hDavid S. Miller2014-04-301-0/+2
| | | | | * sysdeps/unix/sysv/linux/sparc/bits/siginfo.h (EMT_TAGOVF): Protect with XOPEN cpp guards.
* ARM: Fix R_ARM_IRELATIVE RELA relocations.Julian Brown2014-04-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This patch fixes what I believe to be a bug in the handling of R_ARM_IRELATIVE RELA relocations. At present, these are handled the same as REL relocations: i.e. the addend is loaded from the relocation address. Most of the time this isn't a problem because RELA relocations aren't used on ARM (GNU/Linux at least) anyway, but it causes problems with prelink, which uses RELA on all targets for its conflict table. (Support for ifunc prelinking requires a prelink patch, not yet posted.) Anyway, this patch works, though I'm not 100% sure if it is correct: I notice that this code path received attention last year: https://sourceware.org/ml/libc-ports/2013-07/msg00000.html I'm not sure under what circumstances that patch would have had an effect, nor if my patch conflicts with that case. No regressions using Mentor's usual glibc cross-testing infrastructure. [BZ #16888] * sysdeps/arm/dl-machine.h (elf_machine_rela): Fix R_ARM_IRELATIVE handling.
* Increase minimum Linux kernel version to 2.6.32.Joseph Myers2014-04-306-42/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch increases the minimum Linux kernel version for glibc to 2.6.32, as discussed in the thread starting at <https://sourceware.org/ml/libc-alpha/2014-01/msg00511.html>. This patch just does the minimal change to arch_minimum_kernel settings (and LIBC_LINUX_VERSION, which determines the minimum kernel headers version, as it doesn't make sense for that to be older than the minimum kernel that can be used at runtime). Followups would be expected to do, roughly and not necessarily precisely in this order: * Remove __LINUX_KERNEL_VERSION checks in kernel-features.h files where those checks are always true / always false for kernels 2.6.32 and above. * Otherwise simplify/improve conditionals in those files (for example, where defining once in the main file then undefining in architecture-specific files makes things clearer than having lots of separate definitions of the same macro), possibly fixing in the process cases where a macro should optimally have been defined for a given architecture but wasn't. (In the review in preparation for this version increase I checked what the right conditions should be for all macros in the main kernel-features.h whose definitions there would have been affected by the increase - but I only fixed that subset of the issues found where --enable-kernel=2.6.32 would have caused a kernel feature to be wrongly assumed to be present, not any cases where a feature is not assumed but could be assumed.) * Remove conditionals on __ASSUME_* where they can now be taken to be always-true, and the definitions when the macros are only used in Linux-specific files. * Split more architectures out of the main kernel-features.h (like ex-ports architectures), once various of the architecture conditionals there have been eliminated so the new architecture-specific files are no larger than actually necessary. Tested x86_64. 2014-03-27 Joseph Myers <joseph@codesourcery.com> [BZ #9894] * sysdeps/unix/sysv/linux/configure.ac (LIBC_LINUX_VERSION): Change to 2.6.32. (arch_minimum_kernel): Change all 2.6.16 settings to 2.6.32. * sysdeps/unix/sysv/linux/configure: Regenerated. * sysdeps/unix/sysv/linux/microblaze/configure.ac: Remove file. * sysdeps/unix/sysv/linux/microblaze/configure: Likewise. * sysdeps/unix/sysv/linux/tile/configure.ac: Likewise. * sysdeps/unix/sysv/linux/tile/configure: Likewise. * README: Update reference to required Linux kernel version. * manual/install.texi (Linux): Update reference to required Linux kernel headers version. * INSTALL: Regenerated.
* More fixes for unsafe compiler optimizationAdhemerval Zanella2014-04-301-0/+1
| | | | | GCC 4.9 -ftree-loop-distribute-patterns now may transform loops in memcpy. Add the alias to internal GLIBC symbol to avoid PLT creation.
* [BZ #16823] Fix log1pl returning wrong infinity signStefan Liebler2014-04-293-3/+3
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* FixAdhemerval Zanella2014-04-292-2/+2
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* PowerPC: Suppress unnecessary FPSCR writeAdhemerval Zanella2014-04-297-16/+48
| | | | | | | This patch optimizes the FPSCR update on exception and rounding change functions by just updating its value if new value if different from current one. It also optimizes fedisableexcept and feenableexcept by removing an unecessary FPSCR read.
* Relocate hppa from ports to libc.Carlos O'Donell2014-04-29150-0/+11938
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* [ARM] Add support for fenv_private on ARM.Wilco Dijkstra2014-04-283-1/+261
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* Replace __int128 with __int128_t in bits/link.hH.J. Lu2014-04-251-3/+3
| | | | | | | | | | __int128 was added in GCC 4.6 and __int128_t was added before x86-64 was supported. This patch replaces __int128 with __int128_t so that the installed bits/link.h can be used with older GCC. * sysdeps/x86/bits/link.h (La_x86_64_regs): Replace __int128 with __int128_t. (La_x86_64_retval): Likewise.
* [AArch64] Suppress unnecessary FPSR and FPCR writes.Ian Bolton2014-04-247-28/+46
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* Fix sigaction conform test failures on sparc.David S. Miller2014-04-221-1/+2
| | | | | | * sysdeps/unix/sysv/linux/sparc/bits/sigaction.h (struct sigaction): New struct member __glibc_reserved0, change type of sa_flags to int.
* aarch64: Add setjmp and longjmp SystemTap probesVenkataramanan Kumar2014-04-222-0/+15
| | | | | | | | | | | | | | | Add setjmp, longjmp and longjmp_target SystemTap probes. ChangeLog: 2014-04-22 Will Newton <will.newton@linaro.org> Venkataramanan Kumar <venkataramanan.kumar@linaro.org> * sysdeps/aarch64/__longjmp.S: Include stap-probe.h. (__longjmp): Add longjmp and longjmp_target SystemTap probes. * sysdeps/aarch64/setjmp.S: Include stap-probe.h. (__sigsetjmp): Add setjmp SystemTap probe.
* PowerPC: Add fenv macros for long doubleAdhemerval Zanella2014-04-171-2/+7
| | | | | This patch add the missing libc_<function>l_ctx macros for long double. Similar for float, they point to default double versions.
* Add fenv test support for AArch64.Ian Bolton2014-04-171-0/+22
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* Detect if AVX2 is usableSihai Yao2014-04-173-0/+12
| | | | | | | | | | | | | | | This patch checks and sets bit_AVX2_Usable in __cpu_features.feature. * sysdeps/x86_64/multiarch/ifunc-defines.sym (COMMON_CPUID_INDEX_7): New. * sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features): Check and set bit_AVX2_Usable. * sysdeps/x86_64/multiarch/init-arch.h (bit_AVX2_Usable): New macro. (bit_AVX2): Likewise. (index_AVX2_Usable): Likewise. (CPUID_AVX2): Likewise. (HAS_AVX2): Likewise.
* aarch64: Re-implement setcontext without rt_sigreturn syscallWill Newton2014-04-171-55/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation of setcontext uses rt_sigreturn to restore the contents of registers. This contrasts with the way most other architectures implement setcontext: powerpc64, mips, tile: Call rt_sigreturn if context was created by a call to a signal handler, otherwise restore in user code. powerpc32: Call swapcontext system call and don't call sigreturn or rt_sigreturn. x86_64, sparc, hppa, sh, ia64, m68k, s390, arm: Only support restoring "synchronous" contexts, that is contexts created by getcontext, and restoring in user code and don't call sigreturn or rt_sigreturn. alpha: Call sigreturn (but not rt_sigreturn) in all cases to do the restore. The text of the setcontext manpage suggests that the requirement to be able to restore a signal handler created context has been dropped from SUSv2: If the context was obtained by a call to a signal handler, then old standard text says that "program execution continues with the program instruction following the instruction interrupted by the signal". However, this sentence was removed in SUSv2, and the present verdict is "the result is unspecified". Implementing setcontext by calling rt_sigreturn unconditionally causes problems when used with sigaltstack as in BZ #16629. On this basis it seems that aarch64 is broken and that new ports should only support restoring contexts created with getcontext and do not need to call rt_sigreturn at all. This patch re-implements the aarch64 setcontext function to restore the context in user code in a similar manner to x86_64 and other ports. ChangeLog: 2014-04-17 Will Newton <will.newton@linaro.org> [BZ #16629] * sysdeps/unix/sysv/linux/aarch64/setcontext.S (__setcontext): Re-implement to restore registers in user code and avoid rt_sigreturn system call.
* Add fenv test support for targets which don't have FP traps.Wilco2014-04-172-0/+14
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* [AArch64] Define HAVE_RM_CTX and related hooks.Ian Bolton2014-04-171-0/+55
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* [AArch64] Provide initial implementation of math_private.h.Ian Bolton2014-04-171-0/+214
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* alpha: Remove alpha-linux pthread_once.cRichard Henderson2014-04-161-95/+0
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* alpha: Enable unwind tables for backtrace.cRichard Henderson2014-04-161-0/+5
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* alpha: Fix __pointer_chk_guard definition for the testsuiteRichard Henderson2014-04-161-1/+1
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* alpha: Regenerate sysdeps/alpha/libm-test-ulpsRichard Henderson2014-04-161-4/+1022
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* [AArch64] Regenerate libm-test-ulps.Marcus Shawcroft2014-04-161-87/+1015
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* Save/restore bound registers for _dl_runtime_profileIgor Zamyatin2014-04-164-0/+63
| | | | | | | | | | | | | | | | | This patch saves and restores bound registers in x86-64 PLT for ld.so profile and LD_AUDIT: * sysdeps/x86_64/bits/link.h (La_x86_64_regs): Add lr_bnd. (La_x86_64_retval): Add lrv_bnd0 and lrv_bnd1. * sysdeps/x86_64/dl-trampoline.S (_dl_runtime_profile): Save Intel MPX bound registers before _dl_profile_fixup. * sysdeps/x86_64/dl-trampoline.h: Restore Intel MPX bound registers after _dl_profile_fixup. Save and restore bound registers bnd0/bnd1 when calling _dl_call_pltexit. * sysdeps/x86_64/link-defines.sym (BND_SIZE): New. (LR_BND_OFFSET): Likewise. (LRV_BND0_OFFSET): Likewise. (LRV_BND1_OFFSET): Likewise.
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