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* Fix sparc 64-bit GMP ifunc resolution in static builds.David S. Miller2013-11-125-5/+5
| | | | | | | | | | [BZ #16150] * sysdeps/sparc/sparc64/multiarch/add_n.S: Resolve to the correct generic symbol in the non-vis3 case in static builds. * sysdeps/sparc/sparc64/multiarch/addmul_1.S: Likewise. * sysdeps/sparc/sparc64/multiarch/mul_1.S: Likewise. * sysdeps/sparc/sparc64/multiarch/sub_n.S: Likewise. * sysdeps/sparc/sparc64/multiarch/submul_1.S: Likewise.
* PowerPC: Fix vDSO missing ODP entriesAdhemerval Zanella2013-11-083-5/+28
| | | | | | | This patch fixes the vDSO symbol used directed in IFUNC resolver where they do not have an associated ODP entry leading to undefined behavior in some cases. It adds an artificial OPD static entry to such cases and set its TOC to non 0 to avoid triggering lazy resolutions.
* Fix build on pre-v9 32-bit Sparc.David S. Miller2013-11-061-1/+2
| | | | | | | | | We cannot use fnegd in this code, as fnegd was added in v9. Only fnegs exists in v8 and earlier. [BZ #15985] * sysdeps/sparc/sparc32/fpu/s_fdim.S (__fdim): Do not use fnegd on pre-v9 cpus, use a fnegs+fmovs sequence instead.
* Restrict shm_open and shm_unlink to SHMDIR. Fixes bugs 14752 and 15763.Ondřej Bílka2013-10-311-6/+8
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* rename configure.in to configure.acMike Frysinger2013-10-3032-16/+16
| | | | | | | Autoconf has been deprecating configure.in for quite a long time. Rename all our configure.in and preconfigure.in files to .ac. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Consolidate conditionals in mp sin/cos functionsSiddhesh Poyarekar2013-10-281-8/+6
| | | | | Consolidate conditionals in multiple precision sin and cos functions to prepare the code for addition of probe points.
* PowerPC: strcpy/stpcpy optimization for PPC64/POWER7Adhemerval Zanella2013-10-254-134/+407
| | | | | | | | | | This patch intends to unify both strcpy and stpcpy implementationsi for PPC64 and PPC64/POWER7. The idead default powerpc64 implementation is to provide both doubleword and word aligned memory access. For PPC64/POWER7 is also provide doubleword and word memory access, remove the branch hints, use the cmpb instruction for compare doubleword/words, and add an optimization for inputs of same alignment.
* Fix stack overflow due to large AF_INET6 requestsSiddhesh Poyarekar2013-10-251-2/+18
| | | | | | | | Resolves #16072 (CVE-2013-4458). This patch fixes another stack overflow in getaddrinfo when it is called with AF_INET6. The AF_UNSPEC case was fixed as CVE-2013-1914, but the AF_INET6 case went undetected back then.
* Fix incorrect getaddrinfo assertion triggerAllan McRae2013-10-251-3/+10
| | | | | | | | | | | | | | | | | | | [BZ #9954] With the following /etc/hosts: 127.0.0.1 www.my-domain.es 127.0.1.1 www.my-domain.es 192.168.0.1 www.my-domain.es Using getaddrinfo() on www.my-domain.es, trigger the following assertion: ../sysdeps/posix/getaddrinfo.c:1473: rfc3484_sort: Assertion `src->results[i].native == -1 || src->results[i].native == a1_native' failed. This is due to two different bugs: - In rfc3484_sort() rule 7, src->results[i].native is assigned even if src->results[i].index is -1, meaning that no interface is associated. - In getaddrinfo() the source IP address used with the lo interface needs a special case, as it can be any IP within 127.X.Y.Z.
* Add e500 port.Joseph Myers2013-10-1831-11/+1169
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* Don't use gethostbyaddr to determine canonical nameAndreas Schwab2013-10-171-78/+11
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* Format floating routines.Ondřej Bílka2013-10-1758-2175/+2769
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* Add systemtap markers to math function slow pathsSiddhesh Poyarekar2013-10-116-5/+45
| | | | | | | Add systemtap probes to various slow paths in libm so that application developers may use systemtap to find out if their applications are hitting these slow paths. We have added probes for pow, exp, log, tan, atan and atan2.
* Fix readdir regressions on sparc 32-bit.David S. Miller2013-10-101-2/+7
| | | | | * sysdeps/posix/dirstream.h (struct __dirstream): Fix alignment of directory block.
* Update sparc ULPs.David S. Miller2013-10-101-0/+125
| | | | * sysdeps/sparc/fpu/libm-test-ulps: Update.
* Extend powerpc-nofpu -fno-builtin-fabsl workaround to more files.Joseph Myers2013-10-101-0/+6
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* Avoid ordered comparisons of NaNs in ldbl-128ibm acosl and asinl.Joseph Myers2013-10-102-0/+4
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* soft-fp: fix negation NaN handling (bug 16034).Joseph Myers2013-10-101-5/+2
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* Use p2align instead ALIGNOndřej Bílka2013-10-089-323/+288
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* Format e_pow.cSiddhesh Poyarekar2013-10-081-260/+313
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* Format e_exp.cSiddhesh Poyarekar2013-10-081-164/+242
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* Consolidate multiple precision sin/cos functionsSiddhesh Poyarekar2013-10-083-129/+113
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* Add fork hooks for pthread_atforkSamuel Thibault2013-10-041-0/+15
| | | | pthread_atfork needs application callbacks to be called outside any locking.
* Move powerpc ports pieces to libc.Joseph Myers2013-10-0461-0/+13287
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* e500 port: adjust sysdeps/unix/sysv/linux/configure.in case.Joseph Myers2013-10-042-2/+2
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* e500 port: fix fpu_control.h constant values.Joseph Myers2013-10-041-10/+8
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* e500 port: getcontext / setcontext / swapcontext.Joseph Myers2013-10-043-0/+17
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* Use stdint.h types in union unaligned.Alan Modra2013-10-042-6/+6
| | | | | | * sysdeps/powerpc/powerpc32/dl-machine.c (__process_machine_rela): Use stdint types in rather than __attribute__((mode())). * sysdeps/powerpc/powerpc64/dl-machine.h (elf_machine_rela): Likewise.
* Correct little-endian relocation of UADDR64,32,16.Alan Modra2013-10-042-24/+18
| | | | | | * sysdeps/powerpc/powerpc32/dl-machine.c (__process_machine_rela): Correct handling of unaligned relocs for little-endian. * sysdeps/powerpc/powerpc64/dl-machine.h (elf_machine_rela): Likewise.
* PowerPC LE memchr and memrchrAlan Modra2013-10-046-382/+404
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00105.html Like strnlen, memchr and memrchr had a number of defects fixed by this patch as well as adding little-endian support. The first one I noticed was that the entry to the main loop needlessly checked for "are we done yet?" when we know the size is large enough that we can't be done. The second defect I noticed was that the main loop count was wrong, which in turn meant that the small loop needed to handle an extra word. Thirdly, there is nothing to say that the string can't wrap around zero, except of course that we'd normally hit a segfault on trying to read from address zero. Fixing that simplified a number of places: - /* Are we done already? */ - addi r9,r8,8 - cmpld r9,r7 - bge L(null) becomes + cmpld r8,r7 + beqlr However, the exit gets an extra test because I test for being on the last word then if so whether the byte offset is less than the end. Overall, the change is a win. Lastly, memrchr used the wrong cache hint. * sysdeps/powerpc/powerpc64/power7/memchr.S: Replace rlwimi with insrdi. Make better use of reg selection to speed exit slightly. Schedule entry path a little better. Remove useless "are we done" checks on entry to main loop. Handle wrapping around zero address. Correct main loop count. Handle single left-over word from main loop inline rather than by using loop_small. Remove extra word case in loop_small caused by wrong loop count. Add little-endian support. * sysdeps/powerpc/powerpc32/power7/memchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memrchr.S: Likewise. Use proper cache hint. * sysdeps/powerpc/powerpc32/power7/memrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/rawmemchr.S: Add little-endian support. Avoid rlwimi. * sysdeps/powerpc/powerpc32/power7/rawmemchr.S: Likewise.
* PowerPC LE memsetAlan Modra2013-10-047-34/+34
| | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00104.html One of the things I noticed when looking at power7 timing is that rlwimi is cracked and the two resulting insns have a register dependency. That makes it a little slower than the equivalent rldimi. * sysdeps/powerpc/powerpc64/memset.S: Replace rlwimi with insrdi. Formatting. * sysdeps/powerpc/powerpc64/power4/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memset.S: Likewise. * sysdeps/powerpc/powerpc32/power4/memset.S: Likewise. * sysdeps/powerpc/powerpc32/power6/memset.S: Likewise. * sysdeps/powerpc/powerpc32/power7/memset.S: Likewise.
* PowerPC LE memcpyAlan Modra2013-10-049-410/+928
| | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00103.html LIttle-endian support for memcpy. I spent some time cleaning up the 64-bit power7 memcpy, in order to avoid the extra alignment traps power7 takes for little-endian. It probably would have been better to copy the linux kernel version of memcpy. * sysdeps/powerpc/powerpc32/power4/memcpy.S: Add little endian support. * sysdeps/powerpc/powerpc32/power6/memcpy.S: Likewise. * sysdeps/powerpc/powerpc32/power7/memcpy.S: Likewise. * sysdeps/powerpc/powerpc32/power7/mempcpy.S: Likewise. * sysdeps/powerpc/powerpc64/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/mempcpy.S: Likewise. Make better use of regs. Use power7 mtocrf. Tidy function tails.
* PowerPC LE memcmpAlan Modra2013-10-044-1893/+3451
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00102.html This is a rather large patch due to formatting and renaming. The formatting changes were to make it possible to compare power7 and power4 versions of memcmp. Using different register defines came about while I was wrestling with the code, trying to find spare registers at one stage. I found it much simpler if we refer to a reg by the same name throughout a function, so it's better if short-term multiple use regs like rTMP are referred to using their register number. I made the cr field usage changes when attempting to reload rWORDn regs in the exit path to byte swap before comparing when little-endian. That proved a bad idea due to the pipelining involved in the main loop; Offsets to reload the regs were different first time around the loop.. Anyway, I left the cr field usage changes in place for consistency. Aside from these more-or-less cosmetic changes, I fixed a number of places where an early exit path restores regs unnecessarily, removed some dead code, and optimised one or two exits. * sysdeps/powerpc/powerpc64/power7/memcmp.S: Add little-endian support. Formatting. Consistently use rXXX register defines or rN defines. Use early exit labels that avoid restoring unused non-volatile regs. Make cr field use more consistent with rWORDn compares. Rename regs used as shift registers for unaligned loop, using rN defines for short lifetime/multiple use regs. * sysdeps/powerpc/powerpc64/power4/memcmp.S: Likewise. * sysdeps/powerpc/powerpc32/power7/memcmp.S: Likewise. Exit with addi 1,1,64 to pop stack frame. Simplify return value code. * sysdeps/powerpc/powerpc32/power4/memcmp.S: Likewise.
* PowerPC LE strchrAlan Modra2013-10-046-74/+212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00101.html Adds little-endian support to optimised strchr assembly. I've also tweaked the big-endian code a little. In power7/strchr.S there's a check in the tail of the function that we didn't match 0 before finding a c match, done by comparing leading zero counts. It's just as valid, and quicker, to compare the raw output from cmpb. Another little tweak is to use rldimi/insrdi in place of rlwimi for the power7 strchr functions. Since rlwimi is cracked, it is a few cycles slower. rldimi can be used on the 32-bit power7 functions too. * sysdeps/powerpc/powerpc64/power7/strchr.S (strchr): Add little-endian support. Correct typos, formatting. Optimize tail. Use insrdi rather than rlwimi. * sysdeps/powerpc/powerpc32/power7/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strchrnul.S (__strchrnul): Add little-endian support. Correct typos. * sysdeps/powerpc/powerpc32/power7/strchrnul.S: Likewise. Use insrdi rather than rlwimi. * sysdeps/powerpc/powerpc64/strchr.S (rTMP4, rTMP5): Define. Use in loop and entry code to keep "and." results. (strchr): Add little-endian support. Comment. Move cntlzd earlier in tail. * sysdeps/powerpc/powerpc32/strchr.S: Likewise.
* PowerPC LE strcpyAlan Modra2013-10-044-3/+78
| | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00100.html The strcpy changes for little-endian are quite straight-forward, just a matter of rotating the last word differently. I'll note that the powerpc64 version of stpcpy is just begging to be converted to use 64-bit loads and stores.. * sysdeps/powerpc/powerpc64/strcpy.S: Add little-endian support: * sysdeps/powerpc/powerpc32/strcpy.S: Likewise. * sysdeps/powerpc/powerpc64/stpcpy.S: Likewise. * sysdeps/powerpc/powerpc32/stpcpy.S: Likewise.
* PowerPC LE strcmp and strncmpAlan Modra2013-10-048-81/+380
| | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00099.html More little-endian support. I leave the main strcmp loops unchanged, (well, except for renumbering rTMP to something other than r0 since it's needed in an addi insn) and modify the tail for little-endian. I noticed some of the big-endian tail code was a little untidy so have cleaned that up too. * sysdeps/powerpc/powerpc64/strcmp.S (rTMP2): Define as r0. (rTMP): Define as r11. (strcmp): Add little-endian support. Optimise tail. * sysdeps/powerpc/powerpc32/strcmp.S: Similarly. * sysdeps/powerpc/powerpc64/strncmp.S: Likewise. * sysdeps/powerpc/powerpc32/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power4/strncmp.S: Likewise. * sysdeps/powerpc/powerpc32/power4/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strncmp.S: Likewise. * sysdeps/powerpc/powerpc32/power7/strncmp.S: Likewise.
* PowerPC LE strnlenAlan Modra2013-10-042-102/+115
| | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00098.html The existing strnlen code has a number of defects, so this patch is more than just adding little-endian support. The changes here are similar to those for memchr. * sysdeps/powerpc/powerpc64/power7/strnlen.S (strnlen): Add little-endian support. Remove unnecessary "are we done" tests. Handle "s" wrapping around zero and extremely large "size". Correct main loop count. Handle single left-over word from main loop inline rather than by using small_loop. Correct comments. Delete "zero" tail, use "end_max" instead. * sysdeps/powerpc/powerpc32/power7/strnlen.S: Likewise.
* PowerPC LE strlenAlan Modra2013-10-044-47/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00097.html This is the first of nine patches adding little-endian support to the existing optimised string and memory functions. I did spend some time with a power7 simulator looking at cycle by cycle behaviour for memchr, but most of these patches have not been run on cpu simulators to check that we are going as fast as possible. I'm sure PowerPC can do better. However, the little-endian support mostly leaves main loops unchanged, so I'm banking on previous authors having done a good job on big-endian.. As with most code you stare at long enough, I found some improvements for big-endian too. Little-endian support for strlen. Like most of the string functions, I leave the main word or multiple-word loops substantially unchanged, just needing to modify the tail. Removing the branch in the power7 functions is just a tidy. .align produces a branch anyway. Modifying regs in the non-power7 functions is to suit the new little-endian tail. * sysdeps/powerpc/powerpc64/power7/strlen.S (strlen): Add little-endian support. Don't branch over align. * sysdeps/powerpc/powerpc32/power7/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/strlen.S (strlen): Add little-endian support. Rearrange tmp reg use to suit. Comment. * sysdeps/powerpc/powerpc32/strlen.S: Likewise.
* PowerPC SIGSTKSZAlan Modra2013-10-041-0/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00093.html This copies the sparc version of sigstack.h, which gives powerpc #define MINSIGSTKSZ 4096 #define SIGSTKSZ 16384 Before the VSX changes, struct rt_sigframe size was 1920 plus 128 for __SIGNAL_FRAMESIZE giving ppc64 exactly the default MINSIGSTKSZ of 2048. After VSX, ucontext increased by 256 bytes. Oops, we're over MINSIGSTKSZ, so powerpc has been using the wrong value for quite a while. Add another ucontext for TM and rt_sigframe is now at 3872, giving actual MINSIGSTKSZ of 4000. The glibc testcase that I was looking at was tst-cancel21, which allocates 2*SIGSTKSZ (not because the test is trying to be conservative, but because the test actually has nested signal stack frames). We blew the allocation by 48 bytes when using current mainline gcc to compile glibc (le ppc64). The required stack depth in _dl_lookup_symbol_x from the top of the next signal frame was 10944 bytes. I guess you'd want to add 288 to that, implying an actual SIGSTKSZ of 11232. * sysdeps/unix/sysv/linux/powerpc/bits/sigstack.h: New file.
* PowerPC makecontextAlan Modra2013-10-042-4/+10
| | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00092.html Use conditional form of branch and link to avoid destroying the cpu link stack used to predict blr return addresses. * sysdeps/unix/sysv/linux/powerpc/powerpc32/makecontext.S: Use conditional form of branch and link when obtaining pc. * sysdeps/unix/sysv/linux/powerpc/powerpc64/makecontext.S: Likewise.
* PowerPC LE _dl_hwcap accessAlan Modra2013-10-043-16/+16
| | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00091.html More LE support, correcting word accesses to _dl_hwcap. * sysdeps/unix/sysv/linux/powerpc/powerpc32/getcontext-common.S: Use HIWORD/LOWORD. * sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S: Ditto. * sysdeps/unix/sysv/linux/powerpc/powerpc32/swapcontext-common.S: Ditto.
* PowerPC ugly symbol versioningAlan Modra2013-10-049-29/+23
| | | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00090.html This patch fixes symbol versioning in setjmp/longjmp. The existing code uses raw versions, which results in wrong symbol versioning when you want to build glibc with a base version of 2.19 for LE. Note that the merging the 64-bit and 32-bit versions in novmx-lonjmp.c and pt-longjmp.c doesn't result in GLIBC_2.0 versions for 64-bit, due to the base in shlib_versions. * sysdeps/powerpc/longjmp.c: Use proper symbol versioning macros. * sysdeps/powerpc/novmx-longjmp.c: Likewise. * sysdeps/powerpc/powerpc32/bsd-_setjmp.S: Likewise. * sysdeps/powerpc/powerpc32/bsd-setjmp.S: Likewise. * sysdeps/powerpc/powerpc32/fpu/__longjmp.S: Likewise. * sysdeps/powerpc/powerpc32/fpu/setjmp.S: Likewise. * sysdeps/powerpc/powerpc32/mcount.c: Likewise. * sysdeps/powerpc/powerpc32/setjmp.S: Likewise. * sysdeps/powerpc/powerpc64/setjmp.S: Likewise. * nptl/sysdeps/unix/sysv/linux/powerpc/pt-longjmp.c: Likewise.
* PowerPC LE setjmp/longjmpAnton Blanchard2013-10-045-85/+78
| | | | | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00089.html Little-endian fixes for setjmp/longjmp. When writing these I noticed the setjmp code corrupts the non volatile VMX registers when using an unaligned buffer. Anton fixed this, and also simplified it quite a bit. The current code uses boilerplate for the case where we want to store 16 bytes to an unaligned address. For that we have to do a read/modify/write of two aligned 16 byte quantities. In our case we are storing a bunch of back to back data (consective VMX registers), and only the start and end of the region need the read/modify/write. [BZ #15723] * sysdeps/powerpc/jmpbuf-offsets.h: Comment fix. * sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S: Correct _dl_hwcap access for little-endian. * sysdeps/powerpc/powerpc32/fpu/setjmp-common.S: Likewise. Don't destroy vmx regs when saving unaligned. * sysdeps/powerpc/powerpc64/__longjmp-common.S: Correct CR load. * sysdeps/powerpc/powerpc64/setjmp-common.S: Likewise CR save. Don't destroy vmx regs when saving unaligned.
* PowerPC floating point little-endian [15 of 15]Alan Modra2013-10-041-12/+9
| | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-07/msg00206.html The union loses when little-endian. * sysdeps/powerpc/powerpc32/power4/hp-timing.h (HP_TIMING_NOW): Don't use a union to pack hi/low value.
* PowerPC floating point little-endian [14 of 15]Anton Blanchard2013-10-046-7/+19
| | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-07/msg00205.html These all wrongly specified float constants in a 64-bit word. * sysdeps/powerpc/powerpc64/fpu/s_ceilf.S: Correct float constants for little-endian. * sysdeps/powerpc/powerpc64/fpu/s_floorf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_roundf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_truncf.S: Likewise.
* PowerPC floating point little-endian [13 of 15]Alan Modra2013-10-042-13/+10
| | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00088.html * sysdeps/powerpc/powerpc32/fpu/s_roundf.S: Increase alignment of constants to usual value for .cst8 section, and remove redundant high address load. * sysdeps/powerpc/powerpc32/power4/fpu/s_llround.S: Use float constant for 0x1p52. Load little-endian words of double from correct stack offsets.
* PowerPC floating point little-endian [12 of 15]Alan Modra2013-10-0419-38/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00087.html Fixes for little-endian in 32-bit assembly. * sysdeps/powerpc/sysdep.h (LOWORD, HIWORD, HISHORT): Define. * sysdeps/powerpc/powerpc32/fpu/s_copysign.S: Load little-endian words of double from correct stack offsets. * sysdeps/powerpc/powerpc32/fpu/s_copysignl.S: Likewise. * sysdeps/powerpc/powerpc32/fpu/s_lrint.S: Likewise. * sysdeps/powerpc/powerpc32/fpu/s_lround.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/s_llrintf.S: Likewise. * sysdeps/powerpc/powerpc32/power5+/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc32/power5+/fpu/s_lround.S: Likewise. * sysdeps/powerpc/powerpc32/power5/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc32/power6/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc32/power6/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc32/power6/fpu/s_llrintf.S: Likewise. * sysdeps/powerpc/powerpc32/power6/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S: Use HISHORT. * sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S: Likewise.
* PowerPC floating point little-endian [11 of 15]Alan Modra2013-10-042-57/+62
| | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-07/msg00202.html Another little-endian fix. * sysdeps/powerpc/fpu_control.h (_FPU_GETCW): Rewrite using 64-bit int/double union. (_FPU_SETCW): Likewise. * sysdeps/powerpc/fpu/tst-setcontext-fpscr.c (_GET_DI_FPSCR): Likewise. (_SET_DI_FPSCR, _GET_SI_FPSCR, _SET_SI_FPSCR): Likewise.
* PowerPC floating point little-endian [10 of 15]Alan Modra2013-10-042-34/+32
| | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-07/msg00201.html These two functions oddly test x+1>0 when a double x is >= 0.0, and similarly when x is negative. I don't see the point of that since the test should always be true. I also don't see any need to convert x+1 to integer rather than simply using xr+1. Note that the standard allows these functions to return any value when the input is outside the range of long long, but it's not too hard to prevent xr+1 overflowing so that's what I've done. (With rounding mode FE_UPWARD, x+1 can be a lot more than what you might naively expect, but perhaps that situation was covered by the x - xrf < 1.0 test.) * sysdeps/powerpc/fpu/s_llround.c (__llround): Rewrite. * sysdeps/powerpc/fpu/s_llroundf.c (__llroundf): Rewrite.
* PowerPC floating point little-endian [9 of 15]Alan Modra2013-10-041-25/+29
| | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-07/msg00200.html This works around the fact that vsx is disabled in current little-endian gcc. Also, float constants take 4 bytes in memory vs. 16 bytes for vector constants, and we don't need to write one lot of masks for double (register format) and another for float (mem format). * sysdeps/powerpc/fpu/s_float_bitwise.h (__float_and_test28): Don't use vector int constants. (__float_and_test24, __float_and8, __float_get_exp): Likewise.
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