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* Fix sign of remquo zero remainder in round-downward mode (bug 17987).Joseph Myers2015-02-176-0/+18
| | | | | | | | | | | | | | | | | | | | | | Various remquo implementations produce a zero remainder with the wrong sign (a zero remainder should always have the sign of the first argument, as specified in IEEE 754) in round-downward mode, resulting from the sign of 0 - 0. This patch checks for zero results and fixes their sign accordingly. Tested for x86_64, x86, mips64 and powerpc. [BZ #17987] * sysdeps/ieee754/dbl-64/s_remquo.c (__remquo): Ensure sign of zero result does not depend on the sign resulting from subtraction. * sysdeps/ieee754/dbl-64/wordsize-64/s_remquo.c (__remquo): Likewise. * sysdeps/ieee754/flt-32/s_remquof.c (__remquof): Likewise. * sysdeps/ieee754/ldbl-128/s_remquol.c (__remquol): Likewise. * sysdeps/ieee754/ldbl-128ibm/s_remquol.c (__remquol): Likewise. * sysdeps/ieee754/ldbl-96/s_remquol.c (__remquol): Likewise. * math/libm-test.inc (remquo_test_data): Add more tests.
* Fix remquo spurious overflows (bug 17978).Joseph Myers2015-02-166-12/+12
| | | | | | | | | | | | | | | | | | | | | | | Various remquo implementations, when computing the last three bits of the quotient, have spurious overflows when 4 times the second argument to remquo overflows. These overflows can in turn cause bad results in rounding modes where that overflow results in a finite value. This patch adds tests to avoid the problem multiplications in cases where they would overflow, similar to those that control an earlier multiplication by 8. Tested for x86_64, x86, mips64 and powerpc. [BZ #17978] * sysdeps/ieee754/dbl-64/s_remquo.c (__remquo): Do not form products 4 * y and 2 * y where those would overflow. * sysdeps/ieee754/dbl-64/wordsize-64/s_remquo.c (__remquo): Likewise. * sysdeps/ieee754/flt-32/s_remquof.c (__remquof): Likewise. * sysdeps/ieee754/ldbl-128/s_remquol.c (__remquol): Likewise. * sysdeps/ieee754/ldbl-128ibm/s_remquol.c (__remquol): Likewise. * sysdeps/ieee754/ldbl-96/s_remquol.c (__remquol): Likewise. * math/libm-test.inc (remquo_test_data): Add more tests.
* Fix MIPS _ABIO64 -Werror=undef build.Joseph Myers2015-02-161-0/+4
| | | | | | | | | | | | | | | | I see an error ../sysdeps/mips/memcpy.S:209:68: error: "_ABIO64" is not defined [-Werror=undef] #if defined(_MIPS_SIM) && ((_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABIO64)) ^ cc1: some warnings being treated as errors in MIPS builds. This patch arranges for _ABIO64 to be defined with the same value as GCC uses when building for O64 (the ABI itself isn't supported by glibc, but defining the macro seems the simplest way of avoiding the error in code that may be shared with other C libraries). * sysdeps/mips/sgidefs.h [!_ABIO64] (_ABIO64): New macro.
* Fix MIPS _COMPILING_NEWLIB -Werror=undef build.Joseph Myers2015-02-163-3/+3
| | | | | | | | | | | | | | | | | | | | | | I see an error ../sysdeps/mips/strcmp.S:25:7: error: "_COMPILING_NEWLIB" is not defined [-Werror=undef] #elif _COMPILING_NEWLIB ^ cc1: some warnings being treated as errors in MIPS builds. (This is with GCC 4.9; it's possible that the DR#412 change in GCC 5 - see <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60570> - means that -Wundef diagnostics no longer occur for #elif conditions where a previous group's condition was true, just as with other errors there.) This patch duly adjusts the conditionals to test whether _COMPILING_NEWLIB is defined. * sysdeps/mips/memcpy.S [_COMPILING_NEWLIB]: Change condition to [defined _COMPILING_NEWLIB]. * sysdeps/mips/memset.S [_COMPILING_NEWLIB]: Likewise. * sysdeps/mips/strcmp.S [_COMPILING_NEWLIB]: Likewise.
* Fix MIPS __mips_isa_rev -Werror=undef build.Joseph Myers2015-02-161-1/+1
| | | | | | | | | | | | | | | | | | | | I see an error In file included from ../sysdeps/mips/include/sys/asm.h:20:0, from ../sysdeps/mips/start.S:39: ../sysdeps/mips/sys/asm.h:421:5: error: "__mips_isa_rev" is not defined [-Werror=undef] #if __mips_isa_rev < 6 ^ cc1: some warnings being treated as errors in MIPS builds. As sys/asm.h is an installed header, it seems better to test for !defined __mips_isa_rev here, instead of defining it to 0 as done in sysdeps/unix/mips/sysdep.h, to avoid perturbing any code outside glibc that tests whether __mips_isa_rev is defined; this patch does so. * sysdeps/mips/sys/asm.h [__mips_isa_rev < 6]: Change condition to [!defined __mips_isa_rev || __mips_isa_rev < 6].
* ia64: remove fixed page size macros and others [BZ #17792]Matthew Fortune2015-02-151-6/+0
| | | | | | | | | | | | Remove IA64 PAGE_SIZE related macros as PAGE_SIZE is not defined. Also remove macros that are only used for BFD's trad-core support which is not relavant for IA64 according to the thread starting here: https://sourceware.org/ml/libc-ports/2013-11/msg00028.html This patch is neither built nor tested but is equivalent to a MIPS patch for the same fix.
* 2015-02-13 Steve Ellcey <sellcey@imgtec.com>Steve Ellcey2015-02-133-6/+6
| | | | | | * sysdeps/mips/bits/endian.h (__MIPSEB): Use #ifdef instead of #if. * sysdeps/mips/memcpy.S (__MIPSEB): Ditto. * sysdeps/mips/memset.S (__MIPSEB): Ditto.
* Add placeholder c++-types.data and *.abilist files.Roland McGrath2015-02-1311-0/+22
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* Fix dbl-64/wordsize-64 remquo (bug 17569).Joseph Myers2015-02-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dbl-64/wordsize-64 remquo implementation follows similar logic to various other implementations, but where that logic computes some absolute values, it wrongly uses a previously computed bit-pattern for the absolute value of the first argument, where actually it needs the absolute value of the first argument mod 8 times the second. This patch fixes it to compute the correct absolute value. The integer quotient result of remquo is only specified mod 8 (including its sign); architecture-specific versions may well vary in what results they give for higher bits of that result (and indeed bug 17569 gives an example correct result from __builtin_remquo giving 9 for that result, where the particular glibc implementation used in that bug report would give 1 after this fix). Thus, this patch adapts the tests of remquo to test that result only mod 8, to allow for such variation when tests with higher quotient are included. Tested for x86_64 and x86. [BZ #17569] * sysdeps/ieee754/dbl-64/wordsize-64/s_remquo.c (__remquo): Compute absolute value of x as modified by fmod, not original value of x. * math/libm-test.inc (RUN_TEST_ffI_f1): Rename to RUN_TEST_ffI_f1_mod8. Check extra return value mod 8. (RUN_TEST_LOOP_ffI_f1): Rename to RUN_TEST_LOOP_ffI_f1_mod8. Call RUN_TEST_ffI_f1_mod8. (remquo_test_data): Add more tests.
* NPTL: Initializer for .init_array-only configurations.Roland McGrath2015-02-131-0/+23
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* Fix powerpc software sqrtf (bug 17967).Joseph Myers2015-02-131-11/+13
| | | | | | | | | | | | | | | | | | | Similarly to sqrt in <https://sourceware.org/ml/libc-alpha/2015-02/msg00353.html>, the powerpc sqrtf implementation for when _ARCH_PPCSQ is not defined also relies on a * b + c being contracted into a fused multiply-add. Although this contraction is not explicitly disabled for e_sqrtf.c, it still seems appropriate to make the file explicit about its requirements by using __builtin_fmaf; this patch does so. Furthermore, it turns out that doing so fixes the observed inaccuracy and missing exceptions (that is, that without explicit __builtin_fmaf usage, it was not being compiled as intended). Tested for powerpc32 (hard float). [BZ #17967] * sysdeps/powerpc/fpu/e_sqrtf.c (__slow_ieee754_sqrtf): Use __builtin_fmaf instead of relying on contraction of a * b + c.
* Fix powerpc software sqrt (bug 17964).Joseph Myers2015-02-121-15/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As Adhemerval noted in <https://sourceware.org/ml/libc-alpha/2015-01/msg00451.html>, the powerpc sqrt implementation for when _ARCH_PPCSQ is not defined is inaccurate in some cases. The problem is that this code relies on fused multiply-add, and relies on the compiler contracting a * b + c to get a fused operation. But sysdeps/ieee754/dbl-64/Makefile disables contraction for e_sqrt.c, because the implementation in that directory relies on *not* having contracted operations. While it would be possible to arrange makefiles so that an earlier sysdeps directory can disable the setting in sysdeps/ieee754/dbl-64/Makefile, it seems a lot cleaner to make the dependence on fused operations explicit in the .c file. GCC 4.6 introduced support for __builtin_fma on powerpc and other architectures with such instructions, so we can rely on that; this patch duly makes the code use __builtin_fma for all such fused operations. Tested for powerpc32 (hard float). 2015-02-12 Joseph Myers <joseph@codesourcery.com> [BZ #17964] * sysdeps/powerpc/fpu/e_sqrt.c (__slow_ieee754_sqrt): Use __builtin_fma instead of relying on contraction of a * b + c.
* Use -Werror=undef for assembly code.Roland McGrath2015-02-122-8/+8
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* Fix exp2 spurious underflows (bug 16560).Joseph Myers2015-02-124-2/+24
| | | | | | | | | | | | | | | | | | | | | | This patch fixes the remaining part of bug 16560, spurious underflows from exp2 of arguments close to 0 (when the result is close to 1, so should not underflow), by just using 1+x instead of a more complicated calculation when the argument is sufficiently small. Tested for x86_64, x86 and mips64. [BZ #16560] * math/e_exp2l.c [LDBL_MANT_DIG == 106] (LDBL_EPSILON): Undefine and redefine. (__ieee754_exp2l): Do not multiply small fractional parts by M_LN2l. * sysdeps/i386/fpu/e_exp2l.S (__ieee754_exp2l): Just add 1 to small argument. * sysdeps/ieee754/dbl-64/e_exp2.c (__ieee754_exp2): Likewise. * sysdeps/ieee754/flt-32/e_exp2f.c (__ieee754_exp2f): Likewise. * sysdeps/x86_64/fpu/e_exp2l.S (__ieee754_exp2l): Likewise. * math/auto-libm-test-in: Add more tests of exp2. * math/auto-libm-test-out: Regenerated.
* powerpc: POWER7 strncpy optimization for unaligned stringRajalakshmi Srinivasaraghavan2015-02-121-2/+378
| | | | | | | | | | | | | This patch optimizes strncpy for power7 for unaligned source or destination address. The source or destination address is aligned to doubleword and data is shifted based on the alignment and added with the previous loaded data to be written as a doubleword. For each load, cmpb instruction is used for faster null check. The new optimization shows 10 to 70% of performance improvement for longer string though it does not show big difference on string size less than 16 due to additional checks.Hence this new algorithm is restricted to string greater than 16.
* powerpc: Fix TABORT encoding for little endianAdhemerval Zanella2015-02-121-1/+1
| | | | | This patch fix the TABORT encoding for toolchains with no support for HTM builtins.
* Fix sincos errno setting (bug 15467).Joseph Myers2015-02-115-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | This patch makes sincos set errno to EDOM when passed an infinity, similarly to sin and cos. Tested for x86_64, x86, powerpc and mips64. I don't know if the architecture-specific implementations for ia64 and m68k might need corresponding fixes. 2015-02-11 Joseph Myers <joseph@codesourcery.com> [BZ #15467] * sysdeps/ieee754/dbl-64/s_sincos.c: Include <errno.h>. (__sincos): Set errno to EDOM for infinite argument. * sysdeps/ieee754/flt-32/s_sincosf.c: Include <errno.h>. (SINCOSF_FUNC): Set errno to EDOM for infinite argument. * sysdeps/ieee754/ldbl-128/s_sincosl.c: Include <errno.h>. (__sincosl): Set errno to EDOM for infinite argument. * sysdeps/ieee754/ldbl-128ibm/s_sincosl.c: Include <errno.h>. (__sincosl): Set errno to EDOM for infinite argument. * sysdeps/ieee754/ldbl-96/s_sincosl.c: Include <errno.h>. (__sincosl): Set errno to EDOM for infinite argument. * math/libm-test.inc (sincos_test_data): Test errno setting.
* Remove sysdeps/mips soft-fp subdirectories.Joseph Myers2015-02-107-3/+0
| | | | | | | | | | | | | | | | | | | | | | | As noted in <https://sourceware.org/ml/libc-alpha/2014-10/msg00369.html>, soft-fp sysdeps subdirectories (and more generally, subdirectories where sysdeps/foo/Implies contains foo/bar) are unnecessary and should be eliminated. This patch does so for MIPS. Tested for MIPS64 (all three ABIs, soft-float) that installed stripped shared libraries are unchanged by this patch. * sysdeps/mips/soft-fp/sfp-machine.h: Move to .... * sysdeps/mips/mips32/sfp-machine.h: ... here. * sysdeps/mips/mips64/soft-fp/Makefile: Move to .... * sysdeps/mips/mips64/Makefile: ... here. * sysdeps/mips/mips64/soft-fp/e_sqrtl.c: Move to .... * sysdeps/mips/mips64/e_sqrtl.c: ... here. * sysdeps/mips/mips64/soft-fp/sfp-machine.h: Move to .... * sysdeps/mips/mips64/sfp-machine.h: ... here. * sysdeps/mips/mips32/Implies: Remove mips/soft-fp. * sysdeps/mips/mips64/n32/Implies: Remove mips/mips64/soft-fp. * sysdeps/mips/mips64/n64/Implies: Likewise.
* Fix __memcpy_chk on non-SSE2 CPUsEvangelos Foutras2015-02-101-2/+2
| | | | | In commit 8b4416d, the 1: jump label in __mempcpy_chk was accidentally moved. This resulted in failures of mempcpy on CPU without SSE2.
* powerpc: drop R_PPC_REL16 checkAdhemerval Zanella2015-02-102-44/+0
| | | | | Current minimum support binutils (2.22) supports R_PPC_REL16 as default, so no need to extra configure checks.
* powerpc: sysdeps/powerpc configure cleanupAdhemerval Zanella2015-02-102-54/+0
| | | | | | Current minimum binutils supported (2.22) has ".machine altivec" support as default, so there is no need to add a configure check for such functionality. This patches removes the configure checks for it.
* powerpc: wordcopy/memmove cleanup for ppc32Adhemerval Zanella2015-02-097-119/+32
| | | | | | | | This patch cleanup some multiarch code related to memmmove optimization. Initial IFUNC support added specialized wordcopy symbols which turned in local IFUNC calls used by memmove default implementation. The patch removes the internal IFUNC for wordcopy symbols and uses local branches in the memmmove optimization instead.
* powerpc: multiarch Makefile cleanup for powerpc32Adhemerval Zanella2015-02-091-4/+10
| | | | | This patch cleanups the multiarch Makefile by putting the wide chars implementation to correct wcsmbs rule.
* powerpc: wordcopy/memmove cleanup for ppc64Adhemerval Zanella2015-02-095-95/+23
| | | | | | | | | | This patch cleanup some multiarch code related to memmmove optimization. Initial IFUNC support added specialized wordcopy symbols which turned in local IFUNC calls used by memmove default implementation. This change by removing then and used the optimized memmove instead for supported chips.
* powerpc: Remove POWER7 wordcopy ifuncAdhemerval Zanella2015-02-093-45/+9
| | | | | | This patch remove the POWER7 ifunc wordcopy function (_wordcopy_*_power7), since now GLIBC provides a optimized memmove/bcopy for POWER7.
* powerpc: Simplify bcopy default implementationAdhemerval Zanella2015-02-091-4/+6
| | | | | | This patch simplify the default bcopy symbol for powerpc64 by just using memmove instead of implementing using the default bcopy. Since the symbol is deprecated, it trades speed by code size.
* powerpc: multiarch Makefile cleanup for powerpc64Adhemerval Zanella2015-02-091-5/+10
| | | | | This patch cleanups the multiarch Makefile by putting the wide chars implementation to correct wcsmbs rule.
* Fix value of O_TMPFILE for architectures with non-default O_DIRECTORY (bug ↵Andreas Schwab2015-02-091-1/+1
| | | | 17912)
* hurd: fix unwind-resume.c buildSamuel Thibault2015-02-081-0/+4
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* hurd: fix unwind-resume.c buildSamuel Thibault2015-02-081-0/+4
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* hurd: fix tls.h buildSamuel Thibault2015-02-081-0/+2
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* hurd: Ignore bytes beyond sockaddr length for AF_UNIXSamuel Thibault2015-02-084-8/+12
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* hurd: add basic types for ioctlsSamuel Thibault2015-02-071-1/+22
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* hurd: support mmap with PROT_NONESamuel Thibault2015-02-071-2/+9
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* hurd: fix f?chflags prototypes, declare them and their flagsSamuel Thibault2015-02-073-3/+31
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* hurd: fix build with pthread aioSamuel Thibault2015-02-071-1/+4
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* ARM: Add missing sfi_breg in LDR_GLOBAL macro.Roland McGrath2015-02-061-2/+2
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* NPTL: Build tests using clone directly only for Linux.Roland McGrath2015-02-064-1/+225
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* x86: Clean up __vdso_clock_gettime variable.Roland McGrath2015-02-066-232/+6
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* Clean up sysdep-dl-routines variable.Roland McGrath2015-02-0612-24/+4
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* hppa: Sync with pthread.h.Carlos O'Donell2015-02-061-1/+1146
| | | | | | | | This reverts part of the previous commit to refactor pthread.h. The refactoring must be done by having pthread.h include arch bits headers, not the other way around. Then hppa provides the arch bits header. For now we synchronzie again with pthread.h and include the entire contents in the hppa copy.
* glibc 2.21 pre-release update.Carlos O'Donell2015-02-052-3/+3
| | | | | | | | | | | | Update all translations. Update contributions in the manual. Update installation notes with information about newest working tools. Reconfigure using exactly autoconf 2.69. Regenerate INSTALL.
* hppa: Remove warnings and fix conformance errors.Carlos O'Donell2015-02-0513-1212/+131
| | | | | | | | | | | | | | | | | (1) Fix warnings. This is a bulk update to fix all the warnings that were causing build failures with -Werror on hppa. The most egregious problems are in dl-fptr.c which needs to be entirely rewritten, thus I've used -Wno-error for that. (2) Fix conformance errors. The sysdep.c file had __syscall_error and syscall in one file which caused conformance issues by including syscall when __syscall_error was linked to. The fix is obviously to split the file and use syscall.c to implement syscall.
* Function name typo error in non-PIC case, fixed in this patch.Chung-Lin Tang2015-02-051-1/+1
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* Fix two bugs in sparc atomics.David S. Miller2015-01-311-7/+8
| | | | | | | | * sysdeps/sparc/sparc32/bits/atomic.h (__sparc32_atomic_do_unlock24): Put the memory barrier before the unlock not after it. (__v9_compare_and_exchange_val_32_acq): Use unions to avoid getting volatile register usage warnings from the compiler.
* Fix sparc semaphore implementation after recent changes.David S. Miller2015-01-3117-703/+668
| | | | | | | | | | | | | | | | | | | | | | | | * sysdeps/sparc/nptl/sem_init.c: Delete. * sysdeps/sparc/nptl/sem_post.c: Delete. * sysdeps/sparc/nptl/sem_timedwait.c: Delete. * sysdeps/sparc/nptl/sem_wait.c: Delete. * sysdeps/sparc/sparc32/sem_init.c: New file. * sysdeps/sparc/sparc32/sem_waitcommon.c: New file. * sysdeps/sparc/sparc32/sem_open.c: Generic nptl version with padding explicitly initialized. * sysdeps/sparc/sparc32/sem_post.c: Generic nptl version using padding for in-semaphore spinlock. * sysdeps/sparc/sparc32/sem_wait.c: Likewise. * sysdeps/sparc/sparc32/sem_trywait.c: Delete. * sysdeps/sparc/sparc32/sem_timedwait.c: Delete. * sysdeps/sparc/sparc32/sparcv9/sem_init.c: New file. * sysdeps/sparc/sparc32/sparcv9/sem_open.c: New file. * sysdeps/sparc/sparc32/sparcv9/sem_post.c: New file. * sysdeps/sparc/sparc32/sparcv9/sem_waitcommon.c: New file. * sysdeps/sparc/sparc32/sparcv9/sem_wait.c: Redirect to nptl version. * sysdeps/sparc/sparc32/sparcv9/sem_timedwait.c: Delete. * sysdeps/sparc/sparc32/sparcv9/sem_trywait.c: Delete.
* Use AVX unaligned memcpy only if AVX2 is availableH.J. Lu2015-01-308-8/+17
| | | | | | | | | | | | | | | | | | | | | | memcpy with unaligned 256-bit AVX register loads/stores are slow on older processorsl like Sandy Bridge. This patch adds bit_AVX_Fast_Unaligned_Load and sets it only when AVX2 is available. [BZ #17801] * sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features): Set the bit_AVX_Fast_Unaligned_Load bit for AVX2. * sysdeps/x86_64/multiarch/init-arch.h (bit_AVX_Fast_Unaligned_Load): New. (index_AVX_Fast_Unaligned_Load): Likewise. (HAS_AVX_FAST_UNALIGNED_LOAD): Likewise. * sysdeps/x86_64/multiarch/memcpy.S (__new_memcpy): Check the bit_AVX_Fast_Unaligned_Load bit instead of the bit_AVX_Usable bit. * sysdeps/x86_64/multiarch/memcpy_chk.S (__memcpy_chk): Likewise. * sysdeps/x86_64/multiarch/mempcpy.S (__mempcpy): Likewise. * sysdeps/x86_64/multiarch/mempcpy_chk.S (__mempcpy_chk): Likewise. * sysdeps/x86_64/multiarch/memmove.c (__libc_memmove): Replace HAS_AVX with HAS_AVX_FAST_UNALIGNED_LOAD. * sysdeps/x86_64/multiarch/memmove_chk.c (__memmove_chk): Likewise.
* Include <signal.h> in sysdeps/nptl/allocrtsig.cAndreas Schwab2015-01-291-0/+1
| | | | | Architectures which don't use hp-timing-common.h don't include <signal.h> via <sys/param.h>.
* tilegx32: set __HAVE_64B_ATOMICS to 0Chris Metcalf2015-01-281-1/+9
| | | | | | This is because of alignment issues in the sem_t support. tilegx32 does in fact support 64-bit atomics and we will need to revisit this after the 2.21 freeze.
* Disable 64-bit atomics for MIPS n32.Joseph Myers2015-01-281-1/+1
| | | | | | | | | | | | | | | | | | This patch disables use of 64-bit atomics for MIPS n32 to fix the problems with unaligned semaphores. Before 64-bit atomics are used for anything for which such alignment issues do not arise, and before the addition of any new ILP32 ports with 64-bit semaphores for which the ABI can be set to have the greater alignment (AARCH64?), a better approach will need to be established that allows architectures to declare their 64-bit atomics availability accurately, without doing so causing inappropriate use of such atomics on unaligned semaphores. Tested for MIPS n32 that this fixes the nptl/tst-sem3 failure. * sysdeps/mips/bits/atomic.h [_MIPS_SIM == _ABIN32] (__HAVE_64B_ATOMICS): Define to 0.
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