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* Support multiarch for i686.H.J. Lu2009-07-313-11/+15
| | | | | | This patch adds multiarch support when configured for i686. I modified some x86-64 functions to support 32bit. I will contribute 32bit SSE string and memory functions later.
* Add support for x86-64 fma instruction.Ulrich Drepper2009-07-293-0/+90
| | | | Use it to implement fma and fmaf, if possible.
* Prepare use if IFUNC functions outside libc.so.Ulrich Drepper2009-07-292-2/+30
| | | | | | We use a callback function into libc.so to get access to the data structure with the information and have special versions of the test macros which automatically use this function.
* Refine testing for xmm/ymm register use in x86-64 ld.so.Ulrich Drepper2009-07-271-1/+0
| | | | | | | | | The test now takes the callgraph into account. Only code called during runtime relocation is affected by the limitation. We now determine the affected object files as closely as possible from the outside. This allowed to remove some the specializations for some of the string functions as they are only used in other code paths.
* Make sure no code in ld.so uses xmm/ymm registers on x86-64.Ulrich Drepper2009-07-262-0/+2
| | | | | | | | | | This patch introduces a test to make sure no function modifies the xmm/ymm registers. With the exception of the auditing functions. The test is probably too pessimistic. All code linked into ld.so is checked. Perhaps at some point the callgraph starting from _dl_fixup and _dl_profile_fixup is checked and we can start using faster SSE-using functions in parts of ld.so.
* Add SSE2 support to str{,n}cmp for x86-64.H.J. Lu2009-07-263-262/+109
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* Some some optimizations for x86-64 strcmp.H.J. Lu2009-07-251-9/+4
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* Optimize x86-64 SSE4.2 strcmp.Ulrich Drepper2009-07-251-0/+5
| | | | | The file contained some code which was never used. Don't compile it in.
* Perform test for Arom x86-64 in central place and handle it.Ulrich Drepper2009-07-232-11/+10
| | | | | | | There will be more than one function which, in multiarch mode, wants to use SSSE3. We should not test in each of them for Atoms with slow SSSE3. Instead, disable the SSSE3 bit in the startup code for such machines.
* Minor cleanups in x86-64 strstr.Ulrich Drepper2009-07-211-78/+55
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* Better check for optimization in new x86-64 strstr/strcasestr.Ulrich Drepper2009-07-201-11/+15
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* SSE4.2 strstr/strcasestr for x86-64.H.J. Lu2009-07-205-1/+519
| | | | | This patch implements SSE4.2 strstr/strcasestr, using Knuth-Morris-Pratt string searching algorithm.
* Minor cleanups in recently added files.Ulrich Drepper2009-07-032-79/+57
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* Align functions to 16-byte boundary.Ulrich Drepper2009-07-034-0/+4
| | | | | | Some of the new multi-arch string functions for x86-64 were not aligned to 16 byte boundarie,s possibly creating unnecessary cache line misses and delays.
* Add SSE4.2 support for strcspn, strpbrk, and strspn on x86-64.H.J. Lu2009-07-037-0/+776
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* Whitespace fixes in last patch.Ulrich Drepper2009-07-021-31/+31
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* SSSE3 strcpy/stpcpy for x86-64H.J. Lu2009-07-027-1/+1950
| | | | | | This patch adds SSSE3 strcpy/stpcpy. I got up to 4X speed up on Core 2 and Core i7. I disabled it on Atom since SSSE3 version is slower for shorter (<64byte) data.
* Fix little checkin problem in last patch.Ulrich Drepper2009-06-301-2/+2
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* Determine and store processor family and model on x86-64.H.J. Lu2009-06-303-8/+33
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* Clean up whitespaces in last patch.Ulrich Drepper2009-06-221-1/+1
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* Add SSE4.2 support for strcmp and strncmp on x86-64.H.J. Lu2009-06-225-0/+1695
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* Add SSE4.2 optimized rawmemchr implementation for x86-64.Ulrich Drepper2009-06-051-0/+93
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* Forgot some more cleanups for the SSE4.2 strlen on x86-64.Ulrich Drepper2009-06-051-2/+7
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* Add missing cleanups from SSE4.2 x86-64 strlen.Ulrich Drepper2009-06-051-3/+4
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* Optimize x86-64 strlen for SSE4.2.Ulrich Drepper2009-06-054-1/+104
| | | | | The SSE4.2 implementation is used in the DSO only. The patch also adds some infrastructure to be used in similar code later one.
* Fix up sched_cpucount in x86-64.Ulrich Drepper2009-05-311-13/+9
| | | | | Now that static executables can handle IFUNC functions don't exclude optimization for sched_cpucount for !SHARED.
* Simplify CPUID value handling.Ulrich Drepper2009-05-313-32/+15
| | | | | | | SO far Intel and AMD use exactly the same bits meaning the same things in CPUID index 1. Simplify the code. Should an architecture come along which doesn't use the same semantics then it must use a different index value than COMMON_CPUID_INDEX_1.
* * config.h.in (USE_MULTIARCH): Define.Ulrich Drepper2009-03-134-0/+180
* configure.in: Handle --enable-multi-arch. * elf/dl-runtime.c (_dl_fixup): Handle STT_GNU_IFUNC. (_dl_fixup_profile): Likewise. * elf/do-lookup.c (dl_lookup_x): Likewise. * sysdeps/x86_64/dl-machine.h: Handle STT_GNU_IFUNC. * elf/elf.h (STT_GNU_IFUNC): Define. * include/libc-symbols.h (libc_ifunc): Define. * sysdeps/x86_64/cacheinfo.c: If USE_MULTIARCH is defined, use the framework in init-arch.h to get CPUID values. * sysdeps/x86_64/multiarch/Makefile: New file. * sysdeps/x86_64/multiarch/init-arch.c: New file. * sysdeps/x86_64/multiarch/init-arch.h: New file. * sysdeps/x86_64/multiarch/sched_cpucount.c: New file. * config.make.in (experimental-malloc): Define. * configure.in: Handle --enable-experimental-malloc. * malloc/Makefile: Handle experimental-malloc flag. * malloc/malloc.c: Implement PER_THREAD and ATOMIC_FASTBINS features. * malloc/arena.c: Likewise. * malloc/hooks.c: Likewise. * malloc/malloc.h: Define M_ARENA_TEST and M_ARENA_MAX.
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