about summary refs log tree commit diff
path: root/sysdeps/x86_64/multiarch
Commit message (Expand)AuthorAgeFilesLines
* Make strcmp with unaligned load/store the default hjl/unalignedH.J. Lu2015-08-288-221/+2287
* Correct x86-64 memcpy/mempcpy multiarch selectorH.J. Lu2015-08-288-226/+634
* Remove x86-64 rtld-xxx.c and rtld-xxx.SH.J. Lu2015-08-252-2/+0
* Remove the unused IFUNC filesH.J. Lu2015-08-202-17/+0
* Move x86_64 init-arch.h to sysdeps/x86/init-arch.hH.J. Lu2015-08-201-22/+0
* Update x86_64 multiarch functions for <cpu-features.h>H.J. Lu2015-08-1321-174/+177
* Add _dl_x86_cpu_features to rtld_globalH.J. Lu2015-08-136-421/+5
* Compile {memcpy,strcmp}-sse2-unaligned.S only for libcH.J. Lu2015-08-052-0/+8
* This patch adds detection of availability for AVX512F and AVX512DQ ISAs.Andrew Senkevich2015-06-082-0/+34
* Use strspn/strcspn/strpbrk ifunc in internal calls.Ondřej Bílka2015-05-122-13/+0
* Use AVX unaligned memcpy only if AVX2 is availableH.J. Lu2015-01-308-8/+17
* Also treat model numbers 0x5a/0x5d as SilvermontH.J. Lu2015-01-231-0/+2
* Treat model numbers 0x4a/0x4d as SilvermontH.J. Lu2015-01-231-0/+2
* Update copyright dates with scripts/update-copyrights.Joseph Myers2015-01-0245-45/+45
* Remove NOT_IN_libcSiddhesh Poyarekar2014-11-2432-34/+34
* Fix misdetected Slow_SSE4_2 cpu feature bit (bug 17501)Andreas Schwab2014-10-271-4/+4
* Improve 64bit memcpy performance for Haswell CPU with AVX instructionLing Ma2014-07-3011-6/+458
* Enable AVX2 optimized memset only if -mavx2 worksH.J. Lu2014-07-144-14/+21
* Add ifunc tests for x86_64 memset_chk and memsetH.J. Lu2014-06-202-1/+12
* Remove sysdeps/x86_64/multiarch/rtld-strlen.SH.J. Lu2014-06-201-1/+0
* Add x86_64 memset optimized for AVX2Ling Ma2014-06-195-1/+275
* Fix -Wundef warning for FEATURE_INDEX_1.Carlos O'Donell2014-05-031-7/+6
* Detect if AVX2 is usableSihai Yao2014-04-173-0/+12
* Update copyright notices with scripts/update-copyrightsAllan McRae2014-01-0139-39/+39
* Update file name in x86_64 ifunc listAllan McRae2013-12-161-1/+1
* Add strstr with unaligned loads. Fixes bug 12100.Ondřej Bílka2013-12-148-494/+415
* Use p2align instead ALIGNOndřej Bílka2013-10-086-295/+274
* Faster strrchr.Ondřej Bílka2013-09-265-899/+2
* Faster strchr implementation.Ondřej Bílka2013-09-112-128/+0
* Add unaligned strcmp.Ondřej Bílka2013-09-034-2/+222
* Fix typos.Ondřej Bílka2013-08-301-1/+1
* Fix rawmemchr regression on bulldozer.Ondřej Bílka2013-08-302-109/+0
* Fix typos.Ondřej Bílka2013-08-211-2/+2
* Skip SSE4.2 versions on Intel SilvermontLiubov Dmitrieva2013-06-285-15/+37
* Fix buffers overrun in x86_64 memcmp-ssse3.SLiubov Dmitrieva2013-06-261-4/+2
* Set fast unaligned load flag for new Intel microarchitectureLiubov Dmitrieva2013-06-141-0/+7
* Faster memcpy on x64.Ondrej Bilka2013-05-204-8/+185
* Faster strlen on x64.Ondrej Bilka2013-03-1810-1179/+544
* Remove Prefer_SSE_for_memop on x64Ondrej Bilka2013-03-118-197/+1
* Revert " * sysdeps/x86_64/strlen.S: Replace with new SSE2 based implementation"Ondrej Bilka2013-03-0610-537/+1179
* * sysdeps/x86_64/strlen.S: Replace with new SSE2 based implementationOndrej Bilka2013-03-0610-1179/+537
* Remove lots of inline keywords.Roland McGrath2013-02-072-4/+5
* Change __x86_64 prefix in cache size to __x86H.J. Lu2013-01-053-13/+13
* Add HAS_RTMH.J. Lu2013-01-032-0/+16
* Update copyright notices with scripts/update-copyrights.Joseph Myers2013-01-0250-50/+50
* test-multiarch: terminate printf output with newlinePino Toscano2012-11-221-1/+1
* Compile x86 rtld with -mno-sse -mno-mmxH.J. Lu2012-11-021-1/+2
* Add x86-64 __libc_ifunc_impl_listH.J. Lu2012-10-1133-24/+380
* Use IFUNC memmove/memset in x86-64 bcopy/bzeroH.J. Lu2012-10-113-33/+11
* Define HAS_FMA with bit_FMA_UsableH.J. Lu2012-10-022-2/+10
generated by cgit-pink 1.4.1 (git 2.36.1) at 2024-12-18 05:06:35 +0000