mirror/glibc - mirror of git://sourceware.org/git/glibc.git

	Commit message (Collapse)	Author	Age	Files	Lines
*	Replace FSF snail mail address with URLs.	Paul Eggert	2012-02-09	1	-3/+2
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*	Really fix AVX tests	Ulrich Drepper	2012-01-26	1	-7/+7
\| \| \| \| \| \|	There is no problem with strcmp, it doesn't use the YMM registers. The math routines might since gcc perhaps generates such code. Introduce bit_YMM_USBALE and use it in the math routines.
*	Reset bit_AVX in __cpu_features is OS support is missing	Ulrich Drepper	2012-01-26	1	-1/+13
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*	Fix compilation problems in x86-64 init-arch	Ulrich Drepper	2011-10-21	1	-1/+2
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*	Check for FMA4 support and generate appropriate fma functions	Ulrich Drepper	2011-10-20	1	-1/+9
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*	Improve 64 bit strcat functions with SSE2/SSSE3	Liubov Dmitrieva	2011-07-19	1	-3/+7
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*	Optimized st{r,p}{,n}cpy for SSE2/SSSE3 on x86-32	H.J. Lu	2011-06-24	1	-3/+8
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*	Assume Intel Core i3/i5/i7 processor if AVX is available	H.J. Lu	2011-06-03	1	-0/+7
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*	Enable SSE2 memset for AMD'supcoming Orochi processor.	Harsha Jagasia	2011-03-04	1	-2/+10
\| \| \| \| \| \| \| \| \|	This patch enables SSE2 memset for AMD's upcoming Orochi processor. This patch also fixes the following bug: For misaligned blocks larger than > 144 Bytes, memset branches into the integer code path depending on the value of misalignment even if the startup code chooses the SSE2 code path upfront, when multiarch is enabled.
*	Support Intel processor model 6 and model 0x2.	H.J. Lu	2010-11-12	1	-0/+1
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*	Use IFUNC on x86-64 memset	H.J. Lu	2010-11-08	1	-0/+5
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*	Unroll 32bit SSE strlen and handle slow bsf	H.J. Lu	2010-08-25	1	-0/+6
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*	Improve 64bit memcpy/memmove for Atom, Core 2 and Core i7	H.J. Lu	2010-06-30	1	-3/+6
\| \| \| \| \| \| \|	This patch includes optimized 64bit memcpy/memmove for Atom, Core 2 and Core i7. It improves memcpy by up to 3X on Atom, up to 4X on Core 2 and up to 1X on Core i7. It also improves memmove by up to 3X on Atom, up to 4X on Core 2 and up to 2X on Core i7.
*	Incorrect x86 CPU family and model check.	H.J. Lu	2010-05-27	1	-3/+3
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*	Fix concurrent handling of __cpu_features.	Ulrich Drepper	2010-04-04	1	-12/+21
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*	Optimize 32bit memset/memcpy with SSE2/SSSE3.	H.J. Lu	2010-01-12	1	-1/+17
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*	Clean up x86 multiarch HAS_FOO macros.	Roland McGrath	2009-10-06	1	-0/+1
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*	Remove ENABLE_SSSE3_ON_ATOM.	H.J. Lu	2009-08-28	1	-9/+1
\| \| \| \| \|	It turns that SSSE3 isn't slow on Atom. The problem is bsf. This patch removes ENABLE_SSSE3_ON_ATOM.
*	Support multiarch for i686.	H.J. Lu	2009-07-31	1	-10/+8
\| \| \| \| \| \|	This patch adds multiarch support when configured for i686. I modified some x86-64 functions to support 32bit. I will contribute 32bit SSE string and memory functions later.
*	Prepare use if IFUNC functions outside libc.so.	Ulrich Drepper	2009-07-29	1	-0/+10
\| \| \| \| \| \|	We use a callback function into libc.so to get access to the data structure with the information and have special versions of the test macros which automatically use this function.
*	Perform test for Arom x86-64 in central place and handle it.	Ulrich Drepper	2009-07-23	1	-1/+7
\| \| \| \| \| \| \|	There will be more than one function which, in multiarch mode, wants to use SSSE3. We should not test in each of them for Atoms with slow SSSE3. Instead, disable the SSSE3 bit in the startup code for such machines.
*	Fix little checkin problem in last patch.	Ulrich Drepper	2009-06-30	1	-2/+2
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*	Determine and store processor family and model on x86-64.	H.J. Lu	2009-06-30	1	-8/+29
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*	Simplify CPUID value handling.	Ulrich Drepper	2009-05-31	1	-11/+7
\| \| \| \| \| \| \|	SO far Intel and AMD use exactly the same bits meaning the same things in CPUID index 1. Simplify the code. Should an architecture come along which doesn't use the same semantics then it must use a different index value than COMMON_CPUID_INDEX_1.
*	* config.h.in (USE_MULTIARCH): Define.	Ulrich Drepper	2009-03-13	1	-0/+65
	* configure.in: Handle --enable-multi-arch. * elf/dl-runtime.c (_dl_fixup): Handle STT_GNU_IFUNC. (_dl_fixup_profile): Likewise. * elf/do-lookup.c (dl_lookup_x): Likewise. * sysdeps/x86_64/dl-machine.h: Handle STT_GNU_IFUNC. * elf/elf.h (STT_GNU_IFUNC): Define. * include/libc-symbols.h (libc_ifunc): Define. * sysdeps/x86_64/cacheinfo.c: If USE_MULTIARCH is defined, use the framework in init-arch.h to get CPUID values. * sysdeps/x86_64/multiarch/Makefile: New file. * sysdeps/x86_64/multiarch/init-arch.c: New file. * sysdeps/x86_64/multiarch/init-arch.h: New file. * sysdeps/x86_64/multiarch/sched_cpucount.c: New file. * config.make.in (experimental-malloc): Define. * configure.in: Handle --enable-experimental-malloc. * malloc/Makefile: Handle experimental-malloc flag. * malloc/malloc.c: Implement PER_THREAD and ATOMIC_FASTBINS features. * malloc/arena.c: Likewise. * malloc/hooks.c: Likewise. * malloc/malloc.h: Define M_ARENA_TEST and M_ARENA_MAX.