| Commit message (Collapse) | Author | Age | Files | Lines |
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Code is exactly the same for the two so better to only maintain one
version.
All math and mathvec tests pass on x86.
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1. Remove unnecessary spills.
2. Fix some small nit missed optimizations.
All math and mathvec tests pass on x86.
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Just reformat with the style convention used in other x86 assembler
files. This doesn't change libm.so or libmvec.so.
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I used these shell commands:
../glibc/scripts/update-copyrights $PWD/../gnulib/build-aux/update-copyright
(cd ../glibc && git commit -am"[this commit message]")
and then ignored the output, which consisted lines saying "FOO: warning:
copyright statement not found" for each of 7061 files FOO.
I then removed trailing white space from math/tgmath.h,
support/tst-support-open-dev-null-range.c, and
sysdeps/x86_64/multiarch/strlen-vec.S, to work around the following
obscure pre-commit check failure diagnostics from Savannah. I don't
know why I run into these diagnostics whereas others evidently do not.
remote: *** 912-#endif
remote: *** 913:
remote: *** 914-
remote: *** error: lines with trailing whitespace found
...
remote: *** error: sysdeps/unix/sysv/linux/statx_cp.c: trailing lines
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I used these shell commands:
../glibc/scripts/update-copyrights $PWD/../gnulib/build-aux/update-copyright
(cd ../glibc && git commit -am"[this commit message]")
and then ignored the output, which consisted lines saying "FOO: warning:
copyright statement not found" for each of 6694 files FOO.
I then removed trailing white space from benchtests/bench-pthread-locks.c
and iconvdata/tst-iconv-big5-hkscs-to-2ucs4.c, to work around this
diagnostic from Savannah:
remote: *** pre-commit check failed ...
remote: *** error: lines with trailing whitespace found
remote: error: hook declined to update refs/heads/master
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Also, change sources.redhat.com to sourceware.org.
This patch was automatically generated by running the following shell
script, which uses GNU sed, and which avoids modifying files imported
from upstream:
sed -ri '
s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g
s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g
' \
$(find $(git ls-files) -prune -type f \
! -name '*.po' \
! -name 'ChangeLog*' \
! -path COPYING ! -path COPYING.LIB \
! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \
! -path manual/texinfo.tex ! -path scripts/config.guess \
! -path scripts/config.sub ! -path scripts/install-sh \
! -path scripts/mkinstalldirs ! -path scripts/move-if-change \
! -path INSTALL ! -path locale/programs/charmap-kw.h \
! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \
! '(' -name configure \
-execdir test -f configure.ac -o -f configure.in ';' ')' \
! '(' -name preconfigure \
-execdir test -f preconfigure.ac ';' ')' \
-print)
and then by running 'make dist-prepare' to regenerate files built
from the altered files, and then executing the following to cleanup:
chmod a+x sysdeps/unix/sysv/linux/riscv/configure
# Omit irrelevant whitespace and comment-only changes,
# perhaps from a slightly-different Autoconf version.
git checkout -f \
sysdeps/csky/configure \
sysdeps/hppa/configure \
sysdeps/riscv/configure \
sysdeps/unix/sysv/linux/csky/configure
# Omit changes that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines
git checkout -f \
sysdeps/powerpc/powerpc64/ppc-mcount.S \
sysdeps/unix/sysv/linux/s390/s390-64/syscall.S
# Omit change that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline
git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
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* All files with FSF copyright notices: Update copyright dates
using scripts/update-copyrights.
* locale/programs/charmap-kw.h: Regenerated.
* locale/programs/locfile-kw.h: Likewise.
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* All files with FSF copyright notices: Update copyright dates
using scripts/update-copyrights.
* locale/programs/charmap-kw.h: Regenerated.
* locale/programs/locfile-kw.h: Likewise.
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Since binutils 2.25 or later is required to build glibc, we can replace
AVX512F .byte sequences with AVX512F instructions.
Tested on x86-64 and x32. There are no code differences in libmvec.so
and libmvec.a.
* sysdeps/x86_64/fpu/svml_d_sincos8_core.S: Replace AVX512F
.byte sequences with AVX512F instructions.
* sysdeps/x86_64/fpu/svml_d_wrapper_impl.h: Likewise.
* sysdeps/x86_64/fpu/svml_s_sincosf16_core.S: Likewise.
* sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S:
Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S:
Likewise.
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When PLT may be used, JUMPTARGET should be used instead calling the
function directly.
* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core_sse4.S
(_ZGVbN2v_cos_sse4): Use JUMPTARGET to call cos.
* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core_avx2.S
(_ZGVdN4v_cos_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S
(_ZGVdN4v_cos): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core_sse4.S
(_ZGVbN2v_exp_sse4): Use JUMPTARGET to call exp.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core_avx2.S
(_ZGVdN4v_exp_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S
(_ZGVdN4v_exp): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core_sse4.S
(_ZGVbN2v_log_sse4): Use JUMPTARGET to call log.
* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core_avx2.S
(_ZGVdN4v_log_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S
(_ZGVdN4v_log): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core_sse4.S
(_ZGVbN2vv_pow_sse4): Use JUMPTARGET to call pow.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core_avx2.S
(_ZGVdN4vv_pow_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core_avx512.S
(_ZGVdN4vv_pow): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core_sse4.S
(_ZGVbN2v_sin_sse4): Use JUMPTARGET to call sin.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core_avx2.S
(_ZGVdN4v_sin_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S
(_ZGVdN4v_sin): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core_sse4.S
(_ZGVbN2vvv_sincos_sse4): Use JUMPTARGET to call sin and cos.
* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core_avx2.S
(_ZGVdN4vvv_sincos_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S
(_ZGVdN4vvv_sincos): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S
(_ZGVdN8v_cosf): Use JUMPTARGET to call cosf.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core_sse4.S
(_ZGVbN4v_cosf_sse4): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core_avx2.S
(_ZGVdN8v_cosf_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S
(_ZGVdN8v_expf): Use JUMPTARGET to call expf.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core_sse4.S
(_ZGVbN4v_expf_sse4): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core_avx2.S
(_ZGVdN8v_expf_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S
(_ZGVdN8v_logf): Use JUMPTARGET to call logf.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core_sse4.S
(_ZGVbN4v_logf_sse4): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core_avx2.S
(_ZGVdN8v_logf_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S
(_ZGVdN8vv_powf): Use JUMPTARGET to call powf.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S
(_ZGVbN4vv_powf_sse4): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S
(_ZGVdN8vv_powf_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
(_ZGVdN8vv_powf): Use JUMPTARGET to call sinf and cosf.
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S
(_ZGVbN4vvv_sincosf_sse4): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S
(_ZGVdN8vvv_sincosf_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S
(_ZGVdN8v_sinf): Use JUMPTARGET to call sinf.
* sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core_sse4.S
(_ZGVbN4v_sinf_sse4): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core_avx2.S
(_ZGVdN8v_sinf_avx2): Likewise.
* sysdeps/x86_64/fpu/svml_d_wrapper_impl.h (WRAPPER_IMPL_SSE2):
Use JUMPTARGET to call callee.
(WRAPPER_IMPL_SSE2_ff): Likewise.
(WRAPPER_IMPL_SSE2_fFF): Likewise.
(WRAPPER_IMPL_AVX): Likewise.
(WRAPPER_IMPL_AVX_ff): Likewise.
(WRAPPER_IMPL_AVX_fFF): Likewise.
(WRAPPER_IMPL_AVX512): Likewise.
(WRAPPER_IMPL_AVX512_ff): Likewise.
* sysdeps/x86_64/fpu/svml_s_wrapper_impl.h (WRAPPER_IMPL_SSE2):
Likewise.
(WRAPPER_IMPL_SSE2_ff): Likewise.
(WRAPPER_IMPL_SSE2_fFF): Likewise.
(WRAPPER_IMPL_AVX): Likewise.
(WRAPPER_IMPL_AVX_ff): Likewise.
(WRAPPER_IMPL_AVX_fFF): Likewise.
(WRAPPER_IMPL_AVX512): Likewise.
(WRAPPER_IMPL_AVX512_ff): Likewise.
(WRAPPER_IMPL_AVX512_fFF): Likewise.
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AVX512 IFUNC implementations, implementations of wrappers to
AVX2 versions and KNL expf implementation fixed.
* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S: Fixed AVX512 IFUNC.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S: Likewise.
* sysdeps/x86_64/fpu/svml_d_wrapper_impl.h: Fixed wrappers to AVX2.
* sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S: Fixed KNL
implementation.
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Here is implementation of vectorized sincosf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.
* NEWS: Mention addition of x86_64 vector sincosf.
* math/test-float-vlen16.h: Added wrapper for sincosf tests.
* math/test-float-vlen4.h: Likewise.
* math/test-float-vlen8.h: Likewise.
* sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
* sysdeps/x86/fpu/bits/math-vector.h: Added sincosf SIMD declaration.
* sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
* sysdeps/x86_64/fpu/Versions: New versions added.
* sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
* sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines):
Added build of SSE, AVX2 and AVX512 IFUNC versions.
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S
* sysdeps/x86_64/fpu/svml_s_sincosf16_core.S
* sysdeps/x86_64/fpu/svml_s_sincosf4_core.S
* sysdeps/x86_64/fpu/svml_s_sincosf8_core.S
* sysdeps/x86_64/fpu/svml_s_sincosf8_core_avx.S
* sysdeps/x86_64/fpu/svml_s_sincosf_data.S: New file.
* sysdeps/x86_64/fpu/svml_s_sincosf_data.h: New file.
* sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Added 3 argument wrappers.
* sysdeps/x86_64/fpu/test-float-vlen16.c: : Vector sincosf tests.
* sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
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Here is implementation of vectorized powf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.
* sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
* sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
redirections for powf.
* sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
* sysdeps/x86_64/fpu/Versions: New versions added.
* sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
* sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines):
Added build of SSE, AVX2 and AVX512 IFUNC versions.
* sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Added 2 argument wrappers.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S: New file.
* sysdeps/x86_64/fpu/svml_s_powf16_core.S: New file.
* sysdeps/x86_64/fpu/svml_s_powf4_core.S: New file.
* sysdeps/x86_64/fpu/svml_s_powf8_core.S: New file.
* sysdeps/x86_64/fpu/svml_s_powf8_core_avx.S: New file.
* sysdeps/x86_64/fpu/svml_s_powf_data.S: New file.
* sysdeps/x86_64/fpu/svml_s_powf_data.h: New file.
* sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector powf tests.
* sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
* math/test-float-vlen16.h: Fixed 2 argument macro.
* math/test-float-vlen4.h: Likewise.
* math/test-float-vlen8.h: Likewise.
* NEWS: Mention addition of x86_64 vector powf.
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Here is implementation of vectorized cosf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.
* sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
* sysdeps/x86_64/fpu/Versions: New versions added.
* sysdeps/x86_64/fpu/svml_s_cosf4_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core_sse4.S: New file.
* sysdeps/x86_64/fpu/svml_s_cosf8_core_avx.S: New file.
* sysdeps/x86_64/fpu/svml_s_cosf8_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core_avx2.S: New file.
* sysdeps/x86_64/fpu/svml_s_cosf16_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S: New file.
* sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: New file.
* sysdeps/x86_64/fpu/svml_s_cosf_data.S: New file.
* sysdeps/x86_64/fpu/svml_s_cosf_data.h: New file.
* sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
build of SSE, AVX2 and AVX512 IFUNC versions.
* sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
* sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration for cosf.
* NEWS: Mention addition of x86_64 vector cosf.
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