| Commit message (Collapse) | Author | Age | Files | Lines |
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* All files with FSF copyright notices: Update copyright dates
using scripts/update-copyrights.
* locale/programs/charmap-kw.h: Regenerated.
* locale/programs/locfile-kw.h: Likewise.
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* All files with FSF copyright notices: Update copyright dates
using scripts/update-copyrights.
* locale/programs/charmap-kw.h: Regenerated.
* locale/programs/locfile-kw.h: Likewise.
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Vector math functions require -ffast-math which sets -ffinite-math-only,
so it is needed to call finite scalar versions (which are called from
vector functions in some cases).
Since finite version of pow() returns qNaN instead of 1.0 for several
inputs, those inputs are excluded for tests of vector math functions.
[BZ #20033]
* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core_sse4.S: Call
finite version.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core_avx2.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core_sse4.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core_avx2.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core_sse4.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core_avx2.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core_avx512.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core_sse4.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core_avx2.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core_sse4.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core_avx2.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S: Likewise.
* sysdeps/x86_64/fpu/svml_d_exp2_core.S: Likewise.
* sysdeps/x86_64/fpu/svml_d_log2_core.S: Likewise.
* sysdeps/x86_64/fpu/svml_d_pow2_core.S: Likewise.
* sysdeps/x86_64/fpu/svml_s_expf4_core.S: Likewise.
* sysdeps/x86_64/fpu/svml_s_logf4_core.S: Likewise.
* sysdeps/x86_64/fpu/svml_s_powf4_core.S: Likewise.
* math/libm-test.inc (pow_test_data): Exclude tests for qNaN
in power zero.
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Here is implementation of vectorized exp containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.
* bits/libm-simd-decl-stubs.h: Added stubs for exp.
* math/bits/mathcalls.h: Added exp declaration with __MATHCALL_VEC.
* sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
* sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
redirections for exp.
* sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
* sysdeps/x86_64/fpu/Versions: New versions added.
* sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
* sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
build of SSE, AVX2 and AVX512 IFUNC versions.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core_sse4.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core_avx2.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S: New file.
* sysdeps/x86_64/fpu/svml_d_exp2_core.S: New file.
* sysdeps/x86_64/fpu/svml_d_exp4_core.S: New file.
* sysdeps/x86_64/fpu/svml_d_exp4_core_avx.S: New file.
* sysdeps/x86_64/fpu/svml_d_exp8_core.S: New file.
* sysdeps/x86_64/fpu/svml_d_exp_data.S: New file.
* sysdeps/x86_64/fpu/svml_d_exp_data.h: New file.
* sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector exp test.
* sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
* NEWS: Mention addition of x86_64 vector exp.
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