| Commit message (Collapse) | Author | Age | Files | Lines |
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* All files with FSF copyright notices: Update copyright dates
using scripts/update-copyrights.
* locale/programs/charmap-kw.h: Regenerated.
* locale/programs/locfile-kw.h: Likewise.
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* All files with FSF copyright notices: Update copyright dates
using scripts/update-copyrights.
* locale/programs/charmap-kw.h: Regenerated.
* locale/programs/locfile-kw.h: Likewise.
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Vector math functions require -ffast-math which sets -ffinite-math-only,
so it is needed to call finite scalar versions (which are called from
vector functions in some cases).
Since finite version of pow() returns qNaN instead of 1.0 for several
inputs, those inputs are excluded for tests of vector math functions.
[BZ #20033]
* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core_sse4.S: Call
finite version.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core_avx2.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core_sse4.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core_avx2.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core_sse4.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core_avx2.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core_avx512.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core_sse4.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core_avx2.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core_sse4.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core_avx2.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S: Likewise.
* sysdeps/x86_64/fpu/svml_d_exp2_core.S: Likewise.
* sysdeps/x86_64/fpu/svml_d_log2_core.S: Likewise.
* sysdeps/x86_64/fpu/svml_d_pow2_core.S: Likewise.
* sysdeps/x86_64/fpu/svml_s_expf4_core.S: Likewise.
* sysdeps/x86_64/fpu/svml_s_logf4_core.S: Likewise.
* sysdeps/x86_64/fpu/svml_s_powf4_core.S: Likewise.
* math/libm-test.inc (pow_test_data): Exclude tests for qNaN
in power zero.
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If assembler doesn't support AVX512DQ, _dl_runtime_resolve_avx is used
to save the first 8 vector registers, which only saves the lower 256
bits of vector register, for lazy binding. When it is called on AVX512
platform, the upper 256 bits of ZMM registers are clobbered. Parameters
passed in ZMM registers will be wrong when the function is called the
first time. This patch requires binutils 2.24, whose assembler can store
and load ZMM registers, to build x86-64 glibc. Since mathvec library
needs assembler support for AVX512DQ, we disable mathvec if assembler
doesn't support AVX512DQ.
[BZ #20139]
* config.h.in (HAVE_AVX512_ASM_SUPPORT): Renamed to ...
(HAVE_AVX512DQ_ASM_SUPPORT): This.
* sysdeps/x86_64/configure.ac: Require assembler from binutils
2.24 or above.
(HAVE_AVX512_ASM_SUPPORT): Removed.
(HAVE_AVX512DQ_ASM_SUPPORT): New.
* sysdeps/x86_64/configure: Regenerated.
* sysdeps/x86_64/dl-trampoline.S: Make HAVE_AVX512_ASM_SUPPORT
check unconditional.
* sysdeps/x86_64/multiarch/ifunc-impl-list.c: Likewise.
* sysdeps/x86_64/multiarch/memcpy.S: Likewise.
* sysdeps/x86_64/multiarch/memcpy_chk.S: Likewise.
* sysdeps/x86_64/multiarch/memmove-avx512-no-vzeroupper.S:
Likewise.
* sysdeps/x86_64/multiarch/memmove-avx512-unaligned-erms.S:
Likewise.
* sysdeps/x86_64/multiarch/memmove.S: Likewise.
* sysdeps/x86_64/multiarch/memmove_chk.S: Likewise.
* sysdeps/x86_64/multiarch/mempcpy.S: Likewise.
* sysdeps/x86_64/multiarch/mempcpy_chk.S: Likewise.
* sysdeps/x86_64/multiarch/memset-avx512-no-vzeroupper.S:
Likewise.
* sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S:
Likewise.
* sysdeps/x86_64/multiarch/memset.S: Likewise.
* sysdeps/x86_64/multiarch/memset_chk.S: Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S: Check
HAVE_AVX512DQ_ASM_SUPPORT instead of HAVE_AVX512_ASM_SUPPORT.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S:
Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S:
Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core_avx512.S:
Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S:
Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.:
Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S:
Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S:
Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S:
Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S:
Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx51:
Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S:
Likewise.
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When PLT may be used, JUMPTARGET should be used instead calling the
function directly.
* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core_sse4.S
(_ZGVbN2v_cos_sse4): Use JUMPTARGET to call cos.
* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core_avx2.S
(_ZGVdN4v_cos_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S
(_ZGVdN4v_cos): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core_sse4.S
(_ZGVbN2v_exp_sse4): Use JUMPTARGET to call exp.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core_avx2.S
(_ZGVdN4v_exp_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S
(_ZGVdN4v_exp): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core_sse4.S
(_ZGVbN2v_log_sse4): Use JUMPTARGET to call log.
* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core_avx2.S
(_ZGVdN4v_log_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S
(_ZGVdN4v_log): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core_sse4.S
(_ZGVbN2vv_pow_sse4): Use JUMPTARGET to call pow.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core_avx2.S
(_ZGVdN4vv_pow_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core_avx512.S
(_ZGVdN4vv_pow): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core_sse4.S
(_ZGVbN2v_sin_sse4): Use JUMPTARGET to call sin.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core_avx2.S
(_ZGVdN4v_sin_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S
(_ZGVdN4v_sin): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core_sse4.S
(_ZGVbN2vvv_sincos_sse4): Use JUMPTARGET to call sin and cos.
* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core_avx2.S
(_ZGVdN4vvv_sincos_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S
(_ZGVdN4vvv_sincos): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S
(_ZGVdN8v_cosf): Use JUMPTARGET to call cosf.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core_sse4.S
(_ZGVbN4v_cosf_sse4): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core_avx2.S
(_ZGVdN8v_cosf_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S
(_ZGVdN8v_expf): Use JUMPTARGET to call expf.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core_sse4.S
(_ZGVbN4v_expf_sse4): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core_avx2.S
(_ZGVdN8v_expf_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S
(_ZGVdN8v_logf): Use JUMPTARGET to call logf.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core_sse4.S
(_ZGVbN4v_logf_sse4): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core_avx2.S
(_ZGVdN8v_logf_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S
(_ZGVdN8vv_powf): Use JUMPTARGET to call powf.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S
(_ZGVbN4vv_powf_sse4): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S
(_ZGVdN8vv_powf_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
(_ZGVdN8vv_powf): Use JUMPTARGET to call sinf and cosf.
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S
(_ZGVbN4vvv_sincosf_sse4): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S
(_ZGVdN8vvv_sincosf_avx2): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S
(_ZGVdN8v_sinf): Use JUMPTARGET to call sinf.
* sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core_sse4.S
(_ZGVbN4v_sinf_sse4): Likewise.
* sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core_avx2.S
(_ZGVdN8v_sinf_avx2): Likewise.
* sysdeps/x86_64/fpu/svml_d_wrapper_impl.h (WRAPPER_IMPL_SSE2):
Use JUMPTARGET to call callee.
(WRAPPER_IMPL_SSE2_ff): Likewise.
(WRAPPER_IMPL_SSE2_fFF): Likewise.
(WRAPPER_IMPL_AVX): Likewise.
(WRAPPER_IMPL_AVX_ff): Likewise.
(WRAPPER_IMPL_AVX_fFF): Likewise.
(WRAPPER_IMPL_AVX512): Likewise.
(WRAPPER_IMPL_AVX512_ff): Likewise.
* sysdeps/x86_64/fpu/svml_s_wrapper_impl.h (WRAPPER_IMPL_SSE2):
Likewise.
(WRAPPER_IMPL_SSE2_ff): Likewise.
(WRAPPER_IMPL_SSE2_fFF): Likewise.
(WRAPPER_IMPL_AVX): Likewise.
(WRAPPER_IMPL_AVX_ff): Likewise.
(WRAPPER_IMPL_AVX_fFF): Likewise.
(WRAPPER_IMPL_AVX512): Likewise.
(WRAPPER_IMPL_AVX512_ff): Likewise.
(WRAPPER_IMPL_AVX512_fFF): Likewise.
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Here is implementation of vectorized powf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.
* sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
* sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
redirections for powf.
* sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
* sysdeps/x86_64/fpu/Versions: New versions added.
* sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
* sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines):
Added build of SSE, AVX2 and AVX512 IFUNC versions.
* sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Added 2 argument wrappers.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S: New file.
* sysdeps/x86_64/fpu/svml_s_powf16_core.S: New file.
* sysdeps/x86_64/fpu/svml_s_powf4_core.S: New file.
* sysdeps/x86_64/fpu/svml_s_powf8_core.S: New file.
* sysdeps/x86_64/fpu/svml_s_powf8_core_avx.S: New file.
* sysdeps/x86_64/fpu/svml_s_powf_data.S: New file.
* sysdeps/x86_64/fpu/svml_s_powf_data.h: New file.
* sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector powf tests.
* sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
* math/test-float-vlen16.h: Fixed 2 argument macro.
* math/test-float-vlen4.h: Likewise.
* math/test-float-vlen8.h: Likewise.
* NEWS: Mention addition of x86_64 vector powf.
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