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path: root/sysdeps/x86_64/cacheinfo.c
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* Move x86_64 init-arch.h to sysdeps/x86/init-arch.hH.J. Lu2015-08-201-1/+1
* Add _dl_x86_cpu_features to rtld_globalH.J. Lu2015-08-131-125/+12
* Limit threads sharing L2 cache to 2 for SLM/KNLH.J. Lu2015-03-311-0/+23
* Update copyright dates with scripts/update-copyrights.Joseph Myers2015-01-021-1/+1
* Replace cpuid asm statement with __cpuid_countH.J. Lu2014-08-121-3/+1
* Update copyright notices with scripts/update-copyrightsAllan McRae2014-01-011-1/+1
* Change __x86_64 prefix in cache size to __x86H.J. Lu2013-01-051-27/+27
* Update copyright notices with scripts/update-copyrights.Joseph Myers2013-01-021-1/+1
* Replace FSF snail mail address with URLs.Paul Eggert2012-02-091-4/+2
* Fix typo in cache information table for x86-{32,64}.Ulrich Drepper2011-04-031-1/+1
* Last change caused infinite loops because of missing loop increment.Ulrich Drepper2011-03-221-0/+2
* Implement x86 cpuid handling of leaf4 for cache information.Ulrich Drepper2011-03-201-0/+49
* Enable SSE2 memset for AMD'supcoming Orochi processor.Harsha Jagasia2011-03-041-15/+34
* 32bit memset-sse2.S fails with uneven cache sizeUlrich Drepper2010-11-051-2/+18
* Optimize 32bit memset/memcpy with SSE2/SSSE3.H.J. Lu2010-01-121-2/+8
* Fix whitespaces in last checkin.Ulrich Drepper2009-08-071-1/+1
* Properly count number of logical processors on Intel CPUs.H.J. Lu2009-08-071-4/+38
* Support multiarch for i686.H.J. Lu2009-07-311-38/+41
* Avoid cpuid instructions in cache info discovery.Ulrich Drepper2009-07-231-19/+31
* Add more cache descriptors for L3 caches on x86 and x86-64.Ulrich Drepper2009-07-231-0/+3
* Simplify CPUID value handling.Ulrich Drepper2009-05-311-4/+4
* Compact cache info data structure for x86/x86-64.Ulrich Drepper2009-05-291-77/+77
* * version.h (VERSION): Bump to 2.10.1. cvs/fedora-glibc-20090510T1842 cvs/masterUlrich Drepper2009-05-101-0/+1
* * config.h.in (USE_MULTIARCH): Define.Ulrich Drepper2009-03-131-4/+28
* * sysdeps/x86_64/cacheinfo.c (intel_02_known): Add new descriptors.Ulrich Drepper2009-02-011-0/+14
* * sysdeps/x86_64/rtld-memset.c: New file.Ulrich Drepper2008-03-071-9/+1
* (intel_02_known): New entry 0x3f.Ulrich Drepper2007-12-231-0/+1
* * sysdeps/x86_64/cacheinfo.c: Comment out code added in support ofUlrich Drepper2007-10-171-0/+8
* * sysdeps/x86_64/cacheinfo.c (__x86_64_shared_cache_size): Define.Ulrich Drepper2007-10-161-4/+26
* * sysdeps/x86_64/cacheinfo.c (init_cacheinfo): Work around problemUlrich Drepper2007-10-101-0/+8
* * sysdeps/x86_64/cacheinfo.c (__x86_64_data_cache_size_half): RenamedUlrich Drepper2007-09-221-18/+58
* * sysdeps/x86_64/cacheinfo.c (handle_amd): Fix computation of cvs/fedora-glibc-20070825T1839Ulrich Drepper2007-08-251-8/+6
* * sysdeps/x86_64/cacheinfo.c (handle_amd): Handle L3 cacheUlrich Drepper2007-08-251-2/+56
* * sysdeps/x86_64/cacheinfo.c (intel_02_known): Add new entries.Ulrich Drepper2007-07-091-0/+2
* * sysdeps/x86_64/cacheinfo.c (init_cacheinfo): Pass correct valueUlrich Drepper2007-05-211-18/+19
* * sysdeps/unix/sysv/linux/x86_64/sysconf.c: Move cache informationUlrich Drepper2007-05-211-0/+450
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