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path: root/sysdeps/x86/cacheinfo.c
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* tunables: Add IFUNC selection and cache sizesH.J. Lu2017-06-201-1/+9
* x86: Don't use dl_x86_cpu_features in cacheinfo.cH.J. Lu2017-06-051-15/+22
* x86: Update __x86_shared_non_temporal_thresholdH.J. Lu2017-06-021-2/+4
* x86: Don't include cacheinfo.c in ld.soH.J. Lu2017-05-241-0/+4
* x86: Use __get_cpu_features to get cpu_featuresH.J. Lu2017-05-241-10/+9
* Update copyright dates with scripts/update-copyrights.Joseph Myers2017-01-011-1/+1
* X86: Don't assert on older Intel CPUs [BZ #20647]H.J. Lu2016-10-121-1/+3
* Count number of logical processors sharing L2 cacheH.J. Lu2016-05-271-34/+116
* Remove special L2 cache case for Knights LandingH.J. Lu2016-05-201-2/+0
* Correct Intel processor level type mask from CPUIDH.J. Lu2016-05-191-1/+1
* Check the HTT bit before counting logical threadsH.J. Lu2016-05-191-76/+82
* Support non-inclusive caches on Intel processorsH.J. Lu2016-05-131-1/+11
* Move sysdeps/x86_64/cacheinfo.c to sysdeps/x86H.J. Lu2016-05-081-0/+673