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* elf: Remove HWCAP_IMPORTANTStefan Liebler2024-06-181-3/+0
| | | | | | | Remove the definitions of HWCAP_IMPORTANT after removal of LD_HWCAP_MASK / tunable glibc.cpu.hwcap_mask. There HWCAP_IMPORTANT was used as default value. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* elf: Remove _DL_HWCAP_PLATFORMStefan Liebler2024-06-181-3/+0
| | | | | | Remove the definitions of _DL_HWCAP_PLATFORM as those are not used anymore after removal in elf/dl-cache.c:search_cache(). Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* elf: Remove _dl_string_platformStefan Liebler2024-06-181-2/+0
| | | | | | | | | Despite of powerpc where the returned integer is stored in tcb, and the diagnostics output, there is no user anymore. Thus this patch removes the diagnostics output and _dl_string_platform for all other platforms. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* Implement C23 exp2m1, exp10m1Joseph Myers2024-06-171-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | C23 adds various <math.h> function families originally defined in TS 18661-4. Add the exp2m1 and exp10m1 functions (exp2(x)-1 and exp10(x)-1, like expm1). As with other such functions, these use type-generic templates that could be replaced with faster and more accurate type-specific implementations in future. Test inputs are copied from those for expm1, plus some additions close to the overflow threshold (copied from exp2 and exp10) and also some near the underflow threshold. exp2m1 has the unusual property of having an input (M_MAX_EXP) where whether the function overflows (under IEEE semantics) depends on the rounding mode. Although these could reasonably be XFAILed in the testsuite (as we do in some cases for arguments very close to a function's overflow threshold when an error of a few ulps in the implementation can result in the implementation not agreeing with an ideal one on whether overflow takes place - the testsuite isn't smart enough to handle this automatically), since these functions aren't required to be correctly rounding, I made the implementation check for and handle this case specially. The Makefile ordering expected by lint-makefiles for the new functions is a bit peculiar, but I implemented it in this patch so that the test passes; I don't know why log2 also needed moving in one Makefile variable setting when it didn't in my previous patches, but the failure showed a different place was expected for that function as well. The powerpc64le IFUNC setup seems not to be as self-contained as one might hope; it shouldn't be necessary to add IFUNCs for new functions such as these simply to get them building, but without setting up IFUNCs for the new functions, there were undefined references to __GI___expm1f128 (that IFUNC machinery results in no such function being defined, but doesn't stop include/math.h from doing the redirection resulting in the exp2m1f128 and exp10m1f128 implementations expecting to call it). Tested for x86_64 and x86, and with build-many-glibcs.py.
* Implement C23 log10p1Joseph Myers2024-06-171-0/+8
| | | | | | | | | | | | | | C23 adds various <math.h> function families originally defined in TS 18661-4. Add the log10p1 functions (log10(1+x): like log1p, but for base-10 logarithms). This is directly analogous to the log2p1 implementation (except that whereas log2p1 has a smaller underflow range than log1p, log10p1 has a larger underflow range). The test inputs are copied from those for log1p and log2p1, plus a few more inputs in that wider underflow range. Tested for x86_64 and x86, and with build-many-glibcs.py.
* Implement C23 logp1Joseph Myers2024-06-171-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | C23 adds various <math.h> function families originally defined in TS 18661-4. Add the logp1 functions (aliases for log1p functions - the name is intended to be more consistent with the new log2p1 and log10p1, where clearly it would have been very confusing to name those functions log21p and log101p). As aliases rather than new functions, the content of this patch is somewhat different from those actually adding new functions. Tests are shared with log1p, so this patch *does* mechanically update all affected libm-test-ulps files to expect the same errors for both functions. The vector versions of log1p on aarch64 and x86_64 are *not* updated to have logp1 aliases (and thus there are no corresponding header, tests, abilist or ulps changes for vector functions either). It would be reasonable for such vector aliases and corresponding changes to other files to be made separately. For now, the log1p tests instead avoid testing logp1 in the vector case (a Makefile change is needed to avoid problems with grep, used in generating the .c files for vector function tests, matching more than one ALL_RM_TEST line in a file testing multiple functions with the same inputs, when it assumes that the .inc file only has a single such line). Tested for x86_64 and x86, and with build-many-glibcs.py.
* Add new AArch64 HWCAP2 definitions from Linux 6.9 to bits/hwcap.hJoseph Myers2024-06-041-0/+15
| | | | | | | Linux 6.9 adds 15 new HWCAP2_* values for AArch64; add them to bits/hwcap.h in glibc. Tested with build-many-glibcs.py for aarch64-linux-gnu.
* Remove the clone3 symbol from libc.a [BZ #31770]H.J. Lu2024-05-211-1/+0
| | | | | | | | clone3 isn't exported from glibc and is hidden in libc.so. Fix BZ #31770 by removing clone3 alias. Signed-off-by: H.J. Lu <hjl.tools@gmail.com> Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* aarch64/fpu: Add vector variants of powJoe Ramsay2024-05-211-0/+5
| | | | | | | Plus a small amount of moving includes around in order to be able to remove duplicate definition of asuint64. Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* Implement C23 log2p1Joseph Myers2024-05-201-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | C23 adds various <math.h> function families originally defined in TS 18661-4. Add the log2p1 functions (log2(1+x): like log1p, but for base-2 logarithms). This illustrates the intended structure of implementations of all these function families: define them initially with a type-generic template implementation. If someone wishes to add type-specific implementations, it is likely such implementations can be both faster and more accurate than the type-generic one and can then override it for types for which they are implemented (adding benchmarks would be desirable in such cases to demonstrate that a new implementation is indeed faster). The test inputs are copied from those for log1p. Note that these changes make gen-auto-libm-tests depend on MPFR 4.2 (or later). The bulk of the changes are fairly generic for any such new function. (sysdeps/powerpc/nofpu/Makefile only needs changing for those type-generic templates that use fabs.) Tested for x86_64 and x86, and with build-many-glibcs.py.
* aarch64/fpu: Add vector variants of cbrtJoe Ramsay2024-05-161-0/+5
| | | | Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* aarch64/fpu: Add vector variants of hypotJoe Ramsay2024-05-161-0/+5
| | | | Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* aarch64: Remove ld.so __tls_get_addr plt usageAdhemerval Zanella2024-04-041-2/+0
| | | | | | Use the hidden alias instead. Checked on aarch64-linux-gnu.
* aarch64/fpu: Add vector variants of erfcJoe Ramsay2024-04-041-0/+5
| | | | Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* aarch64/fpu: Add vector variants of tanhJoe Ramsay2024-04-041-0/+5
| | | | Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* aarch64/fpu: Add vector variants of sinhJoe Ramsay2024-04-041-0/+5
| | | | Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* aarch64/fpu: Add vector variants of atanhJoe Ramsay2024-04-041-0/+5
| | | | Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* aarch64/fpu: Add vector variants of asinhJoe Ramsay2024-04-041-0/+5
| | | | Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* aarch64/fpu: Add vector variants of acoshJoe Ramsay2024-04-041-0/+5
| | | | Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* aarch64/fpu: Add vector variants of coshJoe Ramsay2024-04-041-0/+5
| | | | Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* aarch64/fpu: Add vector variants of erfJoe Ramsay2024-04-041-0/+5
| | | | Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* AArch64: Check kernel version for SVE ifuncsWilco Dijkstra2024-03-211-0/+48
| | | | | | | | | | | | | | | | Old Linux kernels disable SVE after every system call. Calling the SVE-optimized memcpy afterwards will then cause a trap to reenable SVE. As a result, applications with a high use of syscalls may run slower with the SVE memcpy. This is true for kernels between 4.15.0 and before 6.2.0, except for 5.14.0 which was patched. Avoid this by checking the kernel version and selecting the SVE ifunc on modern kernels. Parse the kernel version reported by uname() into a 24-bit kernel.major.minor value without calling any library functions. If uname() is not supported or if the version format is not recognized, assume the kernel is modern. Tested-by: Florian Weimer <fweimer@redhat.com> Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* Update syscall lists for Linux 6.8Joseph Myers2024-03-131-0/+5
| | | | | | | | Linux 6.8 adds five new syscalls. Update syscall-names.list and regenerate the arch-syscall.h headers with build-many-glibcs.py update-syscalls. Tested with build-many-glibcs.py.
* Add new AArch64 HWCAP2 definitions from Linux 6.7 to bits/hwcap.hJoseph Myers2024-02-081-0/+3
| | | | | Linux 6.7 adds three new HWCAP2_* values for AArch64; add them to bits/hwcap.h in glibc.
* Update syscall lists for Linux 6.7Joseph Myers2024-01-171-0/+4
| | | | | | | | | Linux 6.7 adds the futex_requeue, futex_wait and futex_wake syscalls, and enables map_shadow_stack for architectures previously missing it. Update syscall-names.list and regenerate the arch-syscall.h headers with build-many-glibcs.py update-syscalls. Tested with build-many-glibcs.py.
* math: remove exp10 wrappersWilco Dijkstra2024-01-121-0/+1
| | | | | | | | Remove the error handling wrapper from exp10. This is very similar to the changes done to exp and exp2, except that we also need to handle pow10 and pow10l. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* aarch64: Make cpu-features definitions not Linux-specificSergey Bugaev2024-01-042-110/+0
| | | | | | | | | These describe generic AArch64 CPU features, and are not tied to a kernel-specific way of determining them. We can share them between the Linux and Hurd AArch64 ports. Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-ID: <20240103171502.1358371-13-bugaevc@gmail.com>
* Implement C23 <stdbit.h>Joseph Myers2024-01-031-0/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | C23 adds a header <stdbit.h> with various functions and type-generic macros for bit-manipulation of unsigned integers (plus macro defines related to endianness). Implement this header for glibc. The functions have both inline definitions in the header (referenced by macros defined in the header) and copies with external linkage in the library (which are implemented in terms of those macros to avoid duplication). They are documented in the glibc manual. Tests, as well as verifying results for various inputs (of both the macros and the out-of-line functions), verify the types of those results (which showed up a bug in an earlier version with the type-generic macro stdc_has_single_bit wrongly returning a promoted type), that the macros can be used at top level in a source file (so don't use ({})), that they evaluate their arguments exactly once, and that the macros for the type-specific functions have the expected implicit conversions to the relevant argument type. Jakub previously referred to -Wconversion warnings in type-generic macros, so I've included a test with -Wconversion (but the only warnings I saw and fixed from that test were actually in inline functions in the <stdbit.h> header - not anything coming from use of the type-generic macros themselves). This implementation of the type-generic macros does not handle unsigned __int128, or unsigned _BitInt types with a width other than that of a standard integer type (and C23 doesn't require the header to handle such types either). Support for those types, using the new type-generic built-in functions Jakub's added for GCC 14, can reasonably be added in a followup (along of course with associated tests). This implementation doesn't do anything special to handle C++, or have any tests of functionality in C++ beyond the existing tests that all headers can be compiled in C++ code; it's not clear exactly what form this header should take in C++, but probably not one using macros. DIS ballot comment AT-107 asks for the word "count" to be added to the names of the stdc_leading_zeros, stdc_leading_ones, stdc_trailing_zeros and stdc_trailing_ones functions and macros. I don't think it's likely to be accepted (accepting any technical comments would mean having an FDIS ballot), but if it is accepted at the WG14 meeting (22-26 January in Strasbourg, starting with DIS ballot comment handling) then there would still be time to update glibc for the renaming before the 2.39 release. The new functions and header are placed in the stdlib/ directory in glibc, rather than creating a new toplevel stdbit/ or putting them in string/ alongside ffs. Tested for x86_64 and x86.
* aarch64: Add setcontext support for SMESzabolcs Nagy2024-01-021-0/+19
| | | | | | | | | For the ZA lazy saving scheme to work, setcontext has to call __libc_arm_za_disable. Also fixes swapcontext which uses setcontext internally. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* Update copyright dates with scripts/update-copyrightsPaul Eggert2024-01-0138-38/+38
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* aarch64: Add half-width versions of AdvSIMD f32 libmvec routinesJoe Ramsay2023-12-201-0/+15
| | | | | | | | | | | Compilers may emit calls to 'half-width' routines (two-lane single-precision variants). These have been added in the form of wrappers around the full-width versions, where the low half of the vector is simply duplicated. This will perform poorly when one lane triggers the special-case handler, as there will be a redundant call to the scalar version, however this is expected to be rare at Ofast. Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* elf: Do not duplicate the GLIBC_TUNABLES stringAdhemerval Zanella2023-12-191-13/+20
| | | | | | | | | | | | | | | | | | | | | The tunable parsing duplicates the tunable environment variable so it null-terminates each one since it simplifies the later parsing. It has the drawback of adding another point of failure (__minimal_malloc failing), and the memory copy requires tuning the compiler to avoid mem operations calls. The parsing now tracks the tunable start and its size. The dl-tunable-parse.h adds helper functions to help parsing, like a strcmp that also checks for size and an iterator for suboptions that are comma-separated (used on hwcap parsing by x86, powerpc, and s390x). Since the environment variable is allocated on the stack by the kernel, it is safe to keep the references to the suboptions for later parsing of string tunables (as done by set_hwcaps by multiple architectures). Checked on x86_64-linux-gnu, powerpc64le-linux-gnu, and aarch64-linux-gnu. Reviewed-by: Siddhesh Poyarekar <siddhesh@sourceware.org>
* aarch64: Add vector implementations of expm1 routinesJoe Ramsay2023-11-201-0/+4
| | | | May discard sign of 0 - auto tests for -0 and -0x1p-10000 updated accordingly.
* AArch64: Remove Falkor memcpyWilco Dijkstra2023-11-132-7/+0
| | | | | | | | | | The latest implementations of memcpy are actually faster than the Falkor implementations [1], so remove the falkor/phecda ifuncs for memcpy and the now unused IS_FALKOR/IS_PHECDA defines. [1] https://sourceware.org/pipermail/libc-alpha/2022-December/144227.html Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* aarch64: Add vector implementations of log1p routinesJoe Ramsay2023-11-101-0/+4
| | | | May discard sign of zero.
* aarch64: Add vector implementations of atan2 routinesJoe Ramsay2023-11-101-0/+4
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* aarch64: Add vector implementations of atan routinesJoe Ramsay2023-11-101-0/+4
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* aarch64: Add vector implementations of acos routinesJoe Ramsay2023-11-101-0/+4
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* aarch64: Add vector implementations of asin routinesJoe Ramsay2023-11-101-0/+4
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* linux: Add HWCAP2_HBC from Linux 6.6 to AArch64 bits/hwcap.hAdhemerval Zanella2023-11-031-0/+1
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* Update syscall lists for Linux 6.6Adhemerval Zanella2023-11-031-0/+1
| | | | | Linux 6.6 has one new syscall for all architectures, fchmodat2, and the map_shadow_stack on x86_64.
* crypt: Remove libcrypt supportAdhemerval Zanella2023-10-301-7/+0
| | | | | | | | | | | | | | | | | | All the crypt related functions, cryptographic algorithms, and make requirements are removed, with only the exception of md5 implementation which is moved to locale folder since it is required by localedef for integrity protection (libc's locale-reading code does not check these, but localedef does generate them). Besides thec code itself, both internal documentation and the manual is also adjusted. This allows to remove both --enable-crypt and --enable-nss-crypt configure options. Checked with a build for all affected ABIs. Co-authored-by: Zack Weinberg <zack@owlfolio.org> Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* AArch64: Add support for MOPS memcpy/memmove/memsetWilco Dijkstra2023-10-242-0/+4
| | | | | | | | Add support for MOPS in cpu_features and INIT_ARCH. Add ifuncs using MOPS for memcpy, memmove and memset (use .inst for now so it works with all binutils versions without needing complex configure and conditional compilation). Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
* aarch64: Add vector implementations of exp10 routinesJoe Ramsay2023-10-231-0/+4
| | | | | Double-precision routines either reuse the exp table (AdvSIMD) or use SVE FEXPA intruction.
* aarch64: Add vector implementations of log10 routinesJoe Ramsay2023-10-231-0/+4
| | | | A table is also added, which is shared between AdvSIMD and SVE log10.
* aarch64: Add vector implementations of log2 routinesJoe Ramsay2023-10-231-0/+4
| | | | A table is also added, which is shared between AdvSIMD and SVE log2.
* aarch64: Add vector implementations of exp2 routinesJoe Ramsay2023-10-231-0/+4
| | | | Some routines reuse table from v_exp_data.c
* aarch64: Add vector implementations of tan routinesJoe Ramsay2023-10-231-0/+4
| | | | | This includes some utility headers for evaluating polynomials using various schemes.
* Add HWCAP2_MOPS from Linux 6.5 to AArch64 bits/hwcap.hJoseph Myers2023-10-171-0/+1
| | | | | | | Linux 6.5 adds a new AArch64 HWCAP2 value, HWCAP2_MOPS. Add it to glibc's bits/hwcap.h. Tested with build-many-glibcs.py for aarch64-linux-gnu.
* Update syscall lists for Linux 6.5Joseph Myers2023-09-121-0/+1
| | | | | | | | Linux 6.5 has one new syscall, cachestat, and also enables the cacheflush syscall for hppa. Update syscall-names.list and regenerate the arch-syscall.h headers with build-many-glibcs.py update-syscalls. Tested with build-many-glibcs.py.
generated by cgit-pink 1.4.1 (git 2.36.1) at 2024-10-06 14:55:43 +0000