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As from previous discussions [1] this patch removes tileprox-*-linux-gnu
support from GLIBC. This patch is a straigthfoward one, which just remove
tilepro specific implementation and configurations (no sysdep simplfication
or reorganization is done).
* README: Remove tilepro-*-linux-gnu from supported architecture.
* scripts/build-many-glibcs.py: Likewise.
* sysdeps/tile/__tls_get_addr.S (__tls_get_addr): Likewise.
* sysdeps/tile/crti.S (PREINIT_FUNCTION): Likewise.
* sysdeps/tile/dl-machine.h (ELF_MACHINE_NAME,
elf_machine_matches_host, elf_machine_dynamic,
elf_machine_load_address, elf_machine_runtime_setup, reloc_howto
howto, elf_machine_rela): Likewise
* sysdeps/tile/dl-start.S (_start): Likewise.
* sysdeps/tile/memcmp.c (DBLALIGN, REVBYTES): Likewise.
* sysdeps/tile/memcopy.h (MEMCPY_OK_FOR_FWD_MEMMOVE,
MEMCPY_OK_FOR_FWD_MEMMOVE, op_t): Likewise.
* sysdeps/tile/nptl/pthread_spin_lock.c (TNS, CMPTNS): Likewise.
* sysdeps/tile/nptl/pthread_spin_trylock.c (TNS): Likewise.
* sysdeps/tile/nptl/pthread_spin_unlock.c (pthread_spin_unlock):
Likewise.
* sysdeps/tile/nptl/tls.h (DB_THREAD_SELF): Likewise.
* sysdeps/tile/preconfigure: Likewise.
* sysdeps/tile/stackguard-macros.h (STACK_CHK_GUARD,
POINTER_CHK_GUARD): Likewise.
* sysdeps/tile/stackinfo.h (__stackinfo_sub): Likewise.
* sysdeps/tile/start.S (_start): Likewise.
* sysdeps/tile/tls-macros.h (TLS_GD_OFFSET, TLS_IE_OFFSET, _TLS_LE):
Likewise.
* sysdeps/tile/sysdep.h (REGSIZE): Likewise.
(LD, LD4U, ST, ST4, BNEZ, BEQZ, BEQZT, BGTZ, CMPEQI, CMPEQ, CMOVEQZ,
CMOVNEZ): Remove.
* sysdeps/unix/sysv/linux/tile/bits/environments.h
(__ILP32_OFF32_CFLAGS, __ILP32_OFFBIG_CFLAGS, __ILP32_OFF32_LDFLAGS,
__ILP32_OFFBIG_LDFLAGS, __LP64_OFF64_CFLAGS, __LP64_OFF64_LDFLAGS):
Likewise.
* sysdeps/tile/wordcopy.c (DBLALIGN): Likewise.
* sysdeps/tile/tilepro/Implies: Remove file.
* sysdeps/tile/tilepro/atomic-machine.h: Likewise.
* sysdeps/tile/tilepro/bits/wordsize.h: Likewise.
* sysdeps/tile/tilepro/memchr.c: Likewise.
* sysdeps/tile/tilepro/memcpy.S: Likewise.
* sysdeps/tile/tilepro/memset.c: Likewise.
* sysdeps/tile/tilepro/memusage.h: Likewise.
* sysdeps/tile/tilepro/rawmemchr.c: Likewise.
* sysdeps/tile/tilepro/strchr.c: Likewise.
* sysdeps/tile/tilepro/strchrnul.c: Likewise.
* sysdeps/tile/tilepro/strlen.c: Likewise.
* sysdeps/tile/tilepro/strrchr.c: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/Implies: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/c++-types.data: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/jmp_buf-macros.h: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/ld.abilist: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/ldconfig.h: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/libBrokenLocale.abilist:
Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/libanl.abilist: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/libc.abilist: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/libcrypt.abilist: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/libdl.abilist: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/libm.abilist: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/libnsl.abilist: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/libpthread.abilist: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/libresolv.abilist: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/librt.abilist: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/libthread_db.abilist: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/libutil.abilist: Likewise.
* sysdeps/unix/sysv/linux/tile/tilepro/register-dump.h: Likewise.
* sysdeps/unix/sysv/linux/tile/sysconf.c (linux_sysconf): Remove
tilepro mention in comment.
[1] https://sourceware.org/ml/libc-alpha/2017-12/msg00038.html
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This patch optimizes the generic spinlock code.
The type pthread_spinlock_t is a typedef to volatile int on all archs.
Passing a volatile pointer to the atomic macros which are not mapped to the
C11 atomic builtins can lead to extra stores and loads to stack if such
a macro creates a temporary variable by using "__typeof (*(mem)) tmp;".
Thus, those macros which are used by spinlock code - atomic_exchange_acquire,
atomic_load_relaxed, atomic_compare_exchange_weak - have to be adjusted.
According to the comment from Szabolcs Nagy, the type of a cast expression is
unqualified (see http://www.open-std.org/jtc1/sc22/wg14/www/docs/dr_423.htm):
__typeof ((__typeof (*(mem)) *(mem)) tmp;
Thus from spinlock perspective the variable tmp is of type int instead of
type volatile int. This patch adjusts those macros in include/atomic.h.
With this construct GCC >= 5 omits the extra stores and loads.
The atomic macros are replaced by the C11 like atomic macros and thus
the code is aligned to it. The pthread_spin_unlock implementation is now
using release memory order instead of sequentially consistent memory order.
The issue with passed volatile int pointers applies to the C11 like atomic
macros as well as the ones used before.
I've added a glibc_likely hint to the first atomic exchange in
pthread_spin_lock in order to return immediately to the caller if the lock is
free. Without the hint, there is an additional jump if the lock is free.
I've added the atomic_spin_nop macro within the loop of plain reads.
The plain reads are also realized by C11 like atomic_load_relaxed macro.
The new define ATOMIC_EXCHANGE_USES_CAS determines if the first try to acquire
the spinlock in pthread_spin_lock or pthread_spin_trylock is an exchange
or a CAS. This is defined in atomic-machine.h for all architectures.
The define SPIN_LOCK_READS_BETWEEN_CMPXCHG is now removed.
There is no technical reason for throwing in a CAS every now and then,
and so far we have no evidence that it can improve performance.
If that would be the case, we have to adjust other spin-waiting loops
elsewhere, too! Using a CAS loop without plain reads is not a good idea
on many targets and wasn't used by one. Thus there is now no option to
do so.
Architectures are now using the generic spinlock automatically if they
do not provide an own implementation. Thus the pthread_spin_lock.c files
in sysdeps folder are deleted.
ChangeLog:
* NEWS: Mention new spinlock implementation.
* include/atomic.h:
(__atomic_val_bysize): Cast type to omit volatile qualifier.
(atomic_exchange_acq): Likewise.
(atomic_load_relaxed): Likewise.
(ATOMIC_EXCHANGE_USES_CAS): Check definition.
* nptl/pthread_spin_init.c (pthread_spin_init):
Use atomic_store_relaxed.
* nptl/pthread_spin_lock.c (pthread_spin_lock):
Use C11-like atomic macros.
* nptl/pthread_spin_trylock.c (pthread_spin_trylock):
Likewise.
* nptl/pthread_spin_unlock.c (pthread_spin_unlock):
Use atomic_store_release.
* sysdeps/aarch64/nptl/pthread_spin_lock.c: Delete File.
* sysdeps/arm/nptl/pthread_spin_lock.c: Likewise.
* sysdeps/hppa/nptl/pthread_spin_lock.c: Likewise.
* sysdeps/m68k/nptl/pthread_spin_lock.c: Likewise.
* sysdeps/microblaze/nptl/pthread_spin_lock.c: Likewise.
* sysdeps/mips/nptl/pthread_spin_lock.c: Likewise.
* sysdeps/nios2/nptl/pthread_spin_lock.c: Likewise.
* sysdeps/aarch64/atomic-machine.h (ATOMIC_EXCHANGE_USES_CAS): Define.
* sysdeps/alpha/atomic-machine.h: Likewise.
* sysdeps/arm/atomic-machine.h: Likewise.
* sysdeps/i386/atomic-machine.h: Likewise.
* sysdeps/ia64/atomic-machine.h: Likewise.
* sysdeps/m68k/coldfire/atomic-machine.h: Likewise.
* sysdeps/m68k/m680x0/m68020/atomic-machine.h: Likewise.
* sysdeps/microblaze/atomic-machine.h: Likewise.
* sysdeps/mips/atomic-machine.h: Likewise.
* sysdeps/powerpc/powerpc32/atomic-machine.h: Likewise.
* sysdeps/powerpc/powerpc64/atomic-machine.h: Likewise.
* sysdeps/s390/atomic-machine.h: Likewise.
* sysdeps/sparc/sparc32/atomic-machine.h: Likewise.
* sysdeps/sparc/sparc32/sparcv9/atomic-machine.h: Likewise.
* sysdeps/sparc/sparc64/atomic-machine.h: Likewise.
* sysdeps/tile/tilegx/atomic-machine.h: Likewise.
* sysdeps/tile/tilepro/atomic-machine.h: Likewise.
* sysdeps/unix/sysv/linux/hppa/atomic-machine.h: Likewise.
* sysdeps/unix/sysv/linux/m68k/coldfire/atomic-machine.h: Likewise.
* sysdeps/unix/sysv/linux/nios2/atomic-machine.h: Likewise.
* sysdeps/unix/sysv/linux/sh/atomic-machine.h: Likewise.
* sysdeps/x86_64/atomic-machine.h: Likewise.
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It's not legal for raw stores to be mixed with atomic operations
on tilepro, since the atomics are managed by kernel fast syscalls.
It's possible for a hardware store and a kernel fast atomic to race
with each other in such a way that the hardware store is lost.
Suppose you have an initial zero value, and you race with a store
of 2 and a kernel cmpxchg from 0 to 1. The legal output is only 2:
either the store hit first and the cmpxchg failed, or the cmpxchg
hit first and succeeded, then was overwritten by the 2. But if
the kernel cmpxchg starts first and loads the zero, then the store
hits and sets the value to 2, the cmpxchg will still decide it was
successful and write the 1, leaving the value illegally set to 1.
Using atomic_exchange variants to implement atomic_store fixes this
problem for tilepro.
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