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sparc64 passes floating point values in the floating point registers.
As the the generic ceil, floor and trunc functions use integer
instructions, it makes sense to provide a VIS3 version consisting in
the the generic version compiled with -mvis3. GCC will then use
movdtox, movxtod, movwtos and movstow instructions.
sparc32 passes the floating point values in the integer registers, so it
doesn't make sense to do the same.
Changelog:
* sysdeps/ieee754/dbl-64/s_trunc.c: Avoid alias renamed.
* sysdeps/ieee754/dbl-64/wordsize-64/s_trunc.c: Likewise.
* sysdeps/ieee754/flt-32/s_truncf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile
[$(subdir) = math && $(have-as-vis3) = yes] (libm-sysdep_routines):
Add s_ceilf-vis3, s_ceil-vis3, s_floorf-vis3, s_floor-vis3,
s_truncf-vis3, s_trunc-vis3.
(CFLAGS-s_ceilf-vis3.c): New. Set to -Wa,-Av9d -mvis3.
(CFLAGS-s_ceil-vis3.c): Likewise.
(CFLAGS-s_floorf-vis3.c): Likewise.
(CFLAGS-s_floor-vis3.c): Likewise.
(CFLAGS-s_truncf-vis3.c): Likewise.
(CFLAGS-s_trunc-vis3.c): Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis3.c: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis3.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_floor.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis3.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-vis3.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-vis3.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.c: Likewise.
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