about summary refs log tree commit diff
path: root/sysdeps/riscv
Commit message (Collapse)AuthorAgeFilesLines
* Use x86_64 backtrace as generic version.Joseph Myers2018-03-211-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No glibc configuration uses the present debug/backtrace.c, whereas several #include the x86_64 version. The x86_64 version is effectively a generic one (using _Unwind_Backtrace from libgcc, which works much more reliably than the built-in functions used by debug/backtrace.c). This patch moves it to debug/backtrace.c and removes all the #includes of the x86_64 version from other architectures which are no longer required. I do not know whether all the other architecture-specific backtrace implementations that are based on _Unwind_Backtrace are required, or whether, where their differences from the generic version do something useful, suitable hooks could be added to the generic version to reduce the duplication involved. Tested with build-many-glibcs.py that installed stripped shared libraries are unchanged by this patch. * sysdeps/x86_64/backtrace.c: Move to .... * debug/backtrace.c: ... here. * sysdeps/aarch64/backtrace.c: Remove file. * sysdeps/alpha/backtrace.c: Likewise. * sysdeps/hppa/backtrace.c: Likewise. * sysdeps/ia64/backtrace.c: Likewise. * sysdeps/mips/backtrace.c: Likewise. * sysdeps/nios2/backtrace.c: Likewise. * sysdeps/riscv/backtrace.c: Likewise. * sysdeps/sh/backtrace.c: Likewise. * sysdeps/tile/backtrace.c: Likewise.
* hurd: add gscope supportSamuel Thibault2018-03-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | * elf/dl-support.c [!THREAD_GSCOPE_IN_TCB] (_dl_thread_gscope_count): Define variable. * sysdeps/generic/ldsodefs.h [!THREAD_GSCOPE_IN_TCB] (struct rtld_global): Add _dl_thread_gscope_count member. * sysdeps/mach/hurd/tls.h: Include <atomic.h>. [!defined __ASSEMBLER__] (THREAD_GSCOPE_GLOBAL, THREAD_GSCOPE_SET_FLAG, THREAD_GSCOPE_RESET_FLAG, THREAD_GSCOPE_WAIT): Define macros. * sysdeps/generic/tls.h: Document THREAD_GSCOPE_IN_TCB. * sysdeps/aarch64/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/alpha/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/arm/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/hppa/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/i386/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/ia64/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/m68k/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/microblaze/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/mips/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/nios2/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/powerpc/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/riscv/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/s390/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/sh/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/sparc/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/tile/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1. * sysdeps/x86_64/nptl/tls.h: Define THREAD_GSCOPE_IN_TCB to 1.
* RISC-V: fmax/fmin: Handle signalling NaNs correctly.Andrew Waterman2018-02-224-8/+36
| | | | | | | | | RISC-V's fmax(sNAN,4) returns 4 but glibc expects it to return qNAN. * sysdeps/riscv/rvd/s_fmax.c (__fmax): Handle sNaNs correctly. * sysdeps/riscv/rvd/s_fmin.c (__fmin): Likewise. * sysdeps/riscv/rvf/s_fmaxf.c (__fmaxf): Likewise. * sysdeps/riscv/rvf/s_fminf.c (__fminf): Likewise.
* RISC-V: Do not initialize $gp in TLS macros.DJ Delorie2018-02-221-17/+3
| | | | | RISC-V TLS doesn't require GP to be initialized, and doing so breaks TLS in a shared object.
* RISC-V: Build InfastructurePalmer Dabbelt2018-01-299-0/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch lays out the top-level orginazition of the RISC-V port. It contains all the Implies files as well as various other fragments of build infastructure for the RISC-V port. This contains the only change to a shared file: config.h.in. RISC-V is a family of base ISAs with optional extensions. The base ISAs are RV32I and RV64I, which are 32-bit and 64-bit integer-only ISAs, but this port currently only supports RV64I based systems. Support for RISC-V lives in in sysdeps/riscv. In addition to these ISAs, our glibc port supports most of the currently-defined extensions: the A extension for atomics, the M extension for multiplication, the C extension for compressed instructions, and the F/D extensions for single/double precision IEEE floating-point. Most of these extensions are handled by GCC, but glibc defines various floating-point wrappers and emulation routines as well as some atomic wrappers. We support running glibc-based programs on Linux, the support for which lives in sysdeps/unix/sysv/linux/riscv. 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/Implies: New file. * sysdeps/riscv/Makefile: Likewise. * sysdeps/riscv/configure: Likewise. * sysdeps/riscv/configure.ac: Likewise. * sysdeps/riscv/nptl/Makefile: Likewise. * sysdeps/riscv/preconfigure: Likewise. * sysdeps/riscv/rv64/Implies-after: Likewise. * sysdeps/riscv/rv64/rvd/Implies: Likewise. * sysdeps/riscv/rv64/rvf/Implies: Likewise. * sysdeps/unix/sysv/linux/riscv/Implies: Likewise. * sysdeps/unix/sysv/linux/riscv/Makefile: Likewise. * sysdeps/unix/sysv/linux/riscv/Versions: Likewise. * sysdeps/unix/sysv/linux/riscv/configure: Likewise. * sysdeps/unix/sysv/linux/riscv/configure.ac: Likewise. * sysdeps/unix/sysv/linux/riscv/ldd-rewrite.sed: Likewise. * sysdeps/unix/sysv/linux/riscv/rv64/Implies: Likewise. * sysdeps/unix/sysv/linux/riscv/rv64/Makefile: Likewise. * sysdeps/unix/sysv/linux/riscv/shlib-versions: Likewise.
* RISC-V: Add ABI ListsPalmer Dabbelt2018-01-294-0/+4398
| | | | | | | | | | | | | | | | | | | | | | | I started with the aarch64 ABI lists and manually went through each difference, ensuring that the missing entries had been deprecated along the line. Darius generated the ulps files by running the test cases on QEMU. 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/nofpu/libm-test-ulps: New file. * sysdeps/riscv/nofpu/libm-test-ulps-name: Likewise. * sysdeps/riscv/rv64/rvd/libm-test-ulps: Likewise. * sysdeps/riscv/rv64/rvd/libm-test-ulps-name: Likewise. * sysdeps/unix/sysv/linux/riscv/localplt.data: Likewise. * sysdeps/unix/sysv/linux/riscv/rv64/c++-types.data: Likewise. * sysdeps/unix/sysv/linux/riscv/rv64/ld.abilist: Likewise. * sysdeps/unix/sysv/linux/riscv/rv64/libanl.abilist: Likewise. * sysdeps/unix/sysv/linux/riscv/rv64/libc.abilist: Likewise. * sysdeps/unix/sysv/linux/riscv/rv64/libdl.abilist: Likewise. * sysdeps/unix/sysv/linux/riscv/rv64/libm.abilist: Likewise. * sysdeps/unix/sysv/linux/riscv/rv64/libnsl.abilist: Likewise. * sysdeps/unix/sysv/linux/riscv/rv64/librt.abilist: Likewise. * sysdeps/unix/sysv/linux/riscv/rv64/libutil.abilist: Likewise.
* RISC-V: Linux ABIPalmer Dabbelt2018-01-292-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux-specific code that is required for maintaining ABI compatibility. This doesn't contain the actual system call interface, that is split out in order to avoid having a patch that's too big. 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/nptl/pthread-offsets.h: New file. * sysdeps/riscv/nptl/pthreaddef.h: Likewise. * sysdeps/unix/sysv/linux/riscv/bits/fcntl.h: Likewise. * sysdeps/unix/sysv/linux/riscv/bits/mman.h: Likewise. * sysdeps/unix/sysv/linux/riscv/bits/sigcontext.h: Likewise. * sysdeps/unix/sysv/linux/riscv/dl-cache.h: Likewise. * sysdeps/unix/sysv/linux/riscv/flush-icache.c: Likewise. * sysdeps/unix/sysv/linux/riscv/getcontext.S: Likewise. * sysdeps/unix/sysv/linux/riscv/init-first.c: Likewise. * sysdeps/unix/sysv/linux/riscv/libc-vdso.h: Likewise. * sysdeps/unix/sysv/linux/riscv/makecontext.c: Likewise. * sysdeps/unix/sysv/linux/riscv/readelflib.c: Likewise. * sysdeps/unix/sysv/linux/riscv/register-dump.h: Likewise. * sysdeps/unix/sysv/linux/riscv/setcontext.S: Likewise. * sysdeps/unix/sysv/linux/riscv/sigcontextinfo.h: Likewise. * sysdeps/unix/sysv/linux/riscv/swapcontext.S: Likewise. * sysdeps/unix/sysv/linux/riscv/sys/cachectl.h: Likewise. * sysdeps/unix/sysv/linux/riscv/sys/procfs.h: Likewise. * sysdeps/unix/sysv/linux/riscv/sys/ucontext.h: Likewise. * sysdeps/unix/sysv/linux/riscv/sys/user.h: Likewise. * sysdeps/unix/sysv/linux/riscv/ucontext-macros.h: Likewise. * sysdeps/unix/sysv/linux/riscv/ucontext_i.sym: Likewise.
* RISC-V: Linux Syscall InterfacePalmer Dabbelt2018-01-291-0/+2
| | | | | | | | | | | | | | | | | Contains the Linux system call interface, as well as the definitions of a handful of system calls. 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/nptl/nptl-sysdep.S: New file. * sysdeps/unix/sysv/linux/riscv/arch-fork.h: Likewise. * sysdeps/unix/sysv/linux/riscv/clone.S: Likewise. * sysdeps/unix/sysv/linux/riscv/profil-counter.h: Likewise. * sysdeps/unix/sysv/linux/riscv/pt-vfork.S: Likewise. * sysdeps/unix/sysv/linux/riscv/syscall.c: Likewise. * sysdeps/unix/sysv/linux/riscv/sysdep.S: Likewise. * sysdeps/unix/sysv/linux/riscv/sysdep.h: Likewise. * sysdeps/unix/sysv/linux/riscv/vfork.S: Likewise.
* RISC-V: Atomic and Locking RoutinesPalmer Dabbelt2018-01-293-0/+109
| | | | | | | | | | | | | This patch implements various atomic and locking routines on RISC-V. We mandate the A extension on Linux-capable RISC-V systems, so this can rely on always having the various atomic instructions availiable. 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/nptl/bits/pthreadtypes-arch.h: New file. * sysdeps/riscv/nptl/bits/semaphore.h: Likewise. * sysdeps/riscv/nptl/libc-lowlevellock.c: Likewise. * sysdeps/unix/sysv/linux/riscv/atomic-machine.h: Likewise.
* RISC-V: Hard Float SupportPalmer Dabbelt2018-01-2958-0/+2161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains hardware floating-point support for the RISC-V ISA. While we currently only support hard-float systems with both the F and D extensions, I've left the F-specific code split out into seperate folders in order to ease adding support for F-only and RV32I-based systems in the future. I gave this a quick once-over and believe I've removed all the code that implements RV32IF, RV32IFD, and RV64IF targets. 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/rv64/rvd/s_ceil.c: New file. * sysdeps/riscv/rv64/rvd/s_floor.c: Likewise. * sysdeps/riscv/rv64/rvd/s_llrint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_llround.c: Likewise. * sysdeps/riscv/rv64/rvd/s_lrint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_lround.c: Likewise. * sysdeps/riscv/rv64/rvd/s_nearbyint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_rint.c: Likewise. * sysdeps/riscv/rv64/rvd/s_round.c: Likewise. * sysdeps/riscv/rv64/rvd/s_roundeven.c: Likewise. * sysdeps/riscv/rv64/rvd/s_trunc.c: Likewise. * sysdeps/riscv/rv64/rvf/s_llrintf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_llroundf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_lrintf.c: Likewise. * sysdeps/riscv/rv64/rvf/s_lroundf.c: Likewise. * sysdeps/riscv/rvd/e_sqrt.c: Likewise. * sysdeps/riscv/rvd/s_copysign.c: Likewise. * sysdeps/riscv/rvd/s_finite.c: Likewise. * sysdeps/riscv/rvd/s_fma.c: Likewise. * sysdeps/riscv/rvd/s_fmax.c: Likewise. * sysdeps/riscv/rvd/s_fmin.c: Likewise. * sysdeps/riscv/rvd/s_fpclassify.c: Likewise. * sysdeps/riscv/rvd/s_isinf.c: Likewise. * sysdeps/riscv/rvd/s_isnan.c: Likewise. * sysdeps/riscv/rvd/s_issignaling.c: Likewise. * sysdeps/riscv/rvf/e_sqrtf.c: Likewise. * sysdeps/riscv/rvf/fclrexcpt.c: Likewise. * sysdeps/riscv/rvf/fegetenv.c: Likewise. * sysdeps/riscv/rvf/fegetmode.c: Likewise. * sysdeps/riscv/rvf/fegetround.c: Likewise. * sysdeps/riscv/rvf/feholdexcpt.c: Likewise. * sysdeps/riscv/rvf/fesetenv.c: Likewise. * sysdeps/riscv/rvf/fesetexcept.c: Likewise. * sysdeps/riscv/rvf/fesetmode.c: Likewise. * sysdeps/riscv/rvf/fesetround.c: Likewise. * sysdeps/riscv/rvf/feupdateenv.c: Likewise. * sysdeps/riscv/rvf/fgetexcptflg.c: Likewise. * sysdeps/riscv/rvf/fraiseexcpt.c: Likewise. * sysdeps/riscv/rvf/fsetexcptflg.c: Likewise. * sysdeps/riscv/rvf/ftestexcept.c: Likewise. * sysdeps/riscv/rvf/get-rounding-mode.h: Likewise. * sysdeps/riscv/rvf/math_private.h: Likewise. * sysdeps/riscv/rvf/s_ceilf.c: Likewise. * sysdeps/riscv/rvf/s_copysignf.c: Likewise. * sysdeps/riscv/rvf/s_finitef.c: Likewise. * sysdeps/riscv/rvf/s_floorf.c: Likewise. * sysdeps/riscv/rvf/s_fmaf.c: Likewise. * sysdeps/riscv/rvf/s_fmaxf.c: Likewise. * sysdeps/riscv/rvf/s_fminf.c: Likewise. * sysdeps/riscv/rvf/s_fpclassifyf.c: Likewise. * sysdeps/riscv/rvf/s_isinff.c: Likewise. * sysdeps/riscv/rvf/s_isnanf.c: Likewise. * sysdeps/riscv/rvf/s_issignalingf.c: Likewise. * sysdeps/riscv/rvf/s_nearbyintf.c: Likewise. * sysdeps/riscv/rvf/s_rintf.c: Likewise. * sysdeps/riscv/rvf/s_roundevenf.c: Likewise. * sysdeps/riscv/rvf/s_roundf.c: Likewise. * sysdeps/riscv/rvf/s_truncf.c: Likewise.
* RISC-V: Generic <math.h> and soft-fp RoutinesPalmer Dabbelt2018-01-297-0/+330
| | | | | | | | | | | | | | | | | This patch contains the miscellaneous math routines and headers we have implemented for RISC-V. This includes things from <math.h> that aren't completely ISA-generic, floating-point bit manipulation, and soft-fp hooks. 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/bits/fenv.h: New file. * sysdeps/riscv/e_sqrtl.c: Likewise. * sysdeps/riscv/fpu_control.h: Likewise. * sysdeps/riscv/math-tests.h: Likewise. * sysdeps/riscv/nofpu/Implies: Likewise. * sysdeps/riscv/sfp-machine.h: Likewise. * sysdeps/riscv/tininess.h: Likewise.
* RISC-V: Thread-Local Storage SupportPalmer Dabbelt2018-01-295-0/+264
| | | | | | | | | | | | | | | | | This patch implements TLS support for RISC-V. We support all four standard TLS addressing modes (LE, IE, LD, and GD) when running on Linux via NPTL. There is a draft psABI document that defines our TLS ABI here https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#thread-local-storage 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/dl-tls.h: New file. * sysdeps/riscv/libc-tls.c: Likewise. * sysdeps/riscv/nptl/tcb-offsets.sym: Likewise. * sysdeps/riscv/nptl/tls.h: Likewise. * sysdeps/riscv/stackinfo.h: Likewise.
* RISC-V: ABI ImplementationPalmer Dabbelt2018-01-2923-0/+1154
This patch contains code that needs to directly know about the RISC-V ABI, which is specified in a work-in-progress psABI document: https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md This is meant to contain all the RISC-V code that needs to explicitly name registers or manage in-memory structure layout. This does not contain any of the Linux-specific code. 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/__longjmp.S: New file. * sysdeps/riscv/backtrace.c: Likewise. * sysdeps/riscv/bits/endian.h: Likewise. * sysdeps/riscv/bits/setjmp.h: Likewise. * sysdeps/riscv/bits/wordsize.h: Likewise. * sysdeps/riscv/bsd-_setjmp.c: Likewise. * sysdeps/riscv/bsd-setjmp.c: Likewise. * sysdeps/riscv/dl-trampoline.S: Likewise. * sysdeps/riscv/gccframe.h: Likewise. * sysdeps/riscv/jmpbuf-offsets.h: Likewise. * sysdeps/riscv/jmpbuf-unwind.h: Likewise. * sysdeps/riscv/machine-gmon.h: Likewise. * sysdeps/riscv/memusage.h: Likewise. * sysdeps/riscv/setjmp.S: Likewise. * sysdeps/riscv/sys/asm.h: Likewise. * sysdeps/riscv/tls-macros.h: Likewise.
generated by cgit-pink 1.4.1 (git 2.36.1) at 2024-07-12 20:34:00 +0000