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* PowerPC: strspn optimization for PPC64/POWER7Vidya Ranganathan2014-03-116-1/+279
| | | | | | | | The optimization is achieved by following techniques: > hashing of needle. > hashing avoids scanning of duplicate entries in needle across the string. > initializing the hash table with Vector instructions (VSX) by quadword access. > unrolling when scanning for character in string across hash table.
* PowerPC: strncat optimization for PPC64Adhemerval Zanella2014-03-106-1/+333
| | | | | | | | The optimization is achieved by following techniques: 1. Doubleword aligned memory access and compares using cmpb instruction. 2. Loop unrolling for byte load/store. 3. CPU pre-fetch to avoid cache miss.
* PowerPC: strrchr optimization for POWER7/PPC64Rajalakshmi Srinivasaraghavan2014-03-036-1/+372
| | | | | | This patch optimizes strrchr() for ppc64. It uses aligned memory access along with cmpb instruction and CPU prefetch to avoid cache misses for speed improvement.
* PowerPC: llround/llroundf POWER8 optimizationAdhemerval Zanella2014-02-274-5/+86
| | | | | | This patch add a optimized llround/llroundf implementation for POWER8 using the new Move From VSR Doubleword instruction to gains some cycles from FP to GRP register move.
* PowerPC: llrint/llrintf POWER8 optimizationAdhemerval Zanella2014-02-274-3/+83
| | | | | | This patch add a optimized llrint/llrintf implementation for POWER8 using the new Move From VSR Doubleword instruction to gains some cycles from FP to GRP register move.
* PowerPC: Optimized finite/finitef for POWER8Adhemerval Zanella2014-02-276-6/+102
| | | | | | This patch add a optimized finite/finitef implementation for POWER8 using the new Move From VSR Doubleword instruction to gains some cycles from FP to GRP register move.
* PowerPC: Optimized isinf/isinff for POWER8Adhemerval Zanella2014-02-276-6/+108
| | | | | | This patch add a optimized isinf/isinff implementation for POWER8 using the new Move From VSR Doubleword instruction to gains some cycles from FP to GRP register move.
* PowerPC: Optimized isnan/isnanf for POWER8Adhemerval Zanella2014-02-276-17/+111
| | | | | | This patch add a optimized isnan/isnanf implementation for POWER8 using the new Move From VSR Doubleword instruction to gains some cycles from FP to GRP register move.
* Use glibc_likely instead __builtin_expect.Ondřej Bílka2014-02-102-5/+5
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* PowerPC: remove wrong truncl implementation for PowerPC64Adhemerval Zanella2014-01-081-120/+0
| | | | | | | | | | | | | | | The truncl assembly implementation (sysdeps/powerpc/powerpc64/fpu/s_truncl.S) returns wrong results for some inputs where first double is a exact integer and the precision is determined by second long double. Checking on implementation comments and history, I am very confident the assembly implementation was based on a version before commit 5c68d401698a58cf7da150d9cce769fa6679ba5f that fixes BZ#2423 (Errors in long double (ldbl-128ibm) rounding functions in glibc-2.4). By just removing the implementation and make the build select sysdeps/ieee754/ldbl-128ibm/s_truncl.c instead it fixes tgammal issues regarding wrong result sign.
* PowerPC: Fix compiler warningsAdhemerval Zanella2014-01-034-4/+4
| | | | | This patch fixes some compile warnings related to extra tokens at end of #undef directive from multilib patchset.
* Update copyright notices with scripts/update-copyrightsAllan McRae2014-01-01259-259/+259
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* Fix uses of CALL_MCOUNT in ppc64 assembler sourcesAndreas Schwab2013-12-193-2/+6
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* PowerPC: multiarch hypot/hypotf for PowerPC64Adhemerval Zanella2013-12-137-1/+158
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* PowerPC: multiarch modf/modff for PowerPC64Adhemerval Zanella2013-12-137-2/+173
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* PowerPC: multiarch logb/logbl/logbf for PowerPC64Adhemerval Zanella2013-12-1310-1/+244
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* PowerPC: multiarch isinf/isinff for PowerPC64Adhemerval Zanella2013-12-136-2/+178
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* PowerPC: multiarch finite/finitef for PowerPC64Adhemerval Zanella2013-12-136-2/+186
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* PowerPC: multiarch llrint/lrint for PowerPC64Adhemerval Zanella2013-12-135-1/+122
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* PowerPC: multiarch copysign/copysignf for PowerPC64Adhemerval Zanella2013-12-135-2/+155
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* PowerPC: multiarch trunc/truncf for PowerPC64Adhemerval Zanella2013-12-137-1/+188
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* PowerPC: multiarch round/roundf for PowerPC64Adhemerval Zanella2013-12-137-1/+188
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* PowerPC: multiarch floor/floorf for PowerPC64Adhemerval Zanella2013-12-137-1/+190
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* PowerPC: multiarch ceil/ceilf for PowerPC64Adhemerval Zanella2013-12-137-1/+188
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* PowerPC: multiarch llround/lround for PowerPC64Adhemerval Zanella2013-12-136-1/+155
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* PowerPC: multiarch isnan/isnanf for PowerPC64Adhemerval Zanella2013-12-138-0/+264
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* PowerPC: Adjust multiarch Implies for PowerPC64Adhemerval Zanella2013-12-135-0/+5
| | | | | | This patch adds Implies files on multiarch folder for POWER chips so multirach is enabled when building with --with-cpu and powerN option.
* PowerPC: Cleaning up uneeded sqrt routinesAdhemerval Zanella2013-12-132-108/+0
| | | | | | | | For PPC64, all the wrappers at sysdeps are superfluous: they are basically the same implementation from math/w_sqrt.c with the '#ifdef _IEEE_LIBM'. And the power4 version just force the 'fsqrt' instruction utilization with an inline assembly, which is already handled by math_private.h __ieee754_sqrt implementation.
* PowerPC: multiarch stpcpy for PowerPC64Adhemerval Zanella2013-12-135-1/+130
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* PowerPC: multiarch strcpy for PowerPC64Adhemerval Zanella2013-12-135-1/+123
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* PowerPC: multiarch wordcopy for PowerPC64Adhemerval Zanella2013-12-135-1/+146
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* PowerPC: multiarch wcscpy for PowerPC64.Adhemerval Zanella2013-12-136-1/+106
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* PowerPC: multiarch wcsrchr for PowerPC64Adhemerval Zanella2013-12-136-1/+107
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* PowerPC: multiarch wcschr for PowerPC64Adhemerval Zanella2013-12-136-1/+109
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* PowerPC: multiarch strchrnul for PowerPC64Adhemerval Zanella2013-12-135-1/+105
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* PowerPC: multiarch strchr for PowerPC64Adhemerval Zanella2013-12-136-1/+143
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* PowerPC: multiarch strncmp for PowerPC64Adhemerval Zanella2013-12-136-1/+169
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* PowerPC: multiarch strncasecmp for PowerPC64Adhemerval Zanella2013-12-136-1/+152
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* PowerPC: multiarch strcasecmp for PowerPC64Adhemerval Zanella2013-12-136-1/+182
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* PowerPC: multiarch strnlen for PowerPC64Adhemerval Zanella2013-12-135-1/+104
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* PowerPC: multiarch strlen for PowerPC64Adhemerval Zanella2013-12-135-1/+120
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* PowerPC: multiarch rawmemchr for PowerPC64Adhemerval Zanella2013-12-135-1/+102
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* PowerPC: multiarch memrchr for PowerPC64Adhemerval Zanella2013-12-135-1/+107
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* PowerPC: multiarch memchr for PowerPC64Adhemerval Zanella2013-12-135-1/+107
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* PowerPC: multiarch mempcpy for PowerPC64Adhemerval Zanella2013-12-135-1/+109
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* PowerPC: multiarch memset/bzero for PowerPC64Adhemerval Zanella2013-12-1316-1/+385
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* PowerPC: multirach memcmp for PowerPC64Adhemerval Zanella2013-12-136-1/+166
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* PowerPC: multiarch memcpy for PowerPC64Adhemerval Zanella2013-12-1310-0/+379
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* PowerPC: Adjust multiarch Implies for PowerPC64Adhemerval Zanella2013-12-1315-2/+14
| | | | | | This patch adds Implies files on multiarch folder for POWER chips so multirach is enabled when building with --with-cpu and powerN option.
* PowerPC: Optimized mpn functions for PowerPC64/POWER7Adhemerval Zanella2013-12-062-0/+121
| | | | | This patch add optimized __mpn_add_n/__mpn_sub_n for PowerPC64/POWER7. They are originally from GMP with adjustments for GLIBC.
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