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* Do not raise "inexact" from powerpc64 ceil, floor, trunc (bug 15479).Joseph Myers2016-05-256-18/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Continuing fixes for ceil, floor and trunc functions not to raise the "inexact" exception, this patch fixes the versions used on older powerpc64 processors. As was done with the round implementations some time ago, the save of floating-point state is moved after the first floating-point operation on the input to ensure that any "invalid" exception from signaling NaN input is included in the saved state, and then the whole state gets restored rather than just the rounding mode. This has no effect on configurations using the power5+ code, since such processors can do these operations with a single instruction (and those instructions do not set "inexact", so are correct for TS 18661-1 semantics). Tested for powerpc64. [BZ #15479] * sysdeps/powerpc/powerpc64/fpu/s_ceil.S (__ceil): Move save of floating-point state after first floating-point operation on input. Restore full floating-point state instead of just rounding mode. * sysdeps/powerpc/powerpc64/fpu/s_ceilf.S (__ceilf): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floor.S (__floor): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floorf.S (__floorf): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_trunc.S (__trunc): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_truncf.S (__truncf): Likewise.
* powerpc: Fix operand prefixesGabriel F. T. Gomes2016-05-041-4/+4
| | | | | | | | | | | | | | The file sysdeps/powerpc/sysdeps.h defines aliases for condition register operands. E.g.: 'cr7' means condition register 7. On the one hand, this increases readability, as it makes it easier for readers to know whether the operand is a condition register, a general purpose register or an immediate. On the other hand, this permits that condition registers be written as if they were general purpose, and vice-versa, thus reducing the readability of the code. This commit removes some of these unintentional misuses. The changes have no effect on the final code. Checked with objdump.
* powerpc: Zero pad using memset in strncpy/stpncpyGabriel F. T. Gomes2016-04-291-67/+56
| | | | | | | Call __memset_power8 to pad, with zeros, the remaining bytes in the dest string on __strncpy_power8 and __stpncpy_power8. This improves performance when n is larger than the input string, giving ~30% gain for larger strings without impacting much shorter strings.
* powerpc: Add optimized strcspn for P8Paul E. Murphy2016-04-258-29/+151
| | | | | A few minor adjustments to the P8 strspn gives us an almost equally optimized P8 strcspn.
* powerpc: strcasestr optmization for power8Rajalakshmi Srinivasaraghavan2016-04-228-1/+693
| | | | | | This patch optimizes strcasestr function for power >= 8 systems. The average improvement of this optimization is ~40% and compares 16 bytes at a time using vector instructions. This patch is tested on powerpc64 and powerpc64le.
* powerpc: Optimization for strlen for POWER8.Carlos Eduardo Seo2016-04-155-4/+345
| | | | | This implementation takes advantage of vectorization to improve performance of the loop over the current strlen implementation for POWER7.
* powerpc: Add optimized P8 strspnPaul E. Murphy2016-04-076-1/+289
| | | | | | | This utilizes vectors and bitmasks. For small needle, large haystack, the performance improvement is upto 8x. For short strings (0-4B), the cost of computing the bitmask dominates, and is a tad slower.
* Remove powerpc64 strspn, strcspn, and strpbrk implementationAdhemerval Zanella2016-04-013-406/+0
| | | | | | | | | | | | | This patch removes the powerpc64 optimized strspn, strcspn, and strpbrk assembly implementation now that the default C one implements the same strategy. On internal glibc benchtests current implementations shows similar performance with -O2. Tested on powerpc64le (POWER8). * sysdeps/powerpc/powerpc64/strcspn.S: Remove file. * sysdeps/powerpc/powerpc64/strpbrk.S: Remove file. * sysdeps/powerpc/powerpc64/strspn.S: Remove file.
* powerpc: Rearrange cfi_offset callsRajalakshmi Srinivasaraghavan2016-03-113-21/+21
| | | | | This patch rearranges cfi_offset() calls after the last store so as to avoid extra DW_CFA_advance opcodes in unwind information.
* Update copyright dates with scripts/update-copyrights.Joseph Myers2016-01-04305-305/+305
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* powerpc: Add basic support for POWER9 sans hwcap.Carlos Eduardo Seo2015-12-224-0/+6
| | | | This patch adds the minimum changes for supporting the POWER9 processor.
* powerpc: Add hwcap/hwcap2/platform data to TCB.Carlos Eduardo Seo2015-12-031-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a new feature for powerpc. In order to get faster access to the HWCAP/HWCAP2 bits and platform number (i.e. for implementing __builtin_cpu_is () / __builtin_cpu_supports () in GCC) without the overhead of reading from the auxiliary vector, we now reserve space for them in the TCB. This is an ABI change for GLIBC 2.23. A new versioned symbol '__parse_hwcap_and_convert_at_platform' is available to get the data from the auxiliary vector and parse it, and store it for later use in the TLS initialization code. This function is called very early (in _dl_sysdep_start () via DL_PLATFORM_INFO for the dynamic linking case, and in __libc_start_main () for the static linking case) to make sure the data is available at the time of TLS initialization. * sysdeps/powerpc/Makefile (sysdep-dl-routines): Add hwcapinfo. (sysdep_routines): Likewise. (sysdep-rtld-routines): Likewise. [$(subdir) = nptl](tests): Add test-get_hwcap and test-get_hwcap-static [$(subdir) = nptl](tests-static): test-get_hwcap-static * sysdeps/powerpc/Versions: Added new __parse_hwcap_and_convert_at_platform symbol to GLIBC-2.23. * sysdeps/powerpc/hwcapinfo.c: New file. (__tcb_parse_hwcap_and_convert_at_platform): New function to initialize and parse hwcap, hwcap2 and platform number information. * sysdeps/powerpc/hwcapinfo.h: New file. Creates global variables to store HWCAP+HWCAP2 and platform number. * sysdeps/powerpc/nptl/tcb-offsets.sym: Added new offsets for HWCAP+HWCAP2 and platform number in the TCB. * sysdeps/powerpc/nptl/tls.h: New functionality. Stores the HWCAP, HWCAP2 and platform number in the TCB. (dtv): Added new fields for HWCAP+HWCAP2 and platform number. (TLS_INIT_TP): Included calls to add the hwcap and at_platform values in the TCB in TP initialization. (TLS_DEFINE_INIT_TP): Likewise. (THREAD_GET_HWCAP): New macro. (THREAD_SET_HWCAP): Likewise. (THREAD_GET_AT_PLATFORM): Likewise. (THREAD_SET_AT_PLATFORM): Likewise. * sysdeps/powerpc/powerpc32/dl-machine.h: (dl_platform_init): New function that calls __parse_hwcap_and_convert_at_platform for the dymanic linking case for powerpc32. * sysdeps/powerpc/powerpc64/dl-machine.h: Likewise, for powerpc64. * sysdeps/powerpc/test-get_hwcap-static.c: New file. Testcase for this functionality, static linking case. * sysdeps/powerpc/test-get_hwcap.c: New file. Likewise, dynamic linking case. * sysdeps/unix/sysv/linux/powerpc/libc-start.c: Added call to __parse_hwcap_and_convert_at_platform for the static linking case. * sysdeps/unix/sysv/linux/powerpc/powerpc32/ld.abilist: Included the new __parse_hwcap_and_convert_at_platform symbol in the ABI list for GLIBC 2.23. * sysdeps/unix/sysv/linux/powerpc/powerpc64/ld-le.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc64/ld.abilist: Likewise.
* Fix powerpc round, roundf spurious "inexact" (bug 19238).Joseph Myers2015-11-122-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The powerpc hard-float round and roundf functions, both 32-bit and 64-bit, raise spurious "inexact" exceptions for integer arguments from adding 0.5 and rounding to integer toward zero. Since these functions already save and restore the rounding mode, it's natural to make them restore the full floating-point state instead to fix this bug, which this patch does. The save of the state is moved after the first floating-point operation on the input so that any "invalid" exceptions from signaling NaN inputs are properly preserved. As a consequence of this approach to the fix, "inexact" for noninteger arguments (disallowed by TS 18661-1 but not by C99/C11, see bug 15479) is also avoided for these implementations; this is *not* a general fix for bug 15479 since plenty of other implementations of various functions still raise spurious "inexact" for noninteger arguments. This issue and fix do not apply to builds using power5+ versions of round and roundf, which use the frin instruction and avoid "inexact" exceptions that way. This patch should get hard-float powerpc32 and powerpc64 (default function implementations) back to a state where test-float and test-double will pass after ulps regeneration. Tested for powerpc32 and powerpc64. [BZ #15479] [BZ #19238] * sysdeps/powerpc/powerpc32/fpu/s_round.S (__round): Save floating-point state after first operation on input. Restore full state rather than just rounding mode. * sysdeps/powerpc/powerpc32/fpu/s_roundf.S (__roundf): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_round.S (__round): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_roundf.S (__roundf): Likewise.
* Fix powerpc64 lround, lroundf, llround, llroundf spurious "inexact" ↵Joseph Myers2015-11-122-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | exceptions (bug 19235). Similar to bug 19134 for powerpc32, the powerpc64 implementations of lround, lroundf, llround, llroundf can raise spurious "inexact" exceptions for integer arguments from adding 0.5 then converting to integer (this does not apply to the power5+ version for double, which uses the frin instruction which is defined never to raise "inexact"; I don't know why power5+ doesn't use that version for float as well). This patch fixes the bug in a similar way to the powerpc32 bug, by testing for integers (adding and subtracting 2^52 and comparing with the value before that addition and subtraction) and not adding 0.5 in that case. The powerpc maintainers may wish to look at making power5+ / power6x / power8 use frin for float lround / llround as well as for double, unless there's some reason I've missed that this isn't beneficial. Tested for powerpc64. [BZ #19235] * sysdeps/powerpc/powerpc64/fpu/s_llround.S (__llround): Do not add 0.5 to integer arguments. * sysdeps/powerpc/powerpc64/fpu/s_llroundf.S (__llroundf): Likewise. (.LC2): New object.
* Fix powerpc nearbyint wrongly clearing "inexact" and leaving traps disabled ↵Joseph Myers2015-11-112-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (bug 19228). Similar to bug 15491 recently fixed for x86_64 / x86, the powerpc (both powerpc32 and powerpc64) hard-float implementations of nearbyintf and nearbyint wrongly clear an "inexact" exception that was raised before the function was called; this shows up as failure of the test math/test-nearbyint-except added when that bug was fixed. They also wrongly leave traps on "inexact" disabled if they were enabled before the function was called. This patch fixes the bugs similar to how the x86 bug was fixed: saving and restoring the whole floating-point state, both to restore the original "inexact" flag state and to restore the original state of whether traps on "inexact" were enabled. Because there's a convenient point in the powerpc implementations to save state after any sNaN arguments will have raised "invalid" but before "inexact" traps need to be disabled, no special handling for "invalid" is needed as in the x86 version. Tested for powerpc64 and powerpc32, where it fixes the math/test-nearbyint-except failure as well as fixing the new test math/test-nearbyint-except-2 added by this patch. Also tested for x86_64 and x86 that the new test passes. If powerpc experts see a more efficient way of doing this (e.g. instruction positioning that's better for pipelines on typical processors) then of course followups optimizing the fix are welcome. [BZ #19228] * sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S (__nearbyint): Save and restore full floating-point state. * sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S (__nearbyintf): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyint.S (__nearbyint): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyintf.S (__nearbyintf): Likewise. * math/test-nearbyint-except-2.c: New file. * math/Makefile (tests): Add test-nearbyint-except-2.
* PowerPC: Add comments to optimized strncpyGabriel F. T. Gomes2015-10-011-2/+38
| | | | | * sysdeps/powerpc/powerpc64/power8/strncpy.S: Added comments to some assembly instructions.
* PowerPC: Fix operand prefixesGabriel F. T. Gomes2015-10-011-6/+6
| | | | | | | | | | | | | | | | | | | | The file sysdeps/powerpc/sysdeps.h defines aliases for register operands, which add the letter 'r' as a prefix to a register name. E.g.: register 20 can be written as 'r20', instead of '20'. On the one hand, this increases readability, as it makes it easier for readers to know whether the operand is a register or an immediate. On the other hand, this permits that immediate operands be written as if they were registers, and vice-versa, thus reducing the readability of the code. This commit removes some of these unintentional misuses. This commit also increases readability of the code by adding the prefix 'cr' to some uses of the control register. Both changes have no effect on the final code. Checked with objdump. * sysdeps/powerpc/powerpc64/power8/strncpy.S: Remove or add register prefix from operands.
* Move bits/atomic.h to atomic-machine.h (bug 14912).Joseph Myers2015-09-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It was noted in <https://sourceware.org/ml/libc-alpha/2012-09/msg00305.html> that the bits/*.h naming scheme should only be used for installed headers. This patch renames bits/atomic.h to atomic-machine.h to follow that convention. This is the only change in this series that needs to change the filename rather than simply removing a directory level (because both atomic.h and bits/atomic.h exist at present). Tested for x86_64 (testsuite, and that installed stripped shared libraries are unchanged by the patch). [BZ #14912] * sysdeps/aarch64/bits/atomic.h: Move to ... * sysdeps/aarch64/atomic-machine.h: ...here. (_AARCH64_BITS_ATOMIC_H): Rename macro to _AARCH64_ATOMIC_MACHINE_H. * sysdeps/alpha/bits/atomic.h: Move to ... * sysdeps/alpha/atomic-machine.h: ...here. * sysdeps/arm/bits/atomic.h: Move to ... * sysdeps/arm/atomic-machine.h: ...here. Update comments. * bits/atomic.h: Move to ... * sysdeps/generic/atomic-machine.h: ...here. (_BITS_ATOMIC_H): Rename macro to _ATOMIC_MACHINE_H. * sysdeps/i386/bits/atomic.h: Move to ... * sysdeps/i386/atomic-machine.h: ...here. * sysdeps/ia64/bits/atomic.h: Move to ... * sysdeps/ia64/atomic-machine.h: ...here. * sysdeps/m68k/coldfire/bits/atomic.h: Move to ... * sysdeps/m68k/coldfire/atomic-machine.h: ...here. (_BITS_ATOMIC_H): Rename macro to _ATOMIC_MACHINE_H. * sysdeps/m68k/m680x0/m68020/bits/atomic.h: Move to ... * sysdeps/m68k/m680x0/m68020/atomic-machine.h: ...here. * sysdeps/microblaze/bits/atomic.h: Move to ... * sysdeps/microblaze/atomic-machine.h: ...here. * sysdeps/mips/bits/atomic.h: Move to ... * sysdeps/mips/atomic-machine.h: ...here. (_MIPS_BITS_ATOMIC_H): Rename macro to _MIPS_ATOMIC_MACHINE_H. * sysdeps/powerpc/bits/atomic.h: Move to ... * sysdeps/powerpc/atomic-machine.h: ...here. Update comments. * sysdeps/powerpc/powerpc32/bits/atomic.h: Move to ... * sysdeps/powerpc/powerpc32/atomic-machine.h: ...here. Update comments. Include <atomic-machine.h> instead of <bits/atomic.h>. * sysdeps/powerpc/powerpc64/bits/atomic.h: Move to ... * sysdeps/powerpc/powerpc64/atomic-machine.h: ...here. Include <atomic-machine.h> instead of <bits/atomic.h>. * sysdeps/s390/bits/atomic.h: Move to ... * sysdeps/s390/atomic-machine.h: ...here. * sysdeps/sparc/sparc32/bits/atomic.h: Move to ... * sysdeps/sparc/sparc32/atomic-machine.h: ...here. (_BITS_ATOMIC_H): Rename macro to _ATOMIC_MACHINE_H. * sysdeps/sparc/sparc32/sparcv9/bits/atomic.h: Move to ... * sysdeps/sparc/sparc32/sparcv9/atomic-machine.h: ...here. * sysdeps/sparc/sparc64/bits/atomic.h: Move to ... * sysdeps/sparc/sparc64/atomic-machine.h: ...here. * sysdeps/tile/bits/atomic.h: Move to ... * sysdeps/tile/atomic-machine.h: ...here. * sysdeps/tile/tilegx/bits/atomic.h: Move to ... * sysdeps/tile/tilegx/atomic-machine.h: ...here. Include <sysdeps/tile/atomic-machine.h> instead of <sysdeps/tile/bits/atomic.h>. (_BITS_ATOMIC_H): Rename macro to _ATOMIC_MACHINE_H. * sysdeps/tile/tilepro/bits/atomic.h: Move to ... * sysdeps/tile/tilepro/atomic-machine.h: ...here. Include <sysdeps/tile/atomic-machine.h> instead of <sysdeps/tile/bits/atomic.h>. (_BITS_ATOMIC_H): Rename macro to _ATOMIC_MACHINE_H. * sysdeps/unix/sysv/linux/arm/bits/atomic.h: Move to ... * sysdeps/unix/sysv/linux/arm/atomic-machine.h: ...here. Include <sysdeps/arm/atomic-machine.h> instead of <sysdeps/arm/bits/atomic.h>. * sysdeps/unix/sysv/linux/hppa/bits/atomic.h: Move to ... * sysdeps/unix/sysv/linux/hppa/atomic-machine.h: ...here. (_BITS_ATOMIC_H): Rename macro to _ATOMIC_MACHINE_H. * sysdeps/unix/sysv/linux/m68k/coldfire/bits/atomic.h: Move to ... * sysdeps/unix/sysv/linux/m68k/coldfire/atomic-machine.h: ...here. (_BITS_ATOMIC_H): Rename macro to _ATOMIC_MACHINE_H. * sysdeps/unix/sysv/linux/nios2/bits/atomic.h: Move to ... * sysdeps/unix/sysv/linux/nios2/atomic-machine.h: ...here. (_NIOS2_BITS_ATOMIC_H): Rename macro to _NIOS2_ATOMIC_MACHINE_H. * sysdeps/unix/sysv/linux/sh/bits/atomic.h: Move to ... * sysdeps/unix/sysv/linux/sh/atomic-machine.h: ...here. * sysdeps/x86_64/bits/atomic.h: Move to ... * sysdeps/x86_64/atomic-machine.h: ...here. * include/atomic.h: Include <atomic-machine.h> instead of <bits/atomic.h>.
* powerpc: Fix tabort usage in syscallsPaul E. Murphy2015-08-251-2/+2
| | | | | | | | | | | | | | | | | | | Fix usage of tabort in generated syscalls. r0 has special meaning when used with this instruction, thus it will not generate persistent errors, nor return an error code. This mitigates poor CPU usage when performing elided critical sections. Additionally, transactions should be aborted when entering a user invoked syscall. Otherwise the results of the transaction may be undefined. 2015-08-25 Paul E. Murphy <murphyp@linux.vnet.ibm.com> * sysdeps/powerpc/powerpc32/sysdep.h (ABORT_TRANSACTION): Use register other than r0 for tabort, it has special meaning. * sysdeps/powerpc/powerpc64/sysdep.h (ABORT_TRANSACTION): Likewise * sysdeps/unix.sysv/linux/powerpc/syscall.S (syscall): Abort transaction before starting syscall.
* powerpc: Handle worstcase behavior in strstr() for POWER7Rajalakshmi Srinivasaraghavan2015-08-251-7/+15
| | | | | | | | | | Instead of checking needle length, constant 'n' number of comparisons is checked to fall back to default implementation. This patch is tested on powerpc64 and powerpc64le. 2015-08-25 Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com> * sysdeps/powerpc/powerpc64/power7/strstr.S: Handle worst case.
* powerpc: make memchr use memchr-power7.Carlos Eduardo Seo2015-08-211-1/+13
| | | | | | | | | In powerpc64, memchr was always pointing to the internal __GI_memchr implementation. This patch fixes that and makes it use the optimized POWER7 version when adequate. * sysdeps/powerpc/powerpc64/multiarch/memchr-ppc64.c: Make memchr not point to the internal __GI_memchr implementation.
* powerpc: Fix stpcpy performance for power8Ondrej Bilka2015-08-111-2/+5
| | | | | | This patch fixes the missing enablement for stpcpy on POWER8. * sysdeps/powerpc/powerpc64/multiarch/stpcpy.c: Fix ifunc.
* powerpc: Fix PPC64/POWER7 conform testsAdhemerval Zanella2015-08-112-3/+4
| | | | | | | | | | | When building with --disable-multi-arch the memmove and strstr POWER7 optimization create and uses symbols that conflict with expect conform tests. * sysdeps/powerpc/powerpc64/power7/memmove.S (bcopy): Changing to __bcopy and add a weak_alias to bcopy. * sysdeps/powerpc/powerpc64/power7/strstr.S (strstr): Use __strnlen for static build.
* powerpc: Use default strcpy optimization for POWER7Adhemerval Zanella2015-08-119-794/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patches uses the default strcpy/stpcpy implementation for POWER7/PPC64. This is faster in mostly inputs for benchtests and for multiarch the implementation uses the POWER7 strlen and memcpy. * string/stpcpy.c (__stpcpy): Use STPCPY to redefine symbol name and cleanup macro usage. * string/strcpy.c (strcpt): Use STRCPY to redefine symbol name. * sysdeps/powerpc/powerpc64/multiarch/stpcpy-power7.S: Remove file. * sysdeps/powerpc/powerpc64/multiarch/stpcpy-ppc64.S: Likewise. * sysdeps/powerpc/powerpc64/multiarch/strcpy-power7.S: Likewise. * sysdeps/powerpc/powerpc64/multiarch/strcpy-ppc64.S: Likewise. * sysdeps/powerpc/powerpc64/power7/stpcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strcpy.c: Likewise. * sysdeps/powerpc/powerpc64/stpcpy.S: Likewise. * sysdeps/powerpc/powerpc64/strcpy.S: Likewise. * sysdeps/powerpc/powerpc64/multiarch/stpcpy.c [SHARED && IS_IN (libc)]: Include <string/strcpy.c>. * sysdeps/powerpc/powerpc64/multiarch/stpcpy.c [SHARED && IS_IN (libc)]: Include <string/stpcpy.c>. * sysdeps/powerpc/powerpc64/multiarch/stpcpy-power7.c: New file. * sysdeps/powerpc/powerpc64/multiarch/stpcpy-ppc64.c: Likewise. * sysdeps/powerpc/powerpc64/multiarch/strcpy-power7.c: Likewise. * sysdeps/powerpc/powerpc64/multiarch/strcpy-ppc64.c: Likewise. * sysdeps/powerpc/powerpc64/power7/strcpy.c: Likewise.
* powerpc: Fix strnlen/power7 buildAdhemerval Zanella2015-08-111-1/+2
| | | | This patch fixes the strnlen.S build with --disable-multi-arch option.
* powerpc: Fix strstr/power7 buildAdhemerval Zanella2015-08-112-0/+28
| | | | | | | | | | | | This patch fixes the strstr build with --disable-multi-arch option. The optimization calls the __strstr_ppc symbol, which always build for multiarch config but not if it is disable. This patch fixes it by adding the default C implementation object with the expected symbol name. * sysdeps/powerpc/powerpc64/power7/Makefile [$(subdir) = string] (sysdep_routines): Add strstr-ppc64. * sysdeps/powerpc/powerpc64/power7/strstr-ppc64.c: New file.
* powerpc: strstr optimizationRajalakshmi Srinivasaraghavan2015-07-166-1/+626
| | | | | | | | | | | | | | | | This patch optimizes strstr function for power >= 7 systems. Performance gain is obtained using aligned memory access and usage of cmpb instruction for quicker comparison. The average improvement of this optimization is ~40%. Tested on ppc64 and ppc64le. 2015-07-16 Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com> * sysdeps/powerpc/powerpc64/multiarch/Makefile: Add strstr(). * sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c: Likewise. * sysdeps/powerpc/powerpc64/power7/strstr.S: New File. * sysdeps/powerpc/powerpc64/multiarch/strstr-power7.S: New File. * sysdeps/powerpc/powerpc64/multiarch/strstr-ppc64.c: New File. * sysdeps/powerpc/powerpc64/multiarch/strstr.c: New File.
* libc-vdso.h place consolidationAdhemerval Zanella2015-04-201-1/+1
| | | | | | This patch moves the libc-vdso.h internal header from bits folder to default architecture one and also corrects the remaning includes in the files.
* Harden powerpc64 elf_machine_fixup_pltAlan Modra2015-03-261-5/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | IFUNC is difficult to correctly implement on any target needing a GOT to support position independent code, due to the dependency on order of dynamic relocations. ld.so should be changed to apply IFUNC relocations last, globally, because without that it is actually impossible to write an IFUNC resolver in C that works in all situations. Case in point, vfork in libpthread.so is an IFUNC with the resolver returning &__libc_vfork. (system and fork are similar.) If another shared library, libA say, uses vfork then it is quite possible that libpthread.so hasn't been dynamically relocated before the unfortunate libA is dynamically relocated. In that case the GOT entry for &__libc_vfork is still zero, so the IFUNC resolver returns NULL. LD_BIND_NOW=1 results in libA PLT dynamic relocations being applied using this NULL value and ld.so segfaults. This patch hardens ld.so to not segfault on a NULL from an IFUNC resolver. It also fixes a problem with undefined weak. If you leave the plt entry as-is for undefined weak then if the entry is ever called it will loop in ld.so rather than segfaulting. * sysdeps/powerpc/powerpc64/dl-machine.h (elf_machine_fixup_plt): Don't segfault if ifunc resolver returns a NULL. Do set plt to zero for undefined weak. (elf_machine_plt_conflict): Similarly.
* powerpc __tls_get_addr call optimizationAlan Modra2015-03-251-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is glibc support for a PowerPC TLS optimization, inspired by Alexandre Oliva's TLS optimization for other processors, http://www.lsd.ic.unicamp.br/~oliva/writeups/TLS/RFC-TLSDESC-x86.txt In essence, this optimization uses a zero module id in the tls_index GOT entry to indicate that a TLS variable is allocated space in the static TLS area. A special plt call linker stub for __tls_get_addr checks for such a tls_index and if found, returns the offset immediately. The linker communicates the fact that the special __tls_get_addr stub is used by setting a bit in the dynamic tag DT_PPC64_OPT/DT_PPC_OPT. glibc communicates to the linker that this optimization is available by the presence of __tls_get_addr_opt. tst-tlsmod2.so is built with -Wl,--no-tls-get-addr-optimize for tst-tls-dlinfo, which otherwise would fail since it tests that no static tls is allocated. The ld option --no-tls-get-addr-optimize has been available since binutils-2.20 so doesn't need a configure test. * NEWS: Advertise TLS optimization. * elf/elf.h (R_PPC_TLSGD, R_PPC_TLSLD, DT_PPC_OPT, PPC_OPT_TLS): Define. (DT_PPC_NUM): Increment. * elf/dynamic-link.h (HAVE_STATIC_TLS): Define. (CHECK_STATIC_TLS): Use here. * sysdeps/powerpc/powerpc32/dl-machine.h (elf_machine_rela): Optimize TLS descriptors. * sysdeps/powerpc/powerpc64/dl-machine.h (elf_machine_rela): Likewise. * sysdeps/powerpc/dl-tls.c: New file. * sysdeps/powerpc/Versions: Add __tls_get_addr_opt. * sysdeps/powerpc/tst-tlsopt-powerpc.c: New tls test. * sysdeps/unix/sysv/linux/powerpc/Makefile: Add new test. Build tst-tlsmod2.so with --no-tls-get-addr-optimize. * sysdeps/unix/sysv/linux/powerpc/powerpc32/ld.abilist: Update. * sysdeps/unix/sysv/linux/powerpc/powerpc64/ld.abilist: Likewise. * sysdeps/unix/sysv/linux/powerpc/powerpc64/ld-le.abilist: Likewise.
* powerpc64 configure messageAlan Modra2015-03-252-3/+3
| | | | | | | | | This feature doesn't depend on the linker, as can be seen from the actual test. It's a compiler feature. * sysdeps/powerpc/powerpc64/configure.ac: Correct "linker support for overlapping .opd entries" to "support...". * sysdeps/powerpc/powerpc64/configure: Regenerate
* powerpc: Remove HAVE_ASM_GLOBAL_DOT_NAME defineAdhemerval Zanella2015-03-114-85/+11
| | | | | | | | | With AIX port deprecated there is no need to check/define HAVE_ASM_GLOBAL_DOT_NAME anymore since the current minimum binutils supported (2.22) does not emit global symbol with dot. This patch removes all the HAVE_ASM_GLOBAL_DOT_NAME definition and checks for powerpc64 port.
* Replace ELF_RTYPE_CLASS_NOCOPY with ELF_RTYPE_CLASS_COPYH.J. Lu2015-03-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ELF_RTYPE_CLASS_NOCOPY in comments is a typo. It should be ELF_RTYPE_CLASS_COPY. [BZ #18082] * sysdeps/alpha/dl-machine.h (elf_machine_type_class): Replace ELF_RTYPE_CLASS_NOCOPY with ELF_RTYPE_CLASS_COPY in comments. * sysdeps/arm/dl-machine.h (elf_machine_type_class): Likewise. * sysdeps/hppa/dl-machine.h (elf_machine_type_class): Likewise. * sysdeps/i386/dl-machine.h (elf_machine_type_class): Likewise. * sysdeps/ia64/dl-machine.h (elf_machine_type_class): Likewise. * sysdeps/m68k/dl-machine.h (elf_machine_type_class): Likewise. * sysdeps/microblaze/dl-machine.h (elf_machine_type_class): Likewise. * sysdeps/nios2/dl-machine.h (elf_machine_type_class): Likewise. * sysdeps/powerpc/powerpc32/dl-machine.h (elf_machine_type_class): Likewise. * sysdeps/powerpc/powerpc64/dl-machine.h (elf_machine_type_class): Likewise. * sysdeps/s390/s390-32/dl-machine.h (elf_machine_type_class): Likewise. * sysdeps/s390/s390-64/dl-machine.h (elf_machine_type_class): Likewise. * sysdeps/sh/dl-machine.h (elf_machine_type_class): Likewise. * sysdeps/sparc/sparc32/dl-machine.h (elf_machine_type_class): Likewise. * sysdeps/sparc/sparc64/dl-machine.h (elf_machine_type_class): Likewise. * sysdeps/tile/dl-machine.h (elf_machine_type_class): Likewise. * sysdeps/x86_64/dl-machine.h (elf_machine_type_class): Likewise.
* powerpc: Fix memmove static buildAdhemerval Zanella2015-02-251-1/+3
| | | | | | | This patch fixes the missing "__memcpy_ppc" symbol for memmove-ppc64 object in static builds. Since memcpy ifunc is not enabled in static mode, the specialized symbols are not provided. The patch changed the it to just "__memcpy" instead.
* powerpc: POWER7 strncpy optimization for unaligned stringRajalakshmi Srinivasaraghavan2015-02-121-2/+378
| | | | | | | | | | | | | This patch optimizes strncpy for power7 for unaligned source or destination address. The source or destination address is aligned to doubleword and data is shifted based on the alignment and added with the previous loaded data to be written as a doubleword. For each load, cmpb instruction is used for faster null check. The new optimization shows 10 to 70% of performance improvement for longer string though it does not show big difference on string size less than 16 due to additional checks.Hence this new algorithm is restricted to string greater than 16.
* powerpc: wordcopy/memmove cleanup for ppc32Adhemerval Zanella2015-02-091-4/+0
| | | | | | | | This patch cleanup some multiarch code related to memmmove optimization. Initial IFUNC support added specialized wordcopy symbols which turned in local IFUNC calls used by memmove default implementation. The patch removes the internal IFUNC for wordcopy symbols and uses local branches in the memmmove optimization instead.
* powerpc: wordcopy/memmove cleanup for ppc64Adhemerval Zanella2015-02-095-95/+23
| | | | | | | | | | This patch cleanup some multiarch code related to memmmove optimization. Initial IFUNC support added specialized wordcopy symbols which turned in local IFUNC calls used by memmove default implementation. This change by removing then and used the optimized memmove instead for supported chips.
* powerpc: Remove POWER7 wordcopy ifuncAdhemerval Zanella2015-02-093-45/+9
| | | | | | This patch remove the POWER7 ifunc wordcopy function (_wordcopy_*_power7), since now GLIBC provides a optimized memmove/bcopy for POWER7.
* powerpc: Simplify bcopy default implementationAdhemerval Zanella2015-02-091-4/+6
| | | | | | This patch simplify the default bcopy symbol for powerpc64 by just using memmove instead of implementing using the default bcopy. Since the symbol is deprecated, it trades speed by code size.
* powerpc: multiarch Makefile cleanup for powerpc64Adhemerval Zanella2015-02-091-5/+10
| | | | | This patch cleanups the multiarch Makefile by putting the wide chars implementation to correct wcsmbs rule.
* powerpc: Fix fsqrt build in libm [BZ#16576]Adhemerval Zanella2015-01-282-60/+0
| | | | | | | | | | Some powerpc64 processors (e5500 core for instance) does not provide the fsqrt instruction, however current check to use in math_private.h is __WORDSIZE and _ARCH_PWR4 (ISA 2.02). This is patch change it to use the compiler flag _ARCH_PPCSQ (which is the same condition GCC uses to decide whether to generate fsqrt instruction). It fixes BZ#16576.
* powerpc: Fix powerpc64 build failure with binutils 2.22Adhemerval Zanella2015-01-241-1/+4
| | | | | | | | | | | | | | GLIBC memset optimization for POWER8 uses the '.machine power8' directive, which is only supported officially on binutils 2.24+. This causes a build failure on older binutils. Since the requirement of .machine power8 is to correctly assembly the 'mtvsrd' instruction and it is already handled by the MTVSRD_V1_R4 macro, there is no really needed of using it. The patch replaces the power8 with power7 for .machine directive. It fixes BZ#17869.
* powerpc: Fix ifuncmain6pie failure with GCC 4.9Adhemerval Zanella2015-01-241-1/+3
| | | | | | | | | | | This patch fix the elf/ifuncmain6pie failure when building with GCC 4.9+. For some reason, the compiler removes the branch taken code at resolve_ifunc (sysdeps/powerpc/powerpc64/dl-machine.h) as dead-code and thus the testcase fails because the ifunc resolves branches to an invalid memory location. It fixes by explicit adding a dependency of value based on odp variable to avoid compiler optimization. It fixes BZ#17868.
* powerpc: Fix POWER7/PPC64 performance regression on LEAdhemerval Zanella2015-01-131-588/+282
| | | | | | | | | | | | | | | | | This patch fixes a performance regression on the POWER7/PPC64 memcmp porting for Little Endian. The LE code uses 'ldbrx' instruction to read the memory on byte reversed form, however ISA 2.06 just provide the indexed form which uses a register value as additional index, instead of a fixed value enconded in the instruction. And the port strategy for LE uses r0 index value and update the address value on each compare loop interation. For large compare size values, it adds 8 more instructions plus some more depending of trailing size. This patch fixes it by adding pre-calculate indexes to remove the address update on loops and tailing sizes. For large sizes it shows a considerable gain, with double performance pairing with BE.
* powerpc: Optimized strncmp for POWER8/PPC64Adhemerval Zanella2015-01-135-5/+374
| | | | | | | | | | This patch adds an optimized POWER8 strncmp. The implementation focus on speeding up unaligned cases follwing the ideas of power8 strcmp. The algorithm first check the initial 16 bytes, then align the first function source and uses unaligned loads on second argument only. Aditional checks for page boundaries are done for unaligned cases (where sources alignment are different).
* powerpc: Optimize POWER7 strcmp trailing checksRajalakshmi Srinivasaraghavan2015-01-131-114/+83
| | | | | | This patch optimized the POWER7 trailing check by avoiding using byte read operations and instead use the doubleword already readed with bitwise operations.
* powerpc: Optimized strcmp for POWER8/PPC64Adhemerval Zanella2015-01-135-3/+306
| | | | | | | This patch adds an optimized POWER8 strcmp using unaligned accesses. The algorithm first check the initial 16 bytes, then align the first function source and uses unaligned loads on second argument only. Aditional checks for page boundaries are done for unaligned cases
* powerpc: Optimized st{r,p}ncpy for POWER8/PPC64Adhemerval Zanella2015-01-138-6/+542
| | | | | | | | | | | | | This patch adds an optimized POWER8 st{r,p}ncpy using unaligned accesses. It shows 10%-80% improvement over the optimized POWER7 one that uses only aligned accesses, specially on unaligned inputs. The algorithm first read and check 16 bytes (if inputs do not cross a 4K page size). The it realign source to 16-bytes and issue a 16 bytes read and compare loop to speedup null byte checks for large strings. Also, different from POWER7 optimization, the null pad is done inline in the implementation using possible unaligned accesses, instead of realying on a memset call. Special case is added for page cross reads.
* powerpc: Optimized strncat for POWER7/PPC64Adhemerval Zanella2015-01-133-270/+31
| | | | | | | | | | | With 3eb38795dbbbd816 (Simplify strncat) the generic algorithms uses strlen, strnlen, and memcpy. This is faster than POWER7 current implementation, especially for unaligned strings (where POWER7 code uses byte-byte operations). This patch removes the assembly implementation and uses a multiarch specialization based on default algorithm calling optimized POWER7 symbols.
* powerpc: Optimized strcat for POWER8/PPC64Adhemerval Zanella2015-01-134-4/+40
| | | | | With new optimized strcpy for POWER8, this patch adds an optimized strcat which uses it along with default implementation at strings/.
generated by cgit-pink 1.4.1 (git 2.36.1) at 2024-08-16 02:45:43 +0000