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* PowerPC: Align power7 memcpy using VSX to quadwordAdhemerval Zanella2014-07-071-18/+4
| | | | | | This patch changes power7 memcpy to use VSX instructions only when memory is aligned to quardword. It is to avoid unaligned kernel traps on non-cacheable memory (for instance, memory-mapped I/O).
* PowerPC: optimized memmove for POWER7/PPC64Adhemerval Zanella2014-07-079-1/+1016
| | | | | | | | | | | This patch adds an optimized memmove optimization for POWER7/powerpc64. Basically the idea is to use the memcpy for POWER7 on non-overlapped memory regions and a optimized backward memcpy for memory regions that overlap (similar to the idea of string/memmove.c). The backward memcpy algorithm used is similar the one use for memcpy for POWER7, with adjustments done for alignment. The difference is memory is always aligned to 16 bytes before using VSX/altivec instructions.
* Always provide HP_SMALL_TIMING_AVAILRichard Henderson2014-07-031-0/+1
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* Unify hp-timing implementationsRichard Henderson2014-07-031-53/+1
| | | | Provide an hp-timing-common.h for ports to use.
* Remove HP_TIMING_DIFF_INIT and dl_hp_timing_overheadRichard Henderson2014-07-033-52/+0
| | | | | Without HP_TIMING_ACCUM, dl_hp_timing_overhead is write-only. If we remove it, there's no point in HP_TIMING_DIFF_INIT either.
* Removing HP_TIMING_ACCUM as unusedRichard Henderson2014-07-031-16/+2
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* Removing HP_TIMING_ZERO as unusedRichard Henderson2014-07-031-5/+0
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* PowerPC: strcat optimization for PPC64/POWER7Vidya Ranganathan2014-07-025-1/+99
| | | | | | This patch adds an ifunc power7 strcat symbol that uses the logic on sysdeps/powerpc/strcat.c but call power7 strlen/strcpy symbols instead of default ones.
* Fix Wundef warning for ELF_MACHINE_NO_RELASiddhesh Poyarekar2014-06-261-0/+1
| | | | | | | This patch defines ELF_MACHINE_NO_RELA on all architectures. Tested only on x86_64 to verify that the sources before and after are identical except for two instructions that pass the current line number in dl-machine.h to assert_fail.
* PowerPC: Optimized strcmp for PPC64/POWER7Vidya Ranganathan2014-06-116-1/+317
| | | | | | Optimization is achieved on 8 byte aligned strings with double word comparison using cmpb instruction. On unaligned strings loop unrolling is applied for Power7 gain.
* PowerPC: Fix optimized strncat strlen callAdhemerval Zanella2014-06-061-1/+5
| | | | | | | This patch fixes the optimized ppc64/power7 strncat strlen call for static build without ifunc enabled. The strlen symbol to call in such situation is just strlen, instead of __GI_strlen (since the __GI_ alias is just created for shared objects).
* PowerPC: Fix multiarch hypotf PPC64 pathAdhemerval Zanella2014-05-191-0/+0
| | | | This patch moves the hypotf multiarch implementation to correct path.
* PowerPC: strncpy/stpncpy optimization for PPC64/POWER7Vidya Ranganathan2014-05-0610-1/+593
| | | | | | | | The optimization is achieved by following techniques: > data alignment [gain from aligned memory access on read/write] > POWER7 gains performance with loop unrolling/unwinding [gain by reduction of branch penalty]. > zero padding done by calling optimized memset
* PowerPC: ifunc improvement for internal callsAdhemerval Zanella2014-05-056-24/+48
| | | | | | | This patch changes de default symbol redirection for internal call of memcpy, memset, memchr, and strlen to the IFUNC resolved ones. The performance improvement is noticeable in algorithms that uses these symbols extensible, like the regex functions.
* PowerPC: Fix --disable-multi-arch buildsAdhemerval Zanella2014-04-099-6/+13
| | | | | | | | | | This patch fixes some powerpc32 and powerpc64 builds with --disable-multi-arch option along with different --with-cpu=powerN. It cleanups the Implies directories by removing the multiarch folder for non multiarch config and also fixing two assembly implementations: powerpc64/power7/strncat.S that is calling the wrong strlen; and power8/fpu/s_isnan.S that misses the hidden_def and weak_alias directives.
* Correct prefetch hint in power7 memrchr.Alan Modra2014-04-021-1/+1
| | | | | | Typo fix. * sysdeps/powerpc/powerpc64/power7/memrchr.S: Correct stream hint.
* Fix reference to toc symbol.Alan Modra2014-04-021-1/+1
| | | | | | | https://sourceware.org/ml/binutils/2014-03/msg00033.html removes the "magic" treatment of symbols defined in a .toc section. * sysdeps/powerpc/powerpc64/start.S: Add @toc to toc symbol reference.
* Fix s_copysign stack temp for PowerPC64 ELFv2Alan Modra2014-04-011-2/+2
| | | | | [BZ #16786] * sysdeps/powerpc/powerpc64/fpu/s_copysign.S: Don't trash stack.
* PowerPC: Fix little endian enconding for mfvsrdAdhemerval Zanella2014-03-315-0/+25
| | | | | This patch fixes the MFVSRD_R3_V1 macro that encodes 'mfvsrd r3,vs1' (to support old binutils) for little endian.
* PowerPC: optimized strpbrk for POWER7Adhemerval Zanella2014-03-206-1/+259
| | | | | | | | | This patch add an optimized strpbrk for POWER7 by using a different algorithm than default implementation: it constructs a table based on the 'accept' argument and use this table to check for any occurance on the input string. The idea is similar as x86_64 uses. For PowerPC some tunings were added, such as unroll loops and memory clear using VSX instructions.
* PowerPC: optimized strcspn for PPC64/POWER7Adhemerval Zanella2014-03-206-1/+249
| | | | | | | | | | This patch add a optimized strcspn for POWER7 by using a different algorithm than default implementation: it constructs a table based on the 'accept' argument and use this table to check for any occurance on the input string. The idea is similar as x86_64 uses. For PowerPC some tunings were added, such as unroll loops and align stack memory to table to 16 bytes (so VSX clean can ran without alignment issues).
* PowerPC: remove wrong roundl implementation for PowerPC64Adhemerval Zanella2014-03-141-132/+0
| | | | | | | | | | | | | | | | | The roundl assembly implementation (sysdeps/powerpc/powerpc64/fpu/s_roundl.S) returns wrong results for some inputs where first double is a exact integer and the precision is determined by second long double. Checking on implementation comments and history, I am very confident the assembly implementation was based on a version before commit 5c68d401698a58cf7da150d9cce769fa6679ba5f that fixes BZ#2423 (Errors in long double (ldbl-128ibm) rounding functions in glibc-2.4). By just removing the implementation and make the build select sysdeps/ieee754/ldbl-128ibm/s_roundl.c instead fixes the failing math. This fixes 16707.
* PowerPC: remove wrong nearbyintl implementation for PPC64Adhemerval Zanella2014-03-141-113/+0
| | | | | | | | | | | | | | | | | | The nearbyintl assembly implementation (sysdeps/powerpc/powerpc64/fpu/s_nearbyintl.S) returns wrong results for some inputs where first double is a exact integer and the precision is determined by second long double. Checking on implementation comments and history, I am very confident the assembly implementation was based on a version before commit 5c68d401698a58cf7da150d9cce769fa6679ba5f that fixes BZ#2423 (Errors in long double (ldbl-128ibm) rounding functions in glibc-2.4). By just removing the implementation and make the build select sysdeps/ieee754/ldbl-128ibm/s_nearbyintl.c instead fixes the failing math. Fixes BZ#16706.
* PowerPC: remove wrong ceill implementation for PowerPC64Adhemerval Zanella2014-03-141-132/+0
| | | | | | | | | | | | | | | | The ceill assembly implementation (sysdeps/powerpc/powerpc64/fpu/s_ceill.S) returns wrong results for some inputs where first double is a exact integer and the precision is determined by second long double. Checking on implementation comments and history, I am very confident the assembly implementation was based on a version before commit 5c68d401698a58cf7da150d9cce769fa6679ba5f that fixes BZ#2423 (Errors in long double (ldbl-128ibm) rounding functions in glibc-2.4). By just removing the implementation and make the build select sysdeps/ieee754/ldbl-128ibm/s_ceill.c instead fixes the failing math. Fixes BZ#16701.
* PowerPC: Fix strspn for static buildAdhemerval Zanella2014-03-121-1/+1
| | | | This patch makes the strspn ifunc selector build for static builds.
* PowerPC: Fix bzero definition for static libc for PPC64Adhemerval Zanella2014-03-111-5/+6
| | | | | | | | | This patch fixes an issue for powerpc64[le] static build where __bzero is definied in multiple places (memset-ppc64.o and bzero.o). It is now defined only in bzero.o and memset-ppc64.o only defined __bzero_ppc for both dynamic and static library. Fixes BZ#16683.
* PowerPC: strspn optimization for PPC64/POWER7Vidya Ranganathan2014-03-116-1/+279
| | | | | | | | The optimization is achieved by following techniques: > hashing of needle. > hashing avoids scanning of duplicate entries in needle across the string. > initializing the hash table with Vector instructions (VSX) by quadword access. > unrolling when scanning for character in string across hash table.
* PowerPC: strncat optimization for PPC64Adhemerval Zanella2014-03-106-1/+333
| | | | | | | | The optimization is achieved by following techniques: 1. Doubleword aligned memory access and compares using cmpb instruction. 2. Loop unrolling for byte load/store. 3. CPU pre-fetch to avoid cache miss.
* PowerPC: strrchr optimization for POWER7/PPC64Rajalakshmi Srinivasaraghavan2014-03-036-1/+372
| | | | | | This patch optimizes strrchr() for ppc64. It uses aligned memory access along with cmpb instruction and CPU prefetch to avoid cache misses for speed improvement.
* PowerPC: llround/llroundf POWER8 optimizationAdhemerval Zanella2014-02-274-5/+86
| | | | | | This patch add a optimized llround/llroundf implementation for POWER8 using the new Move From VSR Doubleword instruction to gains some cycles from FP to GRP register move.
* PowerPC: llrint/llrintf POWER8 optimizationAdhemerval Zanella2014-02-274-3/+83
| | | | | | This patch add a optimized llrint/llrintf implementation for POWER8 using the new Move From VSR Doubleword instruction to gains some cycles from FP to GRP register move.
* PowerPC: Optimized finite/finitef for POWER8Adhemerval Zanella2014-02-276-6/+102
| | | | | | This patch add a optimized finite/finitef implementation for POWER8 using the new Move From VSR Doubleword instruction to gains some cycles from FP to GRP register move.
* PowerPC: Optimized isinf/isinff for POWER8Adhemerval Zanella2014-02-276-6/+108
| | | | | | This patch add a optimized isinf/isinff implementation for POWER8 using the new Move From VSR Doubleword instruction to gains some cycles from FP to GRP register move.
* PowerPC: Optimized isnan/isnanf for POWER8Adhemerval Zanella2014-02-276-17/+111
| | | | | | This patch add a optimized isnan/isnanf implementation for POWER8 using the new Move From VSR Doubleword instruction to gains some cycles from FP to GRP register move.
* Use glibc_likely instead __builtin_expect.Ondřej Bílka2014-02-102-5/+5
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* PowerPC: remove wrong truncl implementation for PowerPC64Adhemerval Zanella2014-01-081-120/+0
| | | | | | | | | | | | | | | The truncl assembly implementation (sysdeps/powerpc/powerpc64/fpu/s_truncl.S) returns wrong results for some inputs where first double is a exact integer and the precision is determined by second long double. Checking on implementation comments and history, I am very confident the assembly implementation was based on a version before commit 5c68d401698a58cf7da150d9cce769fa6679ba5f that fixes BZ#2423 (Errors in long double (ldbl-128ibm) rounding functions in glibc-2.4). By just removing the implementation and make the build select sysdeps/ieee754/ldbl-128ibm/s_truncl.c instead it fixes tgammal issues regarding wrong result sign.
* PowerPC: Fix compiler warningsAdhemerval Zanella2014-01-034-4/+4
| | | | | This patch fixes some compile warnings related to extra tokens at end of #undef directive from multilib patchset.
* Update copyright notices with scripts/update-copyrightsAllan McRae2014-01-01259-259/+259
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* Fix uses of CALL_MCOUNT in ppc64 assembler sourcesAndreas Schwab2013-12-193-2/+6
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* PowerPC: multiarch hypot/hypotf for PowerPC64Adhemerval Zanella2013-12-137-1/+158
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* PowerPC: multiarch modf/modff for PowerPC64Adhemerval Zanella2013-12-137-2/+173
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* PowerPC: multiarch logb/logbl/logbf for PowerPC64Adhemerval Zanella2013-12-1310-1/+244
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* PowerPC: multiarch isinf/isinff for PowerPC64Adhemerval Zanella2013-12-136-2/+178
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* PowerPC: multiarch finite/finitef for PowerPC64Adhemerval Zanella2013-12-136-2/+186
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* PowerPC: multiarch llrint/lrint for PowerPC64Adhemerval Zanella2013-12-135-1/+122
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* PowerPC: multiarch copysign/copysignf for PowerPC64Adhemerval Zanella2013-12-135-2/+155
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* PowerPC: multiarch trunc/truncf for PowerPC64Adhemerval Zanella2013-12-137-1/+188
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* PowerPC: multiarch round/roundf for PowerPC64Adhemerval Zanella2013-12-137-1/+188
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* PowerPC: multiarch floor/floorf for PowerPC64Adhemerval Zanella2013-12-137-1/+190
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* PowerPC: multiarch ceil/ceilf for PowerPC64Adhemerval Zanella2013-12-137-1/+188
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