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* powerpc: Simplify encoding of POWER8 instructionAdhemerval Zanella2014-11-051-6/+1
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* powerpc: Fix encoding of POWER8 instructionAdhemerval Zanella2014-11-031-1/+8
| | | | | This patch adds a binary encoding for 'mtvsrd' instruction to avoid build failures when assembler does not support POWER8.
* PowerPC: memset optimization for POWER8/PPC64Adhemerval Zanella2014-09-101-0/+449
This patch adds an optimized memset implementation for POWER8. For sizes from 0 to 255 bytes, a word/doubleword algorithm similar to POWER7 optimized one is used. For size higher than 255 two strategies are used: 1. If the constant is different than 0, the memory is written with altivec vector instruction; 2. If constant is 0, dbcz instructions are used. The loop is unrolled to clear 512 byte at time. Using vector instructions increases throughput considerable, with a double performance for sizes larger than 1024. The dcbz loops unrolls also shows performance improvement, by doubling throughput for sizes larger than 8192 bytes.