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* Update copyright dates with scripts/update-copyrights.Joseph Myers2016-01-0416-16/+16
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* Use libc_hidden_proto / libc_hidden_def with __strnlen.Joseph Myers2015-06-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Various code in glibc uses __strnlen instead of strnlen for namespace reasons. However, __strnlen does not use libc_hidden_proto / libc_hidden_def (as is normally done for any function defined and called within the same library, whether or not exported from the library and whatever namespace it is in), so the compiler does not know that those calls are to a function within libc. This patch uses libc_hidden_proto / libc_hidden_def with __strnlen. On x86_64, it makes no difference to the installed stripped shared libraries. On 32-bit x86, it causes __strnlen calls to go to the same place as strnlen calls (the fallback strnlen implementation), rather than through a PLT entry for the strnlen IFUNC; I'm not sure of the logic behind when calls from within libc should use IFUNCs versus when they should go direct to a particular function implementation, but clearly it doesn't make sense for strnlen and __strnlen to be handled differently in this regard. Tested for x86_64 and x86 (testsuite, and comparison of installed shared libraries as described above). * string/strnlen.c [!STRNLEN] (__strnlen): Use libc_hidden_def. * include/string.h (__strnlen): Use libc_hidden_proto. * sysdeps/aarch64/strnlen.S (__strnlen): Use libc_hidden_def. * sysdeps/i386/i686/multiarch/strnlen-c.c [SHARED] (libc_hidden_def): Define __GI___strnlen as well as __GI_strnlen. * sysdeps/powerpc/powerpc32/power4/multiarch/strnlen-power7.S (libc_hidden_def): Undefine and redefine. * sysdeps/powerpc/powerpc32/power4/multiarch/strnlen-ppc32.c [SHARED] (libc_hidden_def): Define __GI___strnlen as well as __GI_strnlen. * sysdeps/powerpc/powerpc32/power7/strnlen.S (__strnlen): Use libc_hidden_def. * sysdeps/tile/tilegx/strnlen.c (__strnlen): Likewise.
* Update copyright dates with scripts/update-copyrights.Joseph Myers2015-01-0216-16/+16
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* Remove IS_IN_libmSiddhesh Poyarekar2014-11-243-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace with IS_IN (libm). Generated code unchanged on x86_64. * include/math.h: Use IS_IN instead of IS_IN_libm. * sysdeps/alpha/fpu/s_copysign.c: Likewise. * sysdeps/ieee754/ldbl-128ibm/s_copysignl.c: Likewise. * sysdeps/ieee754/ldbl-128ibm/s_finitel.c: Likewise. * sysdeps/ieee754/ldbl-128ibm/s_fmal.c: Likewise. * sysdeps/ieee754/ldbl-128ibm/s_frexpl.c: Likewise. * sysdeps/ieee754/ldbl-128ibm/s_isinfl.c: Likewise. * sysdeps/ieee754/ldbl-128ibm/s_isnanl.c: Likewise. * sysdeps/ieee754/ldbl-128ibm/s_modfl.c: Likewise. * sysdeps/ieee754/ldbl-128ibm/s_scalbnl.c: Likewise. * sysdeps/ieee754/ldbl-128ibm/s_signbitl.c: Likewise. * sysdeps/ieee754/ldbl-64-128/s_copysignl.c: Likewise. * sysdeps/ieee754/ldbl-64-128/s_finitel.c: Likewise. * sysdeps/ieee754/ldbl-64-128/s_frexpl.c: Likewise. * sysdeps/ieee754/ldbl-64-128/s_isinfl.c: Likewise. * sysdeps/ieee754/ldbl-64-128/s_isnanl.c: Likewise. * sysdeps/ieee754/ldbl-64-128/s_modfl.c: Likewise. * sysdeps/ieee754/ldbl-64-128/s_scalbnl.c: Likewise. * sysdeps/ieee754/ldbl-64-128/s_signbitl.c: Likewise. * sysdeps/ieee754/ldbl-64-128/w_scalblnl.c: Likewise. * sysdeps/ieee754/ldbl-opt/s_copysign.c: Likewise. * sysdeps/ieee754/ldbl-opt/s_finite.c: Likewise. * sysdeps/ieee754/ldbl-opt/s_frexp.c: Likewise. * sysdeps/ieee754/ldbl-opt/s_isinf.c: Likewise. * sysdeps/ieee754/ldbl-opt/s_isnan.c: Likewise. * sysdeps/ieee754/ldbl-opt/s_ldexp.c: Likewise. * sysdeps/ieee754/ldbl-opt/s_ldexpl.c: Likewise. * sysdeps/ieee754/ldbl-opt/s_modf.c: Likewise. * sysdeps/ieee754/ldbl-opt/s_scalbln.c: Likewise. * sysdeps/ieee754/ldbl-opt/s_scalbn.c: Likewise. * sysdeps/powerpc/power5+/fpu/s_modf.c: Likewise. * sysdeps/powerpc/powerpc32/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc32/fpu/s_copysignl.S: Likewise. * sysdeps/powerpc/powerpc32/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_copysign.c: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_finite.c: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isinf.c: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isnan.c: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_modf.c: Likewise. * sysdeps/powerpc/powerpc32/power5/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc32/power6/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc32/power6/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_copysign.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_modf.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysignl.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S: Likewise. * sysdeps/sparc/sparc32/fpu/s_signbitl.S: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/s_isnan.S: Likewise. * sysdeps/unix/sysv/linux/alpha/fraiseexcpt.S: Likewise.
* PowerPC: Align power7 memcpy using VSX to quadwordAdhemerval Zanella2014-07-071-2/+2
| | | | | | This patch changes power7 memcpy to use VSX instructions only when memory is aligned to quardword. It is to avoid unaligned kernel traps on non-cacheable memory (for instance, memory-mapped I/O).
* PowerPC: Remove 64 bits instructions in PPC32 codeAdhemerval Zanella2014-05-266-12/+12
| | | | This patch replaces the insrdi by insrwi in powerpc32 assembly.
* Update copyright notices with scripts/update-copyrightsAllan McRae2014-01-0116-16/+16
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* PowerPC: Adjust multiarch Implies for PowerPC32Adhemerval Zanella2013-12-062-0/+2
| | | | | This patch adds Implies files on multiarch folder for POWER chips so multirach is enabled when building with --with-cpu and powerN option.
* PowerPC: multiarch logb/logbf/logbl for PowerPC32Adhemerval Zanella2013-12-063-208/+0
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* PowerPC LE memchr and memrchrAlan Modra2013-10-043-189/+200
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00105.html Like strnlen, memchr and memrchr had a number of defects fixed by this patch as well as adding little-endian support. The first one I noticed was that the entry to the main loop needlessly checked for "are we done yet?" when we know the size is large enough that we can't be done. The second defect I noticed was that the main loop count was wrong, which in turn meant that the small loop needed to handle an extra word. Thirdly, there is nothing to say that the string can't wrap around zero, except of course that we'd normally hit a segfault on trying to read from address zero. Fixing that simplified a number of places: - /* Are we done already? */ - addi r9,r8,8 - cmpld r9,r7 - bge L(null) becomes + cmpld r8,r7 + beqlr However, the exit gets an extra test because I test for being on the last word then if so whether the byte offset is less than the end. Overall, the change is a win. Lastly, memrchr used the wrong cache hint. * sysdeps/powerpc/powerpc64/power7/memchr.S: Replace rlwimi with insrdi. Make better use of reg selection to speed exit slightly. Schedule entry path a little better. Remove useless "are we done" checks on entry to main loop. Handle wrapping around zero address. Correct main loop count. Handle single left-over word from main loop inline rather than by using loop_small. Remove extra word case in loop_small caused by wrong loop count. Add little-endian support. * sysdeps/powerpc/powerpc32/power7/memchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memrchr.S: Likewise. Use proper cache hint. * sysdeps/powerpc/powerpc32/power7/memrchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/rawmemchr.S: Add little-endian support. Avoid rlwimi. * sysdeps/powerpc/powerpc32/power7/rawmemchr.S: Likewise.
* PowerPC LE memsetAlan Modra2013-10-041-2/+2
| | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00104.html One of the things I noticed when looking at power7 timing is that rlwimi is cracked and the two resulting insns have a register dependency. That makes it a little slower than the equivalent rldimi. * sysdeps/powerpc/powerpc64/memset.S: Replace rlwimi with insrdi. Formatting. * sysdeps/powerpc/powerpc64/power4/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memset.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memset.S: Likewise. * sysdeps/powerpc/powerpc32/power4/memset.S: Likewise. * sysdeps/powerpc/powerpc32/power6/memset.S: Likewise. * sysdeps/powerpc/powerpc32/power7/memset.S: Likewise.
* PowerPC LE memcpyAlan Modra2013-10-042-12/+40
| | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00103.html LIttle-endian support for memcpy. I spent some time cleaning up the 64-bit power7 memcpy, in order to avoid the extra alignment traps power7 takes for little-endian. It probably would have been better to copy the linux kernel version of memcpy. * sysdeps/powerpc/powerpc32/power4/memcpy.S: Add little endian support. * sysdeps/powerpc/powerpc32/power6/memcpy.S: Likewise. * sysdeps/powerpc/powerpc32/power7/memcpy.S: Likewise. * sysdeps/powerpc/powerpc32/power7/mempcpy.S: Likewise. * sysdeps/powerpc/powerpc64/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power4/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power6/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/memcpy.S: Likewise. * sysdeps/powerpc/powerpc64/power7/mempcpy.S: Likewise. Make better use of regs. Use power7 mtocrf. Tidy function tails.
* PowerPC LE memcmpAlan Modra2013-10-041-618/+1008
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00102.html This is a rather large patch due to formatting and renaming. The formatting changes were to make it possible to compare power7 and power4 versions of memcmp. Using different register defines came about while I was wrestling with the code, trying to find spare registers at one stage. I found it much simpler if we refer to a reg by the same name throughout a function, so it's better if short-term multiple use regs like rTMP are referred to using their register number. I made the cr field usage changes when attempting to reload rWORDn regs in the exit path to byte swap before comparing when little-endian. That proved a bad idea due to the pipelining involved in the main loop; Offsets to reload the regs were different first time around the loop.. Anyway, I left the cr field usage changes in place for consistency. Aside from these more-or-less cosmetic changes, I fixed a number of places where an early exit path restores regs unnecessarily, removed some dead code, and optimised one or two exits. * sysdeps/powerpc/powerpc64/power7/memcmp.S: Add little-endian support. Formatting. Consistently use rXXX register defines or rN defines. Use early exit labels that avoid restoring unused non-volatile regs. Make cr field use more consistent with rWORDn compares. Rename regs used as shift registers for unaligned loop, using rN defines for short lifetime/multiple use regs. * sysdeps/powerpc/powerpc64/power4/memcmp.S: Likewise. * sysdeps/powerpc/powerpc32/power7/memcmp.S: Likewise. Exit with addi 1,1,64 to pop stack frame. Simplify return value code. * sysdeps/powerpc/powerpc32/power4/memcmp.S: Likewise.
* PowerPC LE strchrAlan Modra2013-10-042-20/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00101.html Adds little-endian support to optimised strchr assembly. I've also tweaked the big-endian code a little. In power7/strchr.S there's a check in the tail of the function that we didn't match 0 before finding a c match, done by comparing leading zero counts. It's just as valid, and quicker, to compare the raw output from cmpb. Another little tweak is to use rldimi/insrdi in place of rlwimi for the power7 strchr functions. Since rlwimi is cracked, it is a few cycles slower. rldimi can be used on the 32-bit power7 functions too. * sysdeps/powerpc/powerpc64/power7/strchr.S (strchr): Add little-endian support. Correct typos, formatting. Optimize tail. Use insrdi rather than rlwimi. * sysdeps/powerpc/powerpc32/power7/strchr.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strchrnul.S (__strchrnul): Add little-endian support. Correct typos. * sysdeps/powerpc/powerpc32/power7/strchrnul.S: Likewise. Use insrdi rather than rlwimi. * sysdeps/powerpc/powerpc64/strchr.S (rTMP4, rTMP5): Define. Use in loop and entry code to keep "and." results. (strchr): Add little-endian support. Comment. Move cntlzd earlier in tail. * sysdeps/powerpc/powerpc32/strchr.S: Likewise.
* PowerPC LE strcmp and strncmpAlan Modra2013-10-041-15/+40
| | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00099.html More little-endian support. I leave the main strcmp loops unchanged, (well, except for renumbering rTMP to something other than r0 since it's needed in an addi insn) and modify the tail for little-endian. I noticed some of the big-endian tail code was a little untidy so have cleaned that up too. * sysdeps/powerpc/powerpc64/strcmp.S (rTMP2): Define as r0. (rTMP): Define as r11. (strcmp): Add little-endian support. Optimise tail. * sysdeps/powerpc/powerpc32/strcmp.S: Similarly. * sysdeps/powerpc/powerpc64/strncmp.S: Likewise. * sysdeps/powerpc/powerpc32/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power4/strncmp.S: Likewise. * sysdeps/powerpc/powerpc32/power4/strncmp.S: Likewise. * sysdeps/powerpc/powerpc64/power7/strncmp.S: Likewise. * sysdeps/powerpc/powerpc32/power7/strncmp.S: Likewise.
* PowerPC LE strnlenAlan Modra2013-10-041-50/+56
| | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00098.html The existing strnlen code has a number of defects, so this patch is more than just adding little-endian support. The changes here are similar to those for memchr. * sysdeps/powerpc/powerpc64/power7/strnlen.S (strnlen): Add little-endian support. Remove unnecessary "are we done" tests. Handle "s" wrapping around zero and extremely large "size". Correct main loop count. Handle single left-over word from main loop inline rather than by using small_loop. Correct comments. Delete "zero" tail, use "end_max" instead. * sysdeps/powerpc/powerpc32/power7/strnlen.S: Likewise.
* PowerPC LE strlenAlan Modra2013-10-041-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00097.html This is the first of nine patches adding little-endian support to the existing optimised string and memory functions. I did spend some time with a power7 simulator looking at cycle by cycle behaviour for memchr, but most of these patches have not been run on cpu simulators to check that we are going as fast as possible. I'm sure PowerPC can do better. However, the little-endian support mostly leaves main loops unchanged, so I'm banking on previous authors having done a good job on big-endian.. As with most code you stare at long enough, I found some improvements for big-endian too. Little-endian support for strlen. Like most of the string functions, I leave the main word or multiple-word loops substantially unchanged, just needing to modify the tail. Removing the branch in the power7 functions is just a tidy. .align produces a branch anyway. Modifying regs in the non-power7 functions is to suit the new little-endian tail. * sysdeps/powerpc/powerpc64/power7/strlen.S (strlen): Add little-endian support. Don't branch over align. * sysdeps/powerpc/powerpc32/power7/strlen.S: Likewise. * sysdeps/powerpc/powerpc64/strlen.S (strlen): Add little-endian support. Rearrange tmp reg use to suit. Comment. * sysdeps/powerpc/powerpc32/strlen.S: Likewise.
* PowerPC floating point little-endian [12 of 15]Alan Modra2013-10-043-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00087.html Fixes for little-endian in 32-bit assembly. * sysdeps/powerpc/sysdep.h (LOWORD, HIWORD, HISHORT): Define. * sysdeps/powerpc/powerpc32/fpu/s_copysign.S: Load little-endian words of double from correct stack offsets. * sysdeps/powerpc/powerpc32/fpu/s_copysignl.S: Likewise. * sysdeps/powerpc/powerpc32/fpu/s_lrint.S: Likewise. * sysdeps/powerpc/powerpc32/fpu/s_lround.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/s_llrintf.S: Likewise. * sysdeps/powerpc/powerpc32/power5+/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc32/power5+/fpu/s_lround.S: Likewise. * sysdeps/powerpc/powerpc32/power5/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc32/power6/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc32/power6/fpu/s_llrint.S: Likewise. * sysdeps/powerpc/powerpc32/power6/fpu/s_llrintf.S: Likewise. * sysdeps/powerpc/powerpc32/power6/fpu/s_llround.S: Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S: Use HISHORT. * sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S: Likewise.
* PowerPC floating point little-endian [2 of 15]Alan Modra2013-10-041-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://sourceware.org/ml/libc-alpha/2013-08/msg00082.html This patch replaces occurrences of GET_LDOUBLE_* and SET_LDOUBLE_* macros, and union ieee854_long_double_shape_type in ldbl-128ibm/, and a stray one in the 32-bit fpu support. These files have no significant changes apart from rewriting the long double bit access. * sysdeps/ieee754/ldbl-128ibm/math_ldbl.h (ldbl_high): Define. * sysdeps/ieee754/ldbl-128ibm/e_acoshl.c (__ieee754_acoshl): Rewrite all uses of ieee854 long double macros and unions. * sysdeps/ieee754/ldbl-128ibm/e_acosl.c (__ieee754_acosl): Likewise. * sysdeps/ieee754/ldbl-128ibm/e_asinl.c (__ieee754_asinl): Likewise. * sysdeps/ieee754/ldbl-128ibm/e_atanhl.c (__ieee754_atanhl): Likewise. * sysdeps/ieee754/ldbl-128ibm/e_coshl.c (__ieee754_coshl): Likewise. * sysdeps/ieee754/ldbl-128ibm/e_log2l.c (__ieee754_log2l): Likewise. * sysdeps/ieee754/ldbl-128ibm/e_rem_pio2l.c (__ieee754_rem_pio2l): Likewise. * sysdeps/ieee754/ldbl-128ibm/e_sinhl.c (__ieee754_sinhl): Likewise. * sysdeps/ieee754/ldbl-128ibm/k_cosl.c (__kernel_cosl): Likewise. * sysdeps/ieee754/ldbl-128ibm/k_sincosl.c (__kernel_sincosl): Likewise. * sysdeps/ieee754/ldbl-128ibm/k_sinl.c (__kernel_sinl): Likewise. * sysdeps/ieee754/ldbl-128ibm/s_asinhl.c (__asinhl): Likewise. * sysdeps/ieee754/ldbl-128ibm/s_atanl.c (__atanl): Likewise. Simplify sign and nan test too. * sysdeps/ieee754/ldbl-128ibm/s_cosl.c (__cosl): Likewise. * sysdeps/ieee754/ldbl-128ibm/s_fabsl.c (__fabsl): Likewise. * sysdeps/ieee754/ldbl-128ibm/s_finitel.c (___finitel): Likewise. * sysdeps/ieee754/ldbl-128ibm/s_fpclassifyl.c (___fpclassifyl): Likewise. * sysdeps/ieee754/ldbl-128ibm/s_isnanl.c (___isnanl): Likewise. * sysdeps/ieee754/ldbl-128ibm/s_issignalingl.c (__issignalingl): Likewise. * sysdeps/ieee754/ldbl-128ibm/s_logbl.c (__logbl): Likewise. * sysdeps/ieee754/ldbl-128ibm/s_signbitl.c (___signbitl): Likewise. * sysdeps/ieee754/ldbl-128ibm/s_sincosl.c (__sincosl): Likewise. * sysdeps/ieee754/ldbl-128ibm/s_sinl.c (__sinl): Likewise. * sysdeps/ieee754/ldbl-128ibm/s_tanl.c (__tanl): Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_logbl.c (__logbl): Likewise.
* PowerPC: fix POWER7 memrchr for some large inputsAdhemerval Zanella2013-09-051-2/+2
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* Fix typos.Ondřej Bílka2013-08-211-1/+1
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* Remove powerpc32 strncmp comments about bounded pointers.Joseph Myers2013-03-041-3/+0
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* Remove powerpc32 bounded-pointers code.Joseph Myers2013-02-2813-59/+33
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* Fix spelling errors in sysdeps/powerpc files.Anton Blanchard2013-01-075-7/+7
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* Update copyright notices with scripts/update-copyrights.Joseph Myers2013-01-0219-19/+19
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* [Powerpc] Tune/optimize powerpc{32,64}/power7/memchr.S.Will Schmidt2012-08-211-20/+58
| | | | | | | | | | | | Assorted tweaking, twisting and tuning to squeeze a few additional cycles out of the memchr code. Changes include bypassing the shift pairs (sld,srd) when they are not required, and unrolling the small_loop that handles short and trailing strings. Per scrollpipe data measuring aligned strings for 64-bit, these changes save between five and eight cycles (9-13% overall) for short strings (<32), Longer aligned strings see slight improvement of 1-3% due to bypassing the shifts and the instruction rearranging.
* Optimize handling of denormals in logb/logbf/logblAndreas Schwab2012-05-262-11/+10
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* PowerPC: libm ABI updateAdhemerval Zanella2012-05-222-5/+14
| | | | Update for libm abilist for POWER6 and POWER7.
* PowerPC - logb[f|l] optimization for POWER7Adhemerval Zanella2012-05-153-0/+207
| | | | | | This patch provides optimized logb (1.2x on PPC32 and 2.5x on PPC64), logbf (1.1x on PPC32 and 2.2x on PPC64), and logbl (1.3x on PPC32 and 50% on PPC64) for the POWER7 processor.
* Replace FSF snail mail address with URLs.Paul Eggert2012-02-0916-48/+32
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* Optimized strcasecmp for Power7Adhemerval Zanella2011-12-173-0/+141
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* Simplify code for accessing powerpc GOTWill Schmidt2011-12-173-15/+12
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* power7 strncmp optimizationWill Schmidt2011-09-071-1/+3
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* power7 memcpy VSX optimizationsWill Schmidt2011-09-071-15/+73
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* Remove doubled words.Jim Meyering2011-04-221-1/+1
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* Fix POWER4/POWER7 optimized strncmp to not read past differing bytesAndreas Schwab2011-04-171-5/+6
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* power7-optimized mempcpyLuis Machado2010-11-051-0/+471
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* powerpc: Various P7-optimized string functionsLuis Machado2010-08-197-0/+1040
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* powerpc: Re-work the Implies structureLuis Machado2010-06-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch tries to organize the implies files for ppc, since there are a number of processors and most of them are compatible with each other (backwards compatible). Having in mind that we start the search for processor-specific files in the sysdeps/unix/sysv/linux tree (sysdeps/unix/sysv/linux/powerpc/powerpc[32|64]/[processor]/fpu to be exact), we would like to grab any linux-specific code from that tree prior to going through the other tree (sysdeps/powerpc/...). For that, i removed the Implies files that were originally inside the fpu directories and placed then in the non-fpu directories (still inside the unix/sysv/linux tree). If no processor-specific/linux-specific files could be found, we "imply" the other tree's (sysdeps/powerpc/...) fpu directory for that specific processor AND also the non-fpu directory for that same tree. If, again, no processor-specific code is found, we read another Implies file that will point to the most compatible processor that we should grab code from, and so on, until we reach the power4 processor. So, in summary, the Implies files will live inside these directories now: * sysdeps/unix/sysv/linux/powerpc/powerpc[32|64]/[processor] * sysdeps/powerpc/powerpc[32|64]/[processor] Practical example of the order we will use to pick power6-specific code with the new structure. sysdeps/unix/sysv/linux/powerpc/powerpc[32|64]/power6/fpu -> sysdeps/unix/sysv/linux/powerpc/powerpc[32|64]/power6 -> sysdeps/powerpc/powerpc[32|64]/power6/fpu -> sysdeps/powerpc/powerpc[32|64]/power6 -> sysdeps/powerpc/powerpc[32|64]/power5+/fpu -> sysdeps/powerpc/powerpc[32|64]/power5+ -> sysdeps/powerpc/powerpc[32|64]/power5/fpu -> sysdeps/powerpc/powerpc[32|64]/power5 -> sysdeps/powerpc/powerpc[32|64]/power4/fpu -> sysdeps/powerpc/powerpc[32|64]/power4 (from here, it'll go to the generic path as usual)
* Fix whitespaces.Ulrich Drepper2010-06-142-17/+17
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* power7 string compare optimizationsLuis Machado2010-06-142-0/+1165
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* Small fix to POWER7 32-bit memcpyLuis Machado2010-05-281-2/+2
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* Small fix to POWER7 32-bit memsetLuis Machado2010-05-241-3/+2
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* Add missing files.Luis Machado2010-05-201-0/+435
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* Fix whitespace issues.Ulrich Drepper2010-03-101-380/+380
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* power7-optimized 64-bit and 32-bit memcpyLuis Machado2010-03-101-0/+469
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* Fix POWER7 ImpliesLuis Machado2010-02-102-2/+0
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* Fix whitespace issues.Ulrich Drepper2010-02-091-1/+0
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* power7-optimized classification functionsLuis Machado2010-02-096-0/+273
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* * sysdeps/x86_64/dl-machine.h (elf_machine_rela): Add branchUlrich Drepper2009-03-121-0/+1
| | | | prediction. A few size optimizations.
generated by cgit-pink 1.4.1 (git 2.36.1) at 2024-07-07 02:21:27 +0000