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This patch implements the LoongArch specific math barriers in order to omit
the store and load from stack if possible.
Signed-off-by: Xi Ruoyao <xry111@xry111.site>
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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Add inline assembler for the ilogb functions. Passes GLIBC regression.
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Add inline assembler for the scalb functions. Passes GLIBC regression.
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Add inline assembler for the scalbn functions. Passes GLIBC regression.
GCC 13, LoongArch support ___builtin_scalbn{,f} with -fno-math-errno,
but only "libm" can use -fno-math-errno in GLIBC, and scalbn is in libc
instead of libm because __printf_fp calls it.
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GCC 13 compiles these built-ins instead of generic
implementation for function logb.
Link: https://gcc.gnu.org/r13-3922
Co-Authored-By: Xi Ruoyao <xry111@xry111.site>
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GCC 13 compiles these built-ins instead of generic
implementation for function llrint.
Link: https://gcc.gnu.org/r13-3920
Co-Authored-By: Xi Ruoyao <xry111@xry111.site>
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GCC 13 compiles these built-ins instead of generic
implementation for function lrint.
Link: https://gcc.gnu.org/r13-3920
Co-Authored-By: Xi Ruoyao <xry111@xry111.site>
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GCC 13 compiles these built-ins to frint.{d,s} instruction.
Link: https://gcc.gnu.org/r13-3919
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Use hardware Floating-point instruction f{maxa/mina}.{s/d}, fclass.{s/d}
to implement fmaximum_mag_num{f/ }, fminimum_mag_num{f/ }.
* sysdeps/loongarch/fpu/s_fmaximum_mag_num.c: New file.
* sysdeps/loongarch/fpu/s_fmaximum_mag_numf.c: Likewise.
* sysdeps/loongarch/fpu/s_fminimum_mag_num.c: Likewise.
* sysdeps/loongarch/fpu/s_fminimum_mag_numf.c: Likewise.
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Use hardware Floating-point instruction f{maxa/mina}.{s/d}, fclass.{s/d}
to implement fmaximum_mag{f/ }, fminimum_mag{f/ }.
* sysdeps/loongarch/fpu/s_fmaximum_mag.c: New file.
* sysdeps/loongarch/fpu/s_fmaximum_magf.c: Likewise.
* sysdeps/loongarch/fpu/s_fminimum_mag.c: Likewise.
* sysdeps/loongarch/fpu/s_fminimum_magf.c: Likewise.
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Use hardware Floating-point instruction f{maxa/mina}.{s/d},
to implement fmaxmag{f/ }, fminmag{f/ }.
* sysdeps/loongarch/fpu/s_fmaxmag.c: New file.
* sysdeps/loongarch/fpu/s_fmaxmagf.c: Likewise.
* sysdeps/loongarch/fpu/s_fminmag.c: Likewise.
* sysdeps/loongarch/fpu/s_fminmagf.c: Likewise.
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Use hardware Floating-point instruction f{max/min}.{s/d}, fclass.{s/d}
to implement fmaximum_num{f/ }, fminimum_num{f/ }.
* sysdeps/loongarch/fpu/s_fmaximum_num.c: New file.
* sysdeps/loongarch/fpu/s_fmaximum_numf.c: Likewise.
* sysdeps/loongarch/fpu/s_fminimum_num.c: Likewise.
* sysdeps/loongarch/fpu/s_fminimum_numf.c: Likewise.
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Use hardware Floating-point instruction f{max/min}.{s/d}, fclass.{s/d}
to implement fmaximum{f/ }, fminimum{f/ }.
* sysdeps/loongarch/fpu/s_fmaximum.c: New file.
* sysdeps/loongarch/fpu/s_fmaximumf.c: Likewise.
* sysdeps/loongarch/fpu/s_fminimum.c: Likewise.
* sysdeps/loongarch/fpu/s_fminimumf.c: Likewise.
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Use hardware Floating-point instruction fclass.{s/d} to implement
classification functions, i.e finite{f/ }, fpclassify{f/ }, isnan{f/ },
isinf{f/ }, issignaling{f/ }.
* sysdeps/loongarch/fpu/s_finite.c: New file.
* sysdeps/loongarch/fpu/s_finitef.c: Likewise.
* sysdeps/loongarch/fpu/s_fpclassify.c: Likewise.
* sysdeps/loongarch/fpu/s_fpclassifyf.c: Likewise.
* sysdeps/loongarch/fpu/s_isinf.c: Likewise.
* sysdeps/loongarch/fpu/s_isinff.c: Likewise.
* sysdeps/loongarch/fpu/s_isnan.c: Likewise.
* sysdeps/loongarch/fpu/s_isnanf.c: Likewise.
* sysdeps/loongarch/fpu/s_issignaling.c: Likewise.
* sysdeps/loongarch/fpu/s_issignalingf.c: Likewise.
* sysdeps/loongarch/fpu_control.h: Add _FCLASS_* macro.
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Use __builtin_{fma, fmaf} to implement function {fma, fmaf} instead of
the generic implementation.
* sysdeps/loongarch/fpu/math-use-builtins-fma.h: New file.
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GCC 13 compiles these built-ins to {fmax,fmin}.{s/d} instruction, use
them instead of the generic implementation.
Link: https://gcc.gnu.org/r13-2085
Signed-off-by: Xi Ruoyao <xry111@xry111.site>
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