Commit message (Collapse) | Author | Age | Files | Lines | |
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* | ARM: Add Cortex-A15 optimized NEON and VFP memcpy routines, with IFUNC. | Will Newton | 2013-05-08 | 10 | -0/+866 |
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* | ARM: Rewrite elf_machine_dynamic in pure C. | Roland McGrath | 2013-05-07 | 2 | -21/+9 |
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* | ARM: Add missing sfi_breg prefix in _dl_tlsdesc_dynamic code. | Roland McGrath | 2013-05-06 | 2 | -0/+5 |
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* | ARM: Macroize assembly use of EABI unwind directives. | Roland McGrath | 2013-04-19 | 3 | -15/+31 |
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* | MicroBlaze Port | David Holsgrove | 2013-04-18 | 101 | -0/+12503 |
| | | | | | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> | ||||
* | m68k: update libm test ULPs | Andreas Schwab | 2013-04-11 | 2 | -4/+3600 |
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* | New <math.h> macro named issignaling to check for a signaling NaN (sNaN). | Thomas Schwinge | 2013-04-02 | 17 | -0/+121 |
| | | | | It is based on draft TS 18661 and currently enabled as a GNU extension. | ||||
* | ARM: fix preconfigure. | Mans Rullgard | 2013-03-26 | 3 | -2/+7 |
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* | Use LIBC_CONFIG_VAR for MIPS default-abi setting. | Joseph Myers | 2013-03-21 | 4 | -5/+11 |
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* | Use LIBC_CONFIG_VAR for ARM default-abi setting. | Joseph Myers | 2013-03-20 | 4 | -7/+14 |
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* | aarch64: Move rtld link to /lib | Andreas Schwab | 2013-03-19 | 3 | -0/+8 |
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* | ARM: Make dl-tlsdesc.S use sfi_breg, respect ARM_ALWAYS_BX and ↵ | Roland McGrath | 2013-03-18 | 3 | -9/+38 |
| | | | | ARM_NO_INDEX_REGISTER. | ||||
* | Better distinguish between NaN/qNaN/sNaN. | Thomas Schwinge | 2013-03-15 | 1 | -8/+8 |
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* | Avoid duplicate MAP_ANONYMOUS definition for MIPS GNU/Linux. | Thomas Schwinge | 2013-03-15 | 2 | -1/+5 |
| | | | | Follow-up to commit 664a9ce4ca40feabff781fff044c93a43ae15b59. | ||||
* | ARM: sfi_sp assembler macro | Roland McGrath | 2013-03-15 | 3 | -1/+9 |
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* | ARM: sfi_breg assembler macro | Roland McGrath | 2013-03-15 | 18 | -189/+404 |
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* | aarch64: use lib64 as default lib and slib directory | Andreas Schwab | 2013-03-14 | 3 | -0/+31 |
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* | ARM_BX_ALIGN_LOG2 | Roland McGrath | 2013-03-13 | 4 | -12/+63 |
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* | ARM: Handle ARM_ALWAYS_BX in {add,sub}_n.S code. | Roland McGrath | 2013-03-13 | 2 | -0/+9 |
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* | ARM: Support avoiding pc as destination register. | Roland McGrath | 2013-03-13 | 4 | -2/+67 |
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* | ARM: Make armv6t2 memchr implementation usable without Thumb. | Roland McGrath | 2013-03-12 | 2 | -2/+26 |
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* | ARM: Change register allocation in armv6t2 memchr implementation. | Roland McGrath | 2013-03-12 | 2 | -15/+20 |
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* | ia64: fix set-but-unused warnings with syscalls | Mike Frysinger | 2013-03-12 | 2 | -2/+11 |
| | | | | | | | | | | | These macros often set up a variable that later macros sometimes do not use. Add unused attribute to avoid that. Similarly, the ia64 code tends to check the err field rather than the val (which is opposite of most arches) leading to the same kind of warning. Replace this with a dummy reference. Signed-off-by: Mike Frysinger <vapier@gentoo.org> | ||||
* | ia64: fix strict aliasing warnings with libm error | Mike Frysinger | 2013-03-12 | 2 | -58/+81 |
| | | | | | | | | The current code declares double constants by using a char buffer and then casting the pointer to a different type. This makes the aliasing logic unhappy. Change it to use a union instead to avoid that. Signed-off-by: Mike Frysinger <vapier@gentoo.org> | ||||
* | ia64: fix strict aliasing warnings with func descriptors | Mike Frysinger | 2013-03-12 | 5 | -13/+34 |
| | | | | | | | | | | | Function pointers on ia64 are like parisc -- they're plabels. While the parisc port enjoys a gcc builtin for extracting the address here, ia64 has no such luck. Casting & dereferencing in one go triggers a strict aliasing warning. Use a union to fix that. Signed-off-by: Mike Frysinger <vapier@gentoo.org> | ||||
* | Add comments about ARM configure -fno-unwind-tables handling. | Joseph Myers | 2013-03-11 | 5 | -0/+21 |
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* | ARM: Consolidate setjmp details in include/bits/setjmp.h file. | Roland McGrath | 2013-03-11 | 6 | -10/+28 |
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* | ARM: Convert string/ assembly to unified syntax. | Roland McGrath | 2013-03-11 | 5 | -40/+53 |
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* | ARM: Use r10 instead of r9. | Roland McGrath | 2013-03-11 | 3 | -18/+21 |
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* | AM33: Use <bits/mman.h> | Andreas Jaeger | 2013-03-11 | 2 | -61/+7 |
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* | Use <bits/mman.h> on ia64 | Andreas Jaeger | 2013-03-11 | 2 | -74/+7 |
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* | Clean up ARM preconfigure. | Roland McGrath | 2013-03-11 | 3 | -46/+109 |
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* | Remove extra pthread_atfork compat symbols | Andreas Schwab | 2013-03-11 | 10 | -6/+28 |
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* | ia64: makecontext: fix signed warnings | Mike Frysinger | 2013-03-10 | 2 | -2/+7 |
| | | | | | | | | The ia64_rse_is_rnat_slot func expects an unsigned pointer, but we're passing in a signed pointer. The signness doesn't matter here, so convert it to unsigned. Signed-off-by: Mike Frysinger <vapier@gentoo.org> | ||||
* | ia64: fix NEED_DL_SYSINFO_DSO conditionals | Mike Frysinger | 2013-03-10 | 2 | -23/+13 |
| | | | | | | | The recent change to clean up these defines missed the ia64 logic. Update it accordingly. Signed-off-by: Mike Frysinger <vapier@gentoo.org> | ||||
* | arm: Implement armv6 optimized string routines | Richard Henderson | 2013-03-07 | 8 | -0/+707 |
| | | | | | | | | The strcpy and strchr (and related) functions are four times faster than the byte-by-byte default versions. The strlen function is twice as fast for long strings and 50% faster for short strings over the armv4 version. | ||||
* | AARCH64: Use <bits/mman-linux.h> | Andreas Jaeger | 2013-03-07 | 2 | -73/+8 |
| | | | | | * sysdeps/unix/sysv/linux/aarch64/bits/mman.h: Remove all defines provided by bits/mman-linux.h and include <bits/mman-linux.h>. | ||||
* | Use <bits/mman-linux.h> for MIPS | Andreas Jaeger | 2013-03-06 | 2 | -72/+9 |
| | | | | | | | | | * sysdeps/unix/sysv/linux/bits/mman-linux.h (MAP_ANONYMOUS): Allow definition via __MAP_ANONYMOUS. * sysdeps/unix/sysv/linux/mips/bits/mman.h: Remove all defines provided by bits/mman-linux.h and include <bits/mman-linux.h>. (__MAP_ANONYMOUS): Define. | ||||
* | arm: Add optimized add_n and sub_n | Richard Henderson | 2013-03-06 | 3 | -0/+88 |
| | | | | | | | | Written from scratch rather than copied from GMP, due to LGPL 2.1 vs GPL 3, but tested with the GMP testsuite. This is 250% faster than the generic code as measured on Cortex-A15, and the same speed as GMP on the same core, and probably everywhere. | ||||
* | arm: Add optimized submul_1 | Richard Henderson | 2013-03-06 | 2 | -0/+69 |
| | | | | | | | | Written from scratch rather than copied from GMP, due to LGPL 2.1 vs GPL 3, but tested with the GMP testsuite. This is 50% faster than the generic code as measured on Cortex-A15. It is 25% slower than the current GMP routine on the same core. | ||||
* | arm: Add optimized addmul_1 | Richard Henderson | 2013-03-06 | 2 | -0/+68 |
| | | | | | | | | | Written from scratch rather than copied from GMP, due to LGPL 2.1 vs GPL 3, but tested with the GMP testsuite. This is 25% faster than the generic code as measured on Cortex-A15, and the same speed as GMP on the same core. It's probably slower than GMP on the A8 and A9 cores though. | ||||
* | arm: Add optimized ffs for armv6t2 | Richard Henderson | 2013-03-06 | 3 | -0/+88 |
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* | arm: Implement hard-tp for GET_TLS | Richard Henderson | 2013-03-06 | 4 | -11/+30 |
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* | arm: Tidy architecture selection | Richard Henderson | 2013-03-06 | 3 | -8/+45 |
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* | arm: Unless arm4t, pop return address directly into pc | Richard Henderson | 2013-03-06 | 3 | -5/+14 |
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* | arm: Commonize BX conditionals | Richard Henderson | 2013-03-06 | 4 | -30/+21 |
| | | | | Add BLX macro in addition and use it where appropriate. | ||||
* | arm: Delete LOADREGS macro | Richard Henderson | 2013-03-06 | 3 | -5/+4 |
| | | | | | | There was only one user. It's "condition" argument was used for "ia" rather than an actual condition. The apcs26 syntax is almost certainly not needed, given current binutils requirements. | ||||
* | arm: Use push/pop mnemonics | Richard Henderson | 2013-03-06 | 20 | -134/+154 |
| | | | | | | For arm this makes no difference--the result is bit-for-bit identical; for thumb this results in smaller encodings. Perhaps it ought not and this is in fact an assembler bug, but I also think it's clearer. | ||||
* | arm: Enable thumb2 mode in assembly files | Richard Henderson | 2013-03-06 | 2 | -2/+14 |
| | | | | | | The preceeding patches have allowed for the few incompatibilities between arm and thumb2 mode, or have marked the file as not wanting to use thumb2 mode. | ||||
* | arm: Introduce and use GET_TLS | Richard Henderson | 2013-03-06 | 10 | -42/+77 |
| | | | | | | Factor out the sequence needed to call kuser_get_tls, as we can't play subtract into pc games in thumb mode. Prepare for hard-tp, pulling the save of LR into the macro. |