about summary refs log tree commit diff
path: root/ports
Commit message (Collapse)AuthorAgeFilesLines
...
* Use ELFOSABI_GNU instead of ELFOSABI_LINUX.Thomas Schwinge2013-08-294-5/+16
|
* Fix typos.Ondřej Bílka2013-08-2912-49/+67
|
* ARM: Pass dl_hwcap to IFUNC resolver.Carlos O'Donell2013-08-292-1/+8
| | | | | For REL relocs pass dl_hwcap to the IFUNC resolver as is required by the IFUNC API (bug 15905).
* MIPS: Correct the handling of reserved FCSR bitsMaciej W. Rozycki2013-08-224-4/+12
| | | | | | | | | | | | | | | | | | | | Reserved bits in the Floating-Point Control and Status Register (FCSR) should not be implicitly cleared by fedisableexcept or feenableexcept, there is no reason to. Among these are the 8 condition codes and one of the two bits reserved for architecture implementers (bits #22 & #21). As to the latter, there is no reason to treat any of them as reserved either, they should be user controllable and settable via __fpu_control override as the user sees fit. For example in processors implemented by MIPS Technologies, such as the 5Kf or the 24Kf, these bits are used to change the treatment of denormalised operands and tiny results: bit #22 is Flush Override (FO) and bit #21 is Flush to Nearest (FN). They cause non-IEEE-compliant behaviour, but some programs may have a use for such modes of operation; the library should not obstruct such use just as it does not for the architectural Flush to Zero (FS) bit (bit #24). Therefore the change adjusts the reserved mask accordingly and also documents the distinction between bits 22:21 and 20:18.
* Fix typos.Ondřej Bílka2013-08-2117-15/+42
|
* PR 15483Alexandre Oliva2013-08-174-0/+24
| | | | | | | | * sysdeps/powerpc/nofpu/sim-full.c: Add FIXME note about the need for thread-specific variables preserved across signal handlers. * sysdeps/powerpc/nofpu/soft-supp.h: Likewise. * sysdeps/powerpc/soft-fp/sfp-machine.h: Likewise.
* [AArch64] Provide symbol version for _mcount.Marcus Shawcroft2013-07-265-0/+81
|
* hppa: Regenerate libm-test-ulps.Carlos O'Donell2013-07-232-0/+43
|
* tile BZ #15759: Fix bug in _dl_unmapChris Metcalf2013-07-222-3/+15
| | | | | | We returned without calling __munmap if not in the simulator. Now we call a separate sim_dlclose() function to make the control flow work correctly.
* m68k: use _dl_static_init to set GLR0(dl_pagesize)Andreas Schwab2013-07-215-2/+134
|
* tile: add missing semicolon in <bits/ptrace.h>Chris Metcalf2013-07-192-1/+6
| | | | | | Change 521c6785e1fc94d added the enum but missed the semicolon. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* [AArch64] Adding -funwind-tables to backtrace.cMarcus Shawcroft2013-07-122-0/+8
|
* [AArch64] Use _dl_static_init to set GLR0(dl_pagesize)Marcus Shawcroft2013-07-095-0/+136
|
* tile: use _dl_static_init to set GLRO(gl_pagesize)Chris Metcalf2013-07-075-0/+134
| | | | | | A recently-added test (dlfcn/tststatic5) pointed out that tile was not properly initializing the variable pagesize in certain cases. This change just copies the existing code from MIPS.
* tile: update libm-test-ulps from scratchChris Metcalf2013-07-072-129/+2797
|
* tile: use soft-fp for fma() and fmaf()Chris Metcalf2013-07-074-8/+105
| | | | | | The sfp-machine.h is based on the gcc version, but extended with required new macros by comparison with other architectures and by investigating the hardware support for FP on tile.
* [AArch64] Regenerate libm-test-ulpsMarcus Shawcroft2013-07-052-0/+50
|
* Sync sys/ptrace with Linux 3.10Andreas Jaeger2013-07-046-3/+102
|
* Condition sysdeps/arm/include/bits/setjmp.h contents on _ISOMAC.Joseph Myers2013-07-032-2/+10
|
* Regenerate powerpc-nofpu ULPs.Joseph Myers2013-07-032-183/+4158
|
* m68k: update libm test ULPsAndreas Schwab2013-07-032-6/+708
|
* Regenerate MIPS ulps.Joseph Myers2013-07-023-378/+9206
|
* Regenerate ARM ulps.Joseph Myers2013-07-022-103/+2806
|
* Make soft-float ARM use soft-fp fma/fmaf.Joseph Myers2013-07-025-0/+69
|
* alpha: Update libm-test-ulps from scratchRichard Henderson2013-07-022-205/+70
|
* Implement fma in soft-fp.Joseph Myers2013-07-029-12/+50
|
* ARM: Pass dl_hwcap to IFUNC resolver functions.Will Newton2013-07-022-1/+6
|
* Support no-FPU ColdFire in sysdeps/m68k/dl-trampoline.S and refactor code.Joseph Myers2013-06-302-24/+27
|
* tile: switch to using <fenv.h> fallback functionsChris Metcalf2013-06-307-165/+9
| | | | | Now that the fallback functions match the desired semantics for tile functions, just switch to using them.
* Add GLRO(dl_hwcap2) for new AT_HWCAP2 auxv_t a_type.Ryan S. Arnold2013-06-286-3/+24
|
* Fix sysdeps/m68k/fpu_control.h preprocessor indentation.Joseph Myers2013-06-282-32/+36
|
* Support no-FPU ColdFire in sysdeps/m68k/fpu_control.h.Nathan Sidwell2013-06-282-3/+23
|
* [AArch64] Adjust elf_machine_dynamic to find _DYNAMIC via _GLOBAL_OFFSET_TABLE_Marcus Shawcroft2013-06-282-2/+7
|
* [AArch64] Simplify getcontext pstate initialization.Marcus Shawcroft2013-06-282-2/+6
|
* _dl_static_init: Remove nested locking.Maciej W. Rozycki2013-06-274-14/+14
| | | | | | | This function is now called from dl_open_worker with the GL(dl_load_lock) lock held and no longer needs local protection. GL(dl_load_lock) also correctly protects _dl_lookup_symbol_x called here that relies on the caller to have serialized access to the data structures it uses.
* m68k: fix bad use of register alias in cfi insnAndreas Schwab2013-06-252-2/+7
|
* [BZ #15666] alpha: Add __sqrt*_finite definitionsRichard Henderson2013-06-248-0/+85
| | | | | With compatibility for ev6 and non-ev6 builds, as the non-ev6 did manage to get definitions emitted for the float and double functions.
* alpha: Update libm-test-ulpsRichard Henderson2013-06-232-32/+6392
|
* sysdeps/arm/arm-mcount.S: Comment typo fix.Roland McGrath2013-06-182-1/+3
|
* ARM: Make armv7 memcpy implementations SFI-friendlyRoland McGrath2013-06-183-281/+572
|
* ARM: Clean up __libc_ifunc_impl_listRoland McGrath2013-06-182-10/+21
|
* Fix warnings from ARM soft-float fpu_control.h.Joseph Myers2013-06-182-2/+7
|
* Wrap test-fpucw.c for ARM.Joseph Myers2013-06-183-1/+12
|
* Make ARM feenableexcept detect failure (bug 14907).Joseph Myers2013-06-172-0/+18
|
* New API to set default thread attributesSiddhesh Poyarekar2013-06-1523-0/+106
| | | | | | | This patch introduces two new convenience functions to set the default thread attributes used for creating threads. This allows a programmer to set the default thread attributes just once in a process and then run pthread_create without additional attributes.
* Stop MIPS setjmp / longjmp saving / restoring floating-point flags (bug 14909).Joseph Myers2013-06-146-20/+14
|
* Update ARM _FPU_RESERVED value.Joseph Myers2013-06-142-1/+7
|
* Add math-tests.h for MIPS.Joseph Myers2013-06-142-0/+41
|
* MicroBlaze: negated errors in lowlevellock.hKirk Meyer2013-06-142-4/+9
| | | | | | | | | The macros in lowlevellock.h are returning positive errors, but the users of the macros expect negative. This causes e.g. sem_wait to sometimes return an error with errno set to -EWOULDBLOCK. Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com> Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
* tile: default to little-endian in bits/endian.hChris Metcalf2013-06-132-3/+5
| | | | | | This turns out to be helpful when doing a from-scratch cross-compile of gcc and glibc, since you can then do "make install-headers" in glibc even before you have a functioning tile gcc.