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* Use LIBC_CONFIG_VAR for ARM default-abi setting.Joseph Myers2013-03-201-0/+8
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* ARM: Make dl-tlsdesc.S use sfi_breg, respect ARM_ALWAYS_BX and ↵Roland McGrath2013-03-181-0/+10
| | | | ARM_NO_INDEX_REGISTER.
* ARM: sfi_sp assembler macroRoland McGrath2013-03-151-0/+3
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* ARM: sfi_breg assembler macroRoland McGrath2013-03-151-0/+23
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* ARM_BX_ALIGN_LOG2Roland McGrath2013-03-131-0/+4
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* ARM: Handle ARM_ALWAYS_BX in {add,sub}_n.S code.Roland McGrath2013-03-131-0/+3
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* ARM: Support avoiding pc as destination register.Roland McGrath2013-03-131-0/+7
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* ARM: Make armv6t2 memchr implementation usable without Thumb.Roland McGrath2013-03-121-0/+3
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* ARM: Change register allocation in armv6t2 memchr implementation.Roland McGrath2013-03-121-0/+5
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* Add comments about ARM configure -fno-unwind-tables handling.Joseph Myers2013-03-111-0/+9
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* ARM: Consolidate setjmp details in include/bits/setjmp.h file.Roland McGrath2013-03-111-0/+8
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* ARM: Convert string/ assembly to unified syntax.Roland McGrath2013-03-111-0/+5
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* ARM: Use r10 instead of r9.Roland McGrath2013-03-111-0/+3
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* Clean up ARM preconfigure.Roland McGrath2013-03-111-0/+5
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* Remove extra pthread_atfork compat symbolsAndreas Schwab2013-03-111-0/+6
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* arm: Implement armv6 optimized string routinesRichard Henderson2013-03-071-0/+10
| | | | | | | | The strcpy and strchr (and related) functions are four times faster than the byte-by-byte default versions. The strlen function is twice as fast for long strings and 50% faster for short strings over the armv4 version.
* arm: Add optimized add_n and sub_nRichard Henderson2013-03-061-0/+2
| | | | | | | | Written from scratch rather than copied from GMP, due to LGPL 2.1 vs GPL 3, but tested with the GMP testsuite. This is 250% faster than the generic code as measured on Cortex-A15, and the same speed as GMP on the same core, and probably everywhere.
* arm: Add optimized submul_1Richard Henderson2013-03-061-0/+1
| | | | | | | | Written from scratch rather than copied from GMP, due to LGPL 2.1 vs GPL 3, but tested with the GMP testsuite. This is 50% faster than the generic code as measured on Cortex-A15. It is 25% slower than the current GMP routine on the same core.
* arm: Add optimized addmul_1Richard Henderson2013-03-061-0/+1
| | | | | | | | | Written from scratch rather than copied from GMP, due to LGPL 2.1 vs GPL 3, but tested with the GMP testsuite. This is 25% faster than the generic code as measured on Cortex-A15, and the same speed as GMP on the same core. It's probably slower than GMP on the A8 and A9 cores though.
* arm: Add optimized ffs for armv6t2Richard Henderson2013-03-061-0/+3
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* arm: Implement hard-tp for GET_TLSRichard Henderson2013-03-061-0/+6
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* arm: Tidy architecture selectionRichard Henderson2013-03-061-0/+7
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* arm: Unless arm4t, pop return address directly into pcRichard Henderson2013-03-061-0/+4
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* arm: Commonize BX conditionalsRichard Henderson2013-03-061-0/+7
| | | | Add BLX macro in addition and use it where appropriate.
* arm: Delete LOADREGS macroRichard Henderson2013-03-061-0/+3
| | | | | | There was only one user. It's "condition" argument was used for "ia" rather than an actual condition. The apcs26 syntax is almost certainly not needed, given current binutils requirements.
* arm: Use push/pop mnemonicsRichard Henderson2013-03-061-0/+21
| | | | | | For arm this makes no difference--the result is bit-for-bit identical; for thumb this results in smaller encodings. Perhaps it ought not and this is in fact an assembler bug, but I also think it's clearer.
* arm: Enable thumb2 mode in assembly filesRichard Henderson2013-03-061-0/+3
| | | | | | The preceeding patches have allowed for the few incompatibilities between arm and thumb2 mode, or have marked the file as not wanting to use thumb2 mode.
* arm: Introduce and use GET_TLSRichard Henderson2013-03-061-0/+13
| | | | | | Factor out the sequence needed to call kuser_get_tls, as we can't play subtract into pc games in thumb mode. Prepare for hard-tp, pulling the save of LR into the macro.
* arm: Introduce and use NEGOFF series of macrosRichard Henderson2013-03-061-0/+8
| | | | | | | | | There are several places in which we access negative offsets from the thread-pointer, but thumb2 only supports positive offsets in memory references. Avoid duplicating the rather large macros in which these references are embedded by abstracting out the operation.
* arm: Introduce and use LDST_PCRELRichard Henderson2013-03-061-0/+12
| | | | | Macro-ising the few instances where we need to distinguish between arm and thumb pc-relative memory operations.
* Update date of last entryAndreas Jaeger2013-03-061-1/+1
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* Use <bits/mman-linux.h> on ARMAndreas Jaeger2013-03-061-0/+5
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* arm: Mark assembly files that will not use thumb modeRichard Henderson2013-02-281-0/+11
| | | | | | | | | Some routines are written with complex LDM/STM insns that cannot be used in thumb mode, or are highly conditional requiring excessive IT insns. When a future patch goes in to enable thumb2 by default, this marker will be used to override that default.
* arm: Add IT insns for thumb modeRichard Henderson2013-02-281-0/+11
| | | | | These are ignored by the assembler in ARM mode, so by default this has no effect on generated code.
* arm: Introduce and use PC_OFSRichard Henderson2013-02-281-0/+15
| | | | | Scour the source for raw "-8" adjustments that are related to the offset created by reading the pc.
* arm: Tidy whitespace in sysdep.h filesRichard Henderson2013-02-281-0/+4
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* arm: Include libc-do-syscall in sysdep-rtld-routinesRichard Henderson2013-02-281-0/+3
| | | | When compiling with -mthumb, ld.so itself also needs __libc_do_syscall.
* arm: Handle armv6 in preconfigureRichard Henderson2013-02-281-0/+2
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* arm: Update preconfigure fragment for gcc 4.8Richard Henderson2013-02-281-0/+4
| | | | | | | | | | | New defines from gcc 4.8: #define __ARM_ARCH_ISA_ARM 1 #define __ARM_ARCH_PROFILE 65 #define __ARM_ARCH_ISA_THUMB 2 #define __ARM_ARCH 7 all of which got in the way of the one we wanted: #define __ARM_ARCH_7A__ 1
* ARM: Macroize use of .cfi_sections directive.Roland McGrath2013-02-271-0/+8
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* Add FUTEX_*_REQUEUE_PI support for ARM.Joseph Myers2013-02-181-0/+10
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* C++11 thread_local destructors supportSiddhesh Poyarekar2013-02-181-0/+5
| | | | | | | | | | | This feature is specifically for the C++ compiler to offload calling thread_local object destructors on thread program exit, to glibc. This is to overcome the possible complication of destructors of thread_local objects getting called after the DSO in which they're defined is unloaded by the dynamic linker. The DSO is marked as 'unloadable' if it has a constructed thread_local object and marked as 'unloadable' again when all the constructed thread_local objects defined in it are destroyed.
* Remove __ptrvalue, __bounded and __unbounded.Joseph Myers2013-02-131-0/+7
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* Remove CHECK_N and bp-checks.h.Joseph Myers2013-02-081-0/+16
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* BZ #15006: Updates NEWS and ChangeLog.Carlos O'Donell2013-02-081-0/+1
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* ARM: Support loading unmarked objects from cache.Carlos O'Donell2013-02-081-0/+8
| | | | | | | | | | | | ARM now supports loading unmarked objects from the dynamic loader cache. Unmarked objects can be used with the hard-float or soft-float ABI. We must support loading unmarked objects during the transition period from a binutils that does not mark objects to one that does mark them with the correct ELF flags. Signed-off-by: Carlos O'Donell <carlos@redhat.com>
* Remove CHECK_STRING, CHECK_STRING_NULL_OK and __ubp_memchr.Joseph Myers2013-02-041-0/+7
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* Update copyright notices with scripts/update-copyrights.Joseph Myers2013-01-021-0/+5
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* Fix ChangeLog formatting for arm and aarch64Adam Conrad2012-12-061-1/+1
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* arm: Check for the FLAG_ARM_LIBHF flag in the ldconfig cacheMarcus Shawcroft2012-12-041-0/+4
| | | | Signed-off-by: Steve McIntyre <steve.mcintyre@linaro.org>
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