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* Linux: Fix __glibc_has_include use for <sys/stat.h> and statxFlorian Weimer2019-06-141-0/+5
| | | | | | | | | | | | | | | The identifier linux is used as a predefined macro, so the actually used path is 1/stat.h or 1/stat64.h. Using the quote-based version triggers a file lookup for /usr/include/bits/linux/stat.h (or whatever directory is used to store bits/statx.h), but since bits/ is pretty much reserved by glibc, this appears to be acceptable. This is related to GCC PR 80005: incorrect macro expansion of the argument of __has_include. Suggested by Zack Weinberg. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* <sys/cdefs.h>: Inhibit macro expansion for __glibc_has_includeFlorian Weimer2019-06-141-0/+6
| | | | | | | | | This is currently ineffective with GCC because of GCC PR 80005, but it makes sense to anticipate a fix for this defect. Suggested by Zack Weinberg. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* Add IPV6_ROUTER_ALERT_ISOLATE from Linux 5.1 to bits/in.h.Joseph Myers2019-06-131-0/+3
| | | | | | | | | | This patch adds the new constant IPV6_ROUTER_ALERT_ISOLATE from Linux 5.1 to sysdeps/unix/sysv/linux/bits/in.h. Tested for x86_64. * sysdeps/unix/sysv/linux/bits/in.h (IPV6_ROUTER_ALERT_ISOLATE): New macro.
* Allow memset local PLT reference for powerpc soft-float.Joseph Myers2019-06-131-0/+5
| | | | | | | | | | | | | | | | | | | | Some recent change on GCC mainline resulted in the localplt test failing for powerpc soft-float (not sure exactly when, as the failure appeared when there were other build test failures as well; <https://sourceware.org/ml/libc-testresults/2019-q2/msg00261.html> shows it remaining when other failures went away). The problem is a call to memset that GCC now generates in the libgcc long double code. Since memset is documented as a function GCC may always implicitly generate calls to, it seems reasonable to allow that local PLT reference (just like those for libgcc functions that GCC implicitly generates calls to and that are also exported from libc.so), which this patch does. Tested for powerpc soft-float with build-many-glibcs.py. * sysdeps/unix/sysv/linux/powerpc/powerpc32/nofpu/localplt.data: Allow memset in libc.so.
* aarch64: handle STO_AARCH64_VARIANT_PCSSzabolcs Nagy2019-06-131-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid lazy binding of symbols that may follow a variant PCS with different register usage convention from the base PCS. Currently the lazy binding entry code does not preserve all the registers required for AdvSIMD and SVE vector calls. Saving and restoring all registers unconditionally may break existing binaries, even if they never use vector calls, because of the larger stack requirement for lazy resolution, which can be significant on an SVE system. The solution is to mark all symbols in the symbol table that may follow a variant PCS so the dynamic linker can handle them specially. In this patch such symbols are always resolved at load time, not lazily. So currently LD_AUDIT for variant PCS symbols are not supported, for that the _dl_runtime_profile entry needs to be changed e.g. to unconditionally save/restore all registers (but pass down arg and retval registers to pltentry/exit callbacks according to the base PCS). This patch also removes a __builtin_expect from the modified code because the branch prediction hint did not seem useful. * sysdeps/aarch64/dl-dtprocnum.h: New file. * sysdeps/aarch64/dl-machine.h (DT_AARCH64): Define. (elf_machine_runtime_setup): Handle DT_AARCH64_VARIANT_PCS. (elf_machine_lazy_rel): Check STO_AARCH64_VARIANT_PCS and bind such symbols at load time. * sysdeps/aarch64/linkmap.h (struct link_map_machine): Add variant_pcs.
* aarch64: add STO_AARCH64_VARIANT_PCS and DT_AARCH64_VARIANT_PCSSzabolcs Nagy2019-06-131-0/+5
| | | | | | | | | | | | | STO_AARCH64_VARIANT_PCS is a non-visibility st_other flag for marking symbols that reference functions that may follow a variant PCS with different register usage convention from the base PCS. DT_AARCH64_VARIANT_PCS is a dynamic tag that marks ELF modules that have R_*_JUMP_SLOT relocations for symbols marked with STO_AARCH64_VARIANT_PCS (i.e. have variant PCS calls via a PLT). * elf/elf.h (STO_AARCH64_VARIANT_PCS): Define. (DT_AARCH64_VARIANT_PCS): Define.
* powerpc: Remove optimized finiteAdhemerval Zanella2019-06-121-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The powerpc finite optimization do not show much gain: - GCC will call libm iff -fsignaling-nans is used. This usage pattern is usually not performance oriented and for such calls PLT overhead should dominate execution time. - The power7 uses ftdiv to optimize for some input patterns, but at cost of others. Comparing against generic C implementation built for powerpc64-linux-gnu-power7 (--with-cpu=power7): - Generic sysdeps/ieee754 implementation: "isfinite": { "": { "duration": 5.0082e+09, "iterations": 2.45299e+09, "max": 43.824, "min": 2.008, "mean": 2.04167 }, "INF": { "duration": 4.66554e+09, "iterations": 2.28288e+09, "max": 35.73, "min": 2.008, "mean": 2.04371 }, "NAN": { "duration": 4.66274e+09, "iterations": 2.28716e+09, "max": 34.161, "min": 2.009, "mean": 2.03866 } } - power7 optimized one: "isfinite": { "": { "duration": 4.99111e+09, "iterations": 2.65566e+09, "max": 25.015, "min": 1.716, "mean": 1.87942 }, "INF": { "duration": 4.6783e+09, "iterations": 2.0999e+09, "max": 35.264, "min": 1.868, "mean": 2.22787 }, "NAN": { "duration": 4.67915e+09, "iterations": 2.08678e+09, "max": 38.099, "min": 1.869, "mean": 2.24228 } } So it basically optimizes marginally for normal numbers while increasing the latency for other kind of FP. - The power8 implementation is just the generic implementation using ISA 2.07 mfvsrd instruction (which GCC uses for generic implementation). So generic implementation is the best option for powerpc64le. Checked on powerpc-linux-gnu (built without --with-cpu, with --with-cpu=power4 and with --with-cpu=power5+ and --disable-multi-arch), powerpc64-linux-gnu (built without --with-cp and with --with-cpu=power5+ and --disable-multi-arch). * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/Makefile (sysdeps_routines, libm-sysdep_routines): Remove s_finite* objects. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_finite-power7.S: Remove file. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_finite-ppc32.c: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_finite.c: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_finitef-ppc32.c: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_finitef.c: Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_finitef.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile (sysdep_call): Remove s_finite* objects. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite-power7.S: Remove file. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite-power8.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite-ppc64.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef-ppc64.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef.c: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_finitef.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_finitef.S: Likewise. Reviewed-by: Gabriel F. T. Gomes <gabrielftg@linux.ibm.com>
* math: Use wordsize-64 version for finiteAdhemerval Zanella2019-06-121-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | - math.h will use compiler builtin for gcc 4.4 when built without -fsignaling-nans and the builtin is expanded inline for all support architectures. As an example, there is no intra finite call on libm for the architecture I checked, x86, arm, aarch64, and powerpc. - The resulting binary difference on 32 bits architecture is minimum for the non hotspot symbol. - It helps wordsize-64 architectures that use ldbl-opt. - It add some code simplification with reduction of duplicated implementations. Checked on powerpc-linux-gnu (built without --with-cpu, with --with-cpu=power4 and with --with-cpu=power5+ and --disable-multi-arch), powerpc64-linux-gnu (built without --with-cp and with --with-cpu=power5+ and --disable-multi-arch). * sysdeps/ieee754/dbl-64/wordsize-64/s_finite.c: Move to ... * sysdeps/ieee754/dbl-64/s_finite.c: ... here and format code. Reviewed-by: Gabriel F. T. Gomes <gabrielftg@linux.ibm.com>
* powerpc: Remove optimized isinfAdhemerval Zanella2019-06-121-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The powerpc isinf optimizations onyl adds complexity: - GCC will call libm iff -fsignaling-nans is used. This usage pattern is usually not performance oriented and for such calls PLT overhead should dominate execution time. - The power7 uses ftdiv to optimize for some input pattern and branch implementation for INF and denormal that does: return (ix & UINT64_C (0x7fffffffffffffff)) == UINT64_C (0x7ff0000000000000) Although it does show slight better latency than generic algorithm (as below), it is only for power7 and requires it to override it for power8. - The power8 implementation is just the generic implementation using ISA 2.07 mfvsrd instruction (which GCC uses for generic implementation). So generic implementation is the best option for powerpc64le. Checked on powerpc-linux-gnu (built without --with-cpu, with --with-cpu=power4 and with --with-cpu=power5+ and --disable-multi-arch), powerpc64-linux-gnu (built without --with-cp and with --with-cpu=power5+ and --disable-multi-arch). * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/Makefile (sysdeps_routines, libm-sysdep_routines): Remove s_isinf* and s_isinf* objects. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isinf-power7.S: Remove file. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isinf-ppc32.c: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isinf.c: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isinff-ppc32.c: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isinff.c: Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_isinff.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile (sysdep_call): Remove s_isinf* and s_isinf* objects. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf-power7.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf-power8.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf-ppc64.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinff-ppc64.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinff.c: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isinff.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isinff.S: Likewise. Reviewed-by: Gabriel F. T. Gomes <gabrielftg@linux.ibm.com>
* math: Use wordsize-64 version for isinfAdhemerval Zanella2019-06-121-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | - math.h will use compiler builtin for gcc 4.4 when built without -fsignaling-nans and the builtin is expanded inline for all support architectures. As an example, there is no intra isinf call on libm for the architecture I checked, x86, arm, aarch64, and powerpc. - The resulting binary difference on 32 bits architecture is minimum for the non hotspot symbol. - It helps wordsize-64 architectures that use ldbl-opt. - It add some code simplification with reduction of duplicated implementations. Checked on powerpc-linux-gnu (built without --with-cpu, with --with-cpu=power4 and with --with-cpu=power5+ and --disable-multi-arch), powerpc64-linux-gnu (built without --with-cp and with --with-cpu=power5+ and --disable-multi-arch). * sysdeps/ieee754/dbl-64/wordsize-64/s_isinf.c: Move to ... * sysdeps/ieee754/dbl-64/s_isinf.c: ... here and format code. Reviewed-by: Gabriel F. T. Gomes <gabrielftg@linux.ibm.com>
* powerpc: Remove optimized isnanAdhemerval Zanella2019-06-121-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The powerpc isnan optimizations are not really a gain: - GCC will call libm iff -fsignaling-nans is used. This usage pattern is usually not performance oriented and for such calls PLT overhead should dominate execution time. - The power5, power6, and power6x are just micro-optimization to improve the Load-Hit-Store hazards from floating-point to general register transfer, and current GCC already has support to minimize it by inserting either extra nops or group dispatch instructions. - The power7 uses ftdiv to optimize for some input patterns, but at cost of others. Comparing against generic C implementation built for powerpc-linux-gnu-power4 (which uses the hp-timing support on benchtests): - Generic sysdeps/ieee754 implementation: "isnan": { "": { "duration": 4.98415e+09, "iterations": 2.34516e+09, "max": 45.925, "min": 2.052, "mean": 2.12529 }, "INF": { "duration": 4.74057e+09, "iterations": 1.69761e+09, "max": 91.01, "min": 2.052, "mean": 2.79249 }, "NAN": { "duration": 4.74071e+09, "iterations": 1.68768e+09, "max": 282.343, "min": 2.052, "mean": 2.809 } } - power7 optimized one: $ ./testrun.sh benchtests/bench-isnan "isnan": { "": { "duration": 4.96842e+09, "iterations": 2.56297e+09, "max": 50.048, "min": 1.872, "mean": 1.93854 }, "INF": { "duration": 4.76648e+09, "iterations": 1.54213e+09, "max": 373.408, "min": 2.661, "mean": 3.09084 }, "NAN": { "duration": 4.76845e+09, "iterations": 1.54515e+09, "max": 51.016, "min": 2.736, "mean": 3.08607 } } So it basically optimizes marginally for normal numbers while increasing the latency for other kind of FP. - The generic implementation requires getting the floating point status, disable the invalid operation bit, and restore the floating-point status. Each operation is costly and requires flushing the FP pipeline. Using the same scenarion for the previous analysis: "isnan": { "": { "duration": 5.08284e+09, "iterations": 6.2898e+08, "max": 41.844, "min": 8.057, "mean": 8.08108 }, "INF": { "duration": 4.97904e+09, "iterations": 6.16176e+08, "max": 39.661, "min": 8.057, "mean": 8.08055 }, "NAN": { "duration": 4.98695e+09, "iterations": 5.95866e+08, "max": 29.728, "min": 8.345, "mean": 8.36925 } } - The power8 implementation is just the generic implementation using ISA 2.07 mfvsrd instruction (which GCC uses for generic implementation). So generic implementation is the best option for powerpc64le. Checked on powerpc-linux-gnu (built without --with-cpu, with --with-cpu=power4 and with --with-cpu=power5+ and --disable-multi-arch), powerpc64-linux-gnu (built without --with-cp and with --with-cpu=power5+ and --disable-multi-arch). * sysdeps/powerpc/fpu/s_isnan.c: Remove file. * sysdeps/powerpc/fpu/s_isnanf.S: Likewise. * sysdeps/powerpc/powerpc32/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/Makefile (sysdeps_routines, libm-sysdep_routines): Remove s_isnan-* and s_isnanf-* objects. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isnan-power5.S: Remove file * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isnan-power6.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isnan-power7.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isnan-ppc32.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isnan.c: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isnanf-power5.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isnanf-power6.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_isnanf.c: Likewise. * sysdeps/powerpc/powerpc32/power5/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc32/power5/fpu/s_isnanf.S: Likewise. * sysdeps/powerpc/powerpc32/power6/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc32/power6/fpu/s_isnanf.S: Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc32/power7/fpu/s_isnanf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile (sysdep_calls): Remove s_isnan-* and s_isnanf-* objects. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan-power5.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan-power6.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan-power6x.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan-power7.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan-power8.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan-ppc64.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnanf.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power5/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power6x/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power7/fpu/s_isnanf.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S: Likewise. * sysdeps/powerpc/powerpc64/power8/fpu/s_isnanf.S: Likewise. Reviewed-by: Gabriel F. T. Gomes <gabrielftg@linux.ibm.com>
* math: Use wordsize-64 version for isnanAdhemerval Zanella2019-06-121-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | - math.h will use compiler builtin for gcc 4.4 when built without -fsignaling-nans and the builtin is expanded inline for all support architectures. As an example, there is no intra isnan call on libm for the architecture I checked, x86, arm, aarch64, and powerpc. - The resulting binary difference on 32 bits architecture is minimum for the non hotspot symbol. - It helps wordsize-64 architectures that use ldbl-opt. - It add some code simplification with reduction of duplicated implementations. Checked on powerpc-linux-gnu (built without --with-cpu, with --with-cpu=power4 and with --with-cpu=power5+ and --disable-multi-arch), powerpc64-linux-gnu (built without --with-cp and with --with-cpu=power5+ and --disable-multi-arch). * sysdeps/ieee754/dbl-64/wordsize-64/s_isnan.c: Move to ... * sysdeps/ieee754/dbl-64/s_isnan.c: ... here and format code. Reviewed-by: Gabriel F. T. Gomes <gabrielftg@linux.ibm.com>
* benchtests: Add isnan/isinf/isfinite benchmarkAdhemerval Zanella2019-06-121-0/+7
| | | | | | | | | | | * benchtests/Makefile (bench-math): Add isnan, isinf, and isfinite. (CFLAGS-bench-isnan.c, CFLAGS-bench-isinf.c, CFLAGS-bench-isfinite.c): New rule. * benchtests/isnan-input: New file. * benchtests/isinf-input: New file. * benchtests/isfinite-input: New file. Reviewed-by: Gabriel F. T. Gomes <gabrielftg@linux.ibm.com>
* powerpc: copysign cleanupAdhemerval Zanella2019-06-121-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GCC always expand copysign{f} for all possible cpus, so calling the libm is only done if user explicitly states to disable the builtin (which is done usually not for performance reason). So to provide ifunc variant for copysign is just unrequired complexity, since libm will be called on non-performance critical code. This patch removes both powerpc32 and powerpc64 ifunc variants and consolidates the powerpc implementation on sysdeps/powerpc/fpu/s_copysign{f}.c using compiler builtins. Checked on powerpc-linux-gnu (built without --with-cpu, with --with-cpu=power4 and with --with-cpu=power5+ and --disable-multi-arch), powerpc64-linux-gnu (built without --with-cp and with --with-cpu=power5+ and --disable-multi-arch). * sysdeps/powerpc/fpu/s_copysign.c: New file. * sysdeps/powerpc/fpu/s_copysignf.c: Likewise. * sysdeps/powerpc/powerpc32/fpu/s_copysign.S: Remove file. * sysdeps/powerpc/powerpc32/fpu/s_copysignf.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/Makefile (sysdep_routines, libm-sysdep_routines): Remove s_copysign-power6 and s_copysign-ppc32. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_copysign-power6.S: Remove file. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_copysign-ppc32.S: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_copysign.c: Likewise. * sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_copysignf.c: Likewise. * sysdeps/powerpc/powerpc32/power6/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc32/power6/fpu/s_copysignf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile (sysdeps_calls): Remove s_copysign-power6 s_copysign-ppc64. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_copysign-power6.S: Remove file. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_copysign-ppc64.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_copysign.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_copysignf.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_copysignf.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_copysign.S: Likewise. * sysdeps/powerpc/powerpc64/power6/fpu/s_copysignf.S: Likewise. Reviewed-by: Gabriel F. T. Gomes <gabrielftg@linux.ibm.com>
* powerpc: consolidate rintAdhemerval Zanella2019-06-121-0/+12
| | | | | | | | | | | | | | | | | | | | | | This patches consolidates all the powerpc rint{f} implementations on the generic sysdeps/powerpc/fpu/s_rint{f}. Checked on powerpc-linux-gnu (built without --with-cpu, with --with-cpu=power4 and with --with-cpu=power5+ and --disable-multi-arch), powerpc64-linux-gnu (built without --with-cp and with --with-cpu=power5+ and --disable-multi-arch). * sysdeps/powerpc/fpu/round_to_integer.h (set_fenv_mode, round_to_integer_float, round_mode): Add RINT handling. (reset_fenv_mode): New symbol. * sysdeps/powerpc/fpu/s_rint.c (__rint): Use generic implementation. * sysdeps/powerpc/fpu/s_rintf.c (__rintf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_rint.S: Remove file. * sysdeps/powerpc/powerpc32/fpu/s_rintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_rintf.S: Likewise. Reviewed-by: Gabriel F. T. Gomes <gabrielftg@linux.ibm.com>
* libio: freopen of default streams crashes in old programs [BZ #24632]Florian Weimer2019-06-121-0/+6
| | | | As seen with very old i386 GCC binaries.
* Linux: Deprecate <sys/sysctl.h> and sysctlFlorian Weimer2019-06-121-0/+13
| | | | | | | | | | Now that there are no internal users of __sysctl left, it is possible to add an unconditional deprecation warning to <sys/sysctl.h>. To avoid a test failure due this warning in check-install-headers, skip the test for sys/sysctl.h. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* <sys/stat.h>: Use Linux UAPI header for statx if available and usefulFlorian Weimer2019-06-121-0/+17
| | | | | This will automatically import new STATX_* constants. It also avoids a conflict between <sys/stat.h> and <linux/stat.h>.
* <sys/cdefs.h>: Add __glibc_has_include macroFlorian Weimer2019-06-121-0/+4
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* Improve performance of memmemWilco Dijkstra2019-06-121-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | This patch significantly improves performance of memmem using a novel modified Horspool algorithm. Needles up to size 256 use a bad-character table indexed by hashed pairs of characters to quickly skip past mismatches. Long needles use a self-adapting filtering step to avoid comparing the whole needle repeatedly. By limiting the needle length to 256, the shift table only requires 8 bits per entry, lowering preprocessing overhead and minimizing cache effects. This limit also implies worst-case performance is linear. Small needles up to size 2 use a dedicated linear search. Very long needles use the Two-Way algorithm (to avoid increasing stack size or slowing down the common case, inlining is disabled). The performance gain is 6.6 times on English text on AArch64 using random needles with average size 8. Tested against GLIBC testsuite and randomized tests. Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com> * string/memmem.c (__memmem): Rewrite to improve performance.
* Improve performance of strstrWilco Dijkstra2019-06-121-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch significantly improves performance of strstr using a novel modified Horspool algorithm. Needles up to size 256 use a bad-character table indexed by hashed pairs of characters to quickly skip past mismatches. Long needles use a self-adapting filtering step to avoid comparing the whole needle repeatedly. By limiting the needle length to 256, the shift table only requires 8 bits per entry, lowering preprocessing overhead and minimizing cache effects. This limit also implies worst-case performance is linear. Small needles up to size 3 use a dedicated linear search. Very long needles use the Two-Way algorithm. The performance gain using the improved bench-strstr on Cortex-A72 is 5.8 times basic_strstr and 3.7 times twoway_strstr. Tested against GLIBC testsuite, randomized tests and the GNULIB strstr test (https://git.savannah.gnu.org/cgit/gnulib.git/tree/tests/test-strstr.c). Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com> * string/str-two-way.h (two_way_short_needle): Add inline to avoid warning. (two_way_long_needle): Block inlining. * string/strstr.c (strstr2): Add new function. (strstr3): Likewise. (STRSTR): Completely rewrite strstr to improve performance.
* Benchmark strstr hard needlesWilco Dijkstra2019-06-111-0/+4
| | | | | | | | | | | | | | | Benchmark needles which exhibit worst-case performance. This shows that basic_strstr is quadratic and thus unsuitable for large needles. On the other hand the Two-way and new strstr implementations are linear with increasing needle sizes. The slowest cases of the two implementations are within a factor of 2 on several different microarchitectures. Two-way is slowest on inputs which cause a branch mispredict on almost every character. The new strstr is slowest on inputs which almost match and result in many calls to memcmp. Thanks to Szabolcs for providing various hard needles. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org> * benchtests/bench-strstr.c (test_hard_needle): New function.
* Fix malloc tests build with GCC 10.Joseph Myers2019-06-101-0/+7
| | | | | | | | | | | | | | | | | | GCC mainline has recently added warn_unused_result attributes to some malloc-like built-in functions, where glibc previously had them in its headers only for __USE_FORTIFY_LEVEL > 0. This results in those attributes being newly in effect for building the glibc testsuite, so resulting in new warnings that break the build where tests deliberately call such functions and ignore the result. Thus patch duly adds calls to DIAG_* macros around those calls to disable the warning. Tested with build-many-glibcs.py for aarch64-linux-gnu. * malloc/tst-calloc.c: Include <libc-diag.h>. (null_test): Ignore -Wunused-result around calls to calloc. * malloc/tst-mallocfork.c: Include <libc-diag.h>. (do_test): Ignore -Wunused-result around call to malloc.
* Linux: Add getdents64 system callFlorian Weimer2019-06-071-0/+75
| | | | | | | | | | | No 32-bit system call wrapper is added because the interface is problematic because it cannot deal with 64-bit inode numbers and 64-bit directory hashes. A future commit will deprecate the undocumented getdirentries and getdirentries64 functions. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* [powerpc] get_rounding_mode: utilize faster method to get rounding modePaul A. Clarke2019-06-061-0/+9
| | | | | | | | | Add support to use 'mffsl' instruction if compiled for POWER9 (or later). Also, mask the result to avoid bleeding unrelated bits into the result of _FPU_GET_RC(). Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
* riscv: Do not use __has_include__Florian Weimer2019-06-061-0/+5
| | | | The user-visible preprocessor construct is called __has_include.
* [powerpc] fegetexcept: utilize function instead of duplicating codePaul A. Clarke2019-06-051-0/+5
| | | | | | | | | | fegetexcept() included code which exactly duplicates the code in fenv_reg_to_exceptions(). Replace with a call to that function. 2019-06-05 Paul A. Clarke <pc@us.ibm.com> * sysdeps/powerpc/fpu/fegetexcept.c (__fegetexcept): Replace code with call to equivalent function.
* iconv: Use __twalk_r in __gconv_release_shlibFlorian Weimer2019-06-041-0/+6
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* Fix iconv buffer handling with IGNORE error handler (bug #18830)Andreas Schwab2019-06-041-0/+17
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* Add INADDR_ALLSNOOPERS_GROUP from Linux 5.1 to netinet/in.h.Joseph Myers2019-06-031-0/+4
| | | | | | | | | This patch adds INADDR_ALLSNOOPERS_GROUP from Linux 5.1 to netinet/in.h. Tested for x86_64. * inet/netinet/in.h (INADDR_ALLSNOOPERS_GROUP): New macro.
* Fix data of ChangeLog entryFlorian Weimer2019-06-011-1/+1
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* arm: Remove ioperm/iopl/inb/inw/inl/outb/outw/outl supportFlorian Weimer2019-06-011-0/+10
| | | | | | | | Linux only supports the required ISA sysctls on StrongARM devices, which are armv4 and no longer tested during glibc development and probably bit-rotted by this point. (No reported test results, and the last discussion of armv4 support was in the glibc 2.19 release notes.)
* Linux: Add oddly-named arm syscalls to syscall-names.listFlorian Weimer2019-06-011-0/+6
| | | | | | | | | | | | | | | | | <asm/unistd.h> on arm defines the following macros: #define __ARM_NR_breakpoint (__ARM_NR_BASE+1) #define __ARM_NR_cacheflush (__ARM_NR_BASE+2) #define __ARM_NR_usr26 (__ARM_NR_BASE+3) #define __ARM_NR_usr32 (__ARM_NR_BASE+4) #define __ARM_NR_set_tls (__ARM_NR_BASE+5) #define __ARM_NR_get_tls (__ARM_NR_BASE+6) These do not follow the regular __NR_* naming convention and have so far been ignored by the syscall-names.list consistency checks. This commit adds these names to the file, preparing for the availability of these names in the regular __NR_* namespace.
* powerpc: Fix build failures with current GCCGabriel F. T. Gomes2019-05-301-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since GCC commit 271500 (svn), also known as the following commit on the git mirror: commit 61edec870f9fdfb5df3fa4e40f28cbaede28a5b1 Author: amodra <amodra@138bc75d-0d04-0410-961f-82ee72b054a4> Date: Wed May 22 04:34:26 2019 +0000 [RS6000] Don't pass -many to the assembler glibc builds are failing when an assembly implementation does not declare the correct '.machine' directive, or when no such directive is declared at all. For example, when a POWER6 instruction is used, but '.machine power6' is not declared, the assembler will fail with an error similar to the following: ../sysdeps/powerpc/powerpc64/power8/strcmp.S: Assembler messages: 24 ../sysdeps/powerpc/powerpc64/power8/strcmp.S:55: Error: unrecognized opcode: `cmpb' This patch adds '.machine powerN' directives where none existed, as well as it updates '.machine power7' directives on POWER8 files, because the minimum binutils version required to build glibc (binutils 2.25) now provides this machine version. It also adds '-many' to the assembler command used to build tst-set_ppr.c. Tested for powerpc, powerpc64, and powerpc64le, as well as with build-many-glibcs.py for powerpc targets. Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
* Remove unused get_clockfreq filesAdhemerval Zanella2019-05-291-0/+6
| | | | | | | | | | | The patch 6e8ba7fd574f meant to remove the all get_clockfreq.c. This patch removes the missing files for sparcv9 and x86_64. Checked against a build to x86_64-linux-gnu and sparcv9-linux-gnu. * sysdeps/unix/sysv/linux/sparc/sparc32/sparcv9/get_clockfreq.c: Remove file. * sysdeps/unix/sysv/linux/x86_64/get_clockfreq.c: Likewise.
* powerpc: generic nearbyint/nearbyintfAdhemerval Zanella2019-05-281-0/+11
| | | | | | | | | | | | | | This patches consolidates all the powerpc nearbyint{f} implementations on the generic sysdeps/powerpc/fpu/s_nearbyint{f}. * sysdeps/powerpc/fpu/round_to_integer.h (set_fenv_mode): Add NEARBYINT handling. * sysdeps/powerpc/fpu/s_nearbyint.c: New file. * sysdeps/powerpc/fpu/s_nearbyintf.c: Likewise. * sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S: Remove file. * sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyint.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_nearbyintf.S: Likewise.
* tt_RU: Add lang_name [BZ #24370]mansayk2019-05-281-0/+5
| | | | | | | This commit adds a lang_name according to CLDR-35.1. [BZ #24370] * localedata/locales/tt_RU (lang_name): Add from CLDR-35.1.
* tt_RU: Fix orthographic mistakes in mon and abmon sections [BZ #24369]mansayk2019-05-281-0/+6
| | | | | | | | | | | This commit fixes some errors and converts all month names to lowercase. The content is synchronized with CLDR-35.1 now but trailing dots are removed from abmon values in order to maintain consistency with the previous values and with many other locales which do the same. [BZ #24369] * localedata/locales/tt_RU (mon): Update from CLDR-35.1, fix errors. (abmon): Likewise, but remove the trailing dots.
* Add IGMP_MRDISC_ADV from Linux 5.1 to netinet/igmp.h.Joseph Myers2019-05-281-0/+4
| | | | | | | | | This patch adds the IGMP_MRDISC_ADV macro from Linux 5.1 to netinet/igmp.h. Tested for x86_64. * inet/netinet/igmp.h (IGMP_MRDISC_ADV): New macro.
* nptl: Add comment to __pthread_get_minstack about external usersFlorian Weimer2019-05-271-0/+4
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* nss_dns: Check for proper A/AAAA address alignmentFlorian Weimer2019-05-241-0/+5
| | | | Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* Add F_SEAL_FUTURE_WRITE from Linux 5.1 to bits/fcntl-linux.h.Joseph Myers2019-05-231-0/+5
| | | | | | | | | | This patch adds the new F_SEAL_FUTURE_WRITE constant from Linux 5.1 to bits/fcntl-linux.h. Tested for x86_64. * sysdeps/unix/sysv/linux/bits/fcntl-linux.h [__USE_GNU] (F_SEAL_FUTURE_WRITE): New macro.
* elf: Add tst-ldconfig-bad-aux-cache test [BZ #18093]Alexandra Hájková2019-05-231-0/+9
| | | | | | | This test corrupts /var/cache/ldconfig/aux-cache and executes ldconfig to check it will not segfault using the corrupted aux_cache. The test uses the test-in-container framework. Verified no regressions on x86_64.
* Add ChangeLog entry for previous commit.Zack Weinberg2019-05-221-0/+29
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* Improve string benchtest timingWilco Dijkstra2019-05-211-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | Improve string benchtest timing. Many tests run for 0.01s which is way too short to give accurate results. Other tests take over 40 seconds which is way too long. Significantly increase the iterations of the short running tests. Reduce number of alignment variations in the long running memcpy walk tests so they take less than 5 seconds. As a result most tests take at least 0.1s and all finish within 5 seconds. * benchtests/bench-memcpy-random.c (do_one_test): Use medium iterations. * benchtests/bench-memcpy-walk.c (test_main): Reduce alignment tests. * benchtests/bench-memmem.c (do_one_test): Use small iterations. * benchtests/bench-memmove-walk.c (test_main): Reduce alignment tests. * benchtests/bench-memset-walk.c (test_main): Reduce alignment tests. * benchtests/bench-strcasestr.c (do_one_test): Use small iterations. * benchtests/bench-string.h (INNER_LOOP_ITERS): Increase iterations. (INNER_LOOP_ITERS_MEDIUM): New define. (INNER_LOOP_ITERS_SMALL): New define. * benchtests/bench-strpbrk.c (do_one_test): Use medium iterations. * benchtests/bench-strsep.c (do_one_test): Use small iterations. * benchtests/bench-strspn.c (do_one_test): Use medium iterations. * benchtests/bench-strstr.c (do_one_test): Use small iterations. * benchtests/bench-strtok.c (do_one_test): Use small iterations.
* sysvipc: Add missing bit of semtimedop s390 consolidationAdhemerval Zanella2019-05-211-0/+7
| | | | | | | | | | | | This patch add the missing SEMTIMEDOP_IPC_ARGS definions on powerpc and sparc ipc_priv.h. Checked on powerpc64le-linux-gnu and with a build for sparc64-linux-gnu. * sysdeps/unix/sysv/linux/powerpc/ipc_priv.h (SEMTIMEDOP_IPC_ARGS): New define. * sysdeps/unix/sysv/linux/sparc/sparc64/ipc_priv.h (SEMTIMEDOP_IPC_ARGS): Likewise.
* wcsmbs: Fix data race in __wcsmbs_clone_conv [BZ #24584]Florian Weimer2019-05-211-0/+9
| | | | | This also adds an overflow check and documents the synchronization requirement in <gconv.h>.
* libio: Fix gconv-related memory leak [BZ #24583]Florian Weimer2019-05-211-0/+17
| | | | | | | struct gconv_fcts for the C locale is statically allocated, and __gconv_close_transform deallocates the steps object. Therefore this commit introduces __wcsmbs_close_conv to avoid freeing the statically allocated steps objects.
* libio: Remove codecvt vtable [BZ #24588]Florian Weimer2019-05-201-0/+43
| | | | | | | | | | | | | | The codecvt vtable is not a real vtable because it also contains the conversion state data. Furthermore, wide stream support was added to GCC 3.0, after a C++ ABI bump, so there is no compatibility requirement with libstdc++. This change removes several unmangled function pointers which could be used with a corrupted FILE object to redirect execution. (libio vtable verification did not cover the codecvt vtable.) Reviewed-by: Yann Droneaud <ydroneaud@opteya.com> Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* support: Expose sbindir as support_sbindir_prefixFlorian Weimer2019-05-201-0/+7
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