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* Improve test coverage of strlen functionSunil K Pandey2021-06-021-1/+14
| | | | | | | | | | | This patch covers the following conditions: - Strings start with different alignments and end at the page boundary with less than 64 byte length. - Strings starts with different alignments and cross page boundary with fixed length. Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
* fix typoXeonacid2021-06-022-2/+2
| | | | | "accomodate" should be "accommodate" Reviewed-by: Paul Zimmermann <Paul.Zimmermann@inria.fr>
* dlfcn: Move dlerror into libcFlorian Weimer2021-06-0268-66/+104
| | | | | | | | | | | | | | The symbol was moved using scripts/move-symbol-to-libc.py. There is a minor functionality enhancement: dlerror now sets errno if it was set as part of the exception. (This is the result of using %m in asprintf, to avoid the strerror PLT call.) The previous errno value upon function return was unpredictable. Documenting this as a feature is premature; we need to make sure that the error codes are meaningful when they are set by the dynamic loader. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* Add libc ABI extension kludge for baseline-violating libdl symbolsFlorian Weimer2021-06-025-1/+29
| | | | | | | | | | | | | | | | | | | Some targets have a GLIBC_2.0 baseline for libdl, while using GLIBC_2.2 for libc. This means that the generated libc.map file does not have any version nodes for GLIBC_2.0 or GLIBC_2.1. However, moving symbols from libdl into libc needs such version nodes. (Future symbol moves from librt will need this as well.) This kludge is only necessary for symbols predating GLIBC_2.2 because the affected targets use GLIBC_2.2 as the baseline for libc. Given the small number and fixed set of affected architectures, no generic mechanism is implemented, and instead the map file fragment is hard-coded in scripts/versions.mk. The compat_symbol macro already emits the appropriate version strings, so no adjustments are needed there. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* scripts/versions.awk: Add local: * to all version nodesFlorian Weimer2021-06-021-5/+1
| | | | | | | | | | | | This requires that all exported symbol versions are listed in Versions files. It results in more consistent behavior across architectures because previously, symbols could be exported via explicit versioned_symbol and compat_symbol macros if the version node existed in some Versions file (without listing the symbol), and it was not the base version for the library (which already had the local: * directive). Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* Add missing symbols to Version filesFlorian Weimer2021-06-0218-47/+73
| | | | | | | | | Some symbols have explicit versioned_symbol or compat_symbol markers in the sources, but no corresponding entry in the Versions files. This presently works because the local: * directive is only applied to the base version. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* Fix use of __pthread_attr_copy in mq_notify (bug 27896)Florian Weimer2021-06-021-2/+9
| | | | | | | | | | | | | | __pthread_attr_copy can fail and does not initialize the attribute structure in that case. If __pthread_attr_copy is never called and there is no allocated attribute, pthread_attr_destroy should not be called, otherwise there is a null pointer dereference in rt/tst-mqueue6. Fixes commit 42d359350510506b87101cf77202fefcbfc790cb ("Use __pthread_attr_copy in mq_notify (bug 27896)"). Reviewed-by: Siddhesh Poyarekar <siddhesh@sourceware.org>
* Use __pthread_attr_copy in mq_notify (bug 27896)Andreas Schwab2021-06-012-5/+14
| | | | | Make a deep copy of the pthread attribute object to remove a potential use-after-free issue.
* Update floating-point feature test macro handling for C2XJoseph Myers2021-06-016-14/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ISO C2X has made some changes to the handling of feature test macros related to features from the floating-point TSes, and to exactly what such features are present in what headers, that require corresponding changes in glibc. * For the few features that were controlled by __STDC_WANT_IEC_60559_BFP_EXT__ (and the corresponding DFP macro) in C2X, there is now instead a new feature test macro __STDC_WANT_IEC_60559_EXT__ covering both binary and decimal FP. This controls CR_DECIMAL_DIG in <float.h> (provided by GCC; I implemented support for the new feature test macro for GCC 11) and the totalorder and payload functions in <math.h>. C2X no longer says anything about __STDC_WANT_IEC_60559_BFP_EXT__ (so it's appropriate for that macro to continue to enable exactly the features from TS 18661-1). * The SNAN macros for each floating-point type have moved to <float.h> (and been renamed in the process). Thus, the copies in <math.h> should only be defined for __STDC_WANT_IEC_60559_BFP_EXT__, not for C2X. * The fmaxmag and fminmag functions have been removed (replaced by new functions for the new min/max operations in IEEE 754-2019). Thus those should also only be declared for __STDC_WANT_IEC_60559_BFP_EXT__. * The _FloatN / _FloatNx handling for the last two points in glibc is trickier, since __STDC_WANT_IEC_60559_TYPES_EXT__ is still in C2X (the integration of TS 18661-3 as an Annex, that is, which hasn't yet been merged into the C standard git repository but has been accepted by WG14), so C2X with that macro should not declare some things that are declared for older standards with that macro. The approach taken here is to provide the declarations (when __STDC_WANT_IEC_60559_TYPES_EXT__ is enabled) only when (defined __USE_GNU || !__GLIBC_USE (ISOC2X)), so if C2X features are enabled then those declarations (that are only in TS 18661-3 and not in C2X) will only be provided if _GNU_SOURCE is defined as well. Thus _GNU_SOURCE remains a superset of the TS features as well as of C2X. Some other somewhat related changes in C2X are not addressed here. There's an open proposal not to include the fmin and fmax functions for the _FloatN / _FloatNx types, given the new min/max operations, which could be handled like the previous point if adopted. And the fromfp functions have been changed to return a result in floating type rather than intmax_t / uintmax_t; my inclination there is to treat that like that change of totalorder type (new symbol versions etc. for the ABI change; old versions become compat symbols and are no longer supported as an API). Tested for x86_64 and x86.
* stdio-common: Remove _IO_vfwscanfFlorian Weimer2021-06-014-42/+1
| | | | | | | | | The symbol has never been exported, so no compatibility symbol is needed. Removing this file prevents ld from creation an exported symbol in case GLIBC_2_0 expands to a symbol version which does not have a local: *; directive in the symbol version map file. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* aarch64: align stack in clone [BZ #27939]Szabolcs Nagy2021-06-011-0/+2
| | | | | | | The AArch64 PCS requires 16 byte aligned stack. Previously if the caller passed an unaligned stack to clone then the child crashed. Fixes bug 27939.
* powerpc: Optimized memcmp for power10Lucas A. M. Magalhaes2021-05-315-1/+218
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch was based on the __memcmp_power8 and the recent __strlen_power10. Improvements from __memcmp_power8: 1. Don't need alignment code. On POWER10 lxvp and lxvl do not generate alignment interrupts, so they are safe for use on caching-inhibited memory. Notice that the comparison on the main loop will wait for both VSR to be ready. Therefore aligning one of the input address does not improve performance. In order to align both registers a vperm is necessary which add too much overhead. 2. Uses new POWER10 instructions This code uses lxvp to decrease contention on load by loading 32 bytes per instruction. The vextractbm is used to have a smaller tail code for calculating the return value. 3. Performance improvement This version has around 35% better performance on average. I saw no performance regressions for any length or alignment. Thanks Matheus for helping me out with some details. Co-authored-by: Matheus Castanho <msc@linux.ibm.com> Reviewed-by: Raphael M Zinsly <rzinsly@linux.ibm.com>
* x86-64: Align child stack to 16 bytes [BZ #27902]H.J. Lu2021-05-313-4/+103
| | | | | | | In the x86-64 clone wrapper, align child stack to 16 bytes per the x86-64 psABI. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* support: Do not build xpthread_attr_setaffinity_np for hurdAdhemerval Zanella2021-05-282-0/+4
| | | | It does not provide pthread_attr_setaffinity_np extension.
* nptl: Add pthread_attr_setaffinity_np failure testAdhemerval Zanella2021-05-272-0/+60
| | | | | | | | It checks whether an invalid affinity mask does return an error, similar to what sysdeps/pthread/tst-bad-schedattr.c does for pthread_attr_setschedparam. Checked on x86_64-linux-gnu.
* support: Add xpthread_attr_setaffinity_np wrapperAdhemerval Zanella2021-05-273-0/+32
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* nptl: Move createthread to pthread_createAdhemerval Zanella2021-05-272-166/+115
| | | | | | | | The 'create_thread' function is moved to pthread_create.c. It removes the START_THREAD_DEFN and START_THREAD_SELF macros and make the lock usage more clear (no need to cross-reference multiple files). No functional change.
* nptl: Move Linux createthread to nptlAdhemerval Zanella2021-05-272-161/+116
| | | | | | git mv -f sysdeps/unix/sysv/linux/createthread.c nptl/createthread.c No functional change.
* nptl: Install SIGSETXID handler with SA_ONSTACK [BZ #27914]Florian Weimer2021-05-271-2/+5
| | | | | | | | | | | | | | The signal is sent to all threads, some of which may have switched to very small stacks. If they have also installed an alternate signal stack, SA_ONSTACK makes this work. The Go runtime needs this: runtime: C.setuid/C.setgid smashes Go stack <https://github.com/golang/go/issues/9400> Doing this for SIGCANCEL is less obviously beneficial and needs further testing. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* aarch64: Added optimized memset for A64FXNaohiro Tamura2021-05-274-5/+286
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch optimizes the performance of memset for A64FX [1] which implements ARMv8-A SVE and has L1 64KB cache per core and L2 8MB cache per NUMA node. The performance optimization makes use of Scalable Vector Register with several techniques such as loop unrolling, memory access alignment, cache zero fill and prefetch. SVE assembler code for memset is implemented as Vector Length Agnostic code so theoretically it can be run on any SOC which supports ARMv8-A SVE standard. We confirmed that all testcases have been passed by running 'make check' and 'make xcheck' not only on A64FX but also on ThunderX2. And also we confirmed that the SVE 512 bit vector register performance is roughly 4 times better than Advanced SIMD 128 bit register and 8 times better than scalar 64 bit register by running 'make bench'. [1] https://github.com/fujitsu/A64FX Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com> Reviewed-by: Szabolcs Nagy <Szabolcs.Nagy@arm.com>
* aarch64: Added optimized memcpy and memmove for A64FXNaohiro Tamura2021-05-279-14/+453
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch optimizes the performance of memcpy/memmove for A64FX [1] which implements ARMv8-A SVE and has L1 64KB cache per core and L2 8MB cache per NUMA node. The performance optimization makes use of Scalable Vector Register with several techniques such as loop unrolling, memory access alignment, cache zero fill, and software pipelining. SVE assembler code for memcpy/memmove is implemented as Vector Length Agnostic code so theoretically it can be run on any SOC which supports ARMv8-A SVE standard. We confirmed that all testcases have been passed by running 'make check' and 'make xcheck' not only on A64FX but also on ThunderX2. And also we confirmed that the SVE 512 bit vector register performance is roughly 4 times better than Advanced SIMD 128 bit register and 8 times better than scalar 64 bit register by running 'make bench'. [1] https://github.com/fujitsu/A64FX Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com> Reviewed-by: Szabolcs Nagy <Szabolcs.Nagy@arm.com>
* benchtests: Fixed bench-memcpy-random: buf1: mprotect failedNaohiro Tamura2021-05-261-2/+2
| | | | | | | | This patch fixed mprotect system call failure on AArch64. This failure happened on not only A64FX but also ThunderX2. Also this patch updated a JSON key from "max-size" to "length" so that 'plot_strings.py' can process 'bench-memcpy-random.out'
* aarch64: Added Vector Length Set test helper scriptNaohiro Tamura2021-05-263-0/+89
| | | | | | | | | | | | | | | | | | | This patch is a test helper script to change Vector Length for child process. This script can be used as test-wrapper for 'make check'. Usage examples: ~/build$ make check subdirs=string \ test-wrapper='~/glibc/sysdeps/unix/sysv/linux/aarch64/vltest.py 16' ~/build$ ~/glibc/sysdeps/unix/sysv/linux/aarch64/vltest.py 16 \ make test t=string/test-memcpy ~/build$ ~/glibc/sysdeps/unix/sysv/linux/aarch64/vltest.py 32 \ ./debugglibc.sh string/test-memmove ~/build$ ~/glibc/sysdeps/unix/sysv/linux/aarch64/vltest.py 64 \ ./testrun.sh string/test-memset
* aarch64: define BTI_C and BTI_J macros as NOP unless HAVE_AARCH64_BTINaohiro Tamura2021-05-261-2/+7
| | | | | | | | | This patch defines BTI_C and BTI_J macros conditionally for performance. If HAVE_AARCH64_BTI is true, BTI_C and BTI_J are defined as HINT instruction for ARMv8.5 BTI (Branch Target Identification). If HAVE_AARCH64_BTI is false, both BTI_C and BTI_J are defined as NOP.
* config: Added HAVE_AARCH64_SVE_ASM for aarch64Naohiro Tamura2021-05-263-0/+48
| | | | | This patch checks if assembler supports '-march=armv8.2-a+sve' to generate SVE code or not, and then define HAVE_AARCH64_SVE_ASM macro.
* tst-mallinfo2.c: Use correct multiple for total variableYang Xu2021-05-251-2/+2
| | | | | | | | | Since test uses 160 multiple for malloc size, we should also use 160 multiple for total variable instead of 16, then comparison is meaningful. So fix it. Also change the ">" to ">=" so that the test is technically valid. Reviewed-by: DJ Delorie <dj@redhat.com>
* Linux: Remove remaining references to $(shared-thread-library)Florian Weimer2021-05-254-23/+7
| | | | | | | Since the variable expands to nothing under Linux, it is no longer necessary to clutter the makefiles with it. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* nptl: Do not install libpthread.so and do not link tests with itFlorian Weimer2021-05-252-26/+11
| | | | | | Keep installing libpthread.a, so that -lpthread works. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* testrun.sh: Improve --help messageLucas A. M. Magalhaes2021-05-251-2/+7
| | | | | | | | The testrun.sh --help message was missing the "container" option. Besides just adding the missing option I decide to rewrite it in the same layout as other tools. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* powerpc: Fix handling of scv return error codes [BZ #27892]Nicholas Piggin2021-05-241-2/+3
| | | | | | | | | | | When using scv for templated ASM syscalls, current code interprets any negative return value as error, but the only valid error codes are in the range -4095..-1 according to the ABI. This commit also fixes 'signal.gen.test' strace test, where the issue was first identified. Reviewed-by: Matheus Castanho <msc@linux.ibm.com>
* Properly check stack alignment [BZ #27901]H.J. Lu2021-05-246-165/+61
| | | | | | | | | | | | | | | | | | | | | | 1. Replace if ((((uintptr_t) &_d) & (__alignof (double) - 1)) != 0) which may be optimized out by compiler, with int __attribute__ ((weak, noclone, noinline)) is_aligned (void *p, int align) { return (((uintptr_t) p) & (align - 1)) != 0; } 2. Add TEST_STACK_ALIGN_INIT to TEST_STACK_ALIGN. 3. Add a common TEST_STACK_ALIGN_INIT to check 16-byte stack alignment for both i386 and x86-64. 4. Update powerpc to use TEST_STACK_ALIGN_INIT. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* x86: Improve memmove-vec-unaligned-erms.SNoah Goldstein2021-05-231-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the condition for copy 4x VEC so that if length is exactly equal to 4 * VEC_SIZE it will use the 4x VEC case instead of 8x VEC case. Results For Skylake memcpy-avx2-erms size, al1 , al2 , Cur T , New T , Win , New / Cur 128 , 0 , 0 , 9.137 , 6.873 , New , 75.22 128 , 7 , 0 , 12.933 , 7.732 , New , 59.79 128 , 0 , 7 , 11.852 , 6.76 , New , 57.04 128 , 7 , 7 , 12.587 , 6.808 , New , 54.09 Results For Icelake memcpy-evex-erms size, al1 , al2 , Cur T , New T , Win , New / Cur 128 , 0 , 0 , 9.963 , 5.416 , New , 54.36 128 , 7 , 0 , 16.467 , 8.061 , New , 48.95 128 , 0 , 7 , 14.388 , 7.644 , New , 53.13 128 , 7 , 7 , 14.546 , 7.642 , New , 52.54 Results For Tigerlake memcpy-evex-erms size, al1 , al2 , Cur T , New T , Win , New / Cur 128 , 0 , 0 , 8.979 , 4.95 , New , 55.13 128 , 7 , 0 , 14.245 , 7.122 , New , 50.0 128 , 0 , 7 , 12.668 , 6.675 , New , 52.69 128 , 7 , 7 , 13.042 , 6.802 , New , 52.15 Results For Skylake memmove-avx2-erms size, al1 , al2 , Cur T , New T , Win , New / Cur 128 , 0 , 32 , 6.181 , 5.691 , New , 92.07 128 , 32 , 0 , 6.165 , 5.752 , New , 93.3 128 , 0 , 7 , 13.923 , 9.37 , New , 67.3 128 , 7 , 0 , 12.049 , 10.182 , New , 84.5 Results For Icelake memmove-evex-erms size, al1 , al2 , Cur T , New T , Win , New / Cur 128 , 0 , 32 , 5.479 , 4.889 , New , 89.23 128 , 32 , 0 , 5.127 , 4.911 , New , 95.79 128 , 0 , 7 , 18.885 , 13.547 , New , 71.73 128 , 7 , 0 , 15.565 , 14.436 , New , 92.75 Results For Tigerlake memmove-evex-erms size, al1 , al2 , Cur T , New T , Win , New / Cur 128 , 0 , 32 , 5.275 , 4.815 , New , 91.28 128 , 32 , 0 , 5.376 , 4.565 , New , 84.91 128 , 0 , 7 , 19.426 , 14.273 , New , 73.47 128 , 7 , 0 , 15.924 , 14.951 , New , 93.89 Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com>
* Bench: Add support for choose direction of memcpy in benchtestsNoah Goldstein2021-05-233-65/+94
| | | | | | | | | | This patch adds support for testing memcpy with both dst > src and dst < src. Since memcpy is implemented as memmove which has seperate control flows for certain sizes depending on dst > src it seems like 1) information that should be provided in the benchtest output and a variable that can be controlled for the benchmarks. Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com>
* Add cast_to_pointer to cast an integer to void * pointerH.J. Lu2021-05-221-0/+3
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* nptl: Remove remaining code from libpthreadFlorian Weimer2021-05-2154-309/+37
| | | | | | | | | Only the placeholder compatibility symbols are left now. The __errno_location symbol was removed (moved) using scripts/move-symbol-to-libc.py. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* nptl: Move pthread_create, thrd_create into libcFlorian Weimer2021-05-2173-104/+233
| | | | | | | | | | | | | | | | | | | The symbols were moved using scripts/move-symbol-to-libc.py. The libpthread placeholder symbols need some changes because some symbol versions have gone away completely. But __errno_location@@GLIBC_2.0 still exists, so the GLIBC_2.0 version is still there. The internal __pthread_create symbol now points to the correct function, so the sysdeps/nptl/thrd_create.c override is no longer necessary. There was an issue how the hidden alias of pthread_getattr_default_np was defined, so this commit cleans up that aspects and removes the GLIBC_PRIVATE export altogether. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* elf: Use custom NODELETE DSO for tst-dlopenfail, tst-dlopenfail-2Florian Weimer2021-05-215-36/+61
| | | | | | | Once libpthread is empty and no longer marked NODELETE, it no longer can be used for testing. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* nptl: Move semi-public __pthread_get_minstack symbol into libcFlorian Weimer2021-05-215-20/+23
| | | | | | | | | No abilist updates here because it is a GLIBC_PRIVATE symbol. It's also necessary to move nptl_version into pthread_create, so that it still ends up in static binaries. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* nptl: Eliminate the __static_tls_size, __static_tls_align_m1 variablesFlorian Weimer2021-05-216-61/+58
| | | | | | | | | | | | | | | | | | | Use the __nptl_tls_static_size_for_stack inline function instead, and the GLRO (dl_tls_static_align) value directly. The computation of GLRO (dl_tls_static_align) in _dl_determine_tlsoffset ensures that the alignment is at least TLS_TCB_ALIGN, which at least STACK_ALIGN (see allocate_stack). Therefore, the additional rounding-up step is removed. ALso move the initialization of the default stack size from __pthread_initialize_minimal_internal to __pthread_early_init. This introduces an extra system call during single-threaded startup, but this simplifies the initialization sequence. No locking is needed around the writes to __default_pthread_attr because the process is single-threaded at this point. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* nptl: Perform signal initialization upon pthread_createFlorian Weimer2021-05-215-88/+131
| | | | | | | | | | | | | Install signal handlers and unblock signals before pthread_create creates the first thread. create_thread in sysdeps/unix/sysv/linux/createthread.c can send SIGCANCEL to the current thread, so the SIGCANCEL handler is currently needed even if pthread_cancel is never called. (The way timer_create uses SIGCANCEL does not need a signal handler; both SIG_DFL and SIG_IGN dispositions should work.) Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* nptl: Remove unused __libc_pthread_init functionFlorian Weimer2021-05-212-36/+0
| | | | | | Fixes commit 732139dabeda7ecce0d56200bc176251e759ccde ("Linux: Move __reclaim_stacks into the fork implementation in libc").
* x86: Improve memset-vec-unaligned-erms.SNoah Goldstein2021-05-201-22/+28
| | | | | | | | | | | | | | | No bug. This commit makes a few small improvements to memset-vec-unaligned-erms.S. The changes are 1) only aligning to 64 instead of 128. Either alignment will perform equally well in a loop and 128 just increases the odds of having to do an extra iteration which can be significant overhead for small values. 2) Align some targets and the loop. 3) Remove an ALU from the alignment process. 4) Reorder the last 4x VEC so that they are stored after the loop. 5) Move the condition for leq 8x VEC to before the alignment process. test-memset and test-wmemset are both passing. Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com> Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
* Hurd: Define ARCH_MIN_GUARD_SIZE in internal <pthread.h>Florian Weimer2021-05-201-0/+3
| | | | | | This macro is always defined on Linux. Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
* elf: Initialize GLRO (dl_minsigstacksize) after static dlopenFlorian Weimer2021-05-201-0/+3
| | | | | | | This is another field of _rtld_global_ro that benefits from initialization in __rtld_static_init. Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
* nptl: Add missing __pthread_cond_wait alias in static buildsFlorian Weimer2021-05-191-0/+3
| | | | | | | Fixes commit cf3fff1c195f859ba949a7ad86d4fca70bd99740 ("nptl: Move cnd_wait into libc"). Reviewed-by: Jonathan Nieder <jrnieder@gmail.com>
* Remove --enable-stackguard-randomization (BZ #27872)Adhemerval Zanella2021-05-193-28/+0
| | | | Last ENABLE_STACKGUARD_RANDOMIZE usage was removed by 4a103975c4.
* s390x: Check HWCAP bits against compiler flagsFlorian Weimer2021-05-191-0/+40
| | | | | | | | | | When compiled with GCC 11.1 and -march=z14 -O3 build flags, running ld.so (or any dynamically linked program) prints: Fatal glibc error: CPU lacks VXE support (z14 or later required) Co-Authored-By: Stefan Liebler <stli@linux.ibm.com> Reviewed-by: Stefan Liebler <stli@linux.ibm.com>
* powerpc64le: Check HWCAP bits against compiler build flagsFlorian Weimer2021-05-191-0/+52
| | | | | | | When built with GCC 11.1 and -mcpu=power9, ld.so prints this error message when running on POWER8: Fatal glibc error: CPU lacks ISA 3.00 support (POWER9 or later required)
* elf: Add hook for checking HWCAP bits after auxiliary vector parsingFlorian Weimer2021-05-192-0/+31
| | | | Reviewed-by: Stefan Liebler <stli@linux.ibm.com>
* x86: Optimize memcmp-evex-movbe.SNoah Goldstein2021-05-181-302/+408
| | | | | | | | | | | | No bug. This commit optimizes memcmp-evex.S. The optimizations include adding a new vec compare path for small sizes, reorganizing the entry control flow, removing some unnecissary ALU instructions from the main loop, and most importantly replacing the heavy use of vpcmp + kand logic with vpxor + vptern. test-memcmp and test-wmemcmp are both passing. Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com> Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
generated by cgit-pink 1.4.1 (git 2.36.1) at 2024-11-02 02:20:41 +0000