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* SPARC: fix nearbyint on sNaN inputAurelien Jarno2016-07-019-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | nearbyint and nearbyintf should not trigger inexact exceptions, but should still trigger an invalid exception for a sNaN input. The SPARC specific implementations of these functions save the FSR at the beginning of the function and restore it at the end to not trigger an inexact exception. This however doesn't work for an sNaN input which need to trigger an invalid exception. Fix that by adding a fcmp instruction using the input value before saving FSR, so that an invalid exception is triggered for a sNaN input. This fixes the math/test-nearbyint-except test on SPARC. Changelog: * sparc/sparc32/sparcv9/fpu/s_nearbyint.S (__nearbyint): Trigger an invalid exception for a sNaN input. * sparc/sparc32/sparcv9/fpu/s_nearbyintf.S (__nearbyintf): Likewise. * sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S (__nearbyint_vis3): Likewise * sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S (__nearbyintf_vis3): Likewise * sparc/sparc64/fpu/s_nearbyint.S (__nearbyint): Likewise. * sparc/sparc64/fpu/s_nearbyintf.S (__nearbyintf): Likewise. * sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S (__nearbyint_vis3): Likewise. * sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S (__nearbyintf_vis3): Likewise.
* Require binutils 2.24 to build x86-64 glibc [BZ #20139]H.J. Lu2016-07-0130-105/+192
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If assembler doesn't support AVX512DQ, _dl_runtime_resolve_avx is used to save the first 8 vector registers, which only saves the lower 256 bits of vector register, for lazy binding. When it is called on AVX512 platform, the upper 256 bits of ZMM registers are clobbered. Parameters passed in ZMM registers will be wrong when the function is called the first time. This patch requires binutils 2.24, whose assembler can store and load ZMM registers, to build x86-64 glibc. Since mathvec library needs assembler support for AVX512DQ, we disable mathvec if assembler doesn't support AVX512DQ. [BZ #20139] * config.h.in (HAVE_AVX512_ASM_SUPPORT): Renamed to ... (HAVE_AVX512DQ_ASM_SUPPORT): This. * sysdeps/x86_64/configure.ac: Require assembler from binutils 2.24 or above. (HAVE_AVX512_ASM_SUPPORT): Removed. (HAVE_AVX512DQ_ASM_SUPPORT): New. * sysdeps/x86_64/configure: Regenerated. * sysdeps/x86_64/dl-trampoline.S: Make HAVE_AVX512_ASM_SUPPORT check unconditional. * sysdeps/x86_64/multiarch/ifunc-impl-list.c: Likewise. * sysdeps/x86_64/multiarch/memcpy.S: Likewise. * sysdeps/x86_64/multiarch/memcpy_chk.S: Likewise. * sysdeps/x86_64/multiarch/memmove-avx512-no-vzeroupper.S: Likewise. * sysdeps/x86_64/multiarch/memmove-avx512-unaligned-erms.S: Likewise. * sysdeps/x86_64/multiarch/memmove.S: Likewise. * sysdeps/x86_64/multiarch/memmove_chk.S: Likewise. * sysdeps/x86_64/multiarch/mempcpy.S: Likewise. * sysdeps/x86_64/multiarch/mempcpy_chk.S: Likewise. * sysdeps/x86_64/multiarch/memset-avx512-no-vzeroupper.S: Likewise. * sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S: Likewise. * sysdeps/x86_64/multiarch/memset.S: Likewise. * sysdeps/x86_64/multiarch/memset_chk.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S: Check HAVE_AVX512DQ_ASM_SUPPORT instead of HAVE_AVX512_ASM_SUPPORT. * sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx51: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S: Likewise.
* Fixed wrong vector sincos/sincosf ABI to have it compatible withAndrew Senkevich2016-07-0133-39/+2587
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | current vector function declaration "#pragma omp declare simd notinbranch", according to which vector sincos should have vector of pointers for second and third parameters. It is fixed with implementation as wrapper to version having second and third parameters as pointers. [BZ #20024] * sysdeps/x86/fpu/test-math-vector-sincos.h: New. * sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core_sse4.S: Fixed ABI of this implementation of vector function. * sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core_avx2.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S: Likewise. * sysdeps/x86_64/fpu/svml_d_sincos2_core.S: Likewise. * sysdeps/x86_64/fpu/svml_d_sincos4_core.S: Likewise. * sysdeps/x86_64/fpu/svml_d_sincos4_core_avx.S: Likewise. * sysdeps/x86_64/fpu/svml_d_sincos8_core.S: Likewise. * sysdeps/x86_64/fpu/svml_s_sincosf16_core.S: Likewise. * sysdeps/x86_64/fpu/svml_s_sincosf4_core.S: Likewise. * sysdeps/x86_64/fpu/svml_s_sincosf8_core.S: Likewise. * sysdeps/x86_64/fpu/svml_s_sincosf8_core_avx.S: Likewise. * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Use another wrapper for testing vector sincos with fixed ABI. * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx.c: New test. * sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx2.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-sincos-avx512.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-sincos.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx2.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-sincosf-avx512.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-sincosf.c: Likewise. * sysdeps/x86_64/fpu/Makefile: Added new tests.
* SPARC64: update localplt.dataAurelien Jarno2016-07-012-0/+5
| | | | | | | | | | | | | | Commits d81f90cc and 89faa0340 replaced called to __isnan and __isinf by the corresponding GCC builtins. In turns GCC emits calls to _Qp_cmp. We should therefore add _Qp_cmp to localplt.data as otherwise the elf/check-localplt test fails with: Extra PLT reference: libc.so: _Qp_cmp A similar change has already been done for SPARC32 in commit 6ef1cb95. Changelog: * sysdeps/unix/sysv/linux/sparc/sparc64/localplt.data: Add _Qp_cmp.
* powerpc: Add a POWER8-optimized version of sinf()Anton Blanchard2016-06-306-1/+614
| | | | | This uses the implementation of sinf() in sysdeps/x86_64/fpu/s_sinf.S as inspiration.
* powerpc: Add a POWER8-optimized version of expf()Tulio Magno Quites Machado Filho2016-06-307-1/+399
| | | | | | | | This implementation is based on the one already used at sysdeps/x86_64/fpu/e_expf.S. This implementation improves the performance by ~14% on average in synthetic benchmarks at the cost of decreasing accuracy to 1 ULP.
* hppa: fix loading of global pointer in _start [BZ #20277]John David Anglin2016-06-302-0/+8
| | | | | | | The patched change fixes a regression for executables compiled with the -p option and linked with gcrt1.o. The executables crash on startup. This regression was introduced in 2.22 and was noticed in the gcc testsuite.
* Check Prefer_ERMS in memmove/memcpy/mempcpy/memsetH.J. Lu2016-06-307-1/+35
| | | | | | | | | | | | | | | | | | | | Although the Enhanced REP MOVSB/STOSB (ERMS) implementations of memmove, memcpy, mempcpy and memset aren't used by the current processors, this patch adds Prefer_ERMS check in memmove, memcpy, mempcpy and memset so that they can be used in the future. * sysdeps/x86/cpu-features.h (bit_arch_Prefer_ERMS): New. (index_arch_Prefer_ERMS): Likewise. * sysdeps/x86_64/multiarch/memcpy.S (__new_memcpy): Return __memcpy_erms for Prefer_ERMS. * sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S (__memmove_erms): Enabled for libc.a. * ysdeps/x86_64/multiarch/memmove.S (__libc_memmove): Return __memmove_erms or Prefer_ERMS. * sysdeps/x86_64/multiarch/mempcpy.S (__mempcpy): Return __mempcpy_erms for Prefer_ERMS. * sysdeps/x86_64/multiarch/memset.S (memset): Return __memset_erms for Prefer_ERMS.
* Return proper status from _nss_nis_initgroups_dyn (bug 20262)Andreas Schwab2016-06-302-5/+18
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* Correct bug number in ChangeLog [BZ #18960]Florian Weimer2016-06-301-1/+1
| | | | This updates commit 5fa268239b46e127f941c3510ad200ce5ef8df45.
* Compile tst-cleanupx4 test with -fexceptionsH.J. Lu2016-06-293-3/+16
| | | | | | | | | | | | | | | | tst-cleanupx4 is linked with tst-cleanupx4.o and tst-cleanup4aux.o. Since tst-cleanupx4.o is compiled from tst-cleanup4.c with -fexceptions, tst-cleanup4aux.c should also be compiled with -fexceptions. Tested on x86-64 and i686. [BZ #18645] * nptl/Makefile (extra-test-objs): Add tst-cleanupx4aux.o. (test-extras): Add tst-cleanupx4aux. (CFLAGS-tst-cleanupx4aux.c): New. Set to -fexceptions. ($(objpfx)tst-cleanupx4): Replace tst-cleanup4aux.o with tst-cleanupx4aux.o. * nptl/tst-cleanupx4aux.c: New file.
* i686/multiarch: Regenerate ulpsAurelien Jarno2016-06-302-8/+12
| | | | | | | This comes from running “make regen-ulps” on AMD Opteron 6272 CPUs. Changelog: * sysdeps/i386/i686/fpu/multiarch/libm-test-ulps: Regenerated.
* Avoid array-bounds warning for strncat on i586 (bug 20260)Andreas Schwab2016-06-292-2/+8
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* elf.h: Add declarations for BPFRichard Henderson2016-06-282-1/+11
| | | | | | | | | The EM_BPF number has been officially assigned, though it has not yet been posted to the gabi webpage yet. * elf/elf.h (EM_BPF): New. (EM_NUM): Update. (R_BPF_NONE, R_BPF_MAP_FD): New.
* elf.h: Sync with the gabi webpageRichard Henderson2016-06-282-83/+213
| | | | | | | | | | | | | | | | | | | | | | | | | http://www.sco.com/developers/gabi/latest/ch4.eheader.html Retrieved 2016-06-20. * elf/elf.h (EM_IAMCU, EM_SPU, EM_PDP10, EM_PDP11, EM_ARC_COMPACT, EM_VIDEOCORE, EM_TMM_GPP, EM_NS32K, EM_TPC, EM_SNP1K, EM_ST200, EM_IP2K, EM_MAX, EM_CR, EM_F2MC16, EM_MSP430, EM_BLACKFIN, EM_SE_C33, EM_SEP, EM_ARCA, EM_UNICORE, EM_EXCESS, EM_DXP, EM_ALTERA_NIOS2, EM_CRX, EM_XGATE, EM_C166, EM_M16C, EM_DSPIC30F, EM_CE, EM_M32C, EM_TSK3000, EM_RS08, EM_SHARC, EM_ECOG2, EM_SCORE7, EM_DSP24, EM_VIDEOCORE3, EM_LATTICEMICO32, EM_SE_C17, EM_TI_C6000, EM_TI_C2000, EM_TI_C5500, EM_TI_ARP32, EM_TI_PRU, EM_MMDSP_PLUS, EM_CYPRESS_M8C, EM_R32C, EM_TRIMEDIA, EM_QDSP6, EM_8051, EM_STXP7X, EM_NDS32, EM_ECOG1X, EM_MAXQ30, EM_XIMO16, EM_MANIK, EM_CRAYNV2, EM_RX, EM_METAG, EM_MCST_ELBRUS, EM_ECOG16, EM_CR16, EM_ETPU, EM_SLE9X, EM_L10M, EM_K10M, EM_AVR32, EM_STM8, EM_TILE64, EM_CUDA, EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_ARC_COMPACT2, EM_OPEN8, EM_RL78, EM_VIDEOCORE5, EM_78KOR, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE, EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_EMX16, EM_EMX8, EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC, EM_CSR_KALIMBA, EM_Z80, EM_VISIUM, EM_FT32, EM_MOXIE, EM_AMDGPU, EM_RISCV): New. (EM_NUM): Update.
* S390: Fix relocation of _nl_current_LC_CATETORY_used in static build. [BZ ↵Stefan Liebler2016-06-282-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | #19860] With shared libc, all locale categories are always loaded. For static libc they aren't, but there exist a weak _nl_current_LC_CATEGORY_used symbol for each category. If the category is used, the locale/lc-CATEGORY.o is linked in where _NL_CURRENT_DEFINE (LC_CATEGORY) defines and sets the _nl_current_LC_CATEGORY_used symbol to one. As reported by Marcin "Bug 18960 - s390: _nl_locale_subfreeres uses larl opcode on misaligned symbol" (https://sourceware.org/bugzilla/show_bug.cgi?id=18960) In function _nl_locale_subfreeres (locale/setlocale.c) for each category a check - &_nl_current_LC_CATEGORY_used != 0 - decides whether the category is used or not. There is also a second usage with the same mechanism in function __uselocale (locale/uselocale.c). On s390 a larl instruction with R_390_PC32DBL relocation is used to get the address of _nl_current_LC_CATEGORY_used symbols. As larl loads the address relative in halfwords and the code is always 2-byte aligned, larl can only load even addresses. At the end, the relocated address is always zero and never one. Marcins patch (see bugzilla) uses the following declaration in locale/setlocale.c: extern char _nl_current_##category##_used __attribute__((__aligned__(1))); In function _nl_locale_subfreeres all categories are checked and therefore gcc is now building an array of addresses in rodata section with an R_390_64 relocation for every address. This array is loaded with larl instruction and each address is accessed by index. This fixes only the usage in _nl_locale_subfreeres. Each user has to add the alignment attribute. This patch set the _nl_current_LC_CATEGORY_used symbols to two instead of one. This way gcc can use larl instruction and the check against zero works on every usage. ChangeLog: [BZ #19860] * locale/localeinfo.h (_NL_CURRENT_DEFINE): Set _nl_current_LC_CATEGORY_used to two instead of one.
* MIPS: run tst-mode-switch-{1,2,3}.c using test-skeleton.cAurelien Jarno2016-06-274-6/+24
| | | | | | | | | | | | | | | | | | For some reasons I have not investigated yet, tst-mode-switch-1 hangs on a MIPS UTM-8 machine running an o32 userland and a 3.6.1 kernel. This patch changes the test so that it runs under the test-skeleton framework, causing the test to fail after a timeout instead of hanging the whole testsuite. At the same time, also change the tst-mode-switch-2 and tst-mode-switch-3 tests. Changelog: * sysdeps/mips/tst-mode-switch-1.c (main): Converted to ... (do_test): ... this. (TEST_FUNCTION): New macro. Include test-skeleton.c. * sysdeps/mips/tst-mode-switch-2.c (main): Likewise. * sysdeps/mips/tst-mode-switch-3.c (main): Likewise.
* Avoid "inexact" exceptions in i386/x86_64 trunc functions (bug 15479).Joseph Myers2016-06-276-99/+115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As discussed in <https://sourceware.org/ml/libc-alpha/2016-05/msg00577.html>, TS 18661-1 disallows ceil, floor, round and trunc functions from raising the "inexact" exception, in accordance with general IEEE 754 semantics for when that exception is raised. Fixing this for x87 floating point is more complicated than for the other versions of these functions, because they use the frndint instruction that raises "inexact" and this can only be avoided by saving and restoring the whole floating-point environment. As I noted in <https://sourceware.org/ml/libc-alpha/2016-06/msg00128.html>, I have now implemented a GCC option -fno-fp-int-builtin-inexact for GCC 7, such that GCC will inline these functions on x86, without caring about "inexact", when the default -ffp-int-builtin-inexact is in effect. This allows users to get optimized code depending on the options they pass to the compiler, while making the out-of-line functions follow TS 18661-1 semantics and avoid "inexact". This patch duly fixes the out-of-line trunc function implementations to avoid "inexact", in the same way as the nearbyint implementations. I do not know how the performance of implementations such as these based on saving the environment and changing the rounding mode temporarily compares to that of the C versions or SSE 4.1 versions (of course, for 32-bit x86 SSE implementations still need to get the return value in an x87 register); it's entirely possible other implementations could be faster in some cases. Tested for x86_64 and x86. [BZ #15479] * sysdeps/i386/fpu/s_trunc.S (__trunc): Save and restore floating-point environment rather than just control word. * sysdeps/i386/fpu/s_truncf.S (__truncf): Likewise. * sysdeps/i386/fpu/s_truncl.S (__truncl): Save and restore floating-point environment, with "invalid" exceptions merged in, rather than just control word. * sysdeps/x86_64/fpu/s_truncl.S (__truncl): Likewise. * math/libm-test.inc (trunc_test_data): Do not allow spurious "inexact" exceptions.
* Avoid "inexact" exceptions in i386/x86_64 floor functions (bug 15479).Joseph Myers2016-06-276-94/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As discussed in <https://sourceware.org/ml/libc-alpha/2016-05/msg00577.html>, TS 18661-1 disallows ceil, floor, round and trunc functions from raising the "inexact" exception, in accordance with general IEEE 754 semantics for when that exception is raised. Fixing this for x87 floating point is more complicated than for the other versions of these functions, because they use the frndint instruction that raises "inexact" and this can only be avoided by saving and restoring the whole floating-point environment. As I noted in <https://sourceware.org/ml/libc-alpha/2016-06/msg00128.html>, I have now implemented a GCC option -fno-fp-int-builtin-inexact for GCC 7, such that GCC will inline these functions on x86, without caring about "inexact", when the default -ffp-int-builtin-inexact is in effect. This allows users to get optimized code depending on the options they pass to the compiler, while making the out-of-line functions follow TS 18661-1 semantics and avoid "inexact". This patch duly fixes the out-of-line floor function implementations to avoid "inexact", in the same way as the nearbyint implementations. I do not know how the performance of implementations such as these based on saving the environment and changing the rounding mode temporarily compares to that of the C versions or SSE 4.1 versions (of course, for 32-bit x86 SSE implementations still need to get the return value in an x87 register); it's entirely possible other implementations could be faster in some cases. Tested for x86_64 and x86. [BZ #15479] * sysdeps/i386/fpu/s_floor.S (__floor): Save and restore floating-point environment rather than just control word. * sysdeps/i386/fpu/s_floorf.S (__floorf): Likewise. * sysdeps/i386/fpu/s_floorl.S (__floorl): Save and restore floating-point environment, with "invalid" exceptions merged in, rather than just control word. * sysdeps/x86_64/fpu/s_floorl.S (__floorl): Likewise. * math/libm-test.inc (floor_test_data): Do not allow spurious "inexact" exceptions.
* Avoid "inexact" exceptions in i386/x86_64 ceil functions (bug 15479).Joseph Myers2016-06-276-95/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As discussed in <https://sourceware.org/ml/libc-alpha/2016-05/msg00577.html>, TS 18661-1 disallows ceil, floor, round and trunc functions from raising the "inexact" exception, in accordance with general IEEE 754 semantics for when that exception is raised. Fixing this for x87 floating point is more complicated than for the other versions of these functions, because they use the frndint instruction that raises "inexact" and this can only be avoided by saving and restoring the whole floating-point environment. As I noted in <https://sourceware.org/ml/libc-alpha/2016-06/msg00128.html>, I have now implemented a GCC option -fno-fp-int-builtin-inexact for GCC 7, such that GCC will inline these functions on x86, without caring about "inexact", when the default -ffp-int-builtin-inexact is in effect. This allows users to get optimized code depending on the options they pass to the compiler, while making the out-of-line functions follow TS 18661-1 semantics and avoid "inexact". This patch duly fixes the out-of-line ceil function implementations to avoid "inexact", in the same way as the nearbyint implementations. I do not know how the performance of implementations such as these based on saving the environment and changing the rounding mode temporarily compares to that of the C versions or SSE 4.1 versions (of course, for 32-bit x86 SSE implementations still need to get the return value in an x87 register); it's entirely possible other implementations could be faster in some cases. Tested for x86_64 and x86. [BZ #15479] * sysdeps/i386/fpu/s_ceil.S (__ceil): Save and restore floating-point environment rather than just control word. * sysdeps/i386/fpu/s_ceilf.S (__ceilf): Likewise. * sysdeps/i386/fpu/s_ceill.S (__ceill): Save and restore floating-point environment, with "invalid" exceptions merged in, rather than just control word. * sysdeps/x86_64/fpu/s_ceill.S (__ceill): Likewise. * math/libm-test.inc (ceil_test_data): Do not allow spurious "inexact" exceptions.
* MIPS, SPARC: more fixes to the vfork aliases in libpthread.soAurelien Jarno2016-06-274-14/+23
| | | | | | | | | | | | | | | | | | Commit 43c29487 tried to fix the vfork aliases in libpthread.so on MIPS and SPARC, but failed to do it correctly, introducing an ABI change. This patch does the remaining changes needed to align the MIPS and SPARC vfork implementations with the other architectures. That way the the alpha version of pt-vfork.S works correctly for MIPS and SPARC. The changes for alpha were done in 82aab97c. Changelog: * sysdeps/unix/sysv/linux/mips/vfork.S (__vfork): Rename into __libc_vfork. (__vfork) [IS_IN (libc)]: Remove alias. (__libc_vfork) [IS_IN (libc)]: Define as an alias. * sysdeps/unix/sysv/linux/sparc/sparc32/vfork.S: Likewise. * sysdeps/unix/sysv/linux/sparc/sparc64/vfork.S: Likewise.
* Remove atomic_compare_and_exchange_bool_rel.Torvald Riegel2016-06-2413-124/+58
| | | | | | | | | | | | | | | | | | | | | | | | atomic_compare_and_exchange_bool_rel and catomic_compare_and_exchange_bool_rel are removed and replaced with the new C11-like atomic_compare_exchange_weak_release. The concurrent code in nscd/cache.c has not been reviewed yet, so this patch does not add detailed comments. * nscd/cache.c (cache_add): Use new C11-like atomic operation instead of atomic_compare_and_exchange_bool_rel. * nptl/pthread_mutex_unlock.c (__pthread_mutex_unlock_full): Likewise. * include/atomic.h (atomic_compare_and_exchange_bool_rel, catomic_compare_and_exchange_bool_rel): Remove. * sysdeps/aarch64/atomic-machine.h (atomic_compare_and_exchange_bool_rel): Likewise. * sysdeps/alpha/atomic-machine.h (atomic_compare_and_exchange_bool_rel): Likewise. * sysdeps/arm/atomic-machine.h (atomic_compare_and_exchange_bool_rel): Likewise. * sysdeps/mips/atomic-machine.h (atomic_compare_and_exchange_bool_rel): Likewise. * sysdeps/tile/atomic-machine.h (atomic_compare_and_exchange_bool_rel): Likewise.
* Fix i386/x86_64 scalbl with sNaN input (bug 20296).Joseph Myers2016-06-234-23/+48
| | | | | | | | | | | | | | | | | The x86_64 and i386 versions of scalbl return sNaN for some cases of sNaN input and are missing "invalid" exceptions for other cases. This results from overly complicated code that either returns a NaN input, or discards both inputs when one is NaN and loads a NaN from memory. This patch fixes this by simplifying the code to add the arguments when either one is NaN. Tested for x86_64 and x86. [BZ #20296] * sysdeps/i386/fpu/e_scalbl.S (__ieee754_scalbl): Add arguments when either argument is a NaN. * sysdeps/x86_64/fpu/e_scalbl.S (__ieee754_scalbl): Likewise. * math/libm-test.inc (scalb_test_data): Add sNaN tests.
* Add more sNaN tests (most remaining real functions).Joseph Myers2016-06-233-0/+270
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds tests of sNaN inputs to more functions to libm-test.inc. This covers the remaining real functions except for scalb, where there's a bug to fix, and hypot pow fmin fmax, where there are cases where a qNaN input does not result in a qNaN output and so sNaN support according to TS 18661-1 is more of a new feature. Tested for x86_64 and x86. * math/libm-test.inc (snan_value_ld): New macro. (isgreater_test_data): Add sNaN tests. (isgreaterequal_test_data): Likewise. (isless_test_data): Likewise. (islessequal_test_data): Likewise. (islessgreater_test_data): Likewise. (isunordered_test_data): Likewise. (nextafter_test_data): Likewise. (nexttoward_test_data): Likewise. (remainder_test_data): Likewise. (remquo_test_data): Likewise. (significand_test_data): Likewise. * math/gen-libm-test.pl (%beautify): Add snan_value_ld.
* Fix up ChangeLogSiddhesh Poyarekar2016-06-241-1/+1
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* Avoid attempt for runtime checks if all environments are definedSiddhesh Poyarekar2016-06-242-24/+66
| | | | | | | | | | | | | | | | | | | | | | getconf has the capability to do a runtime check for environment support in cases where there is optional support for an environment (_POSIX_V7_ILP32_OFF32 on x86_64 for example) and this is indicated by not defining the _POSIX_V7_ILP32_OFF32 macro, which results in getconf doing an additional execve of _POSIX_V7_ILP32_OFF32 in the $GETCONF_DIR. The default bits/environments.h however does not leave any environment macros undefined, which means that no such additional execve is needed. gcc trunk catches this as a build failure since it finds that the code block inside switch(specs[i].num) is not reachable. Avoid this error by not bothering about the additional exec (and looking in specific environments) when all environments are defined. Tested on aarch64. * posix/getconf.c: Define ALL_ENVIRONMENTS_DEFINED if all environment macros are defined. (main): Avoid execve if ALL_ENVIRONMENTS_DEFINED is defined.
* libio: Implement vtable verification [BZ #20191]Florian Weimer2016-06-2330-60/+279
| | | | | | | | | | | | | | | | | | | | This commit puts all libio vtables in a dedicated, read-only ELF section, so that they are consecutive in memory. Before any indirect jump, the vtable pointer is checked against the section boundaries, and the process is terminated if the vtable pointer does not fall into the special ELF section. To enable backwards compatibility, a special flag variable (_IO_accept_foreign_vtables), protected by the pointer guard, avoids process termination if libio stream object constructor functions have been called earlier. Such constructor functions are called by the GCC 2.95 libstdc++ library, and this mechanism ensures compatibility with old binaries. Existing callers inside glibc of these functions are adjusted to call the original functions, not the wrappers which enable vtable compatiblity. The compatibility mechanism is used to enable passing FILE * objects across a static dlopen boundary, too.
* test-skeleton.c (xrealloc): Support realloc-as-freeFlorian Weimer2016-06-232-3/+7
| | | | | | If the requested size is zero, realloc returns NULL, but the deallocation is still successful, unless the pointer is also NULL, when realloc behaves as malloc (0).
* test-skeleton.c: xmalloc, xcalloc, xrealloc are potentially unusedFlorian Weimer2016-06-232-3/+8
| | | | | | | | | | __attribute__ ((used)) means that the function has to be emitted in assembly because it is referenced in ways the compiler cannot detect (such as asm statements, or some post-processing on the generated assembly). The unused attribute needs to come first, otherwise it is applied to the return type and not the function definition.
* test-skeleton.c: Add write_message functionFlorian Weimer2016-06-234-21/+29
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* Simplify x86 nearbyint functions.Joseph Myers2016-06-225-16/+8
| | | | | | | | | | | | | | | | | | | | The i386 implementations of nearbyint functions, and x86_64 nearbyintl, contain code to mask the "inexact" exception. However, the fnstenv instruction has the effect of masking all exceptions, so this masking code has been redundant since fnstenv was added to those implementations (by commit 846d9a4a3acdb4939ca7bf6aed48f9f6f26911be; commit 71d1b0166b4ace0d804af2993b3815758b852efc added the test math/test-nearbyint-except-2.c that verifies these functions do work when called with "inexact" traps enabled); this patch removes the redundant code. Tested for x86_64 and x86. * sysdeps/i386/fpu/s_nearbyint.S (__nearbyint): Do not mask "inexact" exceptions after fnstenv. * sysdeps/i386/fpu/s_nearbyintf.S (__nearbyintf): Likewise. * sysdeps/i386/fpu/s_nearbyintl.S (__nearbyintl): Likewise. * sysdeps/x86_64/fpu/s_nearbyintl.S (__nearbyintl): Likewise.
* Move sysdeps/generic/bits/hwcap.h to top-level bits/Zack Weinberg2016-06-222-23/+5
| | | | | | | | | | This file was added to sysdeps/generic/bits in 2012. This appears to have been an oversight, as the entire sysdeps/generic/bits directory was moved to the top level in 2005. Accordingly the generic bits/hwcap.h belongs there too. * sysdeps/generic/bits/hwcap.h: Moved to ... * bits/hwcap.h: Here.
* Move sysdeps/generic/bits/hwcap.h to top-level bits/Zack Weinberg2016-06-221-0/+23
| | | | | | | | | | This file was added to sysdeps/generic/bits in 2012. This appears to have been an oversight, as the entire sysdeps/generic/bits directory was moved to the top level in 2005. Accordingly the generic bits/hwcap.h belongs there too. * sysdeps/generic/bits/hwcap.h: Moved to ... * bits/hwcap.h: Here.
* This patch further tunes memcpy - avoid one branch for sizes 1-3,Wilco Dijkstra2016-06-222-24/+37
| | | | | | | add a prefetch and improve small copies that are exact powers of 2. * sysdeps/aarch64/memcpy.S (memcpy): Further tuning for performance.
* malloc: Avoid premature fallback to mmap [BZ #20284]Florian Weimer2016-06-212-6/+10
| | | | | | | Before this change, the while loop in reused_arena which avoids returning a corrupt arena would never execute its body if the selected arena were not corrupt. As a result, result == begin after the loop, and the function returns NULL, triggering fallback to mmap.
* Fix p{readv,writev}{64} consolidation implementationAdhemerval Zanella2016-06-219-14/+168
| | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the p{readv,writev}{64} consolidation implementation from commits 4e77815 and af5fdf5. Different from pread/pwrite implementation, preadv/pwritev implementation does not require __ALIGNMENT_ARG because kernel syscall prototypes define the high and low part of the off_t, if it is the case, directly (different from pread/pwrite where the architecture ABI for passing 64-bit values must be in consideration for passsing the arguments). It also adds some basic tests for preadv/pwritev. Tested on x86_64, i686, and armhf. * misc/Makefile (tests): Add tst-preadvwritev and tst-preadvwritev64. * misc/tst-preadvwritev.c: New file. * misc/tst-preadvwritev64.c: Likewise. * sysdeps/unix/sysv/linux/preadv.c (preadv): Remove SYSCALL_LL{64} usage. * sysdeps/unix/sysv/linux/preadv64.c (preadv64): Likewise. * sysdeps/unix/sysv/linux/pwritev.c (pwritev): Likewise. * sysdeps/unix/sysv/linux/pwritev64.c (pwritev64): Likewise. * sysdeps/unix/sysv/linux/sysdep.h (LO_HI_LONG): New macro.
* Added tests to ensure linkage through libmvec *_finite aliases which areAndrew Senkevich2016-06-2027-0/+337
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | defined in libmvec_nonshared.a (bug 19654). [BZ #19654] * sysdeps/x86_64/fpu/Makefile: Added new tests. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx-main.c: New. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx-mod.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx2-main.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx2-mod.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx2.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx512-main.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx512-mod.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-avx512.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-main.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias-mod.c: Likewise. * sysdeps/x86_64/fpu/test-double-libmvec-alias.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx-main.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx-mod.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx2-main.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx2-mod.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx2.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx512-main.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx512-mod.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-avx512.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-main.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias-mod.c: Likewise. * sysdeps/x86_64/fpu/test-float-libmvec-alias.c: Likewise. * sysdeps/x86_64/fpu/test-libmvec-alias-mod.c: Likewise.
* Add a simple rawmemchr implementation. Use strlen for rawmemchr(s, '\0') as itWilco Dijkstra2016-06-203-2/+50
| | | | | | | | is the fastest way to search for '\0'. Otherwise use memchr with an infinite size. This is 3x faster on benchtests for large sizes. Passes GLIBC tests. * sysdeps/aarch64/rawmemchr.S (__rawmemchr): New file. * sysdeps/aarch64/strlen.S (__strlen): Change to __strlen to avoid PLT.
* This is an optimized memcpy/memmove for AArch64. Copies are split into 3 mainWilco Dijkstra2016-06-203-452/+216
| | | | | | | | | | | | | | | cases: small copies of up to 16 bytes, medium copies of 17..96 bytes which are fully unrolled. Large copies of more than 96 bytes align the destination and use an unrolled loop processing 64 bytes per iteration. In order to share code with memmove, small and medium copies read all data before writing, allowing any kind of overlap. All memmoves except for the large backwards case fall into memcpy for optimal performance. On a random copy test memcpy/memmove are 40% faster on Cortex-A57 and 28% on Cortex-A53. * sysdeps/aarch64/memcpy.S (memcpy): Rewrite of optimized memcpy and memmove. * sysdeps/aarch64/memmove.S (memmove): Remove memmove code (merged into memcpy.S).
* elf: Consolidate machine-agnostic DTV definitions in <dl-dtv.h>Florian Weimer2016-06-2035-242/+106
| | | | | Identical definitions of dtv_t and TLS_DTV_UNALLOCATED were repeated for all architectures using DTVs.
* Revert __malloc_initialize_hook symbol poisoningFlorian Weimer2016-06-207-30/+18
| | | | | | It turns out the Emacs-internal malloc implementation uses __malloc_* symbols. If glibc poisons them in <stdc-pre.h>, Emacs will no longer compile.
* Expand comments in Linux times() implementation.Carlos O'Donell2016-06-192-10/+21
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* MIPS, SPARC: fix wrong vfork aliases in libpthread.soAurelien Jarno2016-06-184-0/+13
| | | | | | | | | | | | | | | | | | | | | | With recent binutils versions the GNU libc fails to build on at least MISP and SPARC, with this kind of error: /home/aurel32/glibc/glibc-build/nptl/libpthread.so:(*IND*+0x0): multiple definition of `vfork@GLIBC_2.0' /home/aurel32/glibc/glibc-build/nptl/libpthread.so::(.text+0xee50): first defined here It appears that on these architectures pt-vfork.S includes vfork.S (through the alpha version of pt-vfork.S) and that the __vfork aliases are not conditionalized on IS_IN (libc) like on other architectures. Therefore the aliases are also wrongly included in libpthread.so. Fix this by properly conditionalizing the aliases like on other architectures. Changelog: * sysdeps/unix/sysv/linux/mips/vfork.S (__vfork): Conditionalize hidden_def, weak_alias and strong_alias on [IS_IN (libc)]. * sysdeps/unix/sysv/linux/sparc/sparc32/vfork.S: Likewise. * sysdeps/unix/sysv/linux/sparc/sparc64/vfork.S: Likewise.
* Add nextup and nextdown math functionsRajalakshmi Srinivasaraghavan2016-06-1648-11/+936
| | | | | | | | | | | TS 18661 adds nextup and nextdown functions alongside nextafter to provide support for float128 equivalent to it. This patch adds nextupl, nextup, nextupf, nextdownl, nextdown and nextdownf to libm before float128 support. The nextup functions return the next representable value in the direction of positive infinity and the nextdown functions return the next representable value in the direction of negative infinity. These are currently enabled as GNU extensions.
* manual: fix typos in the pattern chapterRical Jasan2016-06-162-12/+16
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* localedata: ro_RO: update Tuesday translation [BZ #18911]Simion Onea2016-06-162-5/+6
| | | | | Enough fonts support ț now that we can change the Tuesday translation to be what it should rather than use the incorrect ţ.
* manual: fix typos in the search chapterRical Jasan2016-06-162-18/+22
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* manual: fix typos in the message chapterRical Jasan2016-06-162-79/+82
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* manual: fix spelling typosMike Frysinger2016-06-168-13/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've bracketed the changes to make it easier to pick out. enlengthen -> extend enlengthened -> extended excep[e]tions -> exceptions exten[da]ble -> exten[si]ble implement[o]r -> implement[e]r licen[c]e -> licen[s]e optimzed -> optim[i]zed overriden -> overrid[d]en param[a]ter -> param[e]ter Signed-off-by: Mike Frysinger <vapier@gentoo.org> 2012-10-27 Mike Frysinger <vapier@gentoo.org> * manual/arith.texi: Fix spelling typos. * manual/contrib.texi: Likewise. * manual/crypt.texi: Likewise. * manual/filesys.texi: Likewise. * manual/llio.texi: Likewise. * manual/locale.texi: Likewise. * manual/message.texi: Likewise. * manual/nss.texi: Likewise. * manual/socket.texi: Likewise. * manual/stdio.texi: Likewise. * manual/string.texi: Likewise. * manual/sysinfo.texi: Likewise.
* manual: fix typos in the locale chapterRical Jasan2016-06-161-0/+4
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