| Commit message (Collapse) | Author | Age | Files | Lines |
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* sysdeps/i386/i686/fpu/multiarch/Makefile (sysdep_routines):
Add s_sinf-sse2, s_conf-sse2.
* sysdeps/i386/i686/fpu/multiarch/s_sinf-sse2.S: New file.
* sysdeps/i386/i686/fpu/multiarch/s_cosf-sse2.S: New file.
* sysdeps/i386/i686/fpu/multiarch/s_sinf.c: New file.
* sysdeps/i386/i686/fpu/multiarch/s_cosf.c: New file.
* sysdeps/ieee754/flt-32/s_sinf.c (SINF, SINF_FUNC): Add macros
for using routine as __sinf_ia32.
Use macro for function declaration and weak_alias.
* sysdeps/ieee754/flt-32/s_cosf.c (COSF, COSF_FUNC): Add macros
for using routine as __cosf_ia32.
Use macro for function declaration and weak_alias.
* sysdeps/i386/i686/fpu/multiarch/e_expf-sse2.S: Fix Copyright.
* sysdeps/i386/i686/fpu/multiarch/e_expf.c: Fix Copyright.
* sysdeps/x86_64/fpu/s_sinf.S: New file.
* sysdeps/x86_64/fpu/s_cosf.S: New file.
* sysdeps/x86_64/fpu/libm-test-ulps: Update.
* math/libm-test.inc (cos_test): Add more test cases.
(sin_test): Likewise.
(sincos_test): Likewise.
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[BZ #14538]
* sysdeps/x86_64/dl-machine.h (elf_machine_dynamic): Use the
first element of the GOT.
(elf_machine_load_address): Return the difference between
the runtime address of _DYNAMIC and elf_machine_dynamic ().
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The ttyname and ttyname_r functions on Linux now fall back to
searching for the tty file descriptor in /dev/pts or /dev if /proc is
not available. This allows creation of chroots without the procfs
mounted on /proc.
Fixes BZ #14516.
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We've been carrying this in Gentoo for quite a long time to fix some test
failures that people hit.
Original message:
> make[4]: *** [/glibc/glibc-package-2.3/mips-linux/obj/math/test-fpucw.out] Error 1
This test fails since the read back fpu control word is 0x80000 instead
of 0x0. I wonder if this patch is correct:
...
which additionally masks out the condition bit 23 - note that the other
condition bits (25-31) are masked out too?
URL: http://sourceware.org/ml/libc-alpha/2002-10/msg00392.html
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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While most arches have had the fdatasync syscall for a long time, the
alpha port didn't add it until the 2.6.22 release.
This is heavily based on Aurelien Jarno's initial work.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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for USE_NSCD case.
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if the family is PF_UNSPEC.
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Due to the rise of kbuild type build systems (as the Linux kernel is a
popularly emulated environment), the V variable has become common as a
knob for controlling verbosity. Unfortunately, if you run `make V=1`
with glibc during install, it fails with weird errors due to the glibc
build already using this variable for versioning information.
Granted, overriding this variable in the glibc context makes no sense
so people shouldn't be doing it, but when paired with build frameworks
that like to use one set of options for all packages, glibc starts to
stick out as an oddball (in that it fails). Considering it's easy
enough to rename (it's used in just one place), let's do so.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Initially based on the versions found in wcsmbs/* ; these files have
been changed by hand unrolling, and adding some additional variables
to allow some read-ahead to occur, which then relieves some of the
wait-for-increment/wait-for-load/wait-for-compare-results pressure
that was slowing down every iteration through the while-loop.
For 64-bit Power7, These changes give an approx 20% throughput boost
for the wcschr and wcsrchr functions; and approx 40% boost for the
wcscpy function. 32-bit improvements appear to be slightly better
with ~ %30 and ~ %45 respectively. Results for Power6 closely match
those for power7.
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Assorted tweaking, twisting and tuning to squeeze a few additional cycles
out of the memchr code. Changes include bypassing the shift pairs
(sld,srd) when they are not required, and unrolling the small_loop that
handles short and trailing strings.
Per scrollpipe data measuring aligned strings for 64-bit, these changes
save between five and eight cycles (9-13% overall) for short strings (<32),
Longer aligned strings see slight improvement of 1-3% due to bypassing the
shifts and the instruction rearranging.
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