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* nptl: Move Linux createthread to nptlAdhemerval Zanella2021-05-272-161/+116
| | | | | | git mv -f sysdeps/unix/sysv/linux/createthread.c nptl/createthread.c No functional change.
* nptl: Install SIGSETXID handler with SA_ONSTACK [BZ #27914]Florian Weimer2021-05-271-2/+5
| | | | | | | | | | | | | | The signal is sent to all threads, some of which may have switched to very small stacks. If they have also installed an alternate signal stack, SA_ONSTACK makes this work. The Go runtime needs this: runtime: C.setuid/C.setgid smashes Go stack <https://github.com/golang/go/issues/9400> Doing this for SIGCANCEL is less obviously beneficial and needs further testing. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* aarch64: Added optimized memset for A64FXNaohiro Tamura2021-05-274-5/+286
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch optimizes the performance of memset for A64FX [1] which implements ARMv8-A SVE and has L1 64KB cache per core and L2 8MB cache per NUMA node. The performance optimization makes use of Scalable Vector Register with several techniques such as loop unrolling, memory access alignment, cache zero fill and prefetch. SVE assembler code for memset is implemented as Vector Length Agnostic code so theoretically it can be run on any SOC which supports ARMv8-A SVE standard. We confirmed that all testcases have been passed by running 'make check' and 'make xcheck' not only on A64FX but also on ThunderX2. And also we confirmed that the SVE 512 bit vector register performance is roughly 4 times better than Advanced SIMD 128 bit register and 8 times better than scalar 64 bit register by running 'make bench'. [1] https://github.com/fujitsu/A64FX Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com> Reviewed-by: Szabolcs Nagy <Szabolcs.Nagy@arm.com>
* aarch64: Added optimized memcpy and memmove for A64FXNaohiro Tamura2021-05-279-14/+453
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch optimizes the performance of memcpy/memmove for A64FX [1] which implements ARMv8-A SVE and has L1 64KB cache per core and L2 8MB cache per NUMA node. The performance optimization makes use of Scalable Vector Register with several techniques such as loop unrolling, memory access alignment, cache zero fill, and software pipelining. SVE assembler code for memcpy/memmove is implemented as Vector Length Agnostic code so theoretically it can be run on any SOC which supports ARMv8-A SVE standard. We confirmed that all testcases have been passed by running 'make check' and 'make xcheck' not only on A64FX but also on ThunderX2. And also we confirmed that the SVE 512 bit vector register performance is roughly 4 times better than Advanced SIMD 128 bit register and 8 times better than scalar 64 bit register by running 'make bench'. [1] https://github.com/fujitsu/A64FX Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com> Reviewed-by: Szabolcs Nagy <Szabolcs.Nagy@arm.com>
* benchtests: Fixed bench-memcpy-random: buf1: mprotect failedNaohiro Tamura2021-05-261-2/+2
| | | | | | | | This patch fixed mprotect system call failure on AArch64. This failure happened on not only A64FX but also ThunderX2. Also this patch updated a JSON key from "max-size" to "length" so that 'plot_strings.py' can process 'bench-memcpy-random.out'
* aarch64: Added Vector Length Set test helper scriptNaohiro Tamura2021-05-263-0/+89
| | | | | | | | | | | | | | | | | | | This patch is a test helper script to change Vector Length for child process. This script can be used as test-wrapper for 'make check'. Usage examples: ~/build$ make check subdirs=string \ test-wrapper='~/glibc/sysdeps/unix/sysv/linux/aarch64/vltest.py 16' ~/build$ ~/glibc/sysdeps/unix/sysv/linux/aarch64/vltest.py 16 \ make test t=string/test-memcpy ~/build$ ~/glibc/sysdeps/unix/sysv/linux/aarch64/vltest.py 32 \ ./debugglibc.sh string/test-memmove ~/build$ ~/glibc/sysdeps/unix/sysv/linux/aarch64/vltest.py 64 \ ./testrun.sh string/test-memset
* aarch64: define BTI_C and BTI_J macros as NOP unless HAVE_AARCH64_BTINaohiro Tamura2021-05-261-2/+7
| | | | | | | | | This patch defines BTI_C and BTI_J macros conditionally for performance. If HAVE_AARCH64_BTI is true, BTI_C and BTI_J are defined as HINT instruction for ARMv8.5 BTI (Branch Target Identification). If HAVE_AARCH64_BTI is false, both BTI_C and BTI_J are defined as NOP.
* config: Added HAVE_AARCH64_SVE_ASM for aarch64Naohiro Tamura2021-05-263-0/+48
| | | | | This patch checks if assembler supports '-march=armv8.2-a+sve' to generate SVE code or not, and then define HAVE_AARCH64_SVE_ASM macro.
* tst-mallinfo2.c: Use correct multiple for total variableYang Xu2021-05-251-2/+2
| | | | | | | | | Since test uses 160 multiple for malloc size, we should also use 160 multiple for total variable instead of 16, then comparison is meaningful. So fix it. Also change the ">" to ">=" so that the test is technically valid. Reviewed-by: DJ Delorie <dj@redhat.com>
* Linux: Remove remaining references to $(shared-thread-library)Florian Weimer2021-05-254-23/+7
| | | | | | | Since the variable expands to nothing under Linux, it is no longer necessary to clutter the makefiles with it. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* nptl: Do not install libpthread.so and do not link tests with itFlorian Weimer2021-05-252-26/+11
| | | | | | Keep installing libpthread.a, so that -lpthread works. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* testrun.sh: Improve --help messageLucas A. M. Magalhaes2021-05-251-2/+7
| | | | | | | | The testrun.sh --help message was missing the "container" option. Besides just adding the missing option I decide to rewrite it in the same layout as other tools. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* powerpc: Fix handling of scv return error codes [BZ #27892]Nicholas Piggin2021-05-241-2/+3
| | | | | | | | | | | When using scv for templated ASM syscalls, current code interprets any negative return value as error, but the only valid error codes are in the range -4095..-1 according to the ABI. This commit also fixes 'signal.gen.test' strace test, where the issue was first identified. Reviewed-by: Matheus Castanho <msc@linux.ibm.com>
* Properly check stack alignment [BZ #27901]H.J. Lu2021-05-246-165/+61
| | | | | | | | | | | | | | | | | | | | | | 1. Replace if ((((uintptr_t) &_d) & (__alignof (double) - 1)) != 0) which may be optimized out by compiler, with int __attribute__ ((weak, noclone, noinline)) is_aligned (void *p, int align) { return (((uintptr_t) p) & (align - 1)) != 0; } 2. Add TEST_STACK_ALIGN_INIT to TEST_STACK_ALIGN. 3. Add a common TEST_STACK_ALIGN_INIT to check 16-byte stack alignment for both i386 and x86-64. 4. Update powerpc to use TEST_STACK_ALIGN_INIT. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
* x86: Improve memmove-vec-unaligned-erms.SNoah Goldstein2021-05-231-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the condition for copy 4x VEC so that if length is exactly equal to 4 * VEC_SIZE it will use the 4x VEC case instead of 8x VEC case. Results For Skylake memcpy-avx2-erms size, al1 , al2 , Cur T , New T , Win , New / Cur 128 , 0 , 0 , 9.137 , 6.873 , New , 75.22 128 , 7 , 0 , 12.933 , 7.732 , New , 59.79 128 , 0 , 7 , 11.852 , 6.76 , New , 57.04 128 , 7 , 7 , 12.587 , 6.808 , New , 54.09 Results For Icelake memcpy-evex-erms size, al1 , al2 , Cur T , New T , Win , New / Cur 128 , 0 , 0 , 9.963 , 5.416 , New , 54.36 128 , 7 , 0 , 16.467 , 8.061 , New , 48.95 128 , 0 , 7 , 14.388 , 7.644 , New , 53.13 128 , 7 , 7 , 14.546 , 7.642 , New , 52.54 Results For Tigerlake memcpy-evex-erms size, al1 , al2 , Cur T , New T , Win , New / Cur 128 , 0 , 0 , 8.979 , 4.95 , New , 55.13 128 , 7 , 0 , 14.245 , 7.122 , New , 50.0 128 , 0 , 7 , 12.668 , 6.675 , New , 52.69 128 , 7 , 7 , 13.042 , 6.802 , New , 52.15 Results For Skylake memmove-avx2-erms size, al1 , al2 , Cur T , New T , Win , New / Cur 128 , 0 , 32 , 6.181 , 5.691 , New , 92.07 128 , 32 , 0 , 6.165 , 5.752 , New , 93.3 128 , 0 , 7 , 13.923 , 9.37 , New , 67.3 128 , 7 , 0 , 12.049 , 10.182 , New , 84.5 Results For Icelake memmove-evex-erms size, al1 , al2 , Cur T , New T , Win , New / Cur 128 , 0 , 32 , 5.479 , 4.889 , New , 89.23 128 , 32 , 0 , 5.127 , 4.911 , New , 95.79 128 , 0 , 7 , 18.885 , 13.547 , New , 71.73 128 , 7 , 0 , 15.565 , 14.436 , New , 92.75 Results For Tigerlake memmove-evex-erms size, al1 , al2 , Cur T , New T , Win , New / Cur 128 , 0 , 32 , 5.275 , 4.815 , New , 91.28 128 , 32 , 0 , 5.376 , 4.565 , New , 84.91 128 , 0 , 7 , 19.426 , 14.273 , New , 73.47 128 , 7 , 0 , 15.924 , 14.951 , New , 93.89 Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com>
* Bench: Add support for choose direction of memcpy in benchtestsNoah Goldstein2021-05-233-65/+94
| | | | | | | | | | This patch adds support for testing memcpy with both dst > src and dst < src. Since memcpy is implemented as memmove which has seperate control flows for certain sizes depending on dst > src it seems like 1) information that should be provided in the benchtest output and a variable that can be controlled for the benchmarks. Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com>
* Add cast_to_pointer to cast an integer to void * pointerH.J. Lu2021-05-221-0/+3
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* nptl: Remove remaining code from libpthreadFlorian Weimer2021-05-2154-309/+37
| | | | | | | | | Only the placeholder compatibility symbols are left now. The __errno_location symbol was removed (moved) using scripts/move-symbol-to-libc.py. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* nptl: Move pthread_create, thrd_create into libcFlorian Weimer2021-05-2173-104/+233
| | | | | | | | | | | | | | | | | | | The symbols were moved using scripts/move-symbol-to-libc.py. The libpthread placeholder symbols need some changes because some symbol versions have gone away completely. But __errno_location@@GLIBC_2.0 still exists, so the GLIBC_2.0 version is still there. The internal __pthread_create symbol now points to the correct function, so the sysdeps/nptl/thrd_create.c override is no longer necessary. There was an issue how the hidden alias of pthread_getattr_default_np was defined, so this commit cleans up that aspects and removes the GLIBC_PRIVATE export altogether. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* elf: Use custom NODELETE DSO for tst-dlopenfail, tst-dlopenfail-2Florian Weimer2021-05-215-36/+61
| | | | | | | Once libpthread is empty and no longer marked NODELETE, it no longer can be used for testing. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* nptl: Move semi-public __pthread_get_minstack symbol into libcFlorian Weimer2021-05-215-20/+23
| | | | | | | | | No abilist updates here because it is a GLIBC_PRIVATE symbol. It's also necessary to move nptl_version into pthread_create, so that it still ends up in static binaries. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* nptl: Eliminate the __static_tls_size, __static_tls_align_m1 variablesFlorian Weimer2021-05-216-61/+58
| | | | | | | | | | | | | | | | | | | Use the __nptl_tls_static_size_for_stack inline function instead, and the GLRO (dl_tls_static_align) value directly. The computation of GLRO (dl_tls_static_align) in _dl_determine_tlsoffset ensures that the alignment is at least TLS_TCB_ALIGN, which at least STACK_ALIGN (see allocate_stack). Therefore, the additional rounding-up step is removed. ALso move the initialization of the default stack size from __pthread_initialize_minimal_internal to __pthread_early_init. This introduces an extra system call during single-threaded startup, but this simplifies the initialization sequence. No locking is needed around the writes to __default_pthread_attr because the process is single-threaded at this point. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* nptl: Perform signal initialization upon pthread_createFlorian Weimer2021-05-215-88/+131
| | | | | | | | | | | | | Install signal handlers and unblock signals before pthread_create creates the first thread. create_thread in sysdeps/unix/sysv/linux/createthread.c can send SIGCANCEL to the current thread, so the SIGCANCEL handler is currently needed even if pthread_cancel is never called. (The way timer_create uses SIGCANCEL does not need a signal handler; both SIG_DFL and SIG_IGN dispositions should work.) Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* nptl: Remove unused __libc_pthread_init functionFlorian Weimer2021-05-212-36/+0
| | | | | | Fixes commit 732139dabeda7ecce0d56200bc176251e759ccde ("Linux: Move __reclaim_stacks into the fork implementation in libc").
* x86: Improve memset-vec-unaligned-erms.SNoah Goldstein2021-05-201-22/+28
| | | | | | | | | | | | | | | No bug. This commit makes a few small improvements to memset-vec-unaligned-erms.S. The changes are 1) only aligning to 64 instead of 128. Either alignment will perform equally well in a loop and 128 just increases the odds of having to do an extra iteration which can be significant overhead for small values. 2) Align some targets and the loop. 3) Remove an ALU from the alignment process. 4) Reorder the last 4x VEC so that they are stored after the loop. 5) Move the condition for leq 8x VEC to before the alignment process. test-memset and test-wmemset are both passing. Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com> Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
* Hurd: Define ARCH_MIN_GUARD_SIZE in internal <pthread.h>Florian Weimer2021-05-201-0/+3
| | | | | | This macro is always defined on Linux. Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
* elf: Initialize GLRO (dl_minsigstacksize) after static dlopenFlorian Weimer2021-05-201-0/+3
| | | | | | | This is another field of _rtld_global_ro that benefits from initialization in __rtld_static_init. Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
* nptl: Add missing __pthread_cond_wait alias in static buildsFlorian Weimer2021-05-191-0/+3
| | | | | | | Fixes commit cf3fff1c195f859ba949a7ad86d4fca70bd99740 ("nptl: Move cnd_wait into libc"). Reviewed-by: Jonathan Nieder <jrnieder@gmail.com>
* Remove --enable-stackguard-randomization (BZ #27872)Adhemerval Zanella2021-05-193-28/+0
| | | | Last ENABLE_STACKGUARD_RANDOMIZE usage was removed by 4a103975c4.
* s390x: Check HWCAP bits against compiler flagsFlorian Weimer2021-05-191-0/+40
| | | | | | | | | | When compiled with GCC 11.1 and -march=z14 -O3 build flags, running ld.so (or any dynamically linked program) prints: Fatal glibc error: CPU lacks VXE support (z14 or later required) Co-Authored-By: Stefan Liebler <stli@linux.ibm.com> Reviewed-by: Stefan Liebler <stli@linux.ibm.com>
* powerpc64le: Check HWCAP bits against compiler build flagsFlorian Weimer2021-05-191-0/+52
| | | | | | | When built with GCC 11.1 and -mcpu=power9, ld.so prints this error message when running on POWER8: Fatal glibc error: CPU lacks ISA 3.00 support (POWER9 or later required)
* elf: Add hook for checking HWCAP bits after auxiliary vector parsingFlorian Weimer2021-05-192-0/+31
| | | | Reviewed-by: Stefan Liebler <stli@linux.ibm.com>
* x86: Optimize memcmp-evex-movbe.SNoah Goldstein2021-05-181-302/+408
| | | | | | | | | | | | No bug. This commit optimizes memcmp-evex.S. The optimizations include adding a new vec compare path for small sizes, reorganizing the entry control flow, removing some unnecissary ALU instructions from the main loop, and most importantly replacing the heavy use of vpcmp + kand logic with vpxor + vptern. test-memcmp and test-wmemcmp are both passing. Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com> Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
* x86: Optimize memcmp-avx2-movbe.SNoah Goldstein2021-05-183-281/+402
| | | | | | | | | | No bug. This commit optimizes memcmp-avx2.S. The optimizations include adding a new vec compare path for small sizes, reorganizing the entry control flow, and removing some unnecissary ALU instructions from the main loop. test-memcmp and test-wmemcmp are both passing. Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com> Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
* x86: Expand bench-memcmp.c and test-memcmp.cNoah Goldstein2021-05-182-12/+60
| | | | | | | | | | | No bug. This commit adds some additional performance test cases to bench-memcmp.c and test-memcmp.c. The new benchtests include some medium range sizes, as well as small sizes near page cross. The new correctness tests correspond with the new benchtests though add some additional cases for checking the page cross logic. Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com> Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
* linux: Fix clock_getres fallbackAdhemerval Zanella2021-05-181-1/+1
| | | | | | | | The tst-timespec_getres (e5ac7bd679de5) triggers an issue on 32-bit architecture on Linux older than 5.1, where the fallback syscall is used. Checked on powerpc-linux-gnu.
* Do not declare asctime_r and ctime_r for C2XJoseph Myers2021-05-181-2/+2
| | | | | | | | | | | | | | | | | ISO C2X added the asctime_r, ctime_r, gmtime_r and localtime_r functions from POSIX. It's now removed asctime_r and ctime_r again, reflecting that they are marked obsolescent in POSIX; update glibc's time.h accordingly. The same change that removed those two functions from C2X also marked asctime and ctime as deprecated (reflecting how POSIX shows them as obsolescent), i.e. using the [[deprecated]] attribute in the prototypes shown in C2X. It's less clear if we should explicitly deprecate those functions like that in the glibc headers; this patch does nothing regarding such a deprecation (there's no normative requirement from C2X showing the functions as deprecated). Tested for x86_64 and x86.
* htl: Add __libpthread_freeresSamuel Thibault2021-05-182-1/+25
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* hurd: Add execveatSamuel Thibault2021-05-184-43/+123
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* Fix stringop-overflow warning in bug-regex19.c.Stefan Liebler2021-05-181-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting with commit 26492c0a14966c32c43cd6ca1d0dca5e62c6cfef "Annotate additional APIs with GCC attribute access.", gcc emits this warning on s390x: In function 'do_one_test', inlined from 'do_mb_tests' at bug-regex19.c:385:11: bug-regex19.c:271:9: error: 're_search' specified size 18446744073709551615 exceeds maximum object size 9223372036854775807 [-Werror=stringop-overflow=] 271 | res = re_search (&regbuf, test->string, strlen (test->string), | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 272 | test->start, strlen (test->string) - test->start, NULL); | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ In file included from ../include/regex.h:2, from bug-regex19.c:22: bug-regex19.c: In function 'do_mb_tests': ../posix/regex.h:554:17: note: in a call to function 're_search' declared with attribute 'read_only (2, 3)' 554 | extern regoff_t re_search (struct re_pattern_buffer *__buffer, | ^~~~~~~~~ ... The function do_one_test is inlined into do_mb_tests on s390x (at least with gcc 10). If do_one_test is marked with __attribute__ ((noinline)), there are no warnings on s390x. If do_one_test is marked with __attribute__ ((always_inline)), there are the same warnings on x86_64. test->string points to a variable length array on stack of do_mb_tests and the content is generated based on the passed test struct. According to Martin Sebor, this is a false positive caused by the same bug as the one in nss/makedb.c. It's fixed in GCC 11 and will also be available in the next GCC 10.4 release.
* localedata: Use U+00AF MACRON in more EBCDIC charsets [BZ #27882]Florian Weimer2021-05-1812-12/+12
| | | | | | | | | | This updates IBM256, IBM277, IBM278, IBM280, IBM284, IBM297, IBM424 in the same way that IBM273 was updated for bug 23290. IBM256 and IBM424 still have holes after this change, so HAS_HOLES is not updated. Reviewed-by: Siddhesh Poyarekar <siddhesh@sourceware.org>
* ldconfig: Avoid boolean coercion of opt_chrootSiddhesh Poyarekar2021-05-181-17/+17
| | | | Generated code is unchanged.
* ldconfig: Fix memory leaksSiddhesh Poyarekar2021-05-181-6/+14
| | | | | | | Coverity discovered that paths allocated by chroot_canon are not freed in a couple of routines in ldconfig. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* charmap_conversion: Free conversion table on exitSiddhesh Poyarekar2021-05-181-0/+7
| | | | | | The conversion table is allocated using xcalloc but never freed. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* elf/cache.c: Fix resource leaks identified by static analyzersSiddhesh Poyarekar2021-05-181-4/+12
| | | | | | | | | | A coverity run identified a number of resource leaks in cache.c. There are a couple of simple memory leaks where a local allocation is not freed before function return. Then there is a mmap leak and a file descriptor leak where a map is not unmapped in the error case and a file descriptor remains open respectively. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* show_archive_content: Fix trivial memory leakSiddhesh Poyarekar2021-05-181-0/+1
| | | | | | | | Fix trivial leak identified by coverity. The program runs to exit and the leak doesn't grow, but it's just cleaner to free the allocated memory. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* Add C2X timespec_getresJoseph Myers2021-05-1744-2/+189
| | | | | | | | | | | | | | | | | | | ISO C2X adds a timespec_getres function alongside the C11 timespec_get, with functionality similar to that of POSIX clock_getres (including allowing a NULL pointer to be passed to the function). Implement this function for glibc, similarly to the implementation of timespec_get. This includes a basic test like that of timespec_get, but no documentation in the manual, given that TIME_UTC and timespec_get aren't documented in the manual at all. The handling of 64-bit time follows that in timespec_get; people maintaining patch series for 64-bit time will need to update them accordingly (to export __timespec_getres64, redirect calls in time.h and run the test for _TIME_BITS=64). Tested for x86_64 and x86, and (previous version; only testcase differs) with build-many-glibcs.py.
* Missing ENOMEM in realloc_check wrapper (bug 27870)Andreas Schwab2021-05-172-2/+5
| | | | | | When MALLOC_CHECK_ is non-zero, the realloc hook missed to set errno to ENOMEM when called with too big size. Run the test tst-malloc-too-large also with MALLOC_CHECK_=3 to catch that.
* benchtests: Use JSON for bench-rawmemchr outputMatheus Castanho2021-05-171-15/+39
| | | | | | | | Convert the output of benchtests/bench-rawmemchr to JSON like other string benchmarks. This makes the output more parseable and allows usage of compare_strings.py, for example. Reviewed-by: Lucas A. M. Magalhaes <lamm@linux.ibm.com>
* powerpc: Add optimized rawmemchr for POWER10Matheus Castanho2021-05-176-27/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reuse code for optimized strlen to implement a faster version of rawmemchr. This takes advantage of the same benefits provided by the strlen implementation, but needs some extra steps. __strlen_power10 code should be unchanged after this change. rawmemchr returns a pointer to the char found, while strlen returns only the length, so we have to take that into account when preparing the return value. To quickly check 64B, the loop on __strlen_power10 merges the whole block into 16B by using unsigned minimum vector operations (vminub) and checks if there are any \0 on the resulting vector. The same code is used by rawmemchr if the char c is 0. However, this approach does not work when c != 0. We first need to subtract each byte by c, so that the value we are looking for is converted to a 0, then taking the minimum and checking for nulls works again. The new code branches after it has compared ~256 bytes and chooses which of the two strategies above will be used in the main loop, based on the char c. This extra branch adds some overhead (~5%) for length ~256, but is quickly amortized by the faster loop for larger sizes. Compared to __rawmemchr_power9, this version is ~20% faster for length < 256. Because of the optimized main loop, the improvement becomes ~35% for c != 0 and ~50% for c = 0 for strings longer than 256. Reviewed-by: Lucas A. M. Magalhaes <lamm@linux.ibm.com> Reviewed-by: Raphael M Zinsly <rzinsly@linux.ibm.com>