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* Linux: optimize clone3 internal usage azanella/posix_spawn-clone3Adhemerval Zanella2022-11-293-1/+37
| | | | | | | | | | | | Now that clone3 is used on more architectures, add an optimization to avoid calling when glibc detects that it is no supported by the kernel. It also adds __ASSUME_CLONE3, which allows skip this optimization and issue clone3 syscall directly. It does not handle the the small window between 5.3 and 5.5 for posix_spawn (CLONE_CLEAR_SIGHAND was added in 5.5). Checked on x86_64-linux-gnu.
* mips: Add the clone3 wrapperAdhemerval Zanella2022-11-292-0/+141
| | | | | | | | | It follows the internal signature: extern int clone3 (struct clone_args *__cl_args, size_t __size, int (*__func) (void *__arg), void *__arg); Checked on mips64el-linux-gnueabihf and mipsel-linux-gnu.
* arm: Add the clone3 wrapperAdhemerval Zanella2022-11-292-0/+81
| | | | | | | | | It follows the internal signature: extern int clone3 (struct clone_args *__cl_args, size_t __size, int (*__func) (void *__arg), void *__arg); Checked on arm-linux-gnueabihf.
* riscv: Add the clone3 wrapperAdhemerval Zanella2022-11-292-0/+81
| | | | | | | | | It follows the internal signature: extern int clone3 (struct clone_args *__cl_args, size_t __size, int (*__func) (void *__arg), void *__arg); Checked on riscv64-linux-gnu-rv64imafdc-lp64d.
* s390x: Add the clone3 wrapperAdhemerval Zanella2022-11-292-0/+82
| | | | | | | | | It follows the internal signature: extern int clone3 (struct clone_args *__cl_args, size_t __size, int (*__func) (void *__arg), void *__arg); Checked on s390x-linux-gnu.
* aarch64: Add the clone3 wrapperAdhemerval Zanella2022-11-292-0/+87
| | | | | | | | | It follow the internal signature: extern int clone3 (struct clone_args *__cl_args, size_t __size, int (*__func) (void *__arg), void *__arg); Checked on aarch64-linux-gnu.
* powerpc64: Add the clone3 wrapperAdhemerval Zanella2022-11-292-0/+158
| | | | | | | | | | | | | | | It follows the internal signature: extern int clone3 (struct clone_args *__cl_args, size_t __size, int (*__func) (void *__arg), void *__arg); The powerpc64 ABI requires an initial stackframe so the child can store/restore the TOC. It is create prior calling clone3 by adjusting the stack size (since kernel will compute the stack as stack plus size). Checked on powerpc64-linux-gnu (power8, kernel 6.0) and powerpc64le-linux-gnu (power9, kernel 4.18).
* linux: Add clone3 CLONE_CLEAR_SIGHAND optimization to posix_spawnAdhemerval Zanella2022-11-297-27/+238
| | | | | | | | | | | | | | | | | The clone3 flag resets all signal handlers of the child not set to SIG_IGN to SIG_DFL. It allows to skip most of the sigaction calls to setup child signal handling, where previously a posix_spawn has to issue 2 times NSIG sigaction calls (one to obtain the current disposition and another to set either SIG_DFL or SIG_IGN). The expection is POSIX_SPAWN_SETSIGDEF the child still setup the signal for the case the disposition is SIG_IGN. It also need to handle the fallback where clone3 is not available, to set the fallback in child. This is done by splitting of __clone_internal_fallback from __clone_internal. Checked on x86_64-linux-gnu.
* Linux: Do not align the stack for __clone3Adhemerval Zanella2022-11-293-77/+5
| | | | | | | | | | | | | | Adjusting the stack on child thread is not async-signal safe, since kernel does not enforce stack alignmnet. Although, all the internal usage of __clone_internal are done with all signal masked, removing stack alignment of __clone3 is still a net gain: is simplifies the function contract detail (mask/unmarsk signals) and simplifies the arch-specific code. The internal users are responsible for correct stack alignment. If glibc ever exports a clone3 wrapper, it should adjust stack alignment. Checked on x86_64-linux-gnu.
* linux: Extend internal clone3 documentationAdhemerval Zanella2022-11-292-14/+20
| | | | | | | | | | | Different than kernel, clone3 returns EINVAL for NULL struct clone_args or function pointer. This is similar to clone interface that return EINVAL for NULL function argument. It also clean up the Linux clone3.h interface, since it not currently exported. Checked on x86_64-linux-gnu.
* linux: Do not reset signal handler in posix_spawn if it is already SIG_DFLAdhemerval Zanella2022-11-291-1/+1
| | | | | | | There is no need to issue another sigaction is the disposition is already SIG_DFL. Checked on x86_64-linux-gnu.
* LoongArch: Add support for ilogb[f]Xiaolin Tang2022-11-292-0/+78
| | | | Add inline assembler for the ilogb functions. Passes GLIBC regression.
* LoongArch: Add support for scalb[f]Xiaolin Tang2022-11-292-0/+120
| | | | Add inline assembler for the scalb functions. Passes GLIBC regression.
* LoongArch: Add support for scalbn[f]Xiaolin Tang2022-11-292-0/+58
| | | | | | | | Add inline assembler for the scalbn functions. Passes GLIBC regression. GCC 13, LoongArch support ___builtin_scalbn{,f} with -fno-math-errno, but only "libm" can use -fno-math-errno in GLIBC, and scalbn is in libc instead of libm because __printf_fp calls it.
* LoongArch: Use __builtin_logb{,f} with GCC >= 13Xiaolin Tang2022-11-291-0/+10
| | | | | | | | GCC 13 compiles these built-ins instead of generic implementation for function logb. Link: https://gcc.gnu.org/r13-3922 Co-Authored-By: Xi Ruoyao <xry111@xry111.site>
* Use GCC builtins for logb functions if desired.Xiaolin Tang2022-11-296-0/+23
| | | | | | | | This patch is using the corresponding GCC builtin for logbf, logb, logbl and logbf128 if the USE_FUNCTION_BUILTIN macros are defined to one in math-use-builtins-function.h. Co-Authored-By: Xi Ruoyao <xry111@xry111.site>
* LoongArch: Use __builtin_llrint{,f} with GCC >= 13Xiaolin Tang2022-11-291-0/+10
| | | | | | | | GCC 13 compiles these built-ins instead of generic implementation for function llrint. Link: https://gcc.gnu.org/r13-3920 Co-Authored-By: Xi Ruoyao <xry111@xry111.site>
* Use GCC builtins for llrint functions if desired.Xiaolin Tang2022-11-296-17/+43
| | | | | | | | This patch is using the corresponding GCC builtin for llrintf, llrint, llrintl and llrintf128 if the USE_FUNCTION_BUILTIN macros are defined to one in math-use-builtins-function.h. Co-Authored-By: Xi Ruoyao <xry111@xry111.site>
* LoongArch: Use __builtin_lrint{,f} with GCC >= 13Xiaolin Tang2022-11-291-0/+10
| | | | | | | | GCC 13 compiles these built-ins instead of generic implementation for function lrint. Link: https://gcc.gnu.org/r13-3920 Co-Authored-By: Xi Ruoyao <xry111@xry111.site>
* Use GCC builtins for lrint functions if desired.Xiaolin Tang2022-11-296-17/+43
| | | | | | | | This patch is using the corresponding GCC builtin for lrintf, lrint, lrintl and lrintf128 if the USE_FUNCTION_BUILTIN macros are defined to one in math-use-builtins-function.h. Co-Authored-By: Xi Ruoyao <xry111@xry111.site>
* LoongArch: Use __builtin_rint{,f} with GCC >= 13Xi Ruoyao2022-11-291-0/+9
| | | | | | GCC 13 compiles these built-ins to frint.{d,s} instruction. Link: https://gcc.gnu.org/r13-3919
* x86/fpu: Factor out shared avx2/avx512 code in svml_{s|d}_wrapper_impl.hNoah Goldstein2022-11-273-342/+192
| | | | | | | Code is exactly the same for the two so better to only maintain one version. All math and mathvec tests pass on x86.
* x86/fpu: Cleanup code in svml_{s|d}_wrapper_impl.hNoah Goldstein2022-11-272-242/+172
| | | | | | | 1. Remove unnecessary spills. 2. Fix some small nit missed optimizations. All math and mathvec tests pass on x86.
* x86/fpu: Reformat svml_{s|d}_wrapper_impl.hNoah Goldstein2022-11-272-510/+510
| | | | | Just reformat with the style convention used in other x86 assembler files. This doesn't change libm.so or libmvec.so.
* x86/fpu: Fix misspelled evex512 section in variety of svml filesNoah Goldstein2022-11-2721-21/+21
| | | | | | | | | | | | ``` .section .text.evex512, "ax", @progbits ``` With misspelled as: ``` .section .text.exex512, "ax", @progbits ```
* x86/fpu: Add missing ISA sections to variety of svml filesNoah Goldstein2022-11-27198-198/+198
| | | | Many sse4/avx2/avx512 files where just in .text.
* stdio-common: Add missing dependencies (bug 29780)Andreas Schwab2022-11-211-2/+4
| | | | | Handle all object suffixes for dependencies of errlist-data and siglist objects.
* i386: Avoid rely on linker optimization to avoid relocationAdhemerval Zanella Netto2022-11-211-4/+9
| | | | | | | | | | | | | | lld does not implement all the linker optimization to avoid the GOT relocation as done by binutils (bfd/elf32-i386.c:elf_i386_convert_load_reloc). The current 'movl main@GOT(%ebx), %eax' will then create a GOT relocation when building with lld, which make static-pie status to not being able to start the provided main function. The change uses a __wrap_main local symbol, which in turn calls main (similar as used by aarch64 and s390x). Checked on i686-linux-gnu with binutils and lld. Reviewed-by: Fangrui Song <maskray@google.com>
* elf: Fix rtld-audit trampoline for aarch64Vladislav Khmelevsky2022-11-211-3/+1
| | | | | | | | | | | | | | | This patch fixes two problems with audit: 1. The DL_OFFSET_RV_VPCS offset was mixed up with DL_OFFSET_RG_VPCS, resulting in x2 register value nulling in RG structure. 2. We need to preserve the x8 register before function call, but don't have to save it's new value and restore it before return. Anyway the final restore was using OFFSET_RV instead of OFFSET_RG value which is wrong (althoug doesn't affect anything). Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* Define in_int32_t_range to check if the 64 bit time_t syscall should be usedYunQiang Su2022-11-1718-23/+31
| | | | | | | | | | | | | | | | | Currently glibc uses in_time_t_range to detects time_t overflow, and if it occurs fallbacks to 64 bit syscall version. The function name is confusing because internally time_t might be either 32 bits or 64 bits (depending on __TIMESIZE). This patch refactors the in_time_t_range by replacing it with in_int32_t_range for the case to check if the 64 bit time_t syscall should be used. The in_time_t range is used to detect overflow of the syscall return value. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* elf/tst-tlsopt-powerpc fails when compiled with -mcpu=power10 (BZ# 29776)Alan Modra2022-11-141-1/+5
| | | | | Supports pcrel addressing of TLS GOT entry. Also tweak the non-pcrel asm constraint to better reflect how the reg is used.
* LoongArch: Hard Float Support for fmaximum_mag_num{f/ }, fminimum_mag_num{f/ }.Xiaolin Tang2022-11-144-0/+192
| | | | | | | | | | Use hardware Floating-point instruction f{maxa/mina}.{s/d}, fclass.{s/d} to implement fmaximum_mag_num{f/ }, fminimum_mag_num{f/ }. * sysdeps/loongarch/fpu/s_fmaximum_mag_num.c: New file. * sysdeps/loongarch/fpu/s_fmaximum_mag_numf.c: Likewise. * sysdeps/loongarch/fpu/s_fminimum_mag_num.c: Likewise. * sysdeps/loongarch/fpu/s_fminimum_mag_numf.c: Likewise.
* LoongArch: Hard Float Support for fmaximum_mag{f/ }, fminimum_mag{f/ }.Xiaolin Tang2022-11-144-0/+160
| | | | | | | | | | Use hardware Floating-point instruction f{maxa/mina}.{s/d}, fclass.{s/d} to implement fmaximum_mag{f/ }, fminimum_mag{f/ }. * sysdeps/loongarch/fpu/s_fmaximum_mag.c: New file. * sysdeps/loongarch/fpu/s_fmaximum_magf.c: Likewise. * sysdeps/loongarch/fpu/s_fminimum_mag.c: Likewise. * sysdeps/loongarch/fpu/s_fminimum_magf.c: Likewise.
* LoongArch: Hard Float Support for fmaxmag{f/ }, fminmag{f/ }.Xiaolin Tang2022-11-144-0/+116
| | | | | | | | | | Use hardware Floating-point instruction f{maxa/mina}.{s/d}, to implement fmaxmag{f/ }, fminmag{f/ }. * sysdeps/loongarch/fpu/s_fmaxmag.c: New file. * sysdeps/loongarch/fpu/s_fmaxmagf.c: Likewise. * sysdeps/loongarch/fpu/s_fminmag.c: Likewise. * sysdeps/loongarch/fpu/s_fminmagf.c: Likewise.
* LoongArch: Hard Float Support for fmaximum_num{f/ }, fminimum_num{f/ }.Xiaolin Tang2022-11-144-0/+193
| | | | | | | | | | Use hardware Floating-point instruction f{max/min}.{s/d}, fclass.{s/d} to implement fmaximum_num{f/ }, fminimum_num{f/ }. * sysdeps/loongarch/fpu/s_fmaximum_num.c: New file. * sysdeps/loongarch/fpu/s_fmaximum_numf.c: Likewise. * sysdeps/loongarch/fpu/s_fminimum_num.c: Likewise. * sysdeps/loongarch/fpu/s_fminimum_numf.c: Likewise.
* LoongArch: Hard Float Support for fmaximum{f/ }, fminimum{f/ }.Xiaolin Tang2022-11-144-0/+160
| | | | | | | | | | Use hardware Floating-point instruction f{max/min}.{s/d}, fclass.{s/d} to implement fmaximum{f/ }, fminimum{f/ }. * sysdeps/loongarch/fpu/s_fmaximum.c: New file. * sysdeps/loongarch/fpu/s_fmaximumf.c: Likewise. * sysdeps/loongarch/fpu/s_fminimum.c: Likewise. * sysdeps/loongarch/fpu/s_fminimumf.c: Likewise.
* LoongArch: Hard Float Support for float-point classification functions.Xiaolin Tang2022-11-1411-0/+333
| | | | | | | | | | | | | | | | | | Use hardware Floating-point instruction fclass.{s/d} to implement classification functions, i.e finite{f/ }, fpclassify{f/ }, isnan{f/ }, isinf{f/ }, issignaling{f/ }. * sysdeps/loongarch/fpu/s_finite.c: New file. * sysdeps/loongarch/fpu/s_finitef.c: Likewise. * sysdeps/loongarch/fpu/s_fpclassify.c: Likewise. * sysdeps/loongarch/fpu/s_fpclassifyf.c: Likewise. * sysdeps/loongarch/fpu/s_isinf.c: Likewise. * sysdeps/loongarch/fpu/s_isinff.c: Likewise. * sysdeps/loongarch/fpu/s_isnan.c: Likewise. * sysdeps/loongarch/fpu/s_isnanf.c: Likewise. * sysdeps/loongarch/fpu/s_issignaling.c: Likewise. * sysdeps/loongarch/fpu/s_issignalingf.c: Likewise. * sysdeps/loongarch/fpu_control.h: Add _FCLASS_* macro.
* LoongArch: Use __builtin_{fma, fmaf} to implement function {fma, fmaf}.Xiaolin Tang2022-11-141-0/+4
| | | | | | | Use __builtin_{fma, fmaf} to implement function {fma, fmaf} instead of the generic implementation. * sysdeps/loongarch/fpu/math-use-builtins-fma.h: New file.
* Linux: Support __IPC_64 in sysvctl *ctl command arguments (bug 29771)Florian Weimer2022-11-104-26/+63
| | | | | | | | | | | | | | | | | Old applications pass __IPC_64 as part of the command argument because old glibc did not check for unknown commands, and passed through the arguments directly to the kernel, without adding __IPC_64. Applications need to continue doing that for old glibc compatibility, so this commit enables this approach in current glibc. For msgctl and shmctl, if no translation is required, make direct system calls, as we did before the time64 changes. If translation is required, mask __IPC_64 from the command argument. For semctl, the union-in-vararg argument handling means that translation is needed on all architectures. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
* riscv: Get level 3 cache's informationZong Li2022-11-091-0/+6
| | | | | | | | | RISC-V architecture extends the cache information for level 3 cache in AUX vector in Linux v.6.1-rc1. This patch supports sysconf to get the level 3 cache information. Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
* debug: Fix typo in tests-unsupported ruleAdhemerval Zanella2022-11-091-1/+1
| | | | From commit 2e274cd8c1ebd0bd0c43a7f2e5433685740938ca.
* iconvdata/tst-table-charmap.sh: remove handling of old, borrowed formatнаб2022-11-093-12/+3
| | | | | | | | | | | This "Old POSIX/DKUUG borrowed format" handling is original to the file and doesn't seem to have ever been used, i.e. id/t-t-c doesn't seem to have ever been called with argv[1] == POSIX. Upcoming is a POSIX charmap, which would inadvertently trigger this. Signed-off-by: Ahelenia Ziemiańska <nabijaczleweli@nabijaczleweli.xyz> Reviewed-by: Florian Weimer <fweimer@redhat.com>
* Makerules: Generate shlib.lds with -fuse-ld=bfdFangrui Song2022-11-081-1/+3
| | | | | | | | | | | | | lld does not dump a linker script with --verbose (it does not use a linker script driven design and lots of linker processing is not serializable as a linker script anyway). With the default --with-default-link=no build, $@T is empty and makes `test -s $@T` fail. Just dump the linker script with -fuse-ld=bfd. lld since 15 (https://reviews.llvm.org/D124656) supports custom RELRO sections in the GNU ld dumped linker script. Reviewed-by: Sam James <sam@gentoo.org>
* x86: Add avx2 optimized functions for the wchar_t strcpy familyNoah Goldstein2022-11-0827-18/+115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implemented: wcscat-avx2 (+ 744 bytes wcscpy-avx2 (+ 539 bytes) wcpcpy-avx2 (+ 577 bytes) wcsncpy-avx2 (+1108 bytes) wcpncpy-avx2 (+1214 bytes) wcsncat-avx2 (+1085 bytes) Performance Changes: Times are from N = 10 runs of the benchmark suite and are reported as geometric mean of all ratios of New Implementation / Best Old Implementation. Best Old Implementation was determined with the highest ISA implementation. wcscat-avx2 -> 0.975 wcscpy-avx2 -> 0.591 wcpcpy-avx2 -> 0.698 wcsncpy-avx2 -> 0.730 wcpncpy-avx2 -> 0.711 wcsncat-avx2 -> 0.954 Code Size Changes: This change increase the size of libc.so by ~5.5kb bytes. For reference the patch optimizing the normal strcpy family functions decreases libc.so by ~5.2kb. Full check passes on x86-64 and build succeeds for all ISA levels w/ and w/o multiarch.
* x86: Add evex optimized functions for the wchar_t strcpy familyNoah Goldstein2022-11-0833-7/+858
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implemented: wcscat-evex (+ 905 bytes) wcscpy-evex (+ 674 bytes) wcpcpy-evex (+ 709 bytes) wcsncpy-evex (+1358 bytes) wcpncpy-evex (+1467 bytes) wcsncat-evex (+1213 bytes) Performance Changes: Times are from N = 10 runs of the benchmark suite and are reported as geometric mean of all ratios of New Implementation / Best Old Implementation. Best Old Implementation was determined with the highest ISA implementation. wcscat-evex -> 0.991 wcscpy-evex -> 0.587 wcpcpy-evex -> 0.695 wcsncpy-evex -> 0.719 wcpncpy-evex -> 0.694 wcsncat-evex -> 0.979 Code Size Changes: This change increase the size of libc.so by ~6.3kb bytes. For reference the patch optimizing the normal strcpy family functions decreases libc.so by ~5.7kb. Full check passes on x86-64 and build succeeds for all ISA levels w/ and w/o multiarch.
* x86: Optimize and shrink st{r|p}{n}{cat|cpy}-avx2 functionsNoah Goldstein2022-11-0813-1234/+1594
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimizations are: 1. Use more overlapping stores to avoid branches. 2. Reduce how unrolled the aligning copies are (this is more of a code-size save, its a negative for some sizes in terms of perf). 3. For st{r|p}n{cat|cpy} re-order the branches to minimize the number that are taken. Performance Changes: Times are from N = 10 runs of the benchmark suite and are reported as geometric mean of all ratios of New Implementation / Old Implementation. strcat-avx2 -> 0.998 strcpy-avx2 -> 0.937 stpcpy-avx2 -> 0.971 strncpy-avx2 -> 0.793 stpncpy-avx2 -> 0.775 strncat-avx2 -> 0.962 Code Size Changes: function -> Bytes New / Bytes Old -> Ratio strcat-avx2 -> 685 / 1639 -> 0.418 strcpy-avx2 -> 560 / 903 -> 0.620 stpcpy-avx2 -> 592 / 939 -> 0.630 strncpy-avx2 -> 1176 / 2390 -> 0.492 stpncpy-avx2 -> 1268 / 2438 -> 0.520 strncat-avx2 -> 1042 / 2563 -> 0.407 Notes: 1. Because of the significant difference between the implementations they are split into three files. strcpy-avx2.S -> strcpy, stpcpy, strcat strncpy-avx2.S -> strncpy strncat-avx2.S > strncat I couldn't find a way to merge them without making the ifdefs incredibly difficult to follow. Full check passes on x86-64 and build succeeds for all ISA levels w/ and w/o multiarch.
* x86: Optimize and shrink st{r|p}{n}{cat|cpy}-evex functionsNoah Goldstein2022-11-087-1173/+2115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimizations are: 1. Use more overlapping stores to avoid branches. 2. Reduce how unrolled the aligning copies are (this is more of a code-size save, its a negative for some sizes in terms of perf). 3. Improve the loop a bit (similiar to what we do in strlen with 2x vpminu + kortest instead of 3x vpminu + kmov + test). 4. For st{r|p}n{cat|cpy} re-order the branches to minimize the number that are taken. Performance Changes: Times are from N = 10 runs of the benchmark suite and are reported as geometric mean of all ratios of New Implementation / Old Implementation. stpcpy-evex -> 0.922 strcat-evex -> 0.985 strcpy-evex -> 0.880 strncpy-evex -> 0.831 stpncpy-evex -> 0.780 strncat-evex -> 0.958 Code Size Changes: function -> Bytes New / Bytes Old -> Ratio strcat-evex -> 819 / 1874 -> 0.437 strcpy-evex -> 700 / 1074 -> 0.652 stpcpy-evex -> 735 / 1094 -> 0.672 strncpy-evex -> 1397 / 2611 -> 0.535 stpncpy-evex -> 1489 / 2691 -> 0.553 strncat-evex -> 1184 / 2832 -> 0.418 Notes: 1. Because of the significant difference between the implementations they are split into three files. strcpy-evex.S -> strcpy, stpcpy, strcat strncpy-evex.S -> strncpy strncat-evex.S > strncat I couldn't find a way to merge them without making the ifdefs incredibly difficult to follow. 2. All implementations can be made evex512 by including "x86-evex512-vecs.h" at the top. 3. All implementations have an optional define: `USE_EVEX_MASKED_STORE` Setting to one uses evex-masked stores for handling short strings. This saves code size and branches. It's disabled for all implementations are the moment as there are some serious drawbacks to masked stores in certain cases, but that may be fixed on future architectures. Full check passes on x86-64 and build succeeds for all ISA levels w/ and w/o multiarch.
* benchtests: Make str{n}{cat|cpy} benchmarks output jsonNoah Goldstein2022-11-084-115/+297
| | | | | Json output is easier to parse and most other benchmarks already do the same.
* x86: Use VMM API in memcmpeq-evex.S and minor changesNoah Goldstein2022-11-081-100/+155
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes to generated code are: 1. In a few places use `vpcmpeqb` instead of `vpcmpneq` to save a byte of code size. 2. Add a branch for length <= (VEC_SIZE * 6) as opposed to doing the entire block of [VEC_SIZE * 4 + 1, VEC_SIZE * 8] in a single basic-block (the space to add the extra branch without changing code size is bought with the above change). Change (2) has roughly a 20-25% speedup for sizes in [VEC_SIZE * 4 + 1, VEC_SIZE * 6] and negligible to no-cost for [VEC_SIZE * 6 + 1, VEC_SIZE * 8] From N=10 runs on Tigerlake: align1,align2 ,length ,result ,New Time ,Cur Time ,New Time / Old Time 0 ,0 ,129 ,0 ,5.404 ,6.887 ,0.785 0 ,0 ,129 ,1 ,5.308 ,6.826 ,0.778 0 ,0 ,129 ,18446744073709551615 ,5.359 ,6.823 ,0.785 0 ,0 ,161 ,0 ,5.284 ,6.827 ,0.774 0 ,0 ,161 ,1 ,5.317 ,6.745 ,0.788 0 ,0 ,161 ,18446744073709551615 ,5.406 ,6.778 ,0.798 0 ,0 ,193 ,0 ,6.804 ,6.802 ,1.000 0 ,0 ,193 ,1 ,6.950 ,6.754 ,1.029 0 ,0 ,193 ,18446744073709551615 ,6.792 ,6.719 ,1.011 0 ,0 ,225 ,0 ,6.625 ,6.699 ,0.989 0 ,0 ,225 ,1 ,6.776 ,6.735 ,1.003 0 ,0 ,225 ,18446744073709551615 ,6.758 ,6.738 ,0.992 0 ,0 ,256 ,0 ,5.402 ,5.462 ,0.989 0 ,0 ,256 ,1 ,5.364 ,5.483 ,0.978 0 ,0 ,256 ,18446744073709551615 ,5.341 ,5.539 ,0.964 Rewriting with VMM API allows for memcmpeq-evex to be used with evex512 by including "x86-evex512-vecs.h" at the top. Complete check passes on x86-64.
* x86: Use VMM API in memcmp-evex-movbe.S and minor changesNoah Goldstein2022-11-081-133/+175
| | | | | | | | | | The only change to the existing generated code is `tzcnt` -> `bsf` to save a byte of code size here and there. Rewriting with VMM API allows for memcmp-evex-movbe to be used with evex512 by including "x86-evex512-vecs.h" at the top. Complete check passes on x86-64.