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-rw-r--r--sysdeps/arm/Implies4
-rw-r--r--sysdeps/arm/Makefile34
-rw-r--r--sysdeps/arm/Versions20
-rw-r--r--sysdeps/arm/__longjmp.S140
-rw-r--r--sysdeps/arm/abi-note.S9
-rw-r--r--sysdeps/arm/add_n.S99
-rw-r--r--sysdeps/arm/addmul_1.S73
-rw-r--r--sysdeps/arm/aeabi_assert.c26
-rw-r--r--sysdeps/arm/aeabi_atexit.c27
-rw-r--r--sysdeps/arm/aeabi_errno_addr.c24
-rw-r--r--sysdeps/arm/aeabi_lcsts.c98
-rw-r--r--sysdeps/arm/aeabi_localeconv.c24
-rw-r--r--sysdeps/arm/aeabi_math.c41
-rw-r--r--sysdeps/arm/aeabi_mb_cur_max.c27
-rw-r--r--sysdeps/arm/aeabi_memclr.c30
-rw-r--r--sysdeps/arm/aeabi_memcpy.c31
-rw-r--r--sysdeps/arm/aeabi_memmove.c31
-rw-r--r--sysdeps/arm/aeabi_memset.c30
-rw-r--r--sysdeps/arm/aeabi_sighandlers.S53
-rw-r--r--sysdeps/arm/aeabi_unwind_cpp_pr1.c51
-rw-r--r--sysdeps/arm/arm-features.h59
-rw-r--r--sysdeps/arm/arm-mcount.S129
-rw-r--r--sysdeps/arm/armv6/rawmemchr.S109
-rw-r--r--sysdeps/arm/armv6/stpcpy.S1
-rw-r--r--sysdeps/arm/armv6/strchr.S147
-rw-r--r--sysdeps/arm/armv6/strcpy.S231
-rw-r--r--sysdeps/arm/armv6/strlen.S103
-rw-r--r--sysdeps/arm/armv6/strrchr.S131
-rw-r--r--sysdeps/arm/armv6t2/Implies2
-rw-r--r--sysdeps/arm/armv6t2/ffs.S36
-rw-r--r--sysdeps/arm/armv6t2/ffsll.S50
-rw-r--r--sysdeps/arm/armv6t2/memchr.S187
-rw-r--r--sysdeps/arm/armv6t2/strlen.S169
-rw-r--r--sysdeps/arm/armv7/Implies2
-rw-r--r--sysdeps/arm/armv7/configure72
-rw-r--r--sysdeps/arm/armv7/configure.ac12
-rw-r--r--sysdeps/arm/armv7/multiarch/Makefile3
-rw-r--r--sysdeps/arm/armv7/multiarch/aeabi_memcpy.c2
-rw-r--r--sysdeps/arm/armv7/multiarch/ifunc-impl-list.c56
-rw-r--r--sysdeps/arm/armv7/multiarch/memcpy.S76
-rw-r--r--sysdeps/arm/armv7/multiarch/memcpy_impl.S917
-rw-r--r--sysdeps/arm/armv7/multiarch/memcpy_neon.S9
-rw-r--r--sysdeps/arm/armv7/multiarch/memcpy_vfp.S7
-rw-r--r--sysdeps/arm/backtrace.c125
-rw-r--r--sysdeps/arm/bits/atomic.h159
-rw-r--r--sysdeps/arm/bits/endian.h10
-rw-r--r--sysdeps/arm/bits/fenv.h82
-rw-r--r--sysdeps/arm/bits/link.h65
-rw-r--r--sysdeps/arm/bits/linkmap.h5
-rw-r--r--sysdeps/arm/bits/mathdef.h55
-rw-r--r--sysdeps/arm/bits/setjmp.h37
-rw-r--r--sysdeps/arm/bsd-_setjmp.S29
-rw-r--r--sysdeps/arm/bsd-setjmp.S28
-rw-r--r--sysdeps/arm/configure205
-rw-r--r--sysdeps/arm/configure.ac46
-rw-r--r--sysdeps/arm/crti.S95
-rw-r--r--sysdeps/arm/crtn.S57
-rw-r--r--sysdeps/arm/dl-irel.h52
-rw-r--r--sysdeps/arm/dl-lookupcfg.h27
-rw-r--r--sysdeps/arm/dl-machine.h662
-rw-r--r--sysdeps/arm/dl-sysdep.h23
-rw-r--r--sysdeps/arm/dl-tls.h31
-rw-r--r--sysdeps/arm/dl-tlsdesc.S226
-rw-r--r--sysdeps/arm/dl-tlsdesc.h62
-rw-r--r--sysdeps/arm/dl-trampoline.S212
-rw-r--r--sysdeps/arm/fclrexcpt.c58
-rw-r--r--sysdeps/arm/fedisblxcpt.c47
-rw-r--r--sysdeps/arm/feenablxcpt.c59
-rw-r--r--sysdeps/arm/fegetenv.c48
-rw-r--r--sysdeps/arm/fegetexcept.c39
-rw-r--r--sysdeps/arm/fegetround.c40
-rw-r--r--sysdeps/arm/feholdexcpt.c50
-rw-r--r--sysdeps/arm/fesetenv.c63
-rw-r--r--sysdeps/arm/fesetround.c53
-rw-r--r--sysdeps/arm/feupdateenv.c56
-rw-r--r--sysdeps/arm/fgetexcptflg.c50
-rw-r--r--sysdeps/arm/find_exidx.c79
-rw-r--r--sysdeps/arm/fpu_control.h63
-rw-r--r--sysdeps/arm/fraiseexcpt.c106
-rw-r--r--sysdeps/arm/frame.h27
-rw-r--r--sysdeps/arm/framestate.c1
-rw-r--r--sysdeps/arm/fsetexcptflg.c56
-rw-r--r--sysdeps/arm/ftestexcept.c40
-rw-r--r--sysdeps/arm/gcc-compat.h35
-rw-r--r--sysdeps/arm/gccframe.h21
-rw-r--r--sysdeps/arm/get-rounding-mode.h42
-rw-r--r--sysdeps/arm/gmp-mparam.h36
-rw-r--r--sysdeps/arm/include/bits/setjmp.h36
-rw-r--r--sysdeps/arm/jmpbuf-unwind.h45
-rw-r--r--sysdeps/arm/ldsodefs.h40
-rw-r--r--sysdeps/arm/libc-tls.c32
-rw-r--r--sysdeps/arm/libm-test-ulps8028
-rw-r--r--sysdeps/arm/machine-gmon.h33
-rw-r--r--sysdeps/arm/math-tests.h32
-rw-r--r--sysdeps/arm/memcpy.S344
-rw-r--r--sysdeps/arm/memmove.S360
-rw-r--r--sysdeps/arm/memset.S78
-rw-r--r--sysdeps/arm/memusage.h20
-rw-r--r--sysdeps/arm/nptl/Makefile20
-rw-r--r--sysdeps/arm/nptl/pthread_spin_lock.c23
-rw-r--r--sysdeps/arm/nptl/pthreaddef.h46
-rw-r--r--sysdeps/arm/nptl/tcb-offsets.sym11
-rw-r--r--sysdeps/arm/nptl/tls.h147
-rw-r--r--sysdeps/arm/preconfigure63
-rw-r--r--sysdeps/arm/preconfigure.ac58
-rw-r--r--sysdeps/arm/rtld-global-offsets.sym7
-rw-r--r--sysdeps/arm/s_fma.c5
-rw-r--r--sysdeps/arm/s_fmaf.c5
-rw-r--r--sysdeps/arm/setfpucw.c43
-rw-r--r--sysdeps/arm/setjmp.S126
-rw-r--r--sysdeps/arm/shlib-versions9
-rw-r--r--sysdeps/arm/soft-fp/sfp-machine.h49
-rw-r--r--sysdeps/arm/sotruss-lib.c49
-rw-r--r--sysdeps/arm/stackinfo.h33
-rw-r--r--sysdeps/arm/start.S148
-rw-r--r--sysdeps/arm/static-stubs.c7
-rw-r--r--sysdeps/arm/strlen.S79
-rw-r--r--sysdeps/arm/sub_n.S2
-rw-r--r--sysdeps/arm/submul_1.S74
-rw-r--r--sysdeps/arm/sys/ucontext.h94
-rw-r--r--sysdeps/arm/sysdep.h288
-rw-r--r--sysdeps/arm/test-fpucw.c5
-rw-r--r--sysdeps/arm/tls-macros.h78
-rw-r--r--sysdeps/arm/tlsdesc.c160
-rw-r--r--sysdeps/arm/tlsdesc.sym15
-rw-r--r--sysdeps/arm/tst-audit.h25
-rw-r--r--sysdeps/arm/unwind-dw2-fde-glibc.c79
-rw-r--r--sysdeps/arm/unwind-pe.c1
-rw-r--r--sysdeps/unix/arm/sysdep.S63
-rw-r--r--sysdeps/unix/arm/sysdep.h29
-rw-r--r--sysdeps/unix/sysv/linux/arm/Makefile85
-rw-r--r--sysdeps/unix/sysv/linux/arm/Versions40
-rw-r--r--sysdeps/unix/sysv/linux/arm/____longjmp_chk.S90
-rw-r--r--sysdeps/unix/sysv/linux/arm/aeabi_read_tp.S55
-rw-r--r--sysdeps/unix/sysv/linux/arm/alphasort64.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/arm-features.h30
-rw-r--r--sysdeps/unix/sysv/linux/arm/bits/atomic.h107
-rw-r--r--sysdeps/unix/sysv/linux/arm/bits/fcntl.h54
-rw-r--r--sysdeps/unix/sysv/linux/arm/bits/hwcap.h42
-rw-r--r--sysdeps/unix/sysv/linux/arm/bits/mman.h40
-rw-r--r--sysdeps/unix/sysv/linux/arm/bits/shm.h103
-rw-r--r--sysdeps/unix/sysv/linux/arm/brk.c41
-rw-r--r--sysdeps/unix/sysv/linux/arm/clone.S99
-rw-r--r--sysdeps/unix/sysv/linux/arm/configure6
-rw-r--r--sysdeps/unix/sysv/linux/arm/configure.ac6
-rw-r--r--sysdeps/unix/sysv/linux/arm/dl-cache.h34
-rw-r--r--sysdeps/unix/sysv/linux/arm/dl-machine.h30
-rw-r--r--sysdeps/unix/sysv/linux/arm/dl-procinfo.c65
-rw-r--r--sysdeps/unix/sysv/linux/arm/dl-procinfo.h78
-rw-r--r--sysdeps/unix/sysv/linux/arm/fchown.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/fcntl.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/ftruncate64.c36
-rw-r--r--sysdeps/unix/sysv/linux/arm/fxstat.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/fxstatat.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/getcontext.S115
-rw-r--r--sysdeps/unix/sysv/linux/arm/getdents64.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/getegid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/geteuid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/getgid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/getgroups.c2
-rw-r--r--sysdeps/unix/sysv/linux/arm/getresgid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/getresuid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/getrlimit64.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/getuid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/glob64.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/internal_accept4.S6
-rw-r--r--sysdeps/unix/sysv/linux/arm/internal_recvmmsg.S6
-rw-r--r--sysdeps/unix/sysv/linux/arm/internal_sendmmsg.S6
-rw-r--r--sysdeps/unix/sysv/linux/arm/ioperm.c279
-rw-r--r--sysdeps/unix/sysv/linux/arm/kernel-features.h45
-rw-r--r--sysdeps/unix/sysv/linux/arm/lchown.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/ldconfig.h25
-rw-r--r--sysdeps/unix/sysv/linux/arm/ldsodefs.h73
-rw-r--r--sysdeps/unix/sysv/linux/arm/libc-aeabi_read_tp.S1
-rw-r--r--sysdeps/unix/sysv/linux/arm/libc-do-syscall.S48
-rw-r--r--sysdeps/unix/sysv/linux/arm/lockf64.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/lxstat.c2
-rw-r--r--sysdeps/unix/sysv/linux/arm/makecontext.c73
-rw-r--r--sysdeps/unix/sysv/linux/arm/mmap.S64
-rw-r--r--sysdeps/unix/sysv/linux/arm/mmap64.S72
-rw-r--r--sysdeps/unix/sysv/linux/arm/msgctl.c33
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/Makefile17
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/Versions8
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/bits/pthreadtypes.h184
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/bits/semaphore.h34
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/c++-types.data67
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/clone.S3
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/configure4
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/configure.ac8
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/createthread.c22
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/fork.c30
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/ld.abilist12
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/libBrokenLocale.abilist3
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/libanl.abilist6
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/libc.abilist2145
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/libcrypt.abilist9
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/libdl.abilist11
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/libm.abilist374
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/libnsl.abilist123
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/libpthread.abilist232
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/libresolv.abilist95
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/librt.abilist44
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/libthread_db.abilist42
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/libutil.abilist8
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/localplt.data13
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/lowlevellock.c132
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/lowlevellock.h321
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/nptl-aeabi_unwind_cpp_pr1.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/pt-vfork.S34
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/pthread_once.c89
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/rt-aeabi_unwind_cpp_pr1.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/sysdep-cancel.h242
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/unwind-forcedunwind.c157
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/unwind-resume.c100
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/unwind.h278
-rw-r--r--sysdeps/unix/sysv/linux/arm/nptl/vfork.S36
-rw-r--r--sysdeps/unix/sysv/linux/arm/oldgetrlimit.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/oldgetrlimit64.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/oldsetrlimit.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/posix_fadvise.c30
-rw-r--r--sysdeps/unix/sysv/linux/arm/posix_fadvise64.c55
-rw-r--r--sysdeps/unix/sysv/linux/arm/pread.c58
-rw-r--r--sysdeps/unix/sysv/linux/arm/pread64.c60
-rw-r--r--sysdeps/unix/sysv/linux/arm/profil-counter.h31
-rw-r--r--sysdeps/unix/sysv/linux/arm/pwrite.c58
-rw-r--r--sysdeps/unix/sysv/linux/arm/pwrite64.c61
-rw-r--r--sysdeps/unix/sysv/linux/arm/readahead.c37
-rw-r--r--sysdeps/unix/sysv/linux/arm/readdir64.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/readdir64_r.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/readelflib.c79
-rw-r--r--sysdeps/unix/sysv/linux/arm/register-dump.h136
-rw-r--r--sysdeps/unix/sysv/linux/arm/scandir64.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/semctl.c54
-rw-r--r--sysdeps/unix/sysv/linux/arm/setcontext.S104
-rw-r--r--sysdeps/unix/sysv/linux/arm/setegid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/seteuid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/setfsgid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/setfsuid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/setgid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/setgroups.c2
-rw-r--r--sysdeps/unix/sysv/linux/arm/setregid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/setresgid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/setresuid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/setreuid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/setrlimit.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/setuid.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/shmctl.c34
-rw-r--r--sysdeps/unix/sysv/linux/arm/sigaction.c110
-rw-r--r--sysdeps/unix/sysv/linux/arm/sigcontextinfo.h49
-rw-r--r--sysdeps/unix/sysv/linux/arm/sigrestorer.S117
-rw-r--r--sysdeps/unix/sysv/linux/arm/swapcontext.S63
-rw-r--r--sysdeps/unix/sysv/linux/arm/sys/elf.h25
-rw-r--r--sysdeps/unix/sysv/linux/arm/sys/io.h47
-rw-r--r--sysdeps/unix/sysv/linux/arm/sys/procfs.h122
-rw-r--r--sysdeps/unix/sysv/linux/arm/sys/ucontext.h112
-rw-r--r--sysdeps/unix/sysv/linux/arm/sys/user.h71
-rw-r--r--sysdeps/unix/sysv/linux/arm/syscall.S48
-rw-r--r--sysdeps/unix/sysv/linux/arm/syscalls.list38
-rw-r--r--sysdeps/unix/sysv/linux/arm/sysdep.S33
-rw-r--r--sysdeps/unix/sysv/linux/arm/sysdep.h482
-rw-r--r--sysdeps/unix/sysv/linux/arm/truncate64.c35
-rw-r--r--sysdeps/unix/sysv/linux/arm/ucontext_i.sym30
-rw-r--r--sysdeps/unix/sysv/linux/arm/umount.c30
-rw-r--r--sysdeps/unix/sysv/linux/arm/versionsort64.c1
-rw-r--r--sysdeps/unix/sysv/linux/arm/vfork.S61
-rw-r--r--sysdeps/unix/sysv/linux/arm/xstat.c1
266 files changed, 26716 insertions, 0 deletions
diff --git a/sysdeps/arm/Implies b/sysdeps/arm/Implies
new file mode 100644
index 0000000000..10bd93a160
--- /dev/null
+++ b/sysdeps/arm/Implies
@@ -0,0 +1,4 @@
+arm/soft-fp
+wordsize-32
+ieee754/flt-32
+ieee754/dbl-64
diff --git a/sysdeps/arm/Makefile b/sysdeps/arm/Makefile
new file mode 100644
index 0000000000..b218e76eac
--- /dev/null
+++ b/sysdeps/arm/Makefile
@@ -0,0 +1,34 @@
+gnulib-arch = $(elfobjdir)/libgcc-stubs.a
+static-gnulib-arch = $(elfobjdir)/libgcc-stubs.a
+
+ifeq ($(subdir),elf)
+sysdep-dl-routines += tlsdesc dl-tlsdesc
+sysdep_routines += aeabi_unwind_cpp_pr1 find_exidx tlsdesc dl-tlsdesc
+sysdep-rtld-routines += aeabi_unwind_cpp_pr1 tlsdesc dl-tlsdesc
+shared-only-routines += aeabi_unwind_cpp_pr1
+
+$(objpfx)libgcc-stubs.a: $(objpfx)aeabi_unwind_cpp_pr1.os
+	$(build-extra-lib)
+
+lib-noranlib: $(objpfx)libgcc-stubs.a
+endif
+
+ifeq ($(subdir),csu)
+# get offset to rtld_global._dl_hwcap
+gen-as-const-headers += rtld-global-offsets.sym tlsdesc.sym
+aeabi_constants = aeabi_lcsts aeabi_sighandlers aeabi_math
+aeabi_routines = aeabi_assert aeabi_localeconv aeabi_errno_addr \
+	aeabi_mb_cur_max aeabi_atexit aeabi_memclr aeabi_memcpy \
+	aeabi_memmove aeabi_memset
+
+sysdep_routines += $(aeabi_constants) $(aeabi_routines)
+static-only-routines += $(aeabi_constants)
+endif
+
+ifeq ($(subdir),gmon)
+sysdep_routines += arm-mcount
+endif
+
+ifeq ($(subdir),debug)
+CFLAGS-backtrace.c += -funwind-tables
+endif
diff --git a/sysdeps/arm/Versions b/sysdeps/arm/Versions
new file mode 100644
index 0000000000..5f2af29c38
--- /dev/null
+++ b/sysdeps/arm/Versions
@@ -0,0 +1,20 @@
+libc {
+  GLIBC_2.4 {
+    # ARM EABI compatibility routines
+    __aeabi_assert;
+    __aeabi_atexit;
+    __aeabi_errno_addr;
+    __aeabi_localeconv;
+    __aeabi_MB_CUR_MAX;
+    __aeabi_memclr; __aeabi_memclr4; __aeabi_memclr8;
+    __aeabi_memcpy; __aeabi_memcpy4; __aeabi_memcpy8;
+    __aeabi_memmove; __aeabi_memmove4; __aeabi_memmove8;
+    __aeabi_memset; __aeabi_memset4; __aeabi_memset8;
+
+    # Helper routines
+    __gnu_Unwind_Find_exidx;
+  }
+  GLIBC_2.8 {
+    __gnu_mcount_nc;
+  }
+}
diff --git a/sysdeps/arm/__longjmp.S b/sysdeps/arm/__longjmp.S
new file mode 100644
index 0000000000..27c57a12df
--- /dev/null
+++ b/sysdeps/arm/__longjmp.S
@@ -0,0 +1,140 @@
+/* longjmp for ARM.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <bits/setjmp.h>
+#include <rtld-global-offsets.h>
+#include <arm-features.h>
+
+/* __longjmp(jmpbuf, val) */
+
+ENTRY (__longjmp)
+	mov	ip, r0
+	movs	r0, r1		/* get the return value in place */
+	it	eq
+	moveq	r0, #1		/* can't let setjmp() return zero! */
+
+#ifdef CHECK_SP
+	sfi_breg ip, \
+	ldr	r4, [\B, #32]	/* jmpbuf's sp */
+	cfi_undefined (r4)
+#ifdef PTR_DEMANGLE
+	PTR_DEMANGLE (r4, r4, a3, a4)
+#endif
+	CHECK_SP (r4)
+#endif
+	sfi_sp sfi_breg ip, \
+	ldmia	\B!, JMP_BUF_REGLIST
+#ifdef PTR_DEMANGLE
+	ldr	a4, [ip], #4
+	PTR_DEMANGLE (a4, a4, a3, a2)
+	mov	sp, a4
+	ldr	a4, [ip], #4
+	PTR_DEMANGLE2 (lr, a4, a3)
+#else
+	ldr	sp, [ip], #4
+	ldr	lr, [ip], #4
+#endif
+	cfi_restore (v1)
+	cfi_restore (v2)
+	cfi_restore (v3)
+	cfi_restore (v4)
+	cfi_restore (v5)
+	cfi_restore (v6)
+	cfi_restore (sl)
+	cfi_restore (fp)
+	cfi_restore (sp)
+	cfi_restore (lr)
+
+#if !defined ARM_ASSUME_NO_IWMMXT || defined __SOFTFP__
+# define NEED_HWCAP 1
+#endif
+
+#ifdef NEED_HWCAP
+# ifdef IS_IN_rtld
+	ldr	a2, 1f
+	ldr	a3, .Lrtld_local_ro
+0:	add	a2, pc, a2
+	add	a2, a2, a3
+	ldr	a2, [a2, #RTLD_GLOBAL_RO_DL_HWCAP_OFFSET]
+# else
+#  ifdef PIC
+	ldr	a2, 1f
+	ldr	a3, .Lrtld_global_ro
+0:	add	a2, pc, a2
+	ldr	a2, [a2, a3]
+	ldr	a2, [a2, #RTLD_GLOBAL_RO_DL_HWCAP_OFFSET]
+#  else
+	ldr	a2, .Lhwcap
+	ldr	a2, [a2, #0]
+#  endif
+# endif
+#endif
+
+#ifdef __SOFTFP__
+	tst	a2, #HWCAP_ARM_VFP
+	beq	.Lno_vfp
+#endif
+
+	/* Restore the VFP registers.  */
+	/* Following instruction is vldmia ip!, {d8-d15}.  */
+	sfi_breg r12, \
+	ldc	p11, cr8, [\B], #64
+.Lno_vfp:
+
+#ifndef ARM_ASSUME_NO_IWMMXT
+	tst	a2, #HWCAP_ARM_IWMMXT
+	beq	.Lno_iwmmxt
+
+	/* Restore the call-preserved iWMMXt registers.  */
+	/* Following instructions are wldrd wr10, [ip], #8 (etc.)  */
+	sfi_breg r12, \
+	ldcl	p1, cr10, [\B], #8
+	sfi_breg r12, \
+	ldcl	p1, cr11, [\B], #8
+	sfi_breg r12, \
+	ldcl	p1, cr12, [\B], #8
+	sfi_breg r12, \
+	ldcl	p1, cr13, [\B], #8
+	sfi_breg r12, \
+	ldcl	p1, cr14, [\B], #8
+	sfi_breg r12, \
+	ldcl	p1, cr15, [\B], #8
+.Lno_iwmmxt:
+#endif
+
+	DO_RET(lr)
+
+#ifdef NEED_HWCAP
+# ifdef IS_IN_rtld
+1:	.long	_GLOBAL_OFFSET_TABLE_ - 0b - PC_OFS
+.Lrtld_local_ro:
+	.long	C_SYMBOL_NAME(_rtld_local_ro)(GOTOFF)
+# else
+#  ifdef PIC
+1:	.long	_GLOBAL_OFFSET_TABLE_ - 0b - PC_OFS
+.Lrtld_global_ro:
+	.long	C_SYMBOL_NAME(_rtld_global_ro)(GOT)
+#  else
+.Lhwcap:
+	.long	C_SYMBOL_NAME(_dl_hwcap)
+#  endif
+# endif
+#endif
+
+END (__longjmp)
diff --git a/sysdeps/arm/abi-note.S b/sysdeps/arm/abi-note.S
new file mode 100644
index 0000000000..1060c3d280
--- /dev/null
+++ b/sysdeps/arm/abi-note.S
@@ -0,0 +1,9 @@
+/* Tag_ABI_align8_preserved: This code preserves 8-byte
+   alignment in any callee.  */
+	.eabi_attribute 25, 1
+/* Tag_ABI_align8_needed: This code may require 8-byte alignment from
+   the caller.  */
+	.eabi_attribute 24, 1
+
+#include <csu/abi-note.S>
+
diff --git a/sysdeps/arm/add_n.S b/sysdeps/arm/add_n.S
new file mode 100644
index 0000000000..4cc1ac287f
--- /dev/null
+++ b/sysdeps/arm/add_n.S
@@ -0,0 +1,99 @@
+/* mpn_add_n -- add (or subtract) bignums.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <arm-features.h>
+
+	.syntax unified
+	.text
+
+#ifdef USE_AS_SUB_N
+# define INITC	cmp r0, r0
+# define OPC	sbcs
+# define RETC	sbc r0, r0, r0; neg r0, r0
+# define FUNC	__mpn_sub_n
+#else
+# define INITC	cmn r0, #0
+# define OPC	adcs
+# define RETC	mov r0, #0; adc r0, r0, r0
+# define FUNC	__mpn_add_n
+#endif
+
+/* mp_limb_t mpn_add_n(res_ptr, src1_ptr, src2_ptr, size) */
+
+ENTRY (FUNC)
+	push	{ r4, r5, r6, r7, r8, r10, lr }
+	cfi_adjust_cfa_offset (28)
+	cfi_rel_offset (r4, 0)
+	cfi_rel_offset (r5, 4)
+	cfi_rel_offset (r6, 8)
+	cfi_rel_offset (r7, 12)
+	cfi_rel_offset (r8, 16)
+	cfi_rel_offset (r10, 20)
+	cfi_rel_offset (lr, 24)
+
+	INITC				/* initialize carry flag */
+	tst	r3, #1			/* count & 1 == 1? */
+	add	lr, r1, r3, lsl #2	/* compute end src1 */
+	beq	1f
+
+	sfi_breg r1, \
+	ldr	r4, [\B], #4		/* do one to make count even */
+	sfi_breg r2, \
+	ldr	r5, [\B], #4
+	OPC	r4, r4, r5
+	teq	r1, lr			/* end of count? (preserve carry) */
+	sfi_breg r0, \
+	str	r4, [\B], #4
+	beq	9f
+1:
+	tst	r3, #2			/* count & 2 == 2?  */
+	beq	2f
+	sfi_breg r1, \
+	ldm	\B!, { r4, r5 }		/* do two to make count 0 mod 4 */
+	sfi_breg r2, \
+	ldm	\B!, { r6, r7 }
+	OPC	r4, r4, r6
+	OPC	r5, r5, r7
+	teq	r1, lr			/* end of count? */
+	sfi_breg r0, \
+	stm	\B!, { r4, r5 }
+	beq	9f
+2:
+	sfi_breg r1, \
+	ldm	\B!, { r3, r5, r7, r10 }	/* do four each loop */
+	sfi_breg r2, \
+	ldm	\B!, { r4, r6, r8, ip }
+	OPC	r3, r3, r4
+	OPC	r5, r5, r6
+	OPC	r7, r7, r8
+	OPC	r10, r10, ip
+	teq	r1, lr
+	sfi_breg r0, \
+	stm	\B!, { r3, r5, r7, r10 }
+	bne	2b
+
+9:
+	RETC				/* copy carry out */
+#ifndef ARM_ALWAYS_BX
+	pop	{ r4, r5, r6, r7, r8, r10, pc }
+#else
+	pop	{ r4, r5, r6, r7, r8, r10, lr }
+	bx	lr
+#endif
+END (FUNC)
diff --git a/sysdeps/arm/addmul_1.S b/sysdeps/arm/addmul_1.S
new file mode 100644
index 0000000000..fab1ae8cd4
--- /dev/null
+++ b/sysdeps/arm/addmul_1.S
@@ -0,0 +1,73 @@
+/* mpn_addmul_1 -- multiply and accumulate bignums.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	.syntax unified
+	.text
+
+@		cycles/limb
+@ StrongArm	   ?
+@ Cortex-A8	   ?
+@ Cortex-A9	   ?
+@ Cortex-A15	   4
+
+/* mp_limb_t mpn_addmul_1(res_ptr, src1_ptr, size, s2_limb) */
+
+ENTRY (__mpn_addmul_1)
+	push	{ r4, r5, r6, r7 }
+	cfi_adjust_cfa_offset (16)
+	cfi_rel_offset (r4, 0)
+	cfi_rel_offset (r5, 4)
+	cfi_rel_offset (r6, 8)
+	cfi_rel_offset (r7, 12)
+
+	sfi_breg r1, \
+	ldr	r6, [\B], #4
+	sfi_breg r0, \
+	ldr	r5, [\B]
+	mov	r4, #0			/* init carry in */
+	b	1f
+0:
+	sfi_breg r1, \
+	ldr	r6, [\B], #4		/* load next ul */
+	adds	r7, r4, r5		/* (out, c) = cl + lpl */
+	sfi_breg r0, \
+	ldr	r5, [\B, #4]		/* load next rl */
+	adc	r4, ip, #0		/* cl = hpl + c */
+	sfi_breg r0, \
+	str	r7, [\B], #4
+1:
+	mov	ip, #0			/* zero-extend rl */
+	umlal	r5, ip, r6, r3		/* (hpl, lpl) = ul * vl + rl */
+	subs	r2, r2, #1
+	bne	0b
+
+	adds	r4, r4, r5		/* (out, c) = cl + llpl */
+	sfi_breg r0, \
+	str	r4, [\B]
+	adc	r0, ip, #0		/* return hpl + c */
+
+	pop	{ r4, r5, r6, r7 }
+	cfi_adjust_cfa_offset (-16)
+	cfi_restore (r4)
+	cfi_restore (r5)
+	cfi_restore (r6)
+	cfi_restore (r7)
+	DO_RET	(lr)
+END (__mpn_addmul_1)
diff --git a/sysdeps/arm/aeabi_assert.c b/sysdeps/arm/aeabi_assert.c
new file mode 100644
index 0000000000..0a31ffb4fb
--- /dev/null
+++ b/sysdeps/arm/aeabi_assert.c
@@ -0,0 +1,26 @@
+/* Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <assert.h>
+#include <stdlib.h>
+
+void
+__aeabi_assert (const char *assertion, const char *file,
+		unsigned int line)
+{
+  __assert_fail (assertion, file, line, NULL);
+}
diff --git a/sysdeps/arm/aeabi_atexit.c b/sysdeps/arm/aeabi_atexit.c
new file mode 100644
index 0000000000..c5c207f4cf
--- /dev/null
+++ b/sysdeps/arm/aeabi_atexit.c
@@ -0,0 +1,27 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <stdlib.h>
+
+/* Register a function to be called by exit or when a shared library
+   is unloaded.  This routine is like __cxa_atexit, but uses the
+   calling sequence required by the ARM EABI.  */
+int
+__aeabi_atexit (void *arg, void (*func) (void *), void *d)
+{
+  return __cxa_atexit (func, arg, d);
+}
diff --git a/sysdeps/arm/aeabi_errno_addr.c b/sysdeps/arm/aeabi_errno_addr.c
new file mode 100644
index 0000000000..160c765a09
--- /dev/null
+++ b/sysdeps/arm/aeabi_errno_addr.c
@@ -0,0 +1,24 @@
+/* Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <errno.h>
+
+volatile int *
+__aeabi_errno_addr (void)
+{
+  return &errno;
+}
diff --git a/sysdeps/arm/aeabi_lcsts.c b/sysdeps/arm/aeabi_lcsts.c
new file mode 100644
index 0000000000..dac9a17604
--- /dev/null
+++ b/sysdeps/arm/aeabi_lcsts.c
@@ -0,0 +1,98 @@
+/* Link-time constants for ARM EABI.
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file with other
+   programs, and to distribute those programs without any restriction
+   coming from the use of this file. (The GNU Lesser General Public
+   License restrictions do apply in other respects; for example, they
+   cover modification of the file, and distribution when not linked
+   into another program.)
+
+   Note that people who make modified versions of this file are not
+   obligated to grant this special exception for their modified
+   versions; it is their choice whether to do so. The GNU Lesser
+   General Public License gives permission to release a modified
+   version without this exception; this exception also makes it
+   possible to release a modified version which carries forward this
+   exception.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* The ARM EABI requires that we provide ISO compile-time constants as
+   link-time constants.  Some portable applications may reference these.  */
+
+#include <errno.h>
+#include <limits.h>
+#include <locale.h>
+#include <setjmp.h>
+#include <signal.h>
+#include <stdio.h>
+#include <time.h>
+
+#define eabi_constant2(X,Y) const int __aeabi_##X attribute_hidden = Y
+#define eabi_constant(X) const int __aeabi_##X attribute_hidden = X
+
+eabi_constant (EDOM);
+eabi_constant (ERANGE);
+eabi_constant (EILSEQ);
+
+eabi_constant (MB_LEN_MAX);
+
+eabi_constant (LC_COLLATE);
+eabi_constant (LC_CTYPE);
+eabi_constant (LC_MONETARY);
+eabi_constant (LC_NUMERIC);
+eabi_constant (LC_TIME);
+eabi_constant (LC_ALL);
+
+/* The value of __aeabi_JMP_BUF_SIZE is the number of doublewords in a
+   jmp_buf.  */
+eabi_constant2 (JMP_BUF_SIZE, sizeof (jmp_buf) / 8);
+
+eabi_constant (SIGABRT);
+eabi_constant (SIGFPE);
+eabi_constant (SIGILL);
+eabi_constant (SIGINT);
+eabi_constant (SIGSEGV);
+eabi_constant (SIGTERM);
+
+eabi_constant2 (IOFBF, _IOFBF);
+eabi_constant2 (IOLBF, _IOLBF);
+eabi_constant2 (IONBF, _IONBF);
+eabi_constant (BUFSIZ);
+eabi_constant (FOPEN_MAX);
+eabi_constant (TMP_MAX);
+eabi_constant (FILENAME_MAX);
+eabi_constant (L_tmpnam);
+
+FILE *__aeabi_stdin attribute_hidden;
+FILE *__aeabi_stdout attribute_hidden;
+FILE *__aeabi_stderr attribute_hidden;
+
+static void __attribute__ ((used))
+setup_aeabi_stdio (void)
+{
+  __aeabi_stdin = stdin;
+  __aeabi_stdout = stdout;
+  __aeabi_stderr = stderr;
+}
+
+static void (*fp) (void) __attribute__ ((used, section (".preinit_array")))
+  = setup_aeabi_stdio;
+
+eabi_constant (CLOCKS_PER_SEC);
diff --git a/sysdeps/arm/aeabi_localeconv.c b/sysdeps/arm/aeabi_localeconv.c
new file mode 100644
index 0000000000..2a7615f6de
--- /dev/null
+++ b/sysdeps/arm/aeabi_localeconv.c
@@ -0,0 +1,24 @@
+/* Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <locale.h>
+
+struct lconv *
+__aeabi_localeconv (void)
+{
+  return __localeconv ();
+}
diff --git a/sysdeps/arm/aeabi_math.c b/sysdeps/arm/aeabi_math.c
new file mode 100644
index 0000000000..6b4211fbc5
--- /dev/null
+++ b/sysdeps/arm/aeabi_math.c
@@ -0,0 +1,41 @@
+/* Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file with other
+   programs, and to distribute those programs without any restriction
+   coming from the use of this file. (The GNU Lesser General Public
+   License restrictions do apply in other respects; for example, they
+   cover modification of the file, and distribution when not linked
+   into another program.)
+
+   Note that people who make modified versions of this file are not
+   obligated to grant this special exception for their modified
+   versions; it is their choice whether to do so. The GNU Lesser
+   General Public License gives permission to release a modified
+   version without this exception; this exception also makes it
+   possible to release a modified version which carries forward this
+   exception.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <math.h>
+
+const double __aeabi_HUGE_VAL attribute_hidden = HUGE_VAL;
+const long double __aeabi_HUGE_VALL attribute_hidden = HUGE_VALL;
+const float __aeabi_HUGE_VALF attribute_hidden = HUGE_VALF;
+const float __aeabi_INFINITY attribute_hidden = INFINITY;
+const float __aeabi_NAN attribute_hidden = NAN;
diff --git a/sysdeps/arm/aeabi_mb_cur_max.c b/sysdeps/arm/aeabi_mb_cur_max.c
new file mode 100644
index 0000000000..ba2cc3a341
--- /dev/null
+++ b/sysdeps/arm/aeabi_mb_cur_max.c
@@ -0,0 +1,27 @@
+/* Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <langinfo.h>
+#include <locale.h>
+#include <stdlib.h>
+#include <locale/localeinfo.h>
+
+int
+__aeabi_MB_CUR_MAX (void)
+{
+  return MB_CUR_MAX;
+}
diff --git a/sysdeps/arm/aeabi_memclr.c b/sysdeps/arm/aeabi_memclr.c
new file mode 100644
index 0000000000..3bdfb3edf2
--- /dev/null
+++ b/sysdeps/arm/aeabi_memclr.c
@@ -0,0 +1,30 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <string.h>
+
+/* Clear memory.  Can't alias to bzero because it's not defined in the
+   same translation unit.  */
+void
+__aeabi_memclr (void *dest, size_t n)
+{
+  __bzero (dest, n);
+}
+
+/* Versions of the above which may assume memory alignment.  */
+strong_alias (__aeabi_memclr, __aeabi_memclr4)
+strong_alias (__aeabi_memclr, __aeabi_memclr8)
diff --git a/sysdeps/arm/aeabi_memcpy.c b/sysdeps/arm/aeabi_memcpy.c
new file mode 100644
index 0000000000..88e2e7bfbb
--- /dev/null
+++ b/sysdeps/arm/aeabi_memcpy.c
@@ -0,0 +1,31 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <string.h>
+
+/* Copy memory like memcpy, but no return value required.  Can't alias
+   to memcpy because it's not defined in the same translation
+   unit.  */
+void
+__aeabi_memcpy (void *dest, const void *src, size_t n)
+{
+  memcpy (dest, src, n);
+}
+
+/* Versions of the above which may assume memory alignment.  */
+strong_alias (__aeabi_memcpy, __aeabi_memcpy4)
+strong_alias (__aeabi_memcpy, __aeabi_memcpy8)
diff --git a/sysdeps/arm/aeabi_memmove.c b/sysdeps/arm/aeabi_memmove.c
new file mode 100644
index 0000000000..14961337e2
--- /dev/null
+++ b/sysdeps/arm/aeabi_memmove.c
@@ -0,0 +1,31 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <string.h>
+
+/* Copy memory like memmove, but no return value required.  Can't
+   alias to memmove because it's not defined in the same translation
+   unit.  */
+void
+__aeabi_memmove (void *dest, const void *src, size_t n)
+{
+  memmove (dest, src, n);
+}
+
+/* Versions of the above which may assume memory alignment.  */
+strong_alias (__aeabi_memmove, __aeabi_memmove4)
+strong_alias (__aeabi_memmove, __aeabi_memmove8)
diff --git a/sysdeps/arm/aeabi_memset.c b/sysdeps/arm/aeabi_memset.c
new file mode 100644
index 0000000000..160cfbb497
--- /dev/null
+++ b/sysdeps/arm/aeabi_memset.c
@@ -0,0 +1,30 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <string.h>
+
+/* Set memory like memset, but different argument order and no return
+   value required.  */
+void
+__aeabi_memset (void *dest, size_t n, int c)
+{
+  memset (dest, c, n);
+}
+
+/* Versions of the above which may assume memory alignment.  */
+strong_alias (__aeabi_memset, __aeabi_memset4)
+strong_alias (__aeabi_memset, __aeabi_memset8)
diff --git a/sysdeps/arm/aeabi_sighandlers.S b/sysdeps/arm/aeabi_sighandlers.S
new file mode 100644
index 0000000000..c14193b066
--- /dev/null
+++ b/sysdeps/arm/aeabi_sighandlers.S
@@ -0,0 +1,53 @@
+/* Link-time constants for ARM EABI - signal handlers.
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file with other
+   programs, and to distribute those programs without any restriction
+   coming from the use of this file. (The GNU Lesser General Public
+   License restrictions do apply in other respects; for example, they
+   cover modification of the file, and distribution when not linked
+   into another program.)
+
+   Note that people who make modified versions of this file are not
+   obligated to grant this special exception for their modified
+   versions; it is their choice whether to do so. The GNU Lesser
+   General Public License gives permission to release a modified
+   version without this exception; this exception also makes it
+   possible to release a modified version which carries forward this
+   exception.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* The ARM EABI defines these as "functions".  */
+
+#include <sysdep.h>
+
+	.global __aeabi_SIG_DFL
+	.hidden __aeabi_SIG_DFL
+	.type __aeabi_SIG_DFL, %function
+	.set __aeabi_SIG_DFL, 0
+
+	.global __aeabi_SIG_IGN
+	.hidden __aeabi_SIG_IGN
+	.type __aeabi_SIG_IGN, %function
+	.set __aeabi_SIG_IGN, 1
+
+	.global __aeabi_SIG_ERR
+	.hidden __aeabi_SIG_ERR
+	.type __aeabi_SIG_ERR, %function
+	.set __aeabi_SIG_ERR, -1
diff --git a/sysdeps/arm/aeabi_unwind_cpp_pr1.c b/sysdeps/arm/aeabi_unwind_cpp_pr1.c
new file mode 100644
index 0000000000..f65061310a
--- /dev/null
+++ b/sysdeps/arm/aeabi_unwind_cpp_pr1.c
@@ -0,0 +1,51 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Because some objects in ld.so and libc.so are built with
+   -fexceptions, we end up with references to this personality
+   routine.  However, these libraries are not linked against
+   libgcc_eh.a, so we need a dummy definition.   This routine will
+   never actually be called.  */
+
+#include <stdlib.h>
+
+attribute_hidden
+void
+__aeabi_unwind_cpp_pr0 (void)
+{
+#ifndef IS_IN_rtld
+  abort ();
+#endif
+}
+
+attribute_hidden
+void
+__aeabi_unwind_cpp_pr1 (void)
+{
+#ifndef IS_IN_rtld
+  abort ();
+#endif
+}
+
+attribute_hidden
+void
+__aeabi_unwind_cpp_pr2 (void)
+{
+#ifndef IS_IN_rtld
+  abort ();
+#endif
+}
diff --git a/sysdeps/arm/arm-features.h b/sysdeps/arm/arm-features.h
new file mode 100644
index 0000000000..b743756519
--- /dev/null
+++ b/sysdeps/arm/arm-features.h
@@ -0,0 +1,59 @@
+/* Macros to test for CPU features on ARM.  Generic ARM version.
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _ARM_ARM_FEATURES_H
+#define _ARM_ARM_FEATURES_H 1
+
+/* An OS-specific arm-features.h file should define ARM_HAVE_VFP to
+   an appropriate expression for testing at runtime whether the VFP
+   hardware is present.  We'll then redefine it to a constant if we
+   know at compile time that we can assume VFP.  */
+
+#ifndef __SOFTFP__
+/* The compiler is generating VFP instructions, so we're already
+   assuming the hardware exists.  */
+# undef ARM_HAVE_VFP
+# define ARM_HAVE_VFP	1
+#endif
+
+/* An OS-specific arm-features.h file may define ARM_ASSUME_NO_IWMMXT
+   to indicate at compile time that iWMMXt hardware is never present
+   at runtime (or that we never care about its state) and so need not
+   be checked for.  */
+
+/* A more-specific arm-features.h file may define ARM_ALWAYS_BX to indicate
+   that instructions using pc as a destination register must never be used,
+   so a "bx" (or "blx") instruction is always required.  */
+
+/* The log2 of the minimum alignment required for an address that
+   is the target of a computed branch (i.e. a "bx" instruction).
+   A more-specific arm-features.h file may define this to set a more
+   stringent requirement.
+
+   Using this only makes sense for code in ARM mode (where instructions
+   always have a fixed size of four bytes), or for Thumb-mode code that is
+   specifically aligning all the related branch targets to match (since
+   Thumb instructions might be either two or four bytes).  */
+#ifndef ARM_BX_ALIGN_LOG2
+# define ARM_BX_ALIGN_LOG2	2
+#endif
+
+/* An OS-specific arm-features.h file may define ARM_NO_INDEX_REGISTER to
+   indicate that the two-register addressing modes must never be used.  */
+
+#endif  /* arm-features.h */
diff --git a/sysdeps/arm/arm-mcount.S b/sysdeps/arm/arm-mcount.S
new file mode 100644
index 0000000000..7e433c6ff7
--- /dev/null
+++ b/sysdeps/arm/arm-mcount.S
@@ -0,0 +1,129 @@
+/* Implementation of profiling support.  ARM EABI version.
+   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Don't call mcount when calling mcount...  */
+#undef PROF
+
+#include <sysdep.h>
+
+#undef mcount
+
+#ifdef __thumb2__
+	.thumb
+#endif
+	.syntax unified
+
+
+/* Use an assembly stub with a special ABI.  The calling lr has been
+   pushed to the stack (which will be misaligned).  We should preserve
+   all registers except ip and pop a word off the stack.
+
+   NOTE: This assumes mcount_internal does not clobber any non-core
+   (coprocessor) registers.  Currently this is true, but may require
+   additional attention in the future.
+
+   The calling sequence looks something like:
+func:
+   push {lr}
+   bl __gnu_mcount_nc
+   <function body>
+*/
+
+ENTRY(__gnu_mcount_nc)
+	push {r0, r1, r2, r3, lr}
+	cfi_adjust_cfa_offset (20)
+	cfi_rel_offset (r0, 0)
+	cfi_rel_offset (r1, 4)
+	cfi_rel_offset (r2, 8)
+	cfi_rel_offset (r3, 12)
+	cfi_rel_offset (lr, 16)
+	bic r1, lr, #1
+	ldr r0, [sp, #20]
+	bl __mcount_internal
+	pop {r0, r1, r2, r3, ip, lr}
+	cfi_adjust_cfa_offset (-24)
+	cfi_restore (r0)
+	cfi_restore (r1)
+	cfi_restore (r2)
+	cfi_restore (r3)
+	cfi_register (lr, ip)
+	bx ip
+END(__gnu_mcount_nc)
+
+
+#include <gcc-compat.h>
+#include <shlib-compat.h>
+
+/* The new __gnu_mcount_nc entry point was introduced in 4.4, so the
+   static library needs the old one only to support older compilers.
+   Even in a configuration that only cares about newer compilers, the
+   shared library might need it only for strict ABI compatibility.  */
+
+#if GCC_COMPAT (4, 3) || SHLIB_COMPAT (libc, GLIBC_2_0, GLIBC_2_19)
+
+/* Provide old mcount for backwards compatibility.  This requires
+   code be compiled with APCS frame pointers.  */
+
+ENTRY(__mcount_arm_compat)
+	push	{r0, r1, r2, r3, fp, lr}
+	cfi_adjust_cfa_offset (24)
+	cfi_rel_offset (r0, 0)
+	cfi_rel_offset (r1, 4)
+	cfi_rel_offset (r2, 8)
+	cfi_rel_offset (r3, 12)
+	cfi_rel_offset (fp, 16)
+	cfi_rel_offset (lr, 20)
+	movs r0, fp
+	ittt ne
+	sfi_breg r0, \
+	ldrne r0, [\B, #-4]
+	movsne r1, lr
+	blne __mcount_internal
+# if defined (__ARM_ARCH_4T__) && defined (__THUMB_INTERWORK__)
+	pop	{r0, r1, r2, r3, fp, lr}
+	cfi_adjust_cfa_offset (-24)
+	cfi_restore (r0)
+	cfi_restore (r1)
+	cfi_restore (r2)
+	cfi_restore (r3)
+	cfi_restore (fp)
+	cfi_restore (lr)
+	bx lr
+# else
+	pop	{r0, r1, r2, r3, fp, pc}
+# endif
+END(__mcount_arm_compat)
+
+#endif
+
+#if GCC_COMPAT (4, 3)
+
+strong_alias (__mcount_arm_compat, _mcount)
+
+/* The canonical name for the function is `_mcount' in both C and asm,
+   but some old asm code might assume it's `mcount'.  */
+weak_alias (_mcount, mcount)
+
+#elif SHLIB_COMPAT (libc, GLIBC_2_0, GLIBC_2_19)
+
+compat_symbol (libc, __mcount_arm_compat, _mcount, GLIBC_2_0)
+
+strong_alias (__mcount_arm_compat, __mcount_arm_compat_1)
+compat_symbol (libc, __mcount_arm_compat_1, mcount, GLIBC_2_0)
+
+#endif
diff --git a/sysdeps/arm/armv6/rawmemchr.S b/sysdeps/arm/armv6/rawmemchr.S
new file mode 100644
index 0000000000..c34fdc6988
--- /dev/null
+++ b/sysdeps/arm/armv6/rawmemchr.S
@@ -0,0 +1,109 @@
+/* rawmemchr -- find a byte within an unsized memory block.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	.syntax unified
+	.text
+
+ENTRY (__rawmemchr)
+	@ r0 = start of string
+	@ r1 = character to match
+	@ returns a pointer to the match, which must be present.
+	sfi_breg r0, \
+	ldrb	r2, [\B]		@ load first byte asap
+
+	@ To cater to long strings, we want to search through a few
+	@ characters until we reach an aligned pointer.  To cater to
+	@ small strings, we don't want to start doing word operations
+	@ immediately.  The compromise is a maximum of 16 bytes less
+	@ whatever is required to end with an aligned pointer.
+	@ r3 = number of characters to search in alignment loop
+	and	r3, r0, #7
+	uxtb	r1, r1
+	rsb	r3, r3, #15		@ 16 - 1 peeled loop iteration
+	cmp	r2, r1
+	it	eq
+	bxeq	lr
+
+	@ Loop until we find ...
+1:	sfi_breg r0, \
+	ldrb	r2, [\B, #1]!
+	subs	r3, r3, #1		@ ... the alignment point
+	it	ne
+	cmpne	r2, r1			@ ... or C
+	bne	1b
+
+	@ Disambiguate the exit possibilites above
+	cmp	r2, r1			@ Found C
+	it	eq
+	bxeq	lr
+	add	r0, r0, #1
+
+	@ So now we're aligned.
+	sfi_breg r0, \
+	ldrd	r2, r3, [\B], #8
+	orr	r1, r1, r1, lsl #8	@ Replicate C to all bytes
+#ifdef ARCH_HAS_T2
+	movw	ip, #0x0101
+	sfi_pld	r0, #64
+	movt	ip, #0x0101
+#else
+	ldr	ip, =0x01010101
+	sfi_pld	r0, #64
+#endif
+	orr	r1, r1, r1, lsl #16
+
+	@ Loop searching for C, 8 bytes at a time.
+	@ Subtracting (unsigned saturating) from 1 means result of 1 for
+	@ any byte that was originally zero and 0 otherwise.  Therefore
+	@ we consider the lsb of each byte the "found" bit.
+2:	eor	r2, r2, r1		@ Convert C bytes to 0
+	eor	r3, r3, r1
+	uqsub8	r2, ip, r2		@ Find C
+	uqsub8	r3, ip, r3
+	sfi_pld	r0, #128
+	orrs	r3, r3, r2		@ Test both words for found
+	it	eq
+	sfi_breg r0, \
+	ldrdeq	r2, r3, [\B], #8
+	beq	2b
+
+	@ Found something.  Disambiguate between first and second words.
+	@ Adjust r0 to point to the word containing the match.
+	@ Adjust r2 to the found bits for the word containing the match.
+	cmp	r2, #0
+	sub	r0, r0, #4
+	ite	eq
+	moveq	r2, r3
+	subne	r0, r0, #4
+
+	@ Find the bit-offset of the match within the word.  Note that the
+	@ bit result from clz will be 7 higher than "true", but we'll
+	@ immediately discard those bits converting to a byte offset.
+#ifdef __ARMEL__
+	rev	r2, r2			@ For LE, count from the little end
+#endif
+	clz	r2, r2
+	add	r0, r0, r2, lsr #3	@ Adjust the pointer to the found byte
+	bx	lr
+
+END (__rawmemchr)
+
+weak_alias (__rawmemchr, rawmemchr)
+libc_hidden_def (__rawmemchr)
diff --git a/sysdeps/arm/armv6/stpcpy.S b/sysdeps/arm/armv6/stpcpy.S
new file mode 100644
index 0000000000..21a4f385be
--- /dev/null
+++ b/sysdeps/arm/armv6/stpcpy.S
@@ -0,0 +1 @@
+/* Defined in strcpy.S.  */
diff --git a/sysdeps/arm/armv6/strchr.S b/sysdeps/arm/armv6/strchr.S
new file mode 100644
index 0000000000..e4de0f3323
--- /dev/null
+++ b/sysdeps/arm/armv6/strchr.S
@@ -0,0 +1,147 @@
+/* strchr -- find the first instance of C in a nul-terminated string.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	.syntax unified
+	.text
+
+ENTRY (strchr)
+	@ r0 = start of string
+	@ r1 = character to match
+	@ returns NULL for no match, or a pointer to the match
+	sfi_breg r0, \
+	ldrb	r2, [\B]		@ load the first byte asap
+	uxtb	r1, r1
+
+	@ To cater to long strings, we want to search through a few
+	@ characters until we reach an aligned pointer.  To cater to
+	@ small strings, we don't want to start doing word operations
+	@ immediately.  The compromise is a maximum of 16 bytes less
+	@ whatever is required to end with an aligned pointer.
+	@ r3 = number of characters to search in alignment loop
+	and	r3, r0, #7
+	rsb	r3, r3, #15		@ 16 - 1 peeled loop iteration
+	cmp	r2, r1			@ Found C?
+	it	ne
+	cmpne	r2, #0			@ Found EOS?
+	beq	99f
+
+	@ Loop until we find ...
+1:	sfi_breg r0, \
+	ldrb	r2, [\B, #1]!
+	subs	r3, r3, #1		@ ... the aligment point
+	it	ne
+	cmpne	r2, r1			@ ... or the character
+	it	ne
+	cmpne	r2, #0			@ ... or EOS
+	bne	1b
+
+	@ Disambiguate the exit possibilites above
+	cmp	r2, r1			@ Found the character
+	it	ne
+	cmpne	r2, #0			@ Found EOS
+	beq	99f
+	add	r0, r0, #1
+
+	@ So now we're aligned.  Now we actually need a stack frame.
+	push	{ r4, r5, r6, r7 }
+	cfi_adjust_cfa_offset (16)
+	cfi_rel_offset (r4, 0)
+	cfi_rel_offset (r5, 4)
+	cfi_rel_offset (r6, 8)
+	cfi_rel_offset (r7, 12)
+
+	sfi_breg r0, \
+	ldrd	r2, r3, [\B], #8
+	orr	r1, r1, r1, lsl #8	@ Replicate C to all bytes
+#ifdef ARCH_HAS_T2
+	movw	ip, #0x0101
+	sfi_pld	r0, #64
+	movt	ip, #0x0101
+#else
+	ldr	ip, =0x01010101
+	sfi_pld	r0, #64
+#endif
+	orr	r1, r1, r1, lsl #16
+
+	@ Loop searching for EOS or C, 8 bytes at a time.
+2:
+	@ Subtracting (unsigned saturating) from 1 means result of 1 for
+	@ any byte that was originally zero and 0 otherwise.  Therefore
+	@ we consider the lsb of each byte the "found" bit.
+	uqsub8	r4, ip, r2		@ Find EOS
+	eor	r6, r2, r1		@ Convert C bytes to 0
+	uqsub8	r5, ip, r3
+	eor	r7, r3, r1
+	uqsub8	r6, ip, r6		@ Find C
+	sfi_pld	r0, #128		@ Prefetch 2 lines ahead
+	uqsub8	r7, ip, r7
+	orr	r4, r4, r6		@ Combine found for EOS and C
+	orr	r5, r5, r7
+	orrs	r6, r4, r5		@ Combine the two words
+	it	eq
+	sfi_breg r0, \
+	ldrdeq	r2, r3, [\B], #8
+	beq	2b
+
+	@ Found something.  Disambiguate between first and second words.
+	@ Adjust r0 to point to the word containing the match.
+	@ Adjust r2 to the contents of the word containing the match.
+	@ Adjust r4 to the found bits for the word containing the match.
+	cmp	r4, #0
+	sub	r0, r0, #4
+	itte	eq
+	moveq	r4, r5
+	moveq	r2, r3
+	subne	r0, r0, #4
+
+	@ Find the bit-offset of the match within the word.
+#if defined(__ARMEL__)
+	@ For LE, swap the found word so clz searches from the little end.
+	rev	r4, r4
+#else
+	@ For BE, byte swap the word to make it easier to extract the byte.
+	rev	r2, r2
+#endif
+	@ We're counting 0x01 (not 0x80), so the bit offset is 7 too high.
+	clz	r3, r4
+	sub	r3, r3, #7
+	lsr	r2, r2, r3		@ Shift down found byte
+	uxtb	r1, r1			@ Undo replication of C
+	uxtb	r2, r2			@ Extract found byte
+	add	r0, r0, r3, lsr #3	@ Adjust the pointer to the found byte
+
+	pop	{ r4, r5, r6, r7 }
+	cfi_adjust_cfa_offset (-16)
+	cfi_restore (r4)
+	cfi_restore (r5)
+	cfi_restore (r6)
+	cfi_restore (r7)
+
+	@ Disambiguate between EOS and C.
+99:
+	cmp	r2, r1
+	it	ne
+	movne	r0, #0			@ Found EOS, return NULL
+	bx	lr
+
+END (strchr)
+
+weak_alias (strchr, index)
+libc_hidden_builtin_def (strchr)
diff --git a/sysdeps/arm/armv6/strcpy.S b/sysdeps/arm/armv6/strcpy.S
new file mode 100644
index 0000000000..833a83c28f
--- /dev/null
+++ b/sysdeps/arm/armv6/strcpy.S
@@ -0,0 +1,231 @@
+/* strcpy -- copy a nul-terminated string.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+/* Endian independent macros for shifting bytes within registers.  */
+#ifdef __ARMEB__
+#define lsh_gt		lsr
+#define lsh_ls		lsl
+#else
+#define lsh_gt		lsl
+#define lsh_ls		lsr
+#endif
+
+	.syntax unified
+	.text
+
+ENTRY (__stpcpy)
+	@ Signal stpcpy with NULL in IP.
+	mov	ip, #0
+	b	0f
+END (__stpcpy)
+
+weak_alias (__stpcpy, stpcpy)
+libc_hidden_def (__stpcpy)
+libc_hidden_builtin_def (stpcpy)
+
+ENTRY (strcpy)
+	@ Signal strcpy with DEST in IP.
+	mov	ip, r0
+0:
+	sfi_pld	r0
+	sfi_pld	r1
+
+	@ To cater to long strings, we want 8 byte alignment in the source.
+	@ To cater to small strings, we don't want to start that right away.
+	@ Loop up to 16 times, less whatever it takes to reach alignment.
+	and	r3, r1, #7
+	rsb	r3, r3, #16
+
+	@ Loop until we find ...
+1:	sfi_breg r1, \
+	ldrb	r2, [\B], #1
+	subs	r3, r3, #1		@ ... the alignment point
+	sfi_breg r0, \
+	strb	r2, [\B], #1
+	it	ne
+	cmpne	r2, #0			@ ... or EOS
+	bne	1b
+
+	@ Disambiguate the exit possibilites above
+	cmp	r2, #0			@ Found EOS
+	beq	.Lreturn
+
+	@ Load the next two words asap
+	sfi_breg r1, \
+	ldrd	r2, r3, [\B], #8
+	sfi_pld	r0, #64
+	sfi_pld	r1, #64
+
+	@ For longer strings, we actaully need a stack frame.
+	push	{ r4, r5, r6, r7 }
+	cfi_adjust_cfa_offset (16)
+	cfi_rel_offset (r4, 0)
+	cfi_rel_offset (r5, 4)
+	cfi_rel_offset (r6, 8)
+	cfi_rel_offset (r7, 12)
+
+	@ Subtracting (unsigned saturating) from 1 for any byte means result
+	@ of 1 for any byte that was originally zero and 0 otherwise.
+	@ Therefore we consider the lsb of each byte the "found" bit.
+#ifdef ARCH_HAS_T2
+	movw	r7, #0x0101
+	tst	r0, #3			@ Test alignment of DEST
+	movt	r7, #0x0101
+#else
+	ldr	r7, =0x01010101
+	tst	r0, #3
+#endif
+	bne	.Lunaligned
+
+	@ So now source (r1) is aligned to 8, and dest (r0) is aligned to 4.
+	@ Loop, reading 8 bytes at a time, searching for EOS.
+	.balign	16
+2:	uqsub8	r4, r7, r2		@ Find EOS
+	uqsub8	r5, r7, r3
+	sfi_pld	r1, #128
+	cmp	r4, #0			@ EOS in first word?
+	sfi_pld	r0, #128
+	bne	3f
+	sfi_breg r0, \
+	str	r2, [\B], #4
+	cmp	r5, #0			@ EOS in second word?
+	bne	4f
+	sfi_breg r0, \
+	str	r3, [\B], #4
+	sfi_breg r1, \
+	ldrd	r2, r3, [\B], #8
+	b	2b
+
+3:	sub	r1, r1, #4		@ backup to first word
+4:	sub	r1, r1, #4		@ backup to second word
+
+	@ ... then finish up any tail a byte at a time.
+	@ Note that we generally back up and re-read source bytes,
+	@ but we'll not re-write dest bytes.
+.Lbyte_loop:
+	sfi_breg r1, \
+	ldrb	r2, [\B], #1
+	cmp	r2, #0
+	sfi_breg r0, \
+	strb	r2, [\B], #1
+	bne	.Lbyte_loop
+
+	pop	{ r4, r5, r6, r7 }
+	cfi_remember_state
+	cfi_adjust_cfa_offset (-16)
+	cfi_restore (r4)
+	cfi_restore (r5)
+	cfi_restore (r6)
+	cfi_restore (r7)
+
+.Lreturn:
+	cmp	ip, #0			@ Was this strcpy or stpcpy?
+	ite	eq
+	subeq	r0, r0, #1		@ stpcpy: undo post-inc from store
+	movne	r0, ip			@ strcpy: return original dest
+	bx	lr
+
+.Lunaligned:
+	cfi_restore_state
+	@ Here, source is aligned to 8, but the destination is not word
+	@ aligned.  Therefore we have to shift the data in order to be
+	@ able to perform aligned word stores.
+
+	@ Find out which misalignment we're dealing with.
+	tst	r0, #1
+	beq	.Lunaligned2
+	tst	r0, #2
+	bne	.Lunaligned3
+	@ Fallthru to .Lunaligned1.
+
+.macro unaligned_copy	unalign
+	@ Prologue to unaligned loop.  Seed shifted non-zero bytes.
+	uqsub8	r4, r7, r2		@ Find EOS
+	uqsub8	r5, r7, r3
+	mvns	r4, r4			@ EOS in first word?
+	it	ne
+	subne	r1, r1, #8
+	bne	.Lbyte_loop
+#ifdef __ARMEB__
+	rev	r2, r2			@ Byte stores below need LE data
+#endif
+	@ Store a few bytes from the first word.
+	@ At the same time we align r0 and shift out bytes from r2.
+.rept	4-\unalign
+	sfi_breg r0, \
+	strb	r2, [\B], #1
+	lsr	r2, r2, #8
+.endr
+#ifdef __ARMEB__
+	rev	r2, r2			@ Undo previous rev
+#endif
+	@ Rotated unaligned copy loop.  The tail of the prologue is
+	@ shared with the loop itself.
+	.balign 8
+1:	mvns	r5, r5			@ EOS in second word?
+	bne	4f
+	@ Combine first and second words
+	orr	r2, r2, r3, lsh_gt #(\unalign*8)
+	@ Save leftover bytes from the two words
+	lsh_ls	r6, r3, #((4-\unalign)*8)
+	sfi_breg r0, \
+	str	r2, [\B], #4
+	@ The "real" start of the unaligned copy loop.
+	sfi_breg r1, \
+	ldrd	r2, r3, [\B], #8	@ Load 8 more bytes
+	uqsub8	r4, r7, r2		@ Find EOS
+	sfi_pld	r1, #128
+	uqsub8	r5, r7, r3
+	sfi_pld	r0, #128
+	mvns	r4, r4			@ EOS in first word?
+	bne	3f
+	@ Combine the leftover and the first word
+	orr	r6, r6, r2, lsh_gt #(\unalign*8)
+	@ Discard used bytes from the first word.
+	lsh_ls	r2, r2, #((4-\unalign)*8)
+	sfi_breg r0, \
+	str	r6, [\B], #4
+	b	1b
+	@ Found EOS in one of the words; adjust backward
+3:	sub	r1, r1, #4
+	mov	r2, r6
+4:	sub	r1, r1, #4
+	@ And store the remaining bytes from the leftover
+#ifdef __ARMEB__
+	rev	r2, r2
+#endif
+.rept	\unalign
+	sfi_breg r0, \
+	strb	r2, [\B], #1
+	lsr	r2, r2, #8
+.endr
+	b	.Lbyte_loop
+.endm
+
+.Lunaligned1:
+	unaligned_copy	1
+.Lunaligned2:
+	unaligned_copy	2
+.Lunaligned3:
+	unaligned_copy	3
+
+END (strcpy)
+
+libc_hidden_builtin_def (strcpy)
diff --git a/sysdeps/arm/armv6/strlen.S b/sysdeps/arm/armv6/strlen.S
new file mode 100644
index 0000000000..290d7bc86d
--- /dev/null
+++ b/sysdeps/arm/armv6/strlen.S
@@ -0,0 +1,103 @@
+/* strlen -- find the length of a nul-terminated string.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	.syntax unified
+	.text
+
+ENTRY (strlen)
+	@ r0 = start of string
+	sfi_breg r0, \
+	ldrb	r2, [\B]		@ load the first byte asap
+
+	@ To cater to long strings, we want to search through a few
+	@ characters until we reach an aligned pointer.  To cater to
+	@ small strings, we don't want to start doing word operations
+	@ immediately.  The compromise is a maximum of 16 bytes less
+	@ whatever is required to end with an aligned pointer.
+	@ r3 = number of characters to search in alignment loop
+	and	r3, r0, #7
+	mov	r1, r0			@ Save the input pointer
+	rsb	r3, r3, #15		@ 16 - 1 peeled loop iteration
+	cmp	r2, #0
+	beq	99f
+
+	@ Loop until we find ...
+1:	sfi_breg r0, \
+	ldrb	r2, [\B, #1]!
+	subs	r3, r3, #1		@ ... the aligment point
+	it	ne
+	cmpne	r2, #0			@ ... or EOS
+	bne	1b
+
+	@ Disambiguate the exit possibilites above
+	cmp	r2, #0			@ Found EOS
+	beq	99f
+	add	r0, r0, #1
+
+	@ So now we're aligned.
+	sfi_breg r0, \
+	ldrd	r2, r3, [\B], #8
+#ifdef ARCH_HAS_T2
+	movw	ip, #0x0101
+	sfi_pld	r0, #64
+	movt	ip, #0x0101
+#else
+	ldr	ip, =0x01010101
+	sfi_pld	r0, #64
+#endif
+
+	@ Loop searching for EOS, 8 bytes at a time.
+	@ Subtracting (unsigned saturating) from 1 for any byte means that
+	@ we get 1 for any byte that was originally zero and 0 otherwise.
+	@ Therefore we consider the lsb of each byte the "found" bit.
+	.balign	16
+2:	uqsub8	r2, ip, r2		@ Find EOS
+	uqsub8	r3, ip, r3
+	sfi_pld	r0, #128		@ Prefetch 2 lines ahead
+	orrs	r3, r3, r2		@ Combine the two words
+	it	eq
+	sfi_breg r0, \
+	ldrdeq	r2, r3, [\B], #8
+	beq	2b
+
+	@ Found something.  Disambiguate between first and second words.
+	@ Adjust r0 to point to the word containing the match.
+	@ Adjust r2 to the found bits for the word containing the match.
+	cmp	r2, #0
+	sub	r0, r0, #4
+	ite	eq
+	moveq	r2, r3
+	subne	r0, r0, #4
+
+	@ Find the bit-offset of the match within the word.  Note that the
+	@ bit result from clz will be 7 higher than "true", but we'll
+	@ immediately discard those bits converting to a byte offset.
+#ifdef __ARMEL__
+	rev	r2, r2			@ For LE, count from the little end
+#endif
+	clz	r2, r2
+	add	r0, r0, r2, lsr #3	@ Adjust the pointer to the found byte
+99:
+	sub	r0, r0, r1		@ Subtract input to compute length
+	bx	lr
+
+END (strlen)
+
+libc_hidden_builtin_def (strlen)
diff --git a/sysdeps/arm/armv6/strrchr.S b/sysdeps/arm/armv6/strrchr.S
new file mode 100644
index 0000000000..a1e753c11b
--- /dev/null
+++ b/sysdeps/arm/armv6/strrchr.S
@@ -0,0 +1,131 @@
+/* strrchr -- find the last occurence of C in a nul-terminated string
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	.syntax unified
+	.text
+
+ENTRY (strrchr)
+	@ r0 = start of string
+	@ r1 = character to match
+	@ returns NULL for no match, or a pointer to the match
+
+	mov	r3, r0
+	mov	r0, #0
+	uxtb	r1, r1
+
+	@ Loop a few times until we're aligned.
+	tst	r3, #7
+	beq	2f
+1:	sfi_breg r3, \
+	ldrb	r2, [\B], #1
+	cmp	r2, r1			@ Find the character
+	it	eq
+	subeq	r0, r3, #1
+	cmp	r2, #0			@ Find EOS
+	it	eq
+	bxeq	lr
+	tst	r3, #7			@ Find the aligment point
+	bne	1b
+
+	@ So now we're aligned.  Now we actually need a stack frame.
+2:	push	{ r4, r5, r6, r7 }
+	cfi_adjust_cfa_offset (16)
+	cfi_rel_offset (r4, 0)
+	cfi_rel_offset (r5, 4)
+	cfi_rel_offset (r6, 8)
+	cfi_rel_offset (r7, 12)
+
+	orr	r1, r1, r1, lsl #8	@ Replicate C to all bytes
+#ifdef ARCH_HAS_T2
+	movw	ip, #0x0101
+	movt	ip, #0x0101
+#else
+	ldr	ip, =0x01010101
+#endif
+	orr	r1, r1, r1, lsl #16
+	mov	r2, #0			@ No found bits yet
+
+	@ Loop searching for EOS and C, 8 bytes at a time.
+	@ Any time we find a match in a word, we copy the address of
+	@ the word to r0, and the found bits to r2.
+3:	sfi_breg r3, \
+	ldrd	r4, r5, [\B], #8
+	@ Subtracting (unsigned saturating) from 1 means result of 1 for
+	@ any byte that was originally zero and 0 otherwise.  Therefore
+	@ we consider the lsb of each byte the "found" bit.
+	uqsub8	r6, ip, r4		@ Find EOS
+	uqsub8	r7, ip, r5
+	eor	r4, r4, r1		@ Convert C bytes to 0
+	eor	r5, r5, r1
+	uqsub8	r4, ip, r4		@ Find C
+	uqsub8	r5, ip, r5
+	cmp	r6, #0			@ Found EOS, first word
+	bne	4f
+	cmp	r4, #0			@ Handle C, first word
+	itt	ne
+	subne	r0, r3, #8
+	movne	r2, r4
+	cmp	r7, #0			@ Found EOS, second word
+	bne	5f
+	cmp	r5, #0			@ Handle C, second word
+	itt	ne
+	subne	r0, r3, #4
+	movne	r2, r5
+	b	3b
+
+	@ Found EOS in second word; fold to first word.
+5:	add	r3, r3, #4		@ Dec pointer to 2nd word, with below
+	mov	r4, r5			@ Overwrite first word C found
+	mov	r6, r7			@ Overwrite first word EOS found
+
+	@ Found EOS.  Zap found C after EOS.
+4:	sub	r3, r3, #8		@ Decrement pointer to first word
+#ifdef __ARMEB__
+	@ Byte swap to be congruent with LE, which is easier from here on.
+	rev	r6, r6			@ Byte swap found EOS,
+	rev	r4, r4			@ ... this found C
+	rev	r2, r2			@ ... prev found C
+#endif
+	sub	r7, r6, #1		@ Toggle EOS lsb and below
+	eor	r6, r6, r7		@ All bits below and including lsb
+	ands	r4, r4, r6		@ Zap C above EOS
+	itt	ne
+	movne	r2, r4			@ Copy to result, if still non-zero
+	movne	r0, r3
+
+	pop	{ r4, r5, r6, r7 }
+	cfi_adjust_cfa_offset (-16)
+	cfi_restore (r4)
+	cfi_restore (r5)
+	cfi_restore (r6)
+	cfi_restore (r7)
+
+	@ Adjust the result pointer if we found a word containing C.
+	cmp	r2, #0
+	clz	r2, r2			@ Find the bit offset of the last C
+	itt	ne
+	rsbne	r2, r2, #32		@ Convert to a count from the right
+	addne	r0, r0, r2, lsr #3	@ Convert to byte offset and add.
+	bx	lr
+
+END (strrchr)
+
+weak_alias (strrchr, rindex)
+libc_hidden_builtin_def (strrchr)
diff --git a/sysdeps/arm/armv6t2/Implies b/sysdeps/arm/armv6t2/Implies
new file mode 100644
index 0000000000..20a87fc8a5
--- /dev/null
+++ b/sysdeps/arm/armv6t2/Implies
@@ -0,0 +1,2 @@
+# We can do everything that 6 can
+arm/armv6
diff --git a/sysdeps/arm/armv6t2/ffs.S b/sysdeps/arm/armv6t2/ffs.S
new file mode 100644
index 0000000000..b61624aedc
--- /dev/null
+++ b/sysdeps/arm/armv6t2/ffs.S
@@ -0,0 +1,36 @@
+/* ffs -- find first set bit in an int, from least significant end.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	.syntax unified
+	.text
+
+ENTRY (__ffs)
+	cmp	r0, #0
+	rbit	r0, r0
+	itt	ne
+	clzne	r0, r0
+	addne	r0, r0, #1
+	bx	lr
+END (__ffs)
+
+weak_alias (__ffs, ffs)
+weak_alias (__ffs, ffsl)
+libc_hidden_def (__ffs)
+libc_hidden_builtin_def (ffs)
diff --git a/sysdeps/arm/armv6t2/ffsll.S b/sysdeps/arm/armv6t2/ffsll.S
new file mode 100644
index 0000000000..204ff80092
--- /dev/null
+++ b/sysdeps/arm/armv6t2/ffsll.S
@@ -0,0 +1,50 @@
+/* ffsll -- find first set bit in a long long, from least significant end.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	.syntax unified
+	.text
+
+ENTRY (ffsll)
+	@ If low part is 0, operate on the high part.  Ensure that the
+	@ word on which we operate is in r0.  Set r2 to the bit offset
+	@ of the word being considered.  Set the flags for the word
+	@ being operated on.
+#ifdef __ARMEL__
+	cmp	r0, #0
+	itee	ne
+	movne	r2, #0
+	moveq	r2, #32
+	movseq	r0, r1
+#else
+	cmp	r1, #0
+	ittee	ne
+	movne	r2, #0
+	movne	r0, r1
+	moveq	r2, #32
+	cmpeq	r0, #0
+#endif
+	@ Perform the ffs on r0.
+	rbit	r0, r0
+	ittt	ne
+	clzne	r0, r0
+	addne	r2, r2, #1
+	addne	r0, r0, r2
+	bx	lr
+END (ffsll)
diff --git a/sysdeps/arm/armv6t2/memchr.S b/sysdeps/arm/armv6t2/memchr.S
new file mode 100644
index 0000000000..65bb94fe70
--- /dev/null
+++ b/sysdeps/arm/armv6t2/memchr.S
@@ -0,0 +1,187 @@
+/* Copyright (C) 2011-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Code contributed by Dave Gilbert <david.gilbert@linaro.org>
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+@ This memchr routine is optimised on a Cortex-A9 and should work on all ARMv7
+@ and ARMv6T2 processors.  It has a fast path for short sizes, and has an
+@ optimised path for large data sets; the worst case is finding the match early
+@ in a large data set.
+@ Note: The use of cbz/cbnz means it's Thumb only
+
+@ 2011-07-15 david.gilbert@linaro.org
+@    Copy from Cortex strings release 21 and change license
+@ http://bazaar.launchpad.net/~linaro-toolchain-dev/cortex-strings/trunk/view/head:/src/linaro-a9/memchr.S
+@    Change function declarations/entry/exit
+@ 2011-12-01 david.gilbert@linaro.org
+@    Add some fixes from comments received (including use of ldrd instead ldm)
+@ 2011-12-07 david.gilbert@linaro.org
+@    Removed cbz from align loop - can't be taken
+
+@ this lets us check a flag in a 00/ff byte easily in either endianness
+#ifdef __ARMEB__
+#define CHARTSTMASK(c) 1<<(31-(c*8))
+#else
+#define CHARTSTMASK(c) 1<<(c*8)
+#endif
+	.syntax unified
+
+	.text
+#ifdef NO_THUMB
+	.arm
+#else
+	.thumb
+	.thumb_func
+#endif
+	.global memchr
+	.type memchr,%function
+ENTRY(memchr)
+	@ r0 = start of memory to scan
+	@ r1 = character to look for
+	@ r2 = length
+	@ returns r0 = pointer to character or NULL if not found
+	and	r1,r1,#0xff	@ Don't think we can trust the caller to actually pass a char
+
+	cmp	r2,#16		@ If it's short don't bother with anything clever
+	blt	20f
+
+	tst	r0, #7		@ If it's already aligned skip the next bit
+	beq	10f
+
+	@ Work up to an aligned point
+5:
+	sfi_breg r0, \
+	ldrb	r3, [\B],#1
+	subs	r2, r2, #1
+	cmp	r3, r1
+	beq	50f		@ If it matches exit found
+	tst	r0, #7
+	bne	5b		@ If not aligned yet then do next byte
+
+10:
+	@ At this point, we are aligned, we know we have at least 8 bytes to work with
+	push	{r4,r5,r6,r7}
+	cfi_adjust_cfa_offset (16)
+	cfi_rel_offset (r4, 0)
+	cfi_rel_offset (r5, 4)
+	cfi_rel_offset (r6, 8)
+	cfi_rel_offset (r7, 12)
+
+	cfi_remember_state
+
+	orr	r1, r1, r1, lsl #8	@ expand the match word across to all bytes
+	orr	r1, r1, r1, lsl #16
+	bic	r6, r2, #7	@ Number of double words to work with * 8
+	mvns	r7, #0		@ all F's
+	movs	r3, #0
+
+15:
+	sfi_breg r0, \
+	ldrd 	r4,r5, [\B],#8
+#ifndef NO_THUMB
+	subs	r6, r6, #8
+#endif
+	eor	r4,r4, r1	@ Get it so that r4,r5 have 00's where the bytes match the target
+	eor	r5,r5, r1
+	uadd8	r4, r4, r7	@ Parallel add 0xff - sets the GE bits for anything that wasn't 0
+	sel	r4, r3, r7	@ bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
+	uadd8	r5, r5, r7	@ Parallel add 0xff - sets the GE bits for anything that wasn't 0
+	sel	r5, r4, r7	@ chained....bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
+#ifndef NO_THUMB
+	cbnz	r5, 60f
+#else
+	cmp	r5, #0
+	bne	60f
+	subs	r6, r6, #8
+#endif
+	bne	15b		@ (Flags from the subs above) If not run out of bytes then go around again
+
+	pop	{r4,r5,r6,r7}
+	cfi_adjust_cfa_offset (-16)
+	cfi_restore (r4)
+	cfi_restore (r5)
+	cfi_restore (r6)
+	cfi_restore (r7)
+
+	and	r1,r1,#0xff	@ Get r1 back to a single character from the expansion above
+	and	r2,r2,#7	@ Leave the count remaining as the number after the double words have been done
+
+20:
+#ifndef NO_THUMB
+	cbz	r2, 40f		@ 0 length or hit the end already then not found
+#else
+	cmp	r2, #0
+	beq	40f
+#endif
+
+21:  @ Post aligned section, or just a short call
+	sfi_breg r0, \
+	ldrb	r3,[\B],#1
+#ifndef NO_THUMB
+	subs	r2,r2,#1
+	eor	r3,r3,r1	@ r3 = 0 if match - doesn't break flags from sub
+	cbz	r3, 50f
+#else
+	eors	r3, r3, r1
+	beq	50f
+	subs	r2, r2, #1
+#endif
+	bne	21b		@ on r2 flags
+
+40:
+	movs	r0,#0		@ not found
+	DO_RET(lr)
+
+50:
+	subs	r0,r0,#1	@ found
+	DO_RET(lr)
+
+60:  @ We're here because the fast path found a hit - now we have to track down exactly which word it was
+     @ r0 points to the start of the double word after the one that was tested
+     @ r4 has the 00/ff pattern for the first word, r5 has the chained value
+	cfi_restore_state
+	cmp	r4, #0
+	itte	eq
+	moveq	r4, r5		@ the end is in the 2nd word
+	subeq	r0,r0,#3	@ Points to 2nd byte of 2nd word
+	subne	r0,r0,#7	@ or 2nd byte of 1st word
+
+	@ r0 currently points to the 2nd byte of the word containing the hit
+	tst	r4, # CHARTSTMASK(0)	@ 1st character
+	bne	61f
+	adds	r0,r0,#1
+	tst	r4, # CHARTSTMASK(1)	@ 2nd character
+	ittt	eq
+	addeq	r0,r0,#1
+	tsteq	r4, # (3<<15)		@ 2nd & 3rd character
+	@ If not the 3rd must be the last one
+	addeq	r0,r0,#1
+
+61:
+	pop	{r4,r5,r6,r7}
+	cfi_adjust_cfa_offset (-16)
+	cfi_restore (r4)
+	cfi_restore (r5)
+	cfi_restore (r6)
+	cfi_restore (r7)
+
+	subs	r0,r0,#1
+	DO_RET(lr)
+
+END(memchr)
+libc_hidden_builtin_def (memchr)
diff --git a/sysdeps/arm/armv6t2/strlen.S b/sysdeps/arm/armv6t2/strlen.S
new file mode 100644
index 0000000000..1706f6c6b8
--- /dev/null
+++ b/sysdeps/arm/armv6t2/strlen.S
@@ -0,0 +1,169 @@
+/* Copyright (C) 2010-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/*
+   Assumes:
+   ARMv6T2, AArch32
+
+ */
+
+#include <arm-features.h>               /* This might #define NO_THUMB.  */
+#include <sysdep.h>
+
+#ifdef __ARMEB__
+#define S2LO		lsl
+#define S2HI		lsr
+#else
+#define S2LO		lsr
+#define S2HI		lsl
+#endif
+
+#ifndef NO_THUMB
+/* This code is best on Thumb.  */
+	.thumb
+#else
+/* Using bne.w explicitly is desirable in Thumb mode because it helps
+   align the following label without a nop.  In ARM mode there is no
+   such difference.  */
+.macro bne.w label
+	bne \label
+.endm
+
+/* This clobbers the condition codes, which the real Thumb cbnz instruction
+   does not do.  But it doesn't matter for any of the uses here.  */
+.macro cbnz reg, label
+	cmp \reg, #0
+	bne \label
+.endm
+#endif
+
+/* Parameters and result.  */
+#define srcin		r0
+#define result		r0
+
+/* Internal variables.  */
+#define src		r1
+#define data1a		r2
+#define data1b		r3
+#define const_m1	r12
+#define const_0		r4
+#define tmp1		r4		/* Overlaps const_0  */
+#define tmp2		r5
+
+	.text
+	.p2align 6
+ENTRY(strlen)
+	sfi_pld	srcin, #0
+	strd	r4, r5, [sp, #-8]!
+	cfi_adjust_cfa_offset (8)
+	cfi_rel_offset (r4, 0)
+	cfi_rel_offset (r5, 4)
+	cfi_remember_state
+	bic	src, srcin, #7
+	mvn	const_m1, #0
+	ands	tmp1, srcin, #7		/* (8 - bytes) to alignment.  */
+	sfi_pld	src, #32
+	bne.w	.Lmisaligned8
+	mov	const_0, #0
+	mov	result, #-8
+.Lloop_aligned:
+	/* Bytes 0-7.  */
+	sfi_breg src, \
+	ldrd	data1a, data1b, [\B]
+	sfi_pld	src, #64
+	add	result, result, #8
+.Lstart_realigned:
+	uadd8	data1a, data1a, const_m1	/* Saturating GE<0:3> set.  */
+	sel	data1a, const_0, const_m1	/* Select based on GE<0:3>.  */
+	uadd8	data1b, data1b, const_m1
+	sel	data1b, data1a, const_m1	/* Only used if d1a == 0.  */
+	cbnz	data1b, .Lnull_found
+
+	/* Bytes 8-15.  */
+	sfi_breg src, \
+	ldrd	data1a, data1b, [\B, #8]
+	uadd8	data1a, data1a, const_m1	/* Saturating GE<0:3> set.  */
+	add	result, result, #8
+	sel	data1a, const_0, const_m1	/* Select based on GE<0:3>.  */
+	uadd8	data1b, data1b, const_m1
+	sel	data1b, data1a, const_m1	/* Only used if d1a == 0.  */
+	cbnz	data1b, .Lnull_found
+
+	/* Bytes 16-23.  */
+	sfi_breg src, \
+	ldrd	data1a, data1b, [\B, #16]
+	uadd8	data1a, data1a, const_m1	/* Saturating GE<0:3> set.  */
+	add	result, result, #8
+	sel	data1a, const_0, const_m1	/* Select based on GE<0:3>.  */
+	uadd8	data1b, data1b, const_m1
+	sel	data1b, data1a, const_m1	/* Only used if d1a == 0.  */
+	cbnz	data1b, .Lnull_found
+
+	/* Bytes 24-31.  */
+	sfi_breg src, \
+	ldrd	data1a, data1b, [\B, #24]
+	add	src, src, #32
+	uadd8	data1a, data1a, const_m1	/* Saturating GE<0:3> set.  */
+	add	result, result, #8
+	sel	data1a, const_0, const_m1	/* Select based on GE<0:3>.  */
+	uadd8	data1b, data1b, const_m1
+	sel	data1b, data1a, const_m1	/* Only used if d1a == 0.  */
+	cmp	data1b, #0
+	beq	.Lloop_aligned
+
+.Lnull_found:
+	cmp	data1a, #0
+	itt	eq
+	addeq	result, result, #4
+	moveq	data1a, data1b
+#ifndef __ARMEB__
+	rev	data1a, data1a
+#endif
+	clz	data1a, data1a
+	ldrd	r4, r5, [sp], #8
+	cfi_adjust_cfa_offset (-8)
+	cfi_restore (r4)
+	cfi_restore (r5)
+	add	result, result, data1a, lsr #3	/* Bits -> Bytes.  */
+	DO_RET(lr)
+
+.Lmisaligned8:
+	cfi_restore_state
+	sfi_breg src, \
+	ldrd	data1a, data1b, [\B]
+	and	tmp2, tmp1, #3
+	rsb	result, tmp1, #0
+	lsl	tmp2, tmp2, #3			/* Bytes -> bits.  */
+	tst	tmp1, #4
+	sfi_pld	src, #64
+	S2HI	tmp2, const_m1, tmp2
+#ifdef NO_THUMB
+	mvn	tmp1, tmp2
+	orr	data1a, data1a, tmp1
+	itt	ne
+	orrne	data1b, data1b, tmp1
+#else
+	orn	data1a, data1a, tmp2
+	itt	ne
+	ornne	data1b, data1b, tmp2
+#endif
+	movne	data1a, const_m1
+	mov	const_0, #0
+	b	.Lstart_realigned
+
+END(strlen)
+libc_hidden_builtin_def (strlen)
diff --git a/sysdeps/arm/armv7/Implies b/sysdeps/arm/armv7/Implies
new file mode 100644
index 0000000000..c6cd0eb877
--- /dev/null
+++ b/sysdeps/arm/armv7/Implies
@@ -0,0 +1,2 @@
+# We can do everything that 6T2 can
+arm/armv6t2
diff --git a/sysdeps/arm/armv7/configure b/sysdeps/arm/armv7/configure
new file mode 100644
index 0000000000..46e5d52df4
--- /dev/null
+++ b/sysdeps/arm/armv7/configure
@@ -0,0 +1,72 @@
+# This file is generated from configure.ac by Autoconf.  DO NOT EDIT!
+ # Local configure fragment for sysdeps/arm/armv7.
+
+# We need binutils 2.21 to ensure that NEON alignments are assembled correctly.
+libc_cv_arm_as_version_ok=yes
+for ac_prog in $AS
+do
+  # Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+$as_echo_n "checking for $ac_word... " >&6; }
+if ${ac_cv_prog_AS+:} false; then :
+  $as_echo_n "(cached) " >&6
+else
+  if test -n "$AS"; then
+  ac_cv_prog_AS="$AS" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+    for ac_exec_ext in '' $ac_executable_extensions; do
+  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+    ac_cv_prog_AS="$ac_prog"
+    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+  done
+IFS=$as_save_IFS
+
+fi
+fi
+AS=$ac_cv_prog_AS
+if test -n "$AS"; then
+  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AS" >&5
+$as_echo "$AS" >&6; }
+else
+  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+$as_echo "no" >&6; }
+fi
+
+
+  test -n "$AS" && break
+done
+
+if test -z "$AS"; then
+  ac_verc_fail=yes
+else
+  # Found it, now check the version.
+  { $as_echo "$as_me:${as_lineno-$LINENO}: checking version of $AS" >&5
+$as_echo_n "checking version of $AS... " >&6; }
+  ac_prog_version=`$AS --version 2>&1 | sed -n 's/^.*GNU assembler.* \([0-9]*\.[0-9.]*\).*$/\1/p'`
+  case $ac_prog_version in
+    '') ac_prog_version="v. ?.??, bad"; ac_verc_fail=yes;;
+    2.1[0-9][0-9]*|2.2[1-9]*|2.[3-9][0-9]*|[3-9].*|[1-9][0-9]*)
+       ac_prog_version="$ac_prog_version, ok"; ac_verc_fail=no;;
+    *) ac_prog_version="$ac_prog_version, bad"; ac_verc_fail=yes;;
+
+  esac
+  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_prog_version" >&5
+$as_echo "$ac_prog_version" >&6; }
+fi
+if test $ac_verc_fail = yes; then
+  libc_cv_arm_as_version_ok=no
+fi
+
+
+if test $libc_cv_arm_as_version_ok != yes; then
+  as_fn_error $? "as version too old, at least 2.21 is required" "$LINENO" 5
+fi
diff --git a/sysdeps/arm/armv7/configure.ac b/sysdeps/arm/armv7/configure.ac
new file mode 100644
index 0000000000..01e93ecd36
--- /dev/null
+++ b/sysdeps/arm/armv7/configure.ac
@@ -0,0 +1,12 @@
+GLIBC_PROVIDES dnl See aclocal.m4 in the top level source directory.
+# Local configure fragment for sysdeps/arm/armv7.
+
+# We need binutils 2.21 to ensure that NEON alignments are assembled correctly.
+libc_cv_arm_as_version_ok=yes
+AC_CHECK_PROG_VER(AS, $AS, --version,
+                  [GNU assembler.* \([0-9]*\.[0-9.]*\)],
+                  [2.1[0-9][0-9]*|2.2[1-9]*|2.[3-9][0-9]*|[3-9].*|[1-9][0-9]*], libc_cv_arm_as_version_ok=no)
+
+if test $libc_cv_arm_as_version_ok != yes; then
+  AC_MSG_ERROR([as version too old, at least 2.21 is required])
+fi
diff --git a/sysdeps/arm/armv7/multiarch/Makefile b/sysdeps/arm/armv7/multiarch/Makefile
new file mode 100644
index 0000000000..e834cc937f
--- /dev/null
+++ b/sysdeps/arm/armv7/multiarch/Makefile
@@ -0,0 +1,3 @@
+ifeq ($(subdir),string)
+sysdep_routines += memcpy_neon memcpy_vfp
+endif
diff --git a/sysdeps/arm/armv7/multiarch/aeabi_memcpy.c b/sysdeps/arm/armv7/multiarch/aeabi_memcpy.c
new file mode 100644
index 0000000000..c6a2a98a55
--- /dev/null
+++ b/sysdeps/arm/armv7/multiarch/aeabi_memcpy.c
@@ -0,0 +1,2 @@
+/* Empty file to override sysdeps/arm version. See memcpy.S for definitions
+   of these functions.  */
diff --git a/sysdeps/arm/armv7/multiarch/ifunc-impl-list.c b/sysdeps/arm/armv7/multiarch/ifunc-impl-list.c
new file mode 100644
index 0000000000..2515418eda
--- /dev/null
+++ b/sysdeps/arm/armv7/multiarch/ifunc-impl-list.c
@@ -0,0 +1,56 @@
+/* Enumerate available IFUNC implementations of a function.  ARM version.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <stdbool.h>
+#include <string.h>
+#include <ldsodefs.h>
+#include <sysdep.h>
+#include <ifunc-impl-list.h>
+
+/* Fill ARRAY of MAX elements with IFUNC implementations for function
+   NAME and return the number of valid entries.  */
+
+size_t
+__libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
+			size_t max)
+{
+  size_t i = 0;
+
+  bool use_neon = true;
+#ifdef __ARM_NEON__
+# define __memcpy_neon	memcpy
+#else
+  use_neon = (GLRO(dl_hwcap) & HWCAP_ARM_NEON) != 0;
+#endif
+
+#ifndef __ARM_NEON__
+  bool use_vfp = true;
+# ifdef __SOFTFP__
+  use_vfp = (GLRO(dl_hwcap) & HWCAP_ARM_VFP) != 0;
+# endif
+#endif
+
+  IFUNC_IMPL (i, name, memcpy,
+	      IFUNC_IMPL_ADD (array, i, memcpy, use_neon, __memcpy_neon)
+#ifndef __ARM_NEON__
+	      IFUNC_IMPL_ADD (array, i, memcpy, use_vfp, __memcpy_vfp)
+#endif
+	      IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_arm));
+
+  return i;
+}
diff --git a/sysdeps/arm/armv7/multiarch/memcpy.S b/sysdeps/arm/armv7/multiarch/memcpy.S
new file mode 100644
index 0000000000..c4f4e80fb0
--- /dev/null
+++ b/sysdeps/arm/armv7/multiarch/memcpy.S
@@ -0,0 +1,76 @@
+/* Multiple versions of memcpy
+   All versions must be listed in ifunc-impl-list.c.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Thumb requires excess IT instructions here.  */
+#define NO_THUMB
+#include <sysdep.h>
+#include <rtld-global-offsets.h>
+
+#ifndef NOT_IN_libc
+/* Under __ARM_NEON__, memcpy_neon.S defines the name memcpy.  */
+# ifndef __ARM_NEON__
+	.text
+ENTRY(memcpy)
+	.type	memcpy, %gnu_indirect_function
+# ifdef __SOFTFP__
+	ldr	r1, .Lmemcpy_arm
+	tst	r0, #HWCAP_ARM_VFP
+	ldrne	r1, .Lmemcpy_vfp
+# else
+	ldr	r1, .Lmemcpy_vfp
+# endif
+	tst	r0, #HWCAP_ARM_NEON
+	ldrne	r1, .Lmemcpy_neon
+1:
+	add	r0, r1, pc
+	DO_RET(lr)
+
+# ifdef __SOFTFP__
+.Lmemcpy_arm:
+	.long	C_SYMBOL_NAME(__memcpy_arm) - 1b - PC_OFS
+# endif
+.Lmemcpy_neon:
+	.long	C_SYMBOL_NAME(__memcpy_neon) - 1b - PC_OFS
+.Lmemcpy_vfp:
+	.long	C_SYMBOL_NAME(__memcpy_vfp) - 1b - PC_OFS
+
+END(memcpy)
+
+libc_hidden_builtin_def (memcpy)
+#endif  /* Not __ARM_NEON__.  */
+
+/* These versions of memcpy are defined not to clobber any VFP or NEON
+   registers so they must always call the ARM variant of the memcpy code.  */
+strong_alias (__memcpy_arm, __aeabi_memcpy)
+strong_alias (__memcpy_arm, __aeabi_memcpy4)
+strong_alias (__memcpy_arm, __aeabi_memcpy8)
+libc_hidden_def (__memcpy_arm)
+
+#undef libc_hidden_builtin_def
+#define libc_hidden_builtin_def(name)
+#undef weak_alias
+#define weak_alias(x, y)
+#undef libc_hidden_def
+#define libc_hidden_def(name)
+
+#define memcpy __memcpy_arm
+
+#endif
+
+#include "memcpy_impl.S"
diff --git a/sysdeps/arm/armv7/multiarch/memcpy_impl.S b/sysdeps/arm/armv7/multiarch/memcpy_impl.S
new file mode 100644
index 0000000000..1562416cf6
--- /dev/null
+++ b/sysdeps/arm/armv7/multiarch/memcpy_impl.S
@@ -0,0 +1,917 @@
+/* NEON/VFP/ARM version of memcpy optimized for Cortex-A15.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.
+
+   This memcpy routine is optimised for Cortex-A15 cores and takes advantage
+   of VFP or NEON when built with the appropriate flags.
+
+   Assumptions:
+
+    ARMv6 (ARMv7-a if using Neon)
+    ARM state
+    Unaligned accesses
+
+ */
+
+/* Thumb cannot encode negative immediate offsets in memory operations.  */
+#ifndef NO_THUMB
+#define NO_THUMB
+#endif
+#include <sysdep.h>
+#include <arm-features.h>
+
+	.syntax unified
+	/* This implementation requires ARM state.  */
+	.arm
+
+#ifdef MEMCPY_NEON
+
+	.fpu	neon
+	.arch	armv7-a
+# define FRAME_SIZE	4
+# define USE_VFP
+# define USE_NEON
+
+#elif defined (MEMCPY_VFP)
+
+	.arch	armv6
+	.fpu	vfpv2
+# define FRAME_SIZE	32
+# define USE_VFP
+
+#else
+	.arch	armv6
+# define FRAME_SIZE    32
+
+#endif
+
+#define ALIGN(addr, align) addr:align
+
+#define INSN_SIZE	4
+
+/* Call parameters.  */
+#define dstin	r0
+#define src	r1
+#define count	r2
+
+/* Locals.  */
+#define tmp1	r3
+#define dst	ip
+#define tmp2	r8
+
+/* These two macros both work by repeated invocation of the macro
+   dispatch_step (not defined here).  That macro performs one "step",
+   doing one load instruction and one store instruction to copy one
+   "unit".  On entry, TMP1 contains the number of bytes to be copied,
+   a multiple of the unit size.  The macro clobbers TMP1 in the
+   process of doing a computed jump to the tail containing the
+   appropriate number of steps.
+
+   In dispatch_7_dword, dispatch_step is invoked seven times, with an
+   argument that is 7 for the first and 1 for the last.  Units are
+   double-words (8 bytes).  TMP1 is at most 56.
+
+   In dispatch_15_word, dispatch_step is invoked fifteen times,
+   with an argument that is 15 for the first and 1 for the last.
+   Units are words (4 bytes).  TMP1 is at most 60.  */
+
+#ifndef ARM_ALWAYS_BX
+# if ARM_BX_ALIGN_LOG2 != 2
+#  error case not handled
+# endif
+	.macro dispatch_7_dword
+	rsb	tmp1, tmp1, #((7 * 8) - PC_OFS + INSN_SIZE)
+	add	pc, pc, tmp1
+	dispatch_step 7
+	dispatch_step 6
+	dispatch_step 5
+	dispatch_step 4
+	dispatch_step 3
+	dispatch_step 2
+	dispatch_step 1
+	.purgem dispatch_step
+	.endm
+
+	.macro dispatch_15_word
+	rsb	tmp1, tmp1, #((15 * 4) - PC_OFS/2 + INSN_SIZE/2)
+	add	pc, pc, tmp1, lsl #1
+	dispatch_step 15
+	dispatch_step 14
+	dispatch_step 13
+	dispatch_step 12
+	dispatch_step 11
+	dispatch_step 10
+	dispatch_step 9
+	dispatch_step 8
+	dispatch_step 7
+	dispatch_step 6
+	dispatch_step 5
+	dispatch_step 4
+	dispatch_step 3
+	dispatch_step 2
+	dispatch_step 1
+	.purgem dispatch_step
+	.endm
+#else
+# if ARM_BX_ALIGN_LOG2 < 3
+#  error case not handled
+# endif
+	.macro dispatch_helper steps, log2_bytes_per_step
+	/* TMP1 gets (max_bytes - bytes_to_copy), where max_bytes is
+	   (STEPS << LOG2_BYTES_PER_STEP).
+	   So this is (steps_to_skip << LOG2_BYTES_PER_STEP).
+	   Then it needs further adjustment to compensate for the
+	   distance between the PC value taken below (0f + PC_OFS)
+	   and the first step's instructions (1f).  */
+	rsb	tmp1, tmp1, #((\steps << \log2_bytes_per_step) \
+			      + ((1f - PC_OFS - 0f) \
+				 >> (ARM_BX_ALIGN_LOG2 - \log2_bytes_per_step)))
+	/* Shifting down LOG2_BYTES_PER_STEP gives us the number of
+	   steps to skip, then shifting up ARM_BX_ALIGN_LOG2 gives us
+	   the (byte) distance to add to the PC.  */
+0:	add	tmp1, pc, tmp1, lsl #(ARM_BX_ALIGN_LOG2 - \log2_bytes_per_step)
+	bx	tmp1
+	.p2align ARM_BX_ALIGN_LOG2
+1:
+	.endm
+
+	.macro dispatch_7_dword
+	dispatch_helper 7, 3
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 7
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 6
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 5
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 4
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 3
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 2
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 1
+	.p2align ARM_BX_ALIGN_LOG2
+	.purgem dispatch_step
+	.endm
+
+	.macro dispatch_15_word
+	dispatch_helper 15, 2
+	dispatch_step 15
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 14
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 13
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 12
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 11
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 10
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 9
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 8
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 7
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 6
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 5
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 4
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 3
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 2
+	.p2align ARM_BX_ALIGN_LOG2
+	dispatch_step 1
+	.p2align ARM_BX_ALIGN_LOG2
+	.purgem dispatch_step
+	.endm
+
+#endif
+
+#ifndef USE_NEON
+/* For bulk copies using GP registers.  */
+#define	A_l	r2		/* Call-clobbered.  */
+#define	A_h	r3		/* Call-clobbered.  */
+#define	B_l	r4
+#define	B_h	r5
+#define	C_l	r6
+#define	C_h	r7
+/* Don't use the pair r8,r9 because in some EABI variants r9 is reserved.  */
+#define	D_l	r10
+#define	D_h	r11
+#endif
+
+/* Number of lines ahead to pre-fetch data.  If you change this the code
+   below will need adjustment to compensate.  */
+
+#define prefetch_lines	5
+
+#ifdef USE_VFP
+	.macro	cpy_line_vfp vreg, base
+	sfi_breg dst, \
+	vstr	\vreg, [\B, #\base]
+	sfi_breg src, \
+	vldr	\vreg, [\B, #\base]
+	sfi_breg dst, \
+	vstr	d0, [\B, #\base + 8]
+	sfi_breg src, \
+	vldr	d0, [\B, #\base + 8]
+	sfi_breg dst, \
+	vstr	d1, [\B, #\base + 16]
+	sfi_breg src, \
+	vldr	d1, [\B, #\base + 16]
+	sfi_breg dst, \
+	vstr	d2, [\B, #\base + 24]
+	sfi_breg src, \
+	vldr	d2, [\B, #\base + 24]
+	sfi_breg dst, \
+	vstr	\vreg, [\B, #\base + 32]
+	sfi_breg src, \
+	vldr	\vreg, [\B, #\base + prefetch_lines * 64 - 32]
+	sfi_breg dst, \
+	vstr	d0, [\B, #\base + 40]
+	sfi_breg src, \
+	vldr	d0, [\B, #\base + 40]
+	sfi_breg dst, \
+	vstr	d1, [\B, #\base + 48]
+	sfi_breg src, \
+	vldr	d1, [\B, #\base + 48]
+	sfi_breg dst, \
+	vstr	d2, [\B, #\base + 56]
+	sfi_breg src, \
+	vldr	d2, [\B, #\base + 56]
+	.endm
+
+	.macro	cpy_tail_vfp vreg, base
+	sfi_breg dst, \
+	vstr	\vreg, [\B, #\base]
+	sfi_breg src, \
+	vldr	\vreg, [\B, #\base]
+	sfi_breg dst, \
+	vstr	d0, [\B, #\base + 8]
+	sfi_breg src, \
+	vldr	d0, [\B, #\base + 8]
+	sfi_breg dst, \
+	vstr	d1, [\B, #\base + 16]
+	sfi_breg src, \
+	vldr	d1, [\B, #\base + 16]
+	sfi_breg dst, \
+	vstr	d2, [\B, #\base + 24]
+	sfi_breg src, \
+	vldr	d2, [\B, #\base + 24]
+	sfi_breg dst, \
+	vstr	\vreg, [\B, #\base + 32]
+	sfi_breg dst, \
+	vstr	d0, [\B, #\base + 40]
+	sfi_breg src, \
+	vldr	d0, [\B, #\base + 40]
+	sfi_breg dst, \
+	vstr	d1, [\B, #\base + 48]
+	sfi_breg src, \
+	vldr	d1, [\B, #\base + 48]
+	sfi_breg dst, \
+	vstr	d2, [\B, #\base + 56]
+	sfi_breg src, \
+	vldr	d2, [\B, #\base + 56]
+	.endm
+#endif
+
+	.p2align 6
+ENTRY(memcpy)
+
+	mov	dst, dstin	/* Preserve dstin, we need to return it.  */
+	cmp	count, #64
+	bge	.Lcpy_not_short
+	/* Deal with small copies quickly by dropping straight into the
+	   exit block.  */
+
+.Ltail63unaligned:
+#ifdef USE_NEON
+	/* These need an extra layer of macro just to work around a
+	   bug in the assembler's parser when an operand starts with
+	   a {...}.  http://sourceware.org/bugzilla/show_bug.cgi?id=15647
+	   tracks that bug; it was not fixed as of binutils-2.23.2.  */
+	.macro neon_load_d0 reg
+	vld1.8	{d0}, [\reg]!
+	.endm
+	.macro neon_store_d0 reg
+	vst1.8	{d0}, [\reg]!
+	.endm
+
+	/* These are used by the NaCl sfi_breg macro.  */
+	.macro _sfi_breg_dmask_neon_load_d0 reg
+	_sfi_dmask \reg
+	.endm
+	.macro _sfi_breg_dmask_neon_store_d0 reg
+	_sfi_dmask \reg
+	.endm
+
+	and	tmp1, count, #0x38
+	.macro dispatch_step i
+	sfi_breg src, neon_load_d0 \B
+	sfi_breg dst, neon_store_d0 \B
+	.endm
+	dispatch_7_dword
+
+	tst	count, #4
+	sfi_breg src, \
+	ldrne	tmp1, [\B], #4
+	sfi_breg dst, \
+	strne	tmp1, [\B], #4
+#else
+	/* Copy up to 15 full words of data.  May not be aligned.  */
+	/* Cannot use VFP for unaligned data.  */
+	and	tmp1, count, #0x3c
+	add	dst, dst, tmp1
+	add	src, src, tmp1
+	/* Jump directly into the sequence below at the correct offset.  */
+	.macro dispatch_step i
+	sfi_breg src, \
+	ldr	tmp1, [\B, #-(\i * 4)]
+	sfi_breg dst, \
+	str	tmp1, [\B, #-(\i * 4)]
+	.endm
+	dispatch_15_word
+#endif
+
+	lsls	count, count, #31
+	sfi_breg src, \
+	ldrhcs	tmp1, [\B], #2
+	sfi_breg src, \
+	ldrbne	src, [\B]		/* Src is dead, use as a scratch.  */
+	sfi_breg dst, \
+	strhcs	tmp1, [\B], #2
+	sfi_breg dst, \
+	strbne	src, [\B]
+	bx	lr
+
+.Lcpy_not_short:
+	/* At least 64 bytes to copy, but don't know the alignment yet.  */
+	str	tmp2, [sp, #-FRAME_SIZE]!
+	cfi_adjust_cfa_offset (FRAME_SIZE)
+	cfi_rel_offset (tmp2, 0)
+	cfi_remember_state
+	and	tmp2, src, #7
+	and	tmp1, dst, #7
+	cmp	tmp1, tmp2
+	bne	.Lcpy_notaligned
+
+#ifdef USE_VFP
+	/* Magic dust alert!  Force VFP on Cortex-A9.  Experiments show
+	   that the FP pipeline is much better at streaming loads and
+	   stores.  This is outside the critical loop.  */
+	vmov.f32	s0, s0
+#endif
+
+	/* SRC and DST have the same mutual 64-bit alignment, but we may
+	   still need to pre-copy some bytes to get to natural alignment.
+	   We bring SRC and DST into full 64-bit alignment.  */
+	lsls	tmp2, dst, #29
+	beq	1f
+	rsbs	tmp2, tmp2, #0
+	sub	count, count, tmp2, lsr #29
+	sfi_breg src, \
+	ldrmi	tmp1, [\B], #4
+	sfi_breg dst, \
+	strmi	tmp1, [\B], #4
+	lsls	tmp2, tmp2, #2
+	sfi_breg src, \
+	ldrhcs	tmp1, [\B], #2
+	sfi_breg src, \
+	ldrbne	tmp2, [\B], #1
+	sfi_breg dst, \
+	strhcs	tmp1, [\B], #2
+	sfi_breg dst, \
+	strbne	tmp2, [\B], #1
+
+1:
+	subs	tmp2, count, #64	/* Use tmp2 for count.  */
+	blt	.Ltail63aligned
+
+	cmp	tmp2, #512
+	bge	.Lcpy_body_long
+
+.Lcpy_body_medium:			/* Count in tmp2.  */
+#ifdef USE_VFP
+1:
+	sfi_breg src, \
+	vldr	d0, [\B, #0]
+	subs	tmp2, tmp2, #64
+	sfi_breg src, \
+	vldr	d1, [\B, #8]
+	sfi_breg dst, \
+	vstr	d0, [\B, #0]
+	sfi_breg src, \
+	vldr	d0, [\B, #16]
+	sfi_breg dst, \
+	vstr	d1, [\B, #8]
+	sfi_breg src, \
+	vldr	d1, [\B, #24]
+	sfi_breg dst, \
+	vstr	d0, [\B, #16]
+	sfi_breg src, \
+	vldr	d0, [\B, #32]
+	sfi_breg dst, \
+	vstr	d1, [\B, #24]
+	sfi_breg src, \
+	vldr	d1, [\B, #40]
+	sfi_breg dst, \
+	vstr	d0, [\B, #32]
+	sfi_breg src, \
+	vldr	d0, [\B, #48]
+	sfi_breg dst, \
+	vstr	d1, [\B, #40]
+	sfi_breg src, \
+	vldr	d1, [\B, #56]
+	sfi_breg dst, \
+	vstr	d0, [\B, #48]
+	add	src, src, #64
+	sfi_breg dst, \
+	vstr	d1, [\B, #56]
+	add	dst, dst, #64
+	bge	1b
+	tst	tmp2, #0x3f
+	beq	.Ldone
+
+.Ltail63aligned:			/* Count in tmp2.  */
+	and	tmp1, tmp2, #0x38
+	add	dst, dst, tmp1
+	add	src, src, tmp1
+	.macro dispatch_step i
+	sfi_breg src, \
+	vldr	d0, [\B, #-(\i * 8)]
+	sfi_breg dst, \
+	vstr	d0, [\B, #-(\i * 8)]
+	.endm
+	dispatch_7_dword
+#else
+	sub	src, src, #8
+	sub	dst, dst, #8
+1:
+	sfi_breg src, \
+	ldrd	A_l, A_h, [\B, #8]
+	sfi_breg dst, \
+	strd	A_l, A_h, [\B, #8]
+	sfi_breg src, \
+	ldrd	A_l, A_h, [\B, #16]
+	sfi_breg dst, \
+	strd	A_l, A_h, [\B, #16]
+	sfi_breg src, \
+	ldrd	A_l, A_h, [\B, #24]
+	sfi_breg dst, \
+	strd	A_l, A_h, [\B, #24]
+	sfi_breg src, \
+	ldrd	A_l, A_h, [\B, #32]
+	sfi_breg dst, \
+	strd	A_l, A_h, [\B, #32]
+	sfi_breg src, \
+	ldrd	A_l, A_h, [\B, #40]
+	sfi_breg dst, \
+	strd	A_l, A_h, [\B, #40]
+	sfi_breg src, \
+	ldrd	A_l, A_h, [\B, #48]
+	sfi_breg dst, \
+	strd	A_l, A_h, [\B, #48]
+	sfi_breg src, \
+	ldrd	A_l, A_h, [\B, #56]
+	sfi_breg dst, \
+	strd	A_l, A_h, [\B, #56]
+	sfi_breg src, \
+	ldrd	A_l, A_h, [\B, #64]!
+	sfi_breg dst, \
+	strd	A_l, A_h, [\B, #64]!
+	subs	tmp2, tmp2, #64
+	bge	1b
+	tst	tmp2, #0x3f
+	bne	1f
+	ldr	tmp2,[sp], #FRAME_SIZE
+	cfi_adjust_cfa_offset (-FRAME_SIZE)
+	cfi_restore (tmp2)
+	bx	lr
+
+	cfi_restore_state
+	cfi_remember_state
+1:
+	add	src, src, #8
+	add	dst, dst, #8
+
+.Ltail63aligned:			/* Count in tmp2.  */
+	/* Copy up to 7 d-words of data.  Similar to Ltail63unaligned, but
+	   we know that the src and dest are 64-bit aligned so we can use
+	   LDRD/STRD to improve efficiency.  */
+	/* TMP2 is now negative, but we don't care about that.  The bottom
+	   six bits still tell us how many bytes are left to copy.  */
+
+	and	tmp1, tmp2, #0x38
+	add	dst, dst, tmp1
+	add	src, src, tmp1
+	.macro dispatch_step i
+	sfi_breg src, \
+	ldrd	A_l, A_h, [\B, #-(\i * 8)]
+	sfi_breg dst, \
+	strd	A_l, A_h, [\B, #-(\i * 8)]
+	.endm
+	dispatch_7_dword
+#endif
+
+	tst	tmp2, #4
+	sfi_breg src, \
+	ldrne	tmp1, [\B], #4
+	sfi_breg dst, \
+	strne	tmp1, [\B], #4
+	lsls	tmp2, tmp2, #31		/* Count (tmp2) now dead. */
+	sfi_breg src, \
+	ldrhcs	tmp1, [\B], #2
+	sfi_breg src, \
+	ldrbne	tmp2, [\B]
+	sfi_breg dst, \
+	strhcs	tmp1, [\B], #2
+	sfi_breg dst, \
+	strbne	tmp2, [\B]
+
+.Ldone:
+	ldr	tmp2, [sp], #FRAME_SIZE
+	cfi_adjust_cfa_offset (-FRAME_SIZE)
+	cfi_restore (tmp2)
+	bx	lr
+
+	cfi_restore_state
+	cfi_remember_state
+
+.Lcpy_body_long:			/* Count in tmp2.  */
+
+	/* Long copy.  We know that there's at least (prefetch_lines * 64)
+	   bytes to go.  */
+#ifdef USE_VFP
+	/* Don't use PLD.  Instead, read some data in advance of the current
+	   copy position into a register.  This should act like a PLD
+	   operation but we won't have to repeat the transfer.  */
+
+	sfi_breg src, \
+	vldr	d3, [\B, #0]
+	sfi_breg src, \
+	vldr	d4, [\B, #64]
+	sfi_breg src, \
+	vldr	d5, [\B, #128]
+	sfi_breg src, \
+	vldr	d6, [\B, #192]
+	sfi_breg src, \
+	vldr	d7, [\B, #256]
+
+	sfi_breg src, \
+	vldr	d0, [\B, #8]
+	sfi_breg src, \
+	vldr	d1, [\B, #16]
+	sfi_breg src, \
+	vldr	d2, [\B, #24]
+	add	src, src, #32
+
+	subs	tmp2, tmp2, #prefetch_lines * 64 * 2
+	blt	2f
+1:
+	cpy_line_vfp	d3, 0
+	cpy_line_vfp	d4, 64
+	cpy_line_vfp	d5, 128
+	add	dst, dst, #3 * 64
+	add	src, src, #3 * 64
+	cpy_line_vfp	d6, 0
+	cpy_line_vfp	d7, 64
+	add	dst, dst, #2 * 64
+	add	src, src, #2 * 64
+	subs	tmp2, tmp2, #prefetch_lines * 64
+	bge	1b
+
+2:
+	cpy_tail_vfp	d3, 0
+	cpy_tail_vfp	d4, 64
+	cpy_tail_vfp	d5, 128
+	add	src, src, #3 * 64
+	add	dst, dst, #3 * 64
+	cpy_tail_vfp	d6, 0
+	sfi_breg dst, \
+	vstr	d7, [\B, #64]
+	sfi_breg src, \
+	vldr	d7, [\B, #64]
+	sfi_breg dst, \
+	vstr	d0, [\B, #64 + 8]
+	sfi_breg src, \
+	vldr	d0, [\B, #64 + 8]
+	sfi_breg dst, \
+	vstr	d1, [\B, #64 + 16]
+	sfi_breg src, \
+	vldr	d1, [\B, #64 + 16]
+	sfi_breg dst, \
+	vstr	d2, [\B, #64 + 24]
+	sfi_breg src, \
+	vldr	d2, [\B, #64 + 24]
+	sfi_breg dst, \
+	vstr	d7, [\B, #64 + 32]
+	add	src, src, #96
+	sfi_breg dst, \
+	vstr	d0, [\B, #64 + 40]
+	sfi_breg dst, \
+	vstr	d1, [\B, #64 + 48]
+	sfi_breg dst, \
+	vstr	d2, [\B, #64 + 56]
+	add	dst, dst, #128
+	add	tmp2, tmp2, #prefetch_lines * 64
+	b	.Lcpy_body_medium
+#else
+	/* Long copy.  Use an SMS style loop to maximize the I/O
+	   bandwidth of the core.  We don't have enough spare registers
+	   to synthesise prefetching, so use PLD operations.  */
+	/* Pre-bias src and dst.  */
+	sub	src, src, #8
+	sub	dst, dst, #8
+	sfi_pld	src, #8
+	sfi_pld	src, #72
+	subs	tmp2, tmp2, #64
+	sfi_pld	src, #136
+	sfi_breg src, \
+	ldrd	A_l, A_h, [\B, #8]
+	strd	B_l, B_h, [sp, #8]
+	cfi_rel_offset (B_l, 8)
+	cfi_rel_offset (B_h, 12)
+	sfi_breg src, \
+	ldrd	B_l, B_h, [\B, #16]
+	strd	C_l, C_h, [sp, #16]
+	cfi_rel_offset (C_l, 16)
+	cfi_rel_offset (C_h, 20)
+	sfi_breg src, \
+	ldrd	C_l, C_h, [\B, #24]
+	strd	D_l, D_h, [sp, #24]
+	cfi_rel_offset (D_l, 24)
+	cfi_rel_offset (D_h, 28)
+	sfi_pld	src, #200
+	sfi_breg src, \
+	ldrd	D_l, D_h, [\B, #32]!
+	b	1f
+	.p2align	6
+2:
+	sfi_pld	src, #232
+	sfi_breg dst, \
+	strd	A_l, A_h, [\B, #40]
+	sfi_breg src, \
+	ldrd	A_l, A_h, [\B, #40]
+	sfi_breg dst, \
+	strd	B_l, B_h, [\B, #48]
+	sfi_breg src, \
+	ldrd	B_l, B_h, [\B, #48]
+	sfi_breg dst, \
+	strd	C_l, C_h, [\B, #56]
+	sfi_breg src, \
+	ldrd	C_l, C_h, [\B, #56]
+	sfi_breg dst, \
+	strd	D_l, D_h, [\B, #64]!
+	sfi_breg src, \
+	ldrd	D_l, D_h, [\B, #64]!
+	subs	tmp2, tmp2, #64
+1:
+	sfi_breg dst, \
+	strd	A_l, A_h, [\B, #8]
+	sfi_breg src, \
+	ldrd	A_l, A_h, [\B, #8]
+	sfi_breg dst, \
+	strd	B_l, B_h, [\B, #16]
+	sfi_breg src, \
+	ldrd	B_l, B_h, [\B, #16]
+	sfi_breg dst, \
+	strd	C_l, C_h, [\B, #24]
+	sfi_breg src, \
+	ldrd	C_l, C_h, [\B, #24]
+	sfi_breg dst, \
+	strd	D_l, D_h, [\B, #32]
+	sfi_breg src, \
+	ldrd	D_l, D_h, [\B, #32]
+	bcs	2b
+	/* Save the remaining bytes and restore the callee-saved regs.  */
+	sfi_breg dst, \
+	strd	A_l, A_h, [\B, #40]
+	add	src, src, #40
+	sfi_breg dst, \
+	strd	B_l, B_h, [\B, #48]
+	ldrd	B_l, B_h, [sp, #8]
+	cfi_restore (B_l)
+	cfi_restore (B_h)
+	sfi_breg dst, \
+	strd	C_l, C_h, [\B, #56]
+	ldrd	C_l, C_h, [sp, #16]
+	cfi_restore (C_l)
+	cfi_restore (C_h)
+	sfi_breg dst, \
+	strd	D_l, D_h, [\B, #64]
+	ldrd	D_l, D_h, [sp, #24]
+	cfi_restore (D_l)
+	cfi_restore (D_h)
+	add	dst, dst, #72
+	tst	tmp2, #0x3f
+	bne	.Ltail63aligned
+	ldr	tmp2, [sp], #FRAME_SIZE
+	cfi_adjust_cfa_offset (-FRAME_SIZE)
+	cfi_restore (tmp2)
+	bx	lr
+#endif
+
+	cfi_restore_state
+	cfi_remember_state
+
+.Lcpy_notaligned:
+	sfi_pld	src
+	sfi_pld	src, #64
+	/* There's at least 64 bytes to copy, but there is no mutual
+	   alignment.  */
+	/* Bring DST to 64-bit alignment.  */
+	lsls	tmp2, dst, #29
+	sfi_pld	src, #(2 * 64)
+	beq	1f
+	rsbs	tmp2, tmp2, #0
+	sub	count, count, tmp2, lsr #29
+	sfi_breg src, \
+	ldrmi	tmp1, [\B], #4
+	sfi_breg dst, \
+	strmi	tmp1, [\B], #4
+	lsls	tmp2, tmp2, #2
+	sfi_breg src, \
+	ldrbne	tmp1, [\B], #1
+	sfi_breg src, \
+	ldrhcs	tmp2, [\B], #2
+	sfi_breg dst, \
+	strbne	tmp1, [\B], #1
+	sfi_breg dst, \
+	strhcs	tmp2, [\B], #2
+1:
+	sfi_pld	src, #(3 * 64)
+	subs	count, count, #64
+	ldrmi	tmp2, [sp], #FRAME_SIZE
+	bmi	.Ltail63unaligned
+	sfi_pld	src, #(4 * 64)
+
+#ifdef USE_NEON
+	/* These need an extra layer of macro just to work around a
+	   bug in the assembler's parser when an operand starts with
+	   a {...}.  */
+	.macro neon_load_multi reglist, basereg
+	vld1.8	{\reglist}, [\basereg]!
+	.endm
+	.macro neon_store_multi reglist, basereg
+	vst1.8	{\reglist}, [ALIGN (\basereg, 64)]!
+	.endm
+
+	/* These are used by the NaCl sfi_breg macro.  */
+	.macro _sfi_breg_dmask_neon_load_multi reg
+	_sfi_dmask \reg
+	.endm
+	.macro _sfi_breg_dmask_neon_store_multi reg
+	_sfi_dmask \reg
+	.endm
+
+	sfi_breg src, neon_load_multi d0-d3, \B
+	sfi_breg src, neon_load_multi d4-d7, \B
+	subs	count, count, #64
+	bmi	2f
+1:
+	sfi_pld	src, #(4 * 64)
+	sfi_breg dst, neon_store_multi d0-d3, \B
+	sfi_breg src, neon_load_multi d0-d3, \B
+	sfi_breg dst, neon_store_multi d4-d7, \B
+	sfi_breg src, neon_load_multi d4-d7, \B
+	subs	count, count, #64
+	bpl	1b
+2:
+	sfi_breg dst, neon_store_multi d0-d3, \B
+	sfi_breg dst, neon_store_multi d4-d7, \B
+	ands	count, count, #0x3f
+#else
+	/* Use an SMS style loop to maximize the I/O bandwidth.  */
+	sub	src, src, #4
+	sub	dst, dst, #8
+	subs	tmp2, count, #64	/* Use tmp2 for count.  */
+	sfi_breg src, \
+	ldr	A_l, [\B, #4]
+	sfi_breg src, \
+	ldr	A_h, [\B, #8]
+	strd	B_l, B_h, [sp, #8]
+	cfi_rel_offset (B_l, 8)
+	cfi_rel_offset (B_h, 12)
+	sfi_breg src, \
+	ldr	B_l, [\B, #12]
+	sfi_breg src, \
+	ldr	B_h, [\B, #16]
+	strd	C_l, C_h, [sp, #16]
+	cfi_rel_offset (C_l, 16)
+	cfi_rel_offset (C_h, 20)
+	sfi_breg src, \
+	ldr	C_l, [\B, #20]
+	sfi_breg src, \
+	ldr	C_h, [\B, #24]
+	strd	D_l, D_h, [sp, #24]
+	cfi_rel_offset (D_l, 24)
+	cfi_rel_offset (D_h, 28)
+	sfi_breg src, \
+	ldr	D_l, [\B, #28]
+	sfi_breg src, \
+	ldr	D_h, [\B, #32]!
+	b	1f
+	.p2align	6
+2:
+	sfi_pld	src, #(5 * 64) - (32 - 4)
+	sfi_breg dst, \
+	strd	A_l, A_h, [\B, #40]
+	sfi_breg src, \
+	ldr	A_l, [\B, #36]
+	sfi_breg src, \
+	ldr	A_h, [\B, #40]
+	sfi_breg dst, \
+	strd	B_l, B_h, [\B, #48]
+	sfi_breg src, \
+	ldr	B_l, [\B, #44]
+	sfi_breg src, \
+	ldr	B_h, [\B, #48]
+	sfi_breg dst, \
+	strd	C_l, C_h, [\B, #56]
+	sfi_breg src, \
+	ldr	C_l, [\B, #52]
+	sfi_breg src, \
+	ldr	C_h, [\B, #56]
+	sfi_breg dst, \
+	strd	D_l, D_h, [\B, #64]!
+	sfi_breg src, \
+	ldr	D_l, [\B, #60]
+	sfi_breg src, \
+	ldr	D_h, [\B, #64]!
+	subs	tmp2, tmp2, #64
+1:
+	sfi_breg dst, \
+	strd	A_l, A_h, [\B, #8]
+	sfi_breg src, \
+	ldr	A_l, [\B, #4]
+	sfi_breg src, \
+	ldr	A_h, [\B, #8]
+	sfi_breg dst, \
+	strd	B_l, B_h, [\B, #16]
+	sfi_breg src, \
+	ldr	B_l, [\B, #12]
+	sfi_breg src, \
+	ldr	B_h, [\B, #16]
+	sfi_breg dst, \
+	strd	C_l, C_h, [\B, #24]
+	sfi_breg src, \
+	ldr	C_l, [\B, #20]
+	sfi_breg src, \
+	ldr	C_h, [\B, #24]
+	sfi_breg dst, \
+	strd	D_l, D_h, [\B, #32]
+	sfi_breg src, \
+	ldr	D_l, [\B, #28]
+	sfi_breg src, \
+	ldr	D_h, [\B, #32]
+	bcs	2b
+
+	/* Save the remaining bytes and restore the callee-saved regs.  */
+	sfi_breg dst, \
+	strd	A_l, A_h, [\B, #40]
+	add	src, src, #36
+	sfi_breg dst, \
+	strd	B_l, B_h, [\B, #48]
+	ldrd	B_l, B_h, [sp, #8]
+	cfi_restore (B_l)
+	cfi_restore (B_h)
+	sfi_breg dst, \
+	strd	C_l, C_h, [\B, #56]
+	ldrd	C_l, C_h, [sp, #16]
+	cfi_restore (C_l)
+	cfi_restore (C_h)
+	sfi_breg dst, \
+	strd	D_l, D_h, [\B, #64]
+	ldrd	D_l, D_h, [sp, #24]
+	cfi_restore (D_l)
+	cfi_restore (D_h)
+	add	dst, dst, #72
+	ands	count, tmp2, #0x3f
+#endif
+	ldr	tmp2, [sp], #FRAME_SIZE
+	cfi_adjust_cfa_offset (-FRAME_SIZE)
+	cfi_restore (tmp2)
+	bne	.Ltail63unaligned
+	bx	lr
+
+END(memcpy)
+libc_hidden_builtin_def (memcpy)
diff --git a/sysdeps/arm/armv7/multiarch/memcpy_neon.S b/sysdeps/arm/armv7/multiarch/memcpy_neon.S
new file mode 100644
index 0000000000..e60d1cc0e1
--- /dev/null
+++ b/sysdeps/arm/armv7/multiarch/memcpy_neon.S
@@ -0,0 +1,9 @@
+#ifdef __ARM_NEON__
+/* Under __ARM_NEON__, this file defines memcpy directly.  */
+libc_hidden_builtin_def (memcpy)
+#else
+# define memcpy __memcpy_neon
+#endif
+
+#define MEMCPY_NEON
+#include "memcpy_impl.S"
diff --git a/sysdeps/arm/armv7/multiarch/memcpy_vfp.S b/sysdeps/arm/armv7/multiarch/memcpy_vfp.S
new file mode 100644
index 0000000000..e008c041ed
--- /dev/null
+++ b/sysdeps/arm/armv7/multiarch/memcpy_vfp.S
@@ -0,0 +1,7 @@
+/* Under __ARM_NEON__, memcpy_neon.S defines memcpy directly
+   and the __memcpy_vfp code will never be used.  */
+#ifndef __ARM_NEON__
+# define MEMCPY_VFP
+# define memcpy __memcpy_vfp
+# include "memcpy_impl.S"
+#endif
diff --git a/sysdeps/arm/backtrace.c b/sysdeps/arm/backtrace.c
new file mode 100644
index 0000000000..15ba506411
--- /dev/null
+++ b/sysdeps/arm/backtrace.c
@@ -0,0 +1,125 @@
+/* Return backtrace of current program state.
+   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Kazu Hirata <kazu@codesourcery.com>, 2008.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <bits/libc-lock.h>
+#include <dlfcn.h>
+#include <execinfo.h>
+#include <stdlib.h>
+#include <unwind.h>
+
+struct trace_arg
+{
+  void **array;
+  int cnt, size;
+};
+
+#ifdef SHARED
+static _Unwind_Reason_Code (*unwind_backtrace) (_Unwind_Trace_Fn, void *);
+static _Unwind_VRS_Result (*unwind_vrs_get) (_Unwind_Context *,
+					     _Unwind_VRS_RegClass,
+					     _uw,
+					     _Unwind_VRS_DataRepresentation,
+					     void *);
+
+static void *libgcc_handle;
+
+static void
+init (void)
+{
+  libgcc_handle = __libc_dlopen ("libgcc_s.so.1");
+
+  if (libgcc_handle == NULL)
+    return;
+
+  unwind_backtrace = __libc_dlsym (libgcc_handle, "_Unwind_Backtrace");
+  unwind_vrs_get = __libc_dlsym (libgcc_handle, "_Unwind_VRS_Get");
+  if (unwind_vrs_get == NULL)
+    unwind_backtrace = NULL;
+}
+
+/* This function is identical to "_Unwind_GetGR", except that it uses
+   "unwind_vrs_get" instead of "_Unwind_VRS_Get".  */
+static inline _Unwind_Word
+unwind_getgr (_Unwind_Context *context, int regno)
+{
+  _uw val;
+  unwind_vrs_get (context, _UVRSC_CORE, regno, _UVRSD_UINT32, &val);
+  return val;
+}
+
+/* This macro is identical to the _Unwind_GetIP macro, except that it
+   uses "unwind_getgr" instead of "_Unwind_GetGR".  */
+# define unwind_getip(context) \
+  (unwind_getgr (context, 15) & ~(_Unwind_Word)1)
+#else
+# define unwind_backtrace _Unwind_Backtrace
+# define unwind_getip _Unwind_GetIP
+#endif
+
+static _Unwind_Reason_Code
+backtrace_helper (struct _Unwind_Context *ctx, void *a)
+{
+  struct trace_arg *arg = a;
+
+  /* We are first called with address in the __backtrace function.
+     Skip it.  */
+  if (arg->cnt != -1)
+    arg->array[arg->cnt] = (void *) unwind_getip (ctx);
+  if (++arg->cnt == arg->size)
+    return _URC_END_OF_STACK;
+  return _URC_NO_REASON;
+}
+
+int
+__backtrace (array, size)
+     void **array;
+     int size;
+{
+  struct trace_arg arg = { .array = array, .size = size, .cnt = -1 };
+#ifdef SHARED
+  __libc_once_define (static, once);
+
+  __libc_once (once, init);
+  if (unwind_backtrace == NULL)
+    return 0;
+#endif
+
+  if (size >= 1)
+    unwind_backtrace (backtrace_helper, &arg);
+
+  if (arg.cnt > 1 && arg.array[arg.cnt - 1] == NULL)
+    --arg.cnt;
+  return arg.cnt != -1 ? arg.cnt : 0;
+}
+weak_alias (__backtrace, backtrace)
+libc_hidden_def (__backtrace)
+
+
+#ifdef SHARED
+/* Free all resources if necessary.  */
+libc_freeres_fn (free_mem)
+{
+  unwind_backtrace = NULL;
+  if (libgcc_handle != NULL)
+    {
+      __libc_dlclose (libgcc_handle);
+      libgcc_handle = NULL;
+    }
+}
+#endif
diff --git a/sysdeps/arm/bits/atomic.h b/sysdeps/arm/bits/atomic.h
new file mode 100644
index 0000000000..c2d5be5703
--- /dev/null
+++ b/sysdeps/arm/bits/atomic.h
@@ -0,0 +1,159 @@
+/* Atomic operations.  Pure ARM version.
+   Copyright (C) 2002-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <stdint.h>
+
+typedef int8_t atomic8_t;
+typedef uint8_t uatomic8_t;
+typedef int_fast8_t atomic_fast8_t;
+typedef uint_fast8_t uatomic_fast8_t;
+
+typedef int32_t atomic32_t;
+typedef uint32_t uatomic32_t;
+typedef int_fast32_t atomic_fast32_t;
+typedef uint_fast32_t uatomic_fast32_t;
+
+typedef intptr_t atomicptr_t;
+typedef uintptr_t uatomicptr_t;
+typedef intmax_t atomic_max_t;
+typedef uintmax_t uatomic_max_t;
+
+void __arm_link_error (void);
+
+#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
+# define atomic_full_barrier() __sync_synchronize ()
+#else
+# define atomic_full_barrier() __arm_assisted_full_barrier ()
+#endif
+
+/* An OS-specific bits/atomic.h file will define this macro if
+   the OS can provide something.  If not, we'll fail to build
+   with a compiler that doesn't supply the operation.  */
+#ifndef __arm_assisted_full_barrier
+# define __arm_assisted_full_barrier()  __arm_link_error()
+#endif
+
+/* Use the atomic builtins provided by GCC in case the backend provides
+   a pattern to do this efficiently.  */
+#if __GNUC_PREREQ (4, 7) && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
+
+# define atomic_exchange_acq(mem, value)                                \
+  __atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_ACQUIRE)
+
+# define atomic_exchange_rel(mem, value)                                \
+  __atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_RELEASE)
+
+/* Atomic exchange (without compare).  */
+
+# define __arch_exchange_8_int(mem, newval, model)      \
+  (__arm_link_error (), (typeof (*mem)) 0)
+
+# define __arch_exchange_16_int(mem, newval, model)     \
+  (__arm_link_error (), (typeof (*mem)) 0)
+
+# define __arch_exchange_32_int(mem, newval, model)     \
+  __atomic_exchange_n (mem, newval, model)
+
+# define __arch_exchange_64_int(mem, newval, model)     \
+  (__arm_link_error (), (typeof (*mem)) 0)
+
+/* Compare and exchange with "acquire" semantics, ie barrier after.  */
+
+# define atomic_compare_and_exchange_bool_acq(mem, new, old)    \
+  __atomic_bool_bysize (__arch_compare_and_exchange_bool, int,  \
+                        mem, new, old, __ATOMIC_ACQUIRE)
+
+# define atomic_compare_and_exchange_val_acq(mem, new, old)     \
+  __atomic_val_bysize (__arch_compare_and_exchange_val, int,    \
+                       mem, new, old, __ATOMIC_ACQUIRE)
+
+/* Compare and exchange with "release" semantics, ie barrier before.  */
+
+# define atomic_compare_and_exchange_bool_rel(mem, new, old)    \
+  __atomic_bool_bysize (__arch_compare_and_exchange_bool, int,  \
+                        mem, new, old, __ATOMIC_RELEASE)
+
+# define atomic_compare_and_exchange_val_rel(mem, new, old)      \
+  __atomic_val_bysize (__arch_compare_and_exchange_val, int,    \
+                       mem, new, old, __ATOMIC_RELEASE)
+
+/* Compare and exchange.
+   For all "bool" routines, we return FALSE if exchange succesful.  */
+
+# define __arch_compare_and_exchange_bool_8_int(mem, newval, oldval, model) \
+  ({__arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_bool_16_int(mem, newval, oldval, model) \
+  ({__arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_bool_32_int(mem, newval, oldval, model) \
+  ({                                                                    \
+    typeof (*mem) __oldval = (oldval);                                  \
+    !__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0,   \
+                                  model, __ATOMIC_RELAXED);             \
+  })
+
+# define __arch_compare_and_exchange_bool_64_int(mem, newval, oldval, model) \
+  ({__arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_val_8_int(mem, newval, oldval, model) \
+  ({__arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_val_16_int(mem, newval, oldval, model) \
+  ({__arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_val_32_int(mem, newval, oldval, model) \
+  ({                                                                    \
+    typeof (*mem) __oldval = (oldval);                                  \
+    __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0,    \
+                                 model, __ATOMIC_RELAXED);              \
+    __oldval;                                                           \
+  })
+
+# define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \
+  ({__arm_link_error (); oldval; })
+
+#elif defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
+/* Atomic compare and exchange.  */
+# define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
+  __sync_val_compare_and_swap ((mem), (oldval), (newval))
+#else
+# define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
+  __arm_assisted_compare_and_exchange_val_32_acq ((mem), (newval), (oldval))
+#endif
+
+#if !__GNUC_PREREQ (4, 7) || !defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4)
+/* We don't support atomic operations on any non-word types.
+   So make them link errors.  */
+# define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
+  ({ __arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
+  ({ __arm_link_error (); oldval; })
+
+# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
+  ({ __arm_link_error (); oldval; })
+#endif
+
+/* An OS-specific bits/atomic.h file will define this macro if
+   the OS can provide something.  If not, we'll fail to build
+   with a compiler that doesn't supply the operation.  */
+#ifndef __arm_assisted_compare_and_exchange_val_32_acq
+# define __arm_assisted_compare_and_exchange_val_32_acq(mem, newval, oldval) \
+  ({ __arm_link_error (); oldval; })
+#endif
diff --git a/sysdeps/arm/bits/endian.h b/sysdeps/arm/bits/endian.h
new file mode 100644
index 0000000000..f49f6ab1c9
--- /dev/null
+++ b/sysdeps/arm/bits/endian.h
@@ -0,0 +1,10 @@
+#ifndef _ENDIAN_H
+# error "Never use <bits/endian.h> directly; include <endian.h> instead."
+#endif
+
+/* ARM can be either big or little endian.  */
+#ifdef __ARMEB__
+#define __BYTE_ORDER __BIG_ENDIAN
+#else
+#define __BYTE_ORDER __LITTLE_ENDIAN
+#endif
diff --git a/sysdeps/arm/bits/fenv.h b/sysdeps/arm/bits/fenv.h
new file mode 100644
index 0000000000..c7f5876c5c
--- /dev/null
+++ b/sysdeps/arm/bits/fenv.h
@@ -0,0 +1,82 @@
+/* Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _FENV_H
+# error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
+#endif
+
+/* Define bits representing exceptions in the FPU status word.  */
+enum
+  {
+    FE_INVALID =
+#define FE_INVALID	1
+      FE_INVALID,
+    FE_DIVBYZERO =
+#define FE_DIVBYZERO	2
+      FE_DIVBYZERO,
+    FE_OVERFLOW =
+#define FE_OVERFLOW	4
+      FE_OVERFLOW,
+    FE_UNDERFLOW =
+#define FE_UNDERFLOW	8
+      FE_UNDERFLOW,
+    FE_INEXACT =
+#define FE_INEXACT	16
+      FE_INEXACT,
+  };
+
+/* Amount to shift by to convert an exception to a mask bit.  */
+#define FE_EXCEPT_SHIFT	8
+
+/* All supported exceptions.  */
+#define FE_ALL_EXCEPT	\
+	(FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW | FE_UNDERFLOW | FE_INEXACT)
+
+/* VFP supports all of the four defined rounding modes.  */
+enum
+  {
+    FE_TONEAREST =
+#define FE_TONEAREST	0
+      FE_TONEAREST,
+    FE_UPWARD =
+#define FE_UPWARD	0x400000
+      FE_UPWARD,
+    FE_DOWNWARD =
+#define FE_DOWNWARD	0x800000
+      FE_DOWNWARD,
+    FE_TOWARDZERO =
+#define FE_TOWARDZERO	0xc00000
+      FE_TOWARDZERO
+  };
+
+/* Type representing exception flags. */
+typedef unsigned int fexcept_t;
+
+/* Type representing floating-point environment.  */
+typedef struct
+  {
+    unsigned int __cw;
+  }
+fenv_t;
+
+/* If the default argument is used we use this value.  */
+#define FE_DFL_ENV	((const fenv_t *) -1l)
+
+#ifdef __USE_GNU
+/* Floating-point environment where none of the exceptions are masked.  */
+# define FE_NOMASK_ENV  ((const fenv_t *) -2)
+#endif
diff --git a/sysdeps/arm/bits/link.h b/sysdeps/arm/bits/link.h
new file mode 100644
index 0000000000..9412cf8800
--- /dev/null
+++ b/sysdeps/arm/bits/link.h
@@ -0,0 +1,65 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef	_LINK_H
+# error "Never include <bits/link.h> directly; use <link.h> instead."
+#endif
+
+
+/* Registers for entry into PLT on ARM.  */
+typedef struct La_arm_regs
+{
+  uint32_t lr_reg[4];
+  uint32_t lr_sp;
+  uint32_t lr_lr;
+  /* Coprocessor registers used for argument passing.  The data
+     stored here depends on the coprocessors available in the
+     system which are used for function calls in the current ABI.
+     VFP uses eight 64-bit registers, and iWMMXt uses ten.  */
+  uint32_t lr_coproc[42];
+} La_arm_regs;
+
+/* Return values for calls from PLT on ARM.  */
+typedef struct La_arm_retval
+{
+  /* Up to four integer registers can be used for a return value in
+     some ABIs (APCS complex long double).  */
+  uint32_t lrv_reg[4];
+
+  /* Any coprocessor registers which might be used to return values
+     in the current ABI.  */
+  uint32_t lrv_coproc[12];
+} La_arm_retval;
+
+
+__BEGIN_DECLS
+
+extern Elf32_Addr la_arm_gnu_pltenter (Elf32_Sym *__sym, unsigned int __ndx,
+				       uintptr_t *__refcook,
+				       uintptr_t *__defcook,
+				       La_arm_regs *__regs,
+				       unsigned int *__flags,
+				       const char *__symname,
+				       long int *__framesizep);
+extern unsigned int la_arm_gnu_pltexit (Elf32_Sym *__sym, unsigned int __ndx,
+					uintptr_t *__refcook,
+					uintptr_t *__defcook,
+					const La_arm_regs *__inregs,
+					La_arm_retval *__outregs,
+					const char *__symname);
+
+__END_DECLS
diff --git a/sysdeps/arm/bits/linkmap.h b/sysdeps/arm/bits/linkmap.h
new file mode 100644
index 0000000000..7c2b4a6da8
--- /dev/null
+++ b/sysdeps/arm/bits/linkmap.h
@@ -0,0 +1,5 @@
+struct link_map_machine
+  {
+    Elf32_Addr plt; /* Address of .plt */
+    void *tlsdesc_table; /* Address of TLS descriptor hash table.  */
+  };
diff --git a/sysdeps/arm/bits/mathdef.h b/sysdeps/arm/bits/mathdef.h
new file mode 100644
index 0000000000..be727e5b8d
--- /dev/null
+++ b/sysdeps/arm/bits/mathdef.h
@@ -0,0 +1,55 @@
+/* Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#if !defined _MATH_H && !defined _COMPLEX_H
+# error "Never use <bits/mathdef.h> directly; include <math.h> instead"
+#endif
+
+#if defined  __USE_ISOC99 && defined _MATH_H && !defined _MATH_H_MATHDEF
+# define _MATH_H_MATHDEF	1
+
+/* GCC does not promote `float' values to `double'.  */
+typedef float float_t;		/* `float' expressions are evaluated as
+				   `float'.  */
+typedef double double_t;	/* `double' expressions are evaluated as
+				   `double'.  */
+
+/* The values returned by `ilogb' for 0 and NaN respectively.  */
+# define FP_ILOGB0	(-2147483647)
+# define FP_ILOGBNAN	(2147483647)
+
+/* The GCC 4.6 compiler will define __FP_FAST_FMA{,F,L} if the fma{,f,l}
+   builtins are supported.  */
+# if __FP_FAST_FMA
+#  define FP_FAST_FMA 1
+# endif
+
+# if __FP_FAST_FMAF
+#  define FP_FAST_FMAF 1
+# endif
+
+# if __FP_FAST_FMAL
+#  define FP_FAST_FMAL 1
+# endif
+
+#endif	/* ISO C99 */
+
+#ifndef __NO_LONG_DOUBLE_MATH
+/* Signal that we do not really have a `long double'.  This disables the
+   declaration of all the `long double' function variants.  */
+# define __NO_LONG_DOUBLE_MATH	1
+#endif
diff --git a/sysdeps/arm/bits/setjmp.h b/sysdeps/arm/bits/setjmp.h
new file mode 100644
index 0000000000..41423b2c3b
--- /dev/null
+++ b/sysdeps/arm/bits/setjmp.h
@@ -0,0 +1,37 @@
+/* Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Define the machine-dependent type `jmp_buf'.  ARM EABI version.  */
+
+#ifndef _BITS_SETJMP_H
+#define _BITS_SETJMP_H 1
+
+#if !defined _SETJMP_H && !defined _PTHREAD_H
+# error "Never include <bits/setjmp.h> directly; use <setjmp.h> instead."
+#endif
+
+#ifndef __ASSEMBLER__
+/* The exact set of registers saved may depend on the particular core
+   in use, as some coprocessor registers may need to be saved.  The C
+   Library ABI requires that the buffer be 8-byte aligned, and
+   recommends that the buffer contain 64 words.  The first 27 words
+   are occupied by v1-v6, sl, fp, sp, pc, and d8-d15.  (Note that
+   d8-15 require 17 words, due to the use of fstmx.)  */
+typedef int __jmp_buf[64] __attribute__((__aligned__ (8)));
+#endif
+
+#endif
diff --git a/sysdeps/arm/bsd-_setjmp.S b/sysdeps/arm/bsd-_setjmp.S
new file mode 100644
index 0000000000..e8c5b245bf
--- /dev/null
+++ b/sysdeps/arm/bsd-_setjmp.S
@@ -0,0 +1,29 @@
+/* BSD `_setjmp' entry point to `sigsetjmp (..., 0)'.  ARM version.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* This just does a tail-call to `__sigsetjmp (ARG, 1)'.
+   We cannot do it in C because it must be a tail-call, so frame-unwinding
+   in setjmp doesn't clobber the state restored by longjmp.  */
+
+#include <sysdep.h>
+
+ENTRY (_setjmp)
+	mov	r1, #0
+	b	PLTJMP(HIDDEN_JUMPTARGET(__sigsetjmp))
+END (_setjmp)
+libc_hidden_def (_setjmp)
diff --git a/sysdeps/arm/bsd-setjmp.S b/sysdeps/arm/bsd-setjmp.S
new file mode 100644
index 0000000000..682e8130f1
--- /dev/null
+++ b/sysdeps/arm/bsd-setjmp.S
@@ -0,0 +1,28 @@
+/* BSD `setjmp' entry point to `sigsetjmp (..., 1)'.  ARM version.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* This just does a tail-call to `__sigsetjmp (ARG, 1)'.
+   We cannot do it in C because it must be a tail-call, so frame-unwinding
+   in setjmp doesn't clobber the state restored by longjmp.  */
+
+#include <sysdep.h>
+
+ENTRY (setjmp)
+	mov	r1, #1
+	b	PLTJMP(HIDDEN_JUMPTARGET(__sigsetjmp))
+END (setjmp)
diff --git a/sysdeps/arm/configure b/sysdeps/arm/configure
new file mode 100644
index 0000000000..d79ef76ec9
--- /dev/null
+++ b/sysdeps/arm/configure
@@ -0,0 +1,205 @@
+# This file is generated from configure.ac by Autoconf.  DO NOT EDIT!
+ # Local configure fragment for sysdeps/arm.
+
+#AC_DEFINE(PI_STATIC_AND_HIDDEN)
+
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the CFI directive .cfi_sections is supported" >&5
+$as_echo_n "checking whether the CFI directive .cfi_sections is supported... " >&6; }
+if ${libc_cv_asm_cfi_directive_sections+:} false; then :
+  $as_echo_n "(cached) " >&6
+else
+  cat > conftest.s <<EOF
+	.text
+	.cfi_sections .debug_frame, .eh_frame
+	.cfi_startproc
+	.cfi_endproc
+EOF
+  if { ac_try='${CC-cc} $ASFLAGS -c conftest.s 1>&5'
+  { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+  (eval $ac_try) 2>&5
+  ac_status=$?
+  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; }; }; then
+    libc_cv_asm_cfi_directive_sections=yes
+  else
+    libc_cv_asm_cfi_directive_sections=no
+  fi
+  rm -f conftest*
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_asm_cfi_directive_sections" >&5
+$as_echo "$libc_cv_asm_cfi_directive_sections" >&6; }
+if test $libc_cv_asm_cfi_directive_sections != yes; then
+  as_fn_error $? "need .cfi_sections in this configuration" "$LINENO" 5
+fi
+
+# We check to see if the compiler and flags are
+# selecting the hard-float ABI and if they are then
+# we set libc_cv_arm_pcs_vfp to yes which causes
+# HAVE_ARM_PCS_VFP to be defined in config.h and
+# in include/libc-symbols.h and thus available to
+# shlib-versions to select the appropriate name for
+# the dynamic linker via %ifdef.
+
+
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for grep that handles long lines and -e" >&5
+$as_echo_n "checking for grep that handles long lines and -e... " >&6; }
+if ${ac_cv_path_GREP+:} false; then :
+  $as_echo_n "(cached) " >&6
+else
+  if test -z "$GREP"; then
+  ac_path_GREP_found=false
+  # Loop through the user's path and test for each of PROGNAME-LIST
+  as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+    for ac_prog in grep ggrep; do
+    for ac_exec_ext in '' $ac_executable_extensions; do
+      ac_path_GREP="$as_dir/$ac_prog$ac_exec_ext"
+      { test -f "$ac_path_GREP" && $as_test_x "$ac_path_GREP"; } || continue
+# Check for GNU ac_path_GREP and select it if it is found.
+  # Check for GNU $ac_path_GREP
+case `"$ac_path_GREP" --version 2>&1` in
+*GNU*)
+  ac_cv_path_GREP="$ac_path_GREP" ac_path_GREP_found=:;;
+*)
+  ac_count=0
+  $as_echo_n 0123456789 >"conftest.in"
+  while :
+  do
+    cat "conftest.in" "conftest.in" >"conftest.tmp"
+    mv "conftest.tmp" "conftest.in"
+    cp "conftest.in" "conftest.nl"
+    $as_echo 'GREP' >> "conftest.nl"
+    "$ac_path_GREP" -e 'GREP$' -e '-(cannot match)-' < "conftest.nl" >"conftest.out" 2>/dev/null || break
+    diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break
+    as_fn_arith $ac_count + 1 && ac_count=$as_val
+    if test $ac_count -gt ${ac_path_GREP_max-0}; then
+      # Best one so far, save it but keep looking for a better one
+      ac_cv_path_GREP="$ac_path_GREP"
+      ac_path_GREP_max=$ac_count
+    fi
+    # 10*(2^10) chars as input seems more than enough
+    test $ac_count -gt 10 && break
+  done
+  rm -f conftest.in conftest.tmp conftest.nl conftest.out;;
+esac
+
+      $ac_path_GREP_found && break 3
+    done
+  done
+  done
+IFS=$as_save_IFS
+  if test -z "$ac_cv_path_GREP"; then
+    as_fn_error $? "no acceptable grep could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" "$LINENO" 5
+  fi
+else
+  ac_cv_path_GREP=$GREP
+fi
+
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_GREP" >&5
+$as_echo "$ac_cv_path_GREP" >&6; }
+ GREP="$ac_cv_path_GREP"
+
+
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for egrep" >&5
+$as_echo_n "checking for egrep... " >&6; }
+if ${ac_cv_path_EGREP+:} false; then :
+  $as_echo_n "(cached) " >&6
+else
+  if echo a | $GREP -E '(a|b)' >/dev/null 2>&1
+   then ac_cv_path_EGREP="$GREP -E"
+   else
+     if test -z "$EGREP"; then
+  ac_path_EGREP_found=false
+  # Loop through the user's path and test for each of PROGNAME-LIST
+  as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+    for ac_prog in egrep; do
+    for ac_exec_ext in '' $ac_executable_extensions; do
+      ac_path_EGREP="$as_dir/$ac_prog$ac_exec_ext"
+      { test -f "$ac_path_EGREP" && $as_test_x "$ac_path_EGREP"; } || continue
+# Check for GNU ac_path_EGREP and select it if it is found.
+  # Check for GNU $ac_path_EGREP
+case `"$ac_path_EGREP" --version 2>&1` in
+*GNU*)
+  ac_cv_path_EGREP="$ac_path_EGREP" ac_path_EGREP_found=:;;
+*)
+  ac_count=0
+  $as_echo_n 0123456789 >"conftest.in"
+  while :
+  do
+    cat "conftest.in" "conftest.in" >"conftest.tmp"
+    mv "conftest.tmp" "conftest.in"
+    cp "conftest.in" "conftest.nl"
+    $as_echo 'EGREP' >> "conftest.nl"
+    "$ac_path_EGREP" 'EGREP$' < "conftest.nl" >"conftest.out" 2>/dev/null || break
+    diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break
+    as_fn_arith $ac_count + 1 && ac_count=$as_val
+    if test $ac_count -gt ${ac_path_EGREP_max-0}; then
+      # Best one so far, save it but keep looking for a better one
+      ac_cv_path_EGREP="$ac_path_EGREP"
+      ac_path_EGREP_max=$ac_count
+    fi
+    # 10*(2^10) chars as input seems more than enough
+    test $ac_count -gt 10 && break
+  done
+  rm -f conftest.in conftest.tmp conftest.nl conftest.out;;
+esac
+
+      $ac_path_EGREP_found && break 3
+    done
+  done
+  done
+IFS=$as_save_IFS
+  if test -z "$ac_cv_path_EGREP"; then
+    as_fn_error $? "no acceptable egrep could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" "$LINENO" 5
+  fi
+else
+  ac_cv_path_EGREP=$EGREP
+fi
+
+   fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_EGREP" >&5
+$as_echo "$ac_cv_path_EGREP" >&6; }
+ EGREP="$ac_cv_path_EGREP"
+
+
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the compiler is using the ARM hard-float ABI" >&5
+$as_echo_n "checking whether the compiler is using the ARM hard-float ABI... " >&6; }
+if ${libc_cv_arm_pcs_vfp+:} false; then :
+  $as_echo_n "(cached) " >&6
+else
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#ifdef __ARM_PCS_VFP
+                      yes
+                     #endif
+
+_ACEOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+  $EGREP "yes" >/dev/null 2>&1; then :
+  libc_cv_arm_pcs_vfp=yes
+else
+  libc_cv_arm_pcs_vfp=no
+fi
+rm -f conftest*
+
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_arm_pcs_vfp" >&5
+$as_echo "$libc_cv_arm_pcs_vfp" >&6; }
+if test $libc_cv_arm_pcs_vfp = yes; then
+  $as_echo "#define HAVE_ARM_PCS_VFP 1" >>confdefs.h
+
+  config_vars="$config_vars
+default-abi = hard"
+else
+  config_vars="$config_vars
+default-abi = soft"
+fi
diff --git a/sysdeps/arm/configure.ac b/sysdeps/arm/configure.ac
new file mode 100644
index 0000000000..d66500b3fd
--- /dev/null
+++ b/sysdeps/arm/configure.ac
@@ -0,0 +1,46 @@
+GLIBC_PROVIDES dnl See aclocal.m4 in the top level source directory.
+# Local configure fragment for sysdeps/arm.
+
+dnl It is always possible to access static and hidden symbols in an
+dnl position independent way.
+dnl NOTE: This feature was added by the GCC TLS patches.  We should test for
+dnl it.  Until we do, don't define it.
+#AC_DEFINE(PI_STATIC_AND_HIDDEN)
+
+AC_CACHE_CHECK([whether the CFI directive .cfi_sections is supported],
+  [libc_cv_asm_cfi_directive_sections],
+  [cat > conftest.s <<EOF
+	.text
+	.cfi_sections .debug_frame, .eh_frame
+	.cfi_startproc
+	.cfi_endproc
+EOF
+  if AC_TRY_COMMAND(${CC-cc} $ASFLAGS -c conftest.s 1>&AS_MESSAGE_LOG_FD); then
+    libc_cv_asm_cfi_directive_sections=yes
+  else
+    libc_cv_asm_cfi_directive_sections=no
+  fi
+  rm -f conftest*])
+if test $libc_cv_asm_cfi_directive_sections != yes; then
+  AC_MSG_ERROR([need .cfi_sections in this configuration])
+fi
+
+# We check to see if the compiler and flags are
+# selecting the hard-float ABI and if they are then
+# we set libc_cv_arm_pcs_vfp to yes which causes
+# HAVE_ARM_PCS_VFP to be defined in config.h and
+# in include/libc-symbols.h and thus available to
+# shlib-versions to select the appropriate name for
+# the dynamic linker via %ifdef.
+AC_CACHE_CHECK([whether the compiler is using the ARM hard-float ABI],
+  [libc_cv_arm_pcs_vfp],
+  [AC_EGREP_CPP(yes,[#ifdef __ARM_PCS_VFP
+                      yes
+                     #endif
+  ], libc_cv_arm_pcs_vfp=yes, libc_cv_arm_pcs_vfp=no)])
+if test $libc_cv_arm_pcs_vfp = yes; then
+  AC_DEFINE(HAVE_ARM_PCS_VFP)
+  LIBC_CONFIG_VAR([default-abi], [hard])
+else
+  LIBC_CONFIG_VAR([default-abi], [soft])
+fi
diff --git a/sysdeps/arm/crti.S b/sysdeps/arm/crti.S
new file mode 100644
index 0000000000..d053e17ddb
--- /dev/null
+++ b/sysdeps/arm/crti.S
@@ -0,0 +1,95 @@
+/* Special .init and .fini section support for ARM.
+   Copyright (C) 1995-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file with other
+   programs, and to distribute those programs without any restriction
+   coming from the use of this file. (The GNU Lesser General Public
+   License restrictions do apply in other respects; for example, they
+   cover modification of the file, and distribution when not linked
+   into another program.)
+
+   Note that people who make modified versions of this file are not
+   obligated to grant this special exception for their modified
+   versions; it is their choice whether to do so. The GNU Lesser
+   General Public License gives permission to release a modified
+   version without this exception; this exception also makes it
+   possible to release a modified version which carries forward this
+   exception.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* crti.S puts a function prologue at the beginning of the .init and
+   .fini sections and defines global symbols for those addresses, so
+   they can be called as functions.  The symbols _init and _fini are
+   magic and cause the linker to emit DT_INIT and DT_FINI.  */
+
+/* Always build .init and .fini sections in ARM mode.  */
+#define NO_THUMB
+#include <libc-symbols.h>
+#include <sysdep.h>
+
+#ifndef PREINIT_FUNCTION
+# define PREINIT_FUNCTION __gmon_start__
+#endif
+
+#ifndef PREINIT_FUNCTION_WEAK
+# define PREINIT_FUNCTION_WEAK 1
+#endif
+
+#if PREINIT_FUNCTION_WEAK
+	weak_extern (PREINIT_FUNCTION)
+#else
+	.hidden PREINIT_FUNCTION
+#endif
+
+#if PREINIT_FUNCTION_WEAK
+	.p2align 2
+	.type call_weak_fn, %function
+call_weak_fn:
+	ldr r3, .LGOT
+	ldr r2, .LGOT+4
+.LPIC:
+	add r3, pc, r3
+	ldr r2, [r3, r2]
+	cmp r2, #0
+	bxeq lr
+	b PREINIT_FUNCTION
+	.p2align 2
+.LGOT:
+	.word _GLOBAL_OFFSET_TABLE_-(.LPIC+8)
+	.word PREINIT_FUNCTION(GOT)
+#endif
+
+	.section .init,"ax",%progbits
+	.p2align 2
+	.globl _init
+	.type _init, %function
+_init:
+	push	{r3, lr}
+#if PREINIT_FUNCTION_WEAK
+	bl call_weak_fn
+#else
+	bl PREINIT_FUNCTION
+#endif
+
+	.section .fini,"ax",%progbits
+	.p2align 2
+	.globl _fini
+	.type _fini, %function
+_fini:
+	push	{r3, lr}
diff --git a/sysdeps/arm/crtn.S b/sysdeps/arm/crtn.S
new file mode 100644
index 0000000000..d3254ad41f
--- /dev/null
+++ b/sysdeps/arm/crtn.S
@@ -0,0 +1,57 @@
+/* Special .init and .fini section support for ARM.
+   Copyright (C) 1995-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file with other
+   programs, and to distribute those programs without any restriction
+   coming from the use of this file. (The GNU Lesser General Public
+   License restrictions do apply in other respects; for example, they
+   cover modification of the file, and distribution when not linked
+   into another program.)
+
+   Note that people who make modified versions of this file are not
+   obligated to grant this special exception for their modified
+   versions; it is their choice whether to do so. The GNU Lesser
+   General Public License gives permission to release a modified
+   version without this exception; this exception also makes it
+   possible to release a modified version which carries forward this
+   exception.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Always build .init and .fini sections in ARM mode.  */
+#define NO_THUMB
+#include <sysdep.h>
+
+/* crtn.S puts function epilogues in the .init and .fini sections
+   corresponding to the prologues in crti.S. */
+
+	.section .init,"ax",%progbits
+#ifdef __ARM_ARCH_4T__
+	pop {r3, lr}
+	bx lr
+#else
+	pop {r3, pc}
+#endif
+
+	.section .fini,"ax",%progbits
+#ifdef __ARM_ARCH_4T__
+	pop {r3, lr}
+	bx lr
+#else
+	pop {r3, pc}
+#endif
diff --git a/sysdeps/arm/dl-irel.h b/sysdeps/arm/dl-irel.h
new file mode 100644
index 0000000000..5c89ce496b
--- /dev/null
+++ b/sysdeps/arm/dl-irel.h
@@ -0,0 +1,52 @@
+/* Machine-dependent ELF indirect relocation inline functions.
+   ARM version.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _DL_IREL_H
+#define _DL_IREL_H
+
+#include <stdio.h>
+#include <unistd.h>
+#include <ldsodefs.h>
+
+#define ELF_MACHINE_IREL	1
+
+static inline Elf32_Addr
+__attribute ((always_inline))
+elf_ifunc_invoke (Elf32_Addr addr)
+{
+  return ((Elf32_Addr (*) (unsigned long int)) (addr)) (GLRO(dl_hwcap));
+}
+
+static inline void
+__attribute ((always_inline))
+elf_irel (const Elf32_Rel *reloc)
+{
+  Elf32_Addr *const reloc_addr = (void *) reloc->r_offset;
+  const unsigned long int r_type = ELF32_R_TYPE (reloc->r_info);
+
+  if (__builtin_expect (r_type == R_ARM_IRELATIVE, 1))
+    {
+      Elf32_Addr value = elf_ifunc_invoke (*reloc_addr);
+      *reloc_addr = value;
+    }
+  else
+    __libc_fatal ("unexpected reloc type in static binary");
+}
+
+#endif /* dl-irel.h */
diff --git a/sysdeps/arm/dl-lookupcfg.h b/sysdeps/arm/dl-lookupcfg.h
new file mode 100644
index 0000000000..20b6fc626e
--- /dev/null
+++ b/sysdeps/arm/dl-lookupcfg.h
@@ -0,0 +1,27 @@
+/* Configuration of lookup functions.
+   Copyright (C) 2006-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define DL_UNMAP_IS_SPECIAL
+
+#include_next <dl-lookupcfg.h>
+
+struct link_map;
+
+extern void internal_function _dl_unmap (struct link_map *map);
+
+#define DL_UNMAP(map) _dl_unmap (map)
diff --git a/sysdeps/arm/dl-machine.h b/sysdeps/arm/dl-machine.h
new file mode 100644
index 0000000000..02d1a5ebdf
--- /dev/null
+++ b/sysdeps/arm/dl-machine.h
@@ -0,0 +1,662 @@
+/* Machine-dependent ELF dynamic relocation inline functions.  ARM version.
+   Copyright (C) 1995-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef dl_machine_h
+#define dl_machine_h
+
+#define ELF_MACHINE_NAME "ARM"
+
+#include <sys/param.h>
+#include <tls.h>
+#include <dl-tlsdesc.h>
+#include <dl-irel.h>
+
+#ifndef CLEAR_CACHE
+# error CLEAR_CACHE definition required to handle TEXTREL
+#endif
+
+/* Return nonzero iff ELF header is compatible with the running host.  */
+static inline int __attribute__ ((unused))
+elf_machine_matches_host (const Elf32_Ehdr *ehdr)
+{
+  return ehdr->e_machine == EM_ARM;
+}
+
+
+/* Return the link-time address of _DYNAMIC.  Conveniently, this is the
+   first element of the GOT.  */
+static inline Elf32_Addr __attribute__ ((unused))
+elf_machine_dynamic (void)
+{
+  /* Declaring this hidden ensures that a PC-relative reference is used.  */
+  extern const Elf32_Addr _GLOBAL_OFFSET_TABLE_[] attribute_hidden;
+  return _GLOBAL_OFFSET_TABLE_[0];
+}
+
+
+/* Return the run-time load address of the shared object.  */
+static inline Elf32_Addr __attribute__ ((unused))
+elf_machine_load_address (void)
+{
+  extern Elf32_Addr internal_function __dl_start (void *) asm ("_dl_start");
+  Elf32_Addr got_addr = (Elf32_Addr) &__dl_start;
+  Elf32_Addr pcrel_addr;
+#ifdef __thumb__
+  /* Clear the low bit of the funciton address.  */
+  got_addr &= ~(Elf32_Addr) 1;
+#endif
+  asm ("adr %0, _dl_start" : "=r" (pcrel_addr));
+  return pcrel_addr - got_addr;
+}
+
+
+/* Set up the loaded object described by L so its unrelocated PLT
+   entries will jump to the on-demand fixup code in dl-runtime.c.  */
+
+static inline int __attribute__ ((unused))
+elf_machine_runtime_setup (struct link_map *l, int lazy, int profile)
+{
+  Elf32_Addr *got;
+  extern void _dl_runtime_resolve (Elf32_Word);
+  extern void _dl_runtime_profile (Elf32_Word);
+
+  if (l->l_info[DT_JMPREL] && lazy)
+    {
+      /* patb: this is different than i386 */
+      /* The GOT entries for functions in the PLT have not yet been filled
+	 in.  Their initial contents will arrange when called to push an
+	 index into the .got section, load ip with &_GLOBAL_OFFSET_TABLE_[3],
+	 and then jump to _GLOBAL_OFFSET_TABLE[2].  */
+      got = (Elf32_Addr *) D_PTR (l, l_info[DT_PLTGOT]);
+      /* If a library is prelinked but we have to relocate anyway,
+	 we have to be able to undo the prelinking of .got.plt.
+	 The prelinker saved us here address of .plt.  */
+      if (got[1])
+	l->l_mach.plt = got[1] + l->l_addr;
+      got[1] = (Elf32_Addr) l;	/* Identify this shared object.  */
+
+      /* The got[2] entry contains the address of a function which gets
+	 called to get the address of a so far unresolved function and
+	 jump to it.  The profiling extension of the dynamic linker allows
+	 to intercept the calls to collect information.  In this case we
+	 don't store the address in the GOT so that all future calls also
+	 end in this function.  */
+      if (profile)
+	{
+	  got[2] = (Elf32_Addr) &_dl_runtime_profile;
+
+	  if (GLRO(dl_profile) != NULL
+	      && _dl_name_match_p (GLRO(dl_profile), l))
+	    /* Say that we really want profiling and the timers are
+	       started.  */
+	    GL(dl_profile_map) = l;
+	}
+      else
+	/* This function will get called to fix up the GOT entry indicated by
+	   the offset on the stack, and then jump to the resolved address.  */
+	got[2] = (Elf32_Addr) &_dl_runtime_resolve;
+    }
+
+  if (l->l_info[ADDRIDX (DT_TLSDESC_GOT)] && lazy)
+    *(Elf32_Addr*)(D_PTR (l, l_info[ADDRIDX (DT_TLSDESC_GOT)]) + l->l_addr)
+      = (Elf32_Addr) &_dl_tlsdesc_lazy_resolver;
+
+  return lazy;
+}
+
+#if defined(ARCH_HAS_BX)
+#define BX(x) "bx\t" #x
+#else
+#define BX(x) "mov\tpc, " #x
+#endif
+
+/* Mask identifying addresses reserved for the user program,
+   where the dynamic linker should not map anything.  */
+#define ELF_MACHINE_USER_ADDRESS_MASK	0xf8000000UL
+
+/* Initial entry point code for the dynamic linker.
+   The C function `_dl_start' is the real entry point;
+   its return value is the user program's entry point.  */
+
+#define RTLD_START asm ("\
+.text\n\
+.globl _start\n\
+.type _start, %function\n\
+.globl _dl_start_user\n\
+.type _dl_start_user, %function\n\
+_start:\n\
+	@ we are PIC code, so get global offset table\n\
+	ldr	sl, .L_GET_GOT\n\
+	@ See if we were run as a command with the executable file\n\
+	@ name as an extra leading argument.\n\
+	ldr	r4, .L_SKIP_ARGS\n\
+	@ at start time, all the args are on the stack\n\
+	mov	r0, sp\n\
+	bl	_dl_start\n\
+	@ returns user entry point in r0\n\
+_dl_start_user:\n\
+	adr	r6, .L_GET_GOT\n\
+	add	sl, sl, r6\n\
+	ldr	r4, [sl, r4]\n\
+	@ save the entry point in another register\n\
+	mov	r6, r0\n\
+	@ get the original arg count\n\
+	ldr	r1, [sp]\n\
+	@ get the argv address\n\
+	add	r2, sp, #4\n\
+	@ Fix up the stack if necessary.\n\
+	cmp	r4, #0\n\
+	bne	.L_fixup_stack\n\
+.L_done_fixup:\n\
+	@ compute envp\n\
+	add	r3, r2, r1, lsl #2\n\
+	add	r3, r3, #4\n\
+	@ now we call _dl_init\n\
+	ldr	r0, .L_LOADED\n\
+	ldr	r0, [sl, r0]\n\
+	@ call _dl_init\n\
+	bl	_dl_init_internal(PLT)\n\
+	@ load the finalizer function\n\
+	ldr	r0, .L_FINI_PROC\n\
+	add	r0, sl, r0\n\
+	@ jump to the user_s entry point\n\
+	" BX(r6) "\n\
+\n\
+	@ iWMMXt and EABI targets require the stack to be eight byte\n\
+	@ aligned - shuffle arguments etc.\n\
+.L_fixup_stack:\n\
+	@ subtract _dl_skip_args from original arg count\n\
+	sub	r1, r1, r4\n\
+	@ store the new argc in the new stack location\n\
+	str	r1, [sp]\n\
+	@ find the first unskipped argument\n\
+	mov	r3, r2\n\
+	add	r4, r2, r4, lsl #2\n\
+	@ shuffle argv down\n\
+1:	ldr	r5, [r4], #4\n\
+	str	r5, [r3], #4\n\
+	cmp	r5, #0\n\
+	bne	1b\n\
+	@ shuffle envp down\n\
+1:	ldr	r5, [r4], #4\n\
+	str	r5, [r3], #4\n\
+	cmp	r5, #0\n\
+	bne	1b\n\
+	@ shuffle auxv down\n\
+1:	ldmia	r4!, {r0, r5}\n\
+	stmia	r3!, {r0, r5}\n\
+	cmp	r0, #0\n\
+	bne	1b\n\
+	@ Update _dl_argv\n\
+	ldr	r3, .L_ARGV\n\
+	str	r2, [sl, r3]\n\
+	b	.L_done_fixup\n\
+\n\
+.L_GET_GOT:\n\
+	.word	_GLOBAL_OFFSET_TABLE_ - .L_GET_GOT\n\
+.L_SKIP_ARGS:\n\
+	.word	_dl_skip_args(GOTOFF)\n\
+.L_FINI_PROC:\n\
+	.word	_dl_fini(GOTOFF)\n\
+.L_ARGV:\n\
+	.word	_dl_argv(GOTOFF)\n\
+.L_LOADED:\n\
+	.word	_rtld_local(GOTOFF)\n\
+.previous\n\
+");
+
+/* ELF_RTYPE_CLASS_PLT iff TYPE describes relocation of a PLT entry or
+   TLS variable, so undefined references should not be allowed to
+   define the value.
+   ELF_RTYPE_CLASS_NOCOPY iff TYPE should not be allowed to resolve to one
+   of the main executable's symbols, as for a COPY reloc.  */
+#ifndef RTLD_BOOTSTRAP
+# define elf_machine_type_class(type) \
+  ((((type) == R_ARM_JUMP_SLOT || (type) == R_ARM_TLS_DTPMOD32		\
+     || (type) == R_ARM_TLS_DTPOFF32 || (type) == R_ARM_TLS_TPOFF32	\
+     || (type) == R_ARM_TLS_DESC)					\
+    * ELF_RTYPE_CLASS_PLT)						\
+   | (((type) == R_ARM_COPY) * ELF_RTYPE_CLASS_COPY))
+#else
+#define elf_machine_type_class(type) \
+  ((((type) == R_ARM_JUMP_SLOT) * ELF_RTYPE_CLASS_PLT)	\
+   | (((type) == R_ARM_COPY) * ELF_RTYPE_CLASS_COPY))
+#endif
+
+/* A reloc type used for ld.so cmdline arg lookups to reject PLT entries.  */
+#define ELF_MACHINE_JMP_SLOT	R_ARM_JUMP_SLOT
+
+/* ARM never uses Elf32_Rela relocations for the dynamic linker.
+   Prelinked libraries may use Elf32_Rela though.  */
+#define ELF_MACHINE_PLT_REL 1
+
+/* We define an initialization functions.  This is called very early in
+   _dl_sysdep_start.  */
+#define DL_PLATFORM_INIT dl_platform_init ()
+
+static inline void __attribute__ ((unused))
+dl_platform_init (void)
+{
+  if (GLRO(dl_platform) != NULL && *GLRO(dl_platform) == '\0')
+    /* Avoid an empty string which would disturb us.  */
+    GLRO(dl_platform) = NULL;
+}
+
+static inline Elf32_Addr
+elf_machine_fixup_plt (struct link_map *map, lookup_t t,
+		       const Elf32_Rel *reloc,
+		       Elf32_Addr *reloc_addr, Elf32_Addr value)
+{
+  return *reloc_addr = value;
+}
+
+/* Return the final value of a plt relocation.  */
+static inline Elf32_Addr
+elf_machine_plt_value (struct link_map *map, const Elf32_Rel *reloc,
+		       Elf32_Addr value)
+{
+  return value;
+}
+
+#endif /* !dl_machine_h */
+
+
+/* ARM never uses Elf32_Rela relocations for the dynamic linker.
+   Prelinked libraries may use Elf32_Rela though.  */
+#define ELF_MACHINE_NO_RELA defined RTLD_BOOTSTRAP
+
+/* Names of the architecture-specific auditing callback functions.  */
+#define ARCH_LA_PLTENTER arm_gnu_pltenter
+#define ARCH_LA_PLTEXIT arm_gnu_pltexit
+
+#ifdef RESOLVE_MAP
+/* Handle a PC24 reloc, including the out-of-range case.  */
+auto void
+relocate_pc24 (struct link_map *map, Elf32_Addr value,
+               Elf32_Addr *const reloc_addr, Elf32_Sword addend)
+{
+  Elf32_Addr new_value;
+
+  /* Set NEW_VALUE based on V, and return true iff it overflows 24 bits.  */
+  inline bool set_new_value (Elf32_Addr v)
+  {
+    new_value = v + addend - (Elf32_Addr) reloc_addr;
+    Elf32_Addr topbits = new_value & 0xfe000000;
+    return topbits != 0xfe000000 && topbits != 0x00000000;
+  }
+
+  if (set_new_value (value))
+    {
+      /* The PC-relative address doesn't fit in 24 bits!  */
+
+      static void *fix_page;
+      static size_t fix_offset;
+      if (fix_page == NULL)
+        {
+          void *new_page = __mmap (NULL, GLRO(dl_pagesize),
+                                   PROT_READ | PROT_WRITE | PROT_EXEC,
+                                   MAP_PRIVATE | MAP_ANON, -1, 0);
+          if (new_page == MAP_FAILED)
+            _dl_signal_error (0, map->l_name, NULL,
+                              "could not map page for fixup");
+          fix_page = new_page;
+          assert (fix_offset == 0);
+        }
+
+      Elf32_Word *fix_address = fix_page + fix_offset;
+      fix_address[0] = 0xe51ff004;	/* ldr pc, [pc, #-4] */
+      fix_address[1] = value;
+
+      fix_offset += sizeof fix_address[0] * 2;
+      if (fix_offset >= GLRO(dl_pagesize))
+        {
+          fix_page = NULL;
+          fix_offset = 0;
+        }
+
+      if (set_new_value ((Elf32_Addr) fix_address))
+        _dl_signal_error (0, map->l_name, NULL,
+                          "R_ARM_PC24 relocation out of range");
+    }
+
+  *reloc_addr = (*reloc_addr & 0xff000000) | ((new_value >> 2) & 0x00ffffff);
+}
+
+/* Perform the relocation specified by RELOC and SYM (which is fully resolved).
+   MAP is the object containing the reloc.  */
+
+auto inline void
+__attribute__ ((always_inline))
+elf_machine_rel (struct link_map *map, const Elf32_Rel *reloc,
+		 const Elf32_Sym *sym, const struct r_found_version *version,
+		 void *const reloc_addr_arg, int skip_ifunc)
+{
+  Elf32_Addr *const reloc_addr = reloc_addr_arg;
+  const unsigned int r_type = ELF32_R_TYPE (reloc->r_info);
+
+#if !defined RTLD_BOOTSTRAP || !defined HAVE_Z_COMBRELOC
+  if (__builtin_expect (r_type == R_ARM_RELATIVE, 0))
+    {
+# if !defined RTLD_BOOTSTRAP && !defined HAVE_Z_COMBRELOC
+      /* This is defined in rtld.c, but nowhere in the static libc.a;
+	 make the reference weak so static programs can still link.
+	 This declaration cannot be done when compiling rtld.c
+	 (i.e. #ifdef RTLD_BOOTSTRAP) because rtld.c contains the
+	 common defn for _dl_rtld_map, which is incompatible with a
+	 weak decl in the same file.  */
+#  ifndef SHARED
+      weak_extern (_dl_rtld_map);
+#  endif
+      if (map != &GL(dl_rtld_map)) /* Already done in rtld itself.  */
+# endif
+	*reloc_addr += map->l_addr;
+    }
+# ifndef RTLD_BOOTSTRAP
+  else if (__builtin_expect (r_type == R_ARM_NONE, 0))
+    return;
+# endif
+  else
+#endif
+    {
+      const Elf32_Sym *const refsym = sym;
+      struct link_map *sym_map = RESOLVE_MAP (&sym, version, r_type);
+      Elf32_Addr value = sym_map == NULL ? 0 : sym_map->l_addr + sym->st_value;
+
+      if (sym != NULL
+	  && __builtin_expect (ELFW(ST_TYPE) (sym->st_info) == STT_GNU_IFUNC, 0)
+	  && __builtin_expect (sym->st_shndx != SHN_UNDEF, 1)
+	  && __builtin_expect (!skip_ifunc, 1))
+	value = elf_ifunc_invoke (value);
+
+      switch (r_type)
+	{
+	case R_ARM_COPY:
+	  if (sym == NULL)
+	    /* This can happen in trace mode if an object could not be
+	       found.  */
+	    break;
+	  if (sym->st_size > refsym->st_size
+	      || (GLRO(dl_verbose) && sym->st_size < refsym->st_size))
+	    {
+	      const char *strtab;
+
+	      strtab = (const void *) D_PTR (map, l_info[DT_STRTAB]);
+	      _dl_error_printf ("\
+%s: Symbol `%s' has different size in shared object, consider re-linking\n",
+				RTLD_PROGNAME, strtab + refsym->st_name);
+	    }
+	  memcpy (reloc_addr_arg, (void *) value,
+		  MIN (sym->st_size, refsym->st_size));
+	  break;
+	case R_ARM_GLOB_DAT:
+	case R_ARM_JUMP_SLOT:
+# ifdef RTLD_BOOTSTRAP
+	  /* Fix weak undefined references.  */
+	  if (sym != NULL && sym->st_value == 0)
+	    *reloc_addr = 0;
+	  else
+# endif
+	    *reloc_addr = value;
+	  break;
+	case R_ARM_ABS32:
+	  {
+	    struct unaligned
+	      {
+		Elf32_Addr x;
+	      } __attribute__ ((packed, may_alias));
+# ifndef RTLD_BOOTSTRAP
+	   /* This is defined in rtld.c, but nowhere in the static
+	      libc.a; make the reference weak so static programs can
+	      still link.  This declaration cannot be done when
+	      compiling rtld.c (i.e.  #ifdef RTLD_BOOTSTRAP) because
+	      rtld.c contains the common defn for _dl_rtld_map, which
+	      is incompatible with a weak decl in the same file.  */
+#  ifndef SHARED
+	    weak_extern (_dl_rtld_map);
+#  endif
+	    if (map == &GL(dl_rtld_map))
+	      /* Undo the relocation done here during bootstrapping.
+		 Now we will relocate it anew, possibly using a
+		 binding found in the user program or a loaded library
+		 rather than the dynamic linker's built-in definitions
+		 used while loading those libraries.  */
+	      value -= map->l_addr + refsym->st_value;
+# endif
+	    /* Support relocations on mis-aligned offsets.  */
+	    ((struct unaligned *) reloc_addr)->x += value;
+	    break;
+	  }
+	case R_ARM_TLS_DESC:
+	  {
+	    struct tlsdesc volatile *td =
+	      (struct tlsdesc volatile *)reloc_addr;
+
+# ifndef RTLD_BOOTSTRAP
+	    if (! sym)
+	      td->entry = _dl_tlsdesc_undefweak;
+	    else
+# endif
+	      {
+		value = sym->st_value + td->argument.value;
+
+# ifndef RTLD_BOOTSTRAP
+#  ifndef SHARED
+		CHECK_STATIC_TLS (map, sym_map);
+#  else
+		if (!TRY_STATIC_TLS (map, sym_map))
+		  {
+		    td->argument.pointer
+		      = _dl_make_tlsdesc_dynamic (sym_map, value);
+		    td->entry = _dl_tlsdesc_dynamic;
+		  }
+		else
+#  endif
+# endif
+		{
+		  td->argument.value = value + sym_map->l_tls_offset;
+		  td->entry = _dl_tlsdesc_return;
+		}
+	      }
+	    }
+	    break;
+	case R_ARM_PC24:
+          relocate_pc24 (map, value, reloc_addr,
+                         /* Sign-extend the 24-bit addend in the
+                            instruction (which counts instructions), and
+                            then shift it up two so as to count bytes.  */
+                         (((Elf32_Sword) *reloc_addr << 8) >> 8) << 2);
+	  break;
+#if !defined RTLD_BOOTSTRAP
+	case R_ARM_TLS_DTPMOD32:
+	  /* Get the information from the link map returned by the
+	     resolv function.  */
+	  if (sym_map != NULL)
+	    *reloc_addr = sym_map->l_tls_modid;
+	  break;
+
+	case R_ARM_TLS_DTPOFF32:
+	  if (sym != NULL)
+	    *reloc_addr += sym->st_value;
+	  break;
+
+	case R_ARM_TLS_TPOFF32:
+	  if (sym != NULL)
+	    {
+	      CHECK_STATIC_TLS (map, sym_map);
+	      *reloc_addr += sym->st_value + sym_map->l_tls_offset;
+	    }
+	  break;
+	case R_ARM_IRELATIVE:
+	  value = map->l_addr + *reloc_addr;
+	  value = ((Elf32_Addr (*) (int)) value) (GLRO(dl_hwcap));
+	  *reloc_addr = value;
+	  break;
+#endif
+	default:
+	  _dl_reloc_bad_type (map, r_type, 0);
+	  break;
+	}
+    }
+}
+
+# ifndef RTLD_BOOTSTRAP
+auto inline void
+__attribute__ ((always_inline))
+elf_machine_rela (struct link_map *map, const Elf32_Rela *reloc,
+		  const Elf32_Sym *sym, const struct r_found_version *version,
+		  void *const reloc_addr_arg, int skip_ifunc)
+{
+  Elf32_Addr *const reloc_addr = reloc_addr_arg;
+  const unsigned int r_type = ELF32_R_TYPE (reloc->r_info);
+
+  if (__builtin_expect (r_type == R_ARM_RELATIVE, 0))
+    *reloc_addr = map->l_addr + reloc->r_addend;
+  else if (__builtin_expect (r_type == R_ARM_NONE, 0))
+    return;
+  else
+    {
+# ifndef RESOLVE_CONFLICT_FIND_MAP
+      const Elf32_Sym *const refsym = sym;
+# endif
+      struct link_map *sym_map = RESOLVE_MAP (&sym, version, r_type);
+      Elf32_Addr value = sym_map == NULL ? 0 : sym_map->l_addr + sym->st_value;
+
+      if (sym != NULL
+	  && __builtin_expect (ELFW(ST_TYPE) (sym->st_info) == STT_GNU_IFUNC, 0)
+	  && __builtin_expect (sym->st_shndx != SHN_UNDEF, 1)
+	  && __builtin_expect (!skip_ifunc, 1))
+	value = elf_ifunc_invoke (value);
+
+      switch (r_type)
+	{
+#  ifndef RESOLVE_CONFLICT_FIND_MAP
+	  /* Not needed for dl-conflict.c.  */
+	case R_ARM_COPY:
+	  if (sym == NULL)
+	    /* This can happen in trace mode if an object could not be
+	       found.  */
+	    break;
+	  if (sym->st_size > refsym->st_size
+	      || (GLRO(dl_verbose) && sym->st_size < refsym->st_size))
+	    {
+	      const char *strtab;
+
+	      strtab = (const void *) D_PTR (map, l_info[DT_STRTAB]);
+	      _dl_error_printf ("\
+%s: Symbol `%s' has different size in shared object, consider re-linking\n",
+				RTLD_PROGNAME, strtab + refsym->st_name);
+	    }
+	  memcpy (reloc_addr_arg, (void *) value,
+		  MIN (sym->st_size, refsym->st_size));
+	  break;
+#  endif /* !RESOLVE_CONFLICT_FIND_MAP */
+	case R_ARM_GLOB_DAT:
+	case R_ARM_JUMP_SLOT:
+	case R_ARM_ABS32:
+	  *reloc_addr = value + reloc->r_addend;
+	  break;
+	case R_ARM_PC24:
+          relocate_pc24 (map, value, reloc_addr, reloc->r_addend);
+	  break;
+#if !defined RTLD_BOOTSTRAP
+	case R_ARM_TLS_DTPMOD32:
+	  /* Get the information from the link map returned by the
+	     resolv function.  */
+	  if (sym_map != NULL)
+	    *reloc_addr = sym_map->l_tls_modid;
+	  break;
+
+	case R_ARM_TLS_DTPOFF32:
+	  *reloc_addr = (sym == NULL ? 0 : sym->st_value) + reloc->r_addend;
+	  break;
+
+	case R_ARM_TLS_TPOFF32:
+	  if (sym != NULL)
+	    {
+	      CHECK_STATIC_TLS (map, sym_map);
+	      *reloc_addr = (sym->st_value + sym_map->l_tls_offset
+			     + reloc->r_addend);
+	    }
+	  break;
+	case R_ARM_IRELATIVE:
+	  value = map->l_addr + *reloc_addr;
+	  value = ((Elf32_Addr (*) (int)) value) (GLRO(dl_hwcap));
+	  *reloc_addr = value;
+	  break;
+#endif
+	default:
+	  _dl_reloc_bad_type (map, r_type, 0);
+	  break;
+	}
+    }
+}
+# endif
+
+auto inline void
+__attribute__ ((always_inline))
+elf_machine_rel_relative (Elf32_Addr l_addr, const Elf32_Rel *reloc,
+			  void *const reloc_addr_arg)
+{
+  Elf32_Addr *const reloc_addr = reloc_addr_arg;
+  *reloc_addr += l_addr;
+}
+
+# ifndef RTLD_BOOTSTRAP
+auto inline void
+__attribute__ ((always_inline))
+elf_machine_rela_relative (Elf32_Addr l_addr, const Elf32_Rela *reloc,
+			   void *const reloc_addr_arg)
+{
+  Elf32_Addr *const reloc_addr = reloc_addr_arg;
+  *reloc_addr = l_addr + reloc->r_addend;
+}
+# endif
+
+auto inline void
+__attribute__ ((always_inline))
+elf_machine_lazy_rel (struct link_map *map,
+		      Elf32_Addr l_addr, const Elf32_Rel *reloc,
+		      int skip_ifunc)
+{
+  Elf32_Addr *const reloc_addr = (void *) (l_addr + reloc->r_offset);
+  const unsigned int r_type = ELF32_R_TYPE (reloc->r_info);
+  /* Check for unexpected PLT reloc type.  */
+  if (__builtin_expect (r_type == R_ARM_JUMP_SLOT, 1))
+    {
+      if (__builtin_expect (map->l_mach.plt, 0) == 0)
+	*reloc_addr += l_addr;
+      else
+	*reloc_addr = map->l_mach.plt;
+    }
+  else if (__builtin_expect (r_type == R_ARM_TLS_DESC, 1))
+    {
+      struct tlsdesc volatile *td =
+	(struct tlsdesc volatile *)reloc_addr;
+
+      /* The linker must have given us the parameter we need in the
+	 first GOT entry, and left the second one empty. We fill the
+	 last with the resolver address */
+      assert (td->entry == 0);
+      td->entry = (void*)(D_PTR (map, l_info[ADDRIDX (DT_TLSDESC_PLT)])
+			  + map->l_addr);
+    }
+  else
+    _dl_reloc_bad_type (map, r_type, 1);
+}
+
+#endif /* RESOLVE_MAP */
diff --git a/sysdeps/arm/dl-sysdep.h b/sysdeps/arm/dl-sysdep.h
new file mode 100644
index 0000000000..e9c86dfc12
--- /dev/null
+++ b/sysdeps/arm/dl-sysdep.h
@@ -0,0 +1,23 @@
+/* System-specific settings for dynamic linker code.  Alpha version.
+   Copyright (C) 2002-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include_next <dl-sysdep.h>
+
+/* _dl_argv cannot be attribute_relro, because _dl_start_user
+   might write into it after _dl_start returns.  */
+#define DL_ARGV_NOT_RELRO 1
diff --git a/sysdeps/arm/dl-tls.h b/sysdeps/arm/dl-tls.h
new file mode 100644
index 0000000000..8dea3672f0
--- /dev/null
+++ b/sysdeps/arm/dl-tls.h
@@ -0,0 +1,31 @@
+/* Thread-local storage handling in the ELF dynamic linker.  ARM version.
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+
+/* Type used for the representation of TLS information in the GOT.  */
+typedef struct dl_tls_index
+{
+  unsigned long int ti_module;
+  unsigned long int ti_offset;
+} tls_index;
+
+
+extern void *__tls_get_addr (tls_index *ti);
+
+/* Value used for dtv entries for which the allocation is delayed.  */
+#define TLS_DTV_UNALLOCATED	((void *) -1l)
diff --git a/sysdeps/arm/dl-tlsdesc.S b/sysdeps/arm/dl-tlsdesc.S
new file mode 100644
index 0000000000..1644a32793
--- /dev/null
+++ b/sysdeps/arm/dl-tlsdesc.S
@@ -0,0 +1,226 @@
+/* Thread-local storage handling in the ELF dynamic linker.  ARM version.
+   Copyright (C) 2006-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <arm-features.h>
+#include <tls.h>
+#include "tlsdesc.h"
+
+	.text
+	@ emit debug information with cfi
+	@ use arm-specific pseudos for unwinding itself
+	CFI_SECTIONS
+	.hidden _dl_tlsdesc_return
+	.global	_dl_tlsdesc_return
+	.type	_dl_tlsdesc_return,#function
+	cfi_startproc
+	eabi_fnstart
+	.align 2
+_dl_tlsdesc_return:
+	sfi_breg r0, \
+	ldr	r0, [\B]
+	BX	(lr)
+	eabi_fnend
+	cfi_endproc
+	.size	_dl_tlsdesc_return, .-_dl_tlsdesc_return
+
+	.hidden _dl_tlsdesc_undefweak
+	.global	_dl_tlsdesc_undefweak
+	.type	_dl_tlsdesc_undefweak,#function
+	cfi_startproc
+	eabi_fnstart
+	.align 2
+_dl_tlsdesc_undefweak:
+	GET_TLS (r1)
+	rsb 	r0, r0, #0
+	BX	(lr)
+	cfi_endproc
+	eabi_fnend
+	.size	_dl_tlsdesc_undefweak, .-_dl_tlsdesc_undefweak
+
+#ifdef SHARED
+	.hidden _dl_tlsdesc_dynamic
+	.global	_dl_tlsdesc_dynamic
+	.type	_dl_tlsdesc_dynamic,#function
+
+
+/*
+	The assembly code that follows is a rendition of the following
+	C code, hand-optimized a little bit.
+
+ptrdiff_t
+_dl_tlsdesc_dynamic(struct tlsdesc *tdp)
+{
+       struct tlsdesc_dynamic_arg *td = tdp->argument.pointer;
+       dtv_t *dtv = (dtv_t *)THREAD_DTV();
+       if (__builtin_expect (td->gen_count <= dtv[0].counter
+                             && dtv[td->tlsinfo.ti_module].pointer.val
+                                != TLS_DTV_UNALLOCATED,
+                             1))
+               return dtv[td->tlsinfo.ti_module].pointer.val +
+                       td->tlsinfo.ti_offset - __builtin_thread_pointer();
+
+       return __tls_get_addr (&td->tlsinfo) - __builtin_thread_pointer();
+}
+
+*/
+	cfi_startproc
+	eabi_fnstart
+	.align 2
+_dl_tlsdesc_dynamic:
+	/* Our calling convention is to clobber r0, r1 and the processor
+	   flags.  All others that are modified must be saved */
+	eabi_save ({r2,r3,r4,lr})
+	push	{r2,r3,r4,lr}
+	cfi_adjust_cfa_offset (16)
+	cfi_rel_offset (r2,0)
+	cfi_rel_offset (r3,4)
+	cfi_rel_offset (r4,8)
+	cfi_rel_offset (lr,12)
+	sfi_breg r0, \
+	ldr	r1, [\B] /* td */
+	GET_TLS (lr)
+	mov	r4, r0 /* r4 = tp */
+	sfi_breg r0, \
+	ldr	r0, [\B]
+	sfi_breg r1, \
+	ldr	r2, [\B, #8] /* gen_count */
+	sfi_breg r0, \
+	ldr	r3, [\B]
+	cmp	r2, r3
+	bhi	1f
+	sfi_breg r1, \
+	ldr	r3, [\B]
+#ifndef ARM_NO_INDEX_REGISTER
+	ldr	r2, [r0, r3, lsl #3]
+#else
+	add	lr, r0, r3, lsl #3
+	sfi_breg lr, \
+	ldr	r2, [\B]
+#endif
+	cmn	r2, #1
+	ittt	ne
+	sfi_breg r1, \
+	ldrne	r3, [r1, #4]
+	addne	r3, r2, r3
+	rsbne	r0, r4, r3
+	bne	2f
+1:	mov	r0, r1
+	bl	__tls_get_addr
+	rsb	r0, r4, r0
+2:
+#if ((defined (__ARM_ARCH_4T__) && defined (__THUMB_INTERWORK__)) \
+     || defined (ARM_ALWAYS_BX))
+	pop	{r2,r3,r4, lr}
+	cfi_adjust_cfa_offset (-16)
+	cfi_restore (lr)
+	cfi_restore (r4)
+	cfi_restore (r3)
+	cfi_restore (r2)
+	bx	lr
+#else
+	pop	{r2,r3,r4, pc}
+#endif
+	eabi_fnend
+	cfi_endproc
+	.size	_dl_tlsdesc_dynamic, .-_dl_tlsdesc_dynamic
+#endif /* SHARED */
+
+/* lazy resolved for tls descriptors.  */
+	.hidden _dl_tlsdesc_lazy_resolver
+	.global	_dl_tlsdesc_lazy_resolver
+	.type	_dl_tlsdesc_lazy_resolver,#function
+	cfi_startproc
+	eabi_fnstart
+	.align 2
+_dl_tlsdesc_lazy_resolver:
+	/* r0 points at the tlsdesc,
+	   r1 points at the GOT
+	   r2 was pushed by the trampoline and used as a temp,
+	      we need to pop it here.
+	  We push the remaining call-clobbered registers here, and also
+	  R1 -- to keep the stack correctly aligned.  */
+	/* Tell the unwinder that r2 has already been pushed.  */
+	eabi_save ({r2})
+	cfi_adjust_cfa_offset (4)
+	cfi_rel_offset (r2, 0)
+	eabi_save ({r0,r1,r3,ip,lr})
+	push	{r0, r1, r3, ip, lr}
+	cfi_adjust_cfa_offset (20)
+	cfi_rel_offset (r0, 0)
+	cfi_rel_offset (r1, 4)
+	cfi_rel_offset (r3, 8)
+	cfi_rel_offset (ip, 12)
+	cfi_rel_offset (lr, 16)
+	bl	_dl_tlsdesc_lazy_resolver_fixup
+	pop	{r0, r1, r3, ip, lr}
+	cfi_adjust_cfa_offset (-20)
+	cfi_restore (lr)
+	cfi_restore (ip)
+	cfi_restore (r3)
+	cfi_restore (r1)
+	cfi_restore (r0)
+	pop	{r2}
+	cfi_adjust_cfa_offset (-4)
+	cfi_restore (r2)
+	sfi_breg r0, \
+	ldr	r1, [\B, #4]
+	BX	(r1)
+	eabi_fnend
+	cfi_endproc
+	.size	_dl_tlsdesc_lazy_resolver, .-_dl_tlsdesc_lazy_resolver
+
+/* Holder for lazy tls descriptors being resolve in another thread.
+   Same ABI as the lazy resolver itself.  */
+	.hidden _dl_tlsdesc_resolve_hold
+	.global	_dl_tlsdesc_resolve_hold
+	.type	_dl_tlsdesc_resolve_hold,#function
+	cfi_startproc
+	eabi_fnstart
+	.align 2
+_dl_tlsdesc_resolve_hold:
+	/* Tell the unwinder that r2 has already been pushed.  */
+	eabi_save ({r2})
+	cfi_adjust_cfa_offset (4)
+	cfi_rel_offset (r2, 0)
+	eabi_save ({r0,r1,r3,ip,lr})
+	push	{r0, r1, r3, ip, lr}
+	cfi_adjust_cfa_offset (20)
+	cfi_rel_offset (r0, 0)
+	cfi_rel_offset (r1, 4)
+	cfi_rel_offset (r3, 8)
+	cfi_rel_offset (ip, 12)
+	cfi_rel_offset (lr, 16)
+	adr	r2, _dl_tlsdesc_resolve_hold
+	bl	_dl_tlsdesc_resolve_hold_fixup
+	pop	{r0, r1, r3, ip, lr}
+	cfi_adjust_cfa_offset (-20)
+	cfi_restore (lr)
+	cfi_restore (ip)
+	cfi_restore (r3)
+	cfi_restore (r1)
+	cfi_restore (r0)
+	pop	{r2}
+	cfi_adjust_cfa_offset (-4)
+	cfi_restore (r2)
+	sfi_breg r0, \
+	ldr     r1, [\B, #4]
+	BX      (r1)
+	eabi_fnend
+	cfi_endproc
+	.size	_dl_tlsdesc_resolve_hold, .-_dl_tlsdesc_resolve_hold
diff --git a/sysdeps/arm/dl-tlsdesc.h b/sysdeps/arm/dl-tlsdesc.h
new file mode 100644
index 0000000000..27a5d5d948
--- /dev/null
+++ b/sysdeps/arm/dl-tlsdesc.h
@@ -0,0 +1,62 @@
+/* Thread-local storage descriptor handling in the ELF dynamic linker.
+   ARM version.
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; witout even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _ARM_DL_TLSDESC_H
+# define _ARM_DL_TLSDESC_H 1
+
+/* Type used to represent a TLS descriptor in the GOT.  */
+struct tlsdesc
+{
+  union
+    {
+      void *pointer;
+      long value;
+    } argument;
+  ptrdiff_t (*entry)(struct tlsdesc *);
+};
+
+
+typedef struct dl_tls_index
+{
+  unsigned long int ti_module;
+  unsigned long int ti_offset;
+} tls_index;
+
+/* Type used as the argument in a TLS descriptor for a symbol that
+   needs dynamic TLS offsets.  */
+struct tlsdesc_dynamic_arg
+{
+  tls_index tlsinfo;
+  size_t gen_count;
+};
+
+extern ptrdiff_t attribute_hidden
+  _dl_tlsdesc_return(struct tlsdesc *),
+  _dl_tlsdesc_undefweak(struct tlsdesc *),
+  _dl_tlsdesc_resolve_hold(struct tlsdesc *),
+  _dl_tlsdesc_lazy_resolver(struct tlsdesc *);
+
+# ifdef SHARED
+extern void *_dl_make_tlsdesc_dynamic (struct link_map *map, size_t ti_offset);
+
+extern ptrdiff_t attribute_hidden
+  _dl_tlsdesc_dynamic(struct tlsdesc *);
+# endif
+
+#endif
diff --git a/sysdeps/arm/dl-trampoline.S b/sysdeps/arm/dl-trampoline.S
new file mode 100644
index 0000000000..2b7033b896
--- /dev/null
+++ b/sysdeps/arm/dl-trampoline.S
@@ -0,0 +1,212 @@
+/* PLT trampolines.  ARM version.
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* ??? Needs more rearrangement for the LDM to handle thumb mode.  */
+#define NO_THUMB
+#include <sysdep.h>
+#include <libc-symbols.h>
+
+	.text
+	.globl _dl_runtime_resolve
+	.type _dl_runtime_resolve, #function
+	CFI_SECTIONS
+	cfi_startproc
+	.align 2
+_dl_runtime_resolve:
+	cfi_adjust_cfa_offset (4)
+	cfi_rel_offset (lr, 0)
+
+	@ we get called with
+	@ 	stack[0] contains the return address from this call
+	@	ip contains &GOT[n+3] (pointer to function)
+	@	lr points to &GOT[2]
+
+	@ Save arguments.  We save r4 to realign the stack.
+	push	{r0-r4}
+	cfi_adjust_cfa_offset (20)
+	cfi_rel_offset (r0, 0)
+	cfi_rel_offset (r1, 4)
+	cfi_rel_offset (r2, 8)
+	cfi_rel_offset (r3, 12)
+
+	@ get pointer to linker struct
+	ldr	r0, [lr, #-4]
+
+	@ prepare to call _dl_fixup()
+	@ change &GOT[n+3] into 8*n        NOTE: reloc are 8 bytes each
+	sub	r1, ip, lr
+	sub	r1, r1, #4
+	add	r1, r1, r1
+
+	@ call fixup routine
+	bl	_dl_fixup
+
+	@ save the return
+	mov	ip, r0
+
+	@ get arguments and return address back.  We restore r4
+	@ only to realign the stack.
+	pop	{r0-r4,lr}
+	cfi_adjust_cfa_offset (-24)
+
+	@ jump to the newly found address
+	BX(ip)
+
+	cfi_endproc
+	.size _dl_runtime_resolve, .-_dl_runtime_resolve
+
+#ifndef PROF
+	.globl _dl_runtime_profile
+	.type _dl_runtime_profile, #function
+	CFI_SECTIONS
+	cfi_startproc
+	.align 2
+_dl_runtime_profile:
+	cfi_adjust_cfa_offset (4)
+	cfi_rel_offset (lr, 0)
+
+	@ we get called with
+	@ 	stack[0] contains the return address from this call
+	@	ip contains &GOT[n+3] (pointer to function)
+	@	lr points to &GOT[2]
+
+	@ Stack layout:
+	@ 212 - saved lr
+	@ 208 - framesize returned from pltenter
+	@ 16 - La_arm_regs
+	@ 8 - Saved two arguments to _dl_profile_fixup
+	@ 4 - Saved result of _dl_profile_fixup
+	@ 0 - outgoing argument to _dl_profile_fixup
+	@ For now, we only save the general purpose registers.
+
+	sub	sp, sp, #196
+	cfi_adjust_cfa_offset (196)
+	stmia	sp, {r0-r3}
+	cfi_rel_offset (r0, 0)
+	cfi_rel_offset (r1, 4)
+	cfi_rel_offset (r2, 8)
+	cfi_rel_offset (r3, 12)
+
+	sub	sp, sp, #16
+	cfi_adjust_cfa_offset (16)
+
+	@ Save sp and lr.
+	add	r0, sp, #216
+	str	r0, [sp, #32]
+	ldr	r2, [sp, #212]
+	str	r2, [sp, #36]
+
+	@ get pointer to linker struct
+	ldr	r0, [lr, #-4]
+
+	@ prepare to call _dl_profile_fixup()
+	@ change &GOT[n+3] into 8*n        NOTE: reloc are 8 bytes each
+	sub	r1, ip, lr
+	sub	r1, r1, #4
+	add	r1, r1, r1
+
+	@ Save these two arguments for pltexit.
+	add	r3, sp, #8
+	stmia	r3!, {r0,r1}
+
+	@ Set up extra args for _dl_profile_fixup.
+	@ r2 and r3 are already loaded.
+	add	ip, sp, #208
+	str	ip, [sp, #0]
+
+	@ call profiling fixup routine
+	bl	_dl_profile_fixup
+
+	@ The address to call is now in r0.
+
+	@ Check whether we're wrapping this function.
+	ldr	ip, [sp, #208]
+	cmp	ip, #0
+	bge	1f
+	cfi_remember_state
+
+	@ save the return
+	mov	ip, r0
+
+	@ get arguments and return address back
+	add	sp, sp, #16
+	cfi_adjust_cfa_offset (-16)
+	ldmia	sp, {r0-r3,sp,lr}
+	cfi_adjust_cfa_offset (-200)
+
+	@ jump to the newly found address
+	BX(ip)
+
+	cfi_restore_state
+1:
+	@ The new frame size is in ip.
+
+	@ New stack layout:
+	@ 268 - saved r7
+	@ 264 - saved result of _dl_profile_fixup
+	@ 72 - La_arm_regs
+	@ 64 - Saved two arguments to _dl_profile_fixup
+	@ 0 - La_arm_retval
+	@ For now, we only save the general purpose registers.
+
+	@ Build the new frame.
+	str	r7, [sp, #212]
+	cfi_rel_offset (r7, 212)
+	sub	r7, sp, #56
+	cfi_def_cfa_register (r7)
+	cfi_adjust_cfa_offset (56)
+	sub	sp, sp, ip
+	bic	sp, sp, #7
+
+	@ Save the _dl_profile_fixup result around the call to memcpy.
+	str	r0, [r7, #264]
+
+	@ Copy the stack arguments.
+	mov	r0, sp
+	add	r1, r7, #272
+	mov	r2, ip
+	bl	memcpy
+
+	@ Call the function.
+	add	ip, r7, #72
+	ldmia	ip, {r0-r3}
+	ldr	ip, [r7, #264]
+	BLX(ip)
+	stmia	r7, {r0-r3}
+
+	@ Call pltexit.
+	add	ip, r7, #64
+	ldmia	ip, {r0,r1}
+	add	r2, r7, #72
+	add	r3, r7, #0
+	bl	_dl_call_pltexit
+
+	@ Return to caller.
+	ldmia	r7, {r0-r3}
+	mov	sp, r7
+	cfi_def_cfa_register (sp)
+	ldr	r7, [sp, #268]
+	ldr	lr, [sp, #92]
+	add	sp, sp, #272
+	cfi_adjust_cfa_offset (-272)
+	BX(lr)
+
+	cfi_endproc
+	.size _dl_runtime_profile, .-_dl_runtime_profile
+#endif
+	.previous
diff --git a/sysdeps/arm/fclrexcpt.c b/sysdeps/arm/fclrexcpt.c
new file mode 100644
index 0000000000..8b54114e37
--- /dev/null
+++ b/sysdeps/arm/fclrexcpt.c
@@ -0,0 +1,58 @@
+/* Clear given exceptions in current floating-point environment.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <arm-features.h>
+
+
+int
+__feclearexcept (int excepts)
+{
+  if (ARM_HAVE_VFP)
+    {
+      unsigned long int temp;
+
+      /* Mask out unsupported bits/exceptions.  */
+      excepts &= FE_ALL_EXCEPT;
+
+      /* Get the current floating point status. */
+      _FPU_GETCW (temp);
+
+      /* Clear the relevant bits.  */
+      temp = (temp & ~FE_ALL_EXCEPT) | (temp & FE_ALL_EXCEPT & ~excepts);
+
+      /* Put the new data in effect.  */
+      _FPU_SETCW (temp);
+
+      /* Success.  */
+      return 0;
+    }
+
+  /* Unsupported, so fail unless nothing needs to be done.  */
+  return (excepts != 0);
+}
+
+#include <shlib-compat.h>
+#if SHLIB_COMPAT (libm, GLIBC_2_1, GLIBC_2_2)
+strong_alias (__feclearexcept, __old_feclearexcept)
+compat_symbol (libm, __old_feclearexcept, feclearexcept, GLIBC_2_1);
+#endif
+
+libm_hidden_ver (__feclearexcept, feclearexcept)
+versioned_symbol (libm, __feclearexcept, feclearexcept, GLIBC_2_2);
diff --git a/sysdeps/arm/fedisblxcpt.c b/sysdeps/arm/fedisblxcpt.c
new file mode 100644
index 0000000000..88da539439
--- /dev/null
+++ b/sysdeps/arm/fedisblxcpt.c
@@ -0,0 +1,47 @@
+/* Disable floating-point exceptions.
+   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Philip Blundell <philb@gnu.org>, 2001.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <arm-features.h>
+
+
+int
+fedisableexcept (int excepts)
+{
+  if (ARM_HAVE_VFP)
+    {
+      unsigned long int new_exc, old_exc;
+
+      _FPU_GETCW(new_exc);
+
+      old_exc = (new_exc >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT;
+
+      excepts &= FE_ALL_EXCEPT;
+
+      new_exc &= ~(excepts << FE_EXCEPT_SHIFT);
+
+      _FPU_SETCW(new_exc);
+
+      return old_exc;
+    }
+
+  /* Unsupported, so return -1 for failure.  */
+  return -1;
+}
diff --git a/sysdeps/arm/feenablxcpt.c b/sysdeps/arm/feenablxcpt.c
new file mode 100644
index 0000000000..b286ec5565
--- /dev/null
+++ b/sysdeps/arm/feenablxcpt.c
@@ -0,0 +1,59 @@
+/* Enable floating-point exceptions.
+   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Philip Blundell <philb@gnu.org>, 2001.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <arm-features.h>
+
+
+int
+feenableexcept (int excepts)
+{
+  if (ARM_HAVE_VFP)
+    {
+      unsigned long int new_exc, old_exc;
+
+      _FPU_GETCW(new_exc);
+
+      old_exc = (new_exc >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT;
+
+      excepts &= FE_ALL_EXCEPT;
+
+      new_exc |= (excepts << FE_EXCEPT_SHIFT);
+
+      _FPU_SETCW(new_exc);
+
+      if (excepts != 0)
+	{
+	  /* VFPv3 and VFPv4 do not support trapping exceptions, so
+	     test whether the relevant bits were set and fail if
+	     not.  */
+	  unsigned int temp;
+	  _FPU_GETCW (temp);
+	  if ((temp & (excepts << FE_EXCEPT_SHIFT))
+	      != (excepts << FE_EXCEPT_SHIFT))
+	    return -1;
+	}
+
+      return old_exc;
+    }
+
+  /* Unsupported, so return -1 for failure.  */
+  return -1;
+}
diff --git a/sysdeps/arm/fegetenv.c b/sysdeps/arm/fegetenv.c
new file mode 100644
index 0000000000..7003a01304
--- /dev/null
+++ b/sysdeps/arm/fegetenv.c
@@ -0,0 +1,48 @@
+/* Store current floating-point environment.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <arm-features.h>
+
+
+int
+__fegetenv (fenv_t *envp)
+{
+  if (ARM_HAVE_VFP)
+    {
+      unsigned long int temp;
+      _FPU_GETCW (temp);
+      envp->__cw = temp;
+
+      /* Success.  */
+      return 0;
+    }
+
+  /* Unsupported, so fail.  */
+  return 1;
+}
+
+#include <shlib-compat.h>
+#if SHLIB_COMPAT (libm, GLIBC_2_1, GLIBC_2_2)
+strong_alias (__fegetenv, __old_fegetenv)
+compat_symbol (libm, __old_fegetenv, fegetenv, GLIBC_2_1);
+#endif
+
+libm_hidden_ver (__fegetenv, fegetenv)
+versioned_symbol (libm, __fegetenv, fegetenv, GLIBC_2_2);
diff --git a/sysdeps/arm/fegetexcept.c b/sysdeps/arm/fegetexcept.c
new file mode 100644
index 0000000000..5974c63336
--- /dev/null
+++ b/sysdeps/arm/fegetexcept.c
@@ -0,0 +1,39 @@
+/* Get floating-point exceptions.
+   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Philip Blundell <philb@gnu.org>, 2001
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <arm-features.h>
+
+
+int
+fegetexcept (void)
+{
+  if (ARM_HAVE_VFP)
+    {
+      unsigned long temp;
+
+      _FPU_GETCW (temp);
+
+      return (temp >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT;
+    }
+
+  /* Unsupported. Return all exceptions disabled.  */
+  return 0;
+}
diff --git a/sysdeps/arm/fegetround.c b/sysdeps/arm/fegetround.c
new file mode 100644
index 0000000000..cb4cf1bce2
--- /dev/null
+++ b/sysdeps/arm/fegetround.c
@@ -0,0 +1,40 @@
+/* Return current rounding direction.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <arm-features.h>
+
+
+int
+fegetround (void)
+{
+  if (ARM_HAVE_VFP)
+    {
+      unsigned int temp;
+
+      /* Get the current environment.  */
+      _FPU_GETCW (temp);
+
+      return temp & FE_TOWARDZERO;
+    }
+
+  /* The current soft-float implementation only handles TONEAREST.  */
+  return FE_TONEAREST;
+}
+libm_hidden_def (fegetround)
diff --git a/sysdeps/arm/feholdexcpt.c b/sysdeps/arm/feholdexcpt.c
new file mode 100644
index 0000000000..9ca673c6fb
--- /dev/null
+++ b/sysdeps/arm/feholdexcpt.c
@@ -0,0 +1,50 @@
+/* Store current floating-point environment and clear exceptions.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <arm-features.h>
+
+
+int
+feholdexcept (fenv_t *envp)
+{
+  if (ARM_HAVE_VFP)
+    {
+      unsigned long int temp;
+
+      /* Store the environment.  */
+      _FPU_GETCW(temp);
+      envp->__cw = temp;
+
+      /* Now set all exceptions to non-stop.  */
+      temp &= ~(FE_ALL_EXCEPT << FE_EXCEPT_SHIFT);
+
+      /* And clear all exception flags.  */
+      temp &= ~FE_ALL_EXCEPT;
+
+      _FPU_SETCW(temp);
+
+      return 0;
+    }
+
+  /* Unsupported, so fail.  */
+  return 1;
+}
+
+libm_hidden_def (feholdexcept)
diff --git a/sysdeps/arm/fesetenv.c b/sysdeps/arm/fesetenv.c
new file mode 100644
index 0000000000..af4f25d47d
--- /dev/null
+++ b/sysdeps/arm/fesetenv.c
@@ -0,0 +1,63 @@
+/* Install given floating-point environment.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <arm-features.h>
+
+
+int
+__fesetenv (const fenv_t *envp)
+{
+  if (ARM_HAVE_VFP)
+    {
+      unsigned int temp;
+
+      _FPU_GETCW (temp);
+      temp &= _FPU_RESERVED;
+
+      if (envp == FE_DFL_ENV)
+	temp |= _FPU_DEFAULT;
+      else if (envp == FE_NOMASK_ENV)
+	temp |= _FPU_IEEE;
+      else
+	temp |= envp->__cw & ~_FPU_RESERVED;
+
+      _FPU_SETCW (temp);
+
+      if (envp == FE_NOMASK_ENV)
+	{
+	  /* VFPv3 and VFPv4 do not support trapping exceptions, so
+	     test whether the relevant bits were set and fail if
+	     not.  */
+	  _FPU_GETCW (temp);
+	  if ((temp & _FPU_IEEE) != _FPU_IEEE)
+	    return 1;
+	}
+
+      /* Success.  */
+      return 0;
+    }
+
+  /* Unsupported, so fail.  */
+  return 1;
+}
+
+#include <shlib-compat.h>
+libm_hidden_ver (__fesetenv, fesetenv)
+versioned_symbol (libm, __fesetenv, fesetenv, GLIBC_2_2);
diff --git a/sysdeps/arm/fesetround.c b/sysdeps/arm/fesetround.c
new file mode 100644
index 0000000000..6f533d1992
--- /dev/null
+++ b/sysdeps/arm/fesetround.c
@@ -0,0 +1,53 @@
+/* Set current rounding direction.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <arm-features.h>
+
+
+int
+fesetround (int round)
+{
+  if (ARM_HAVE_VFP)
+    {
+      fpu_control_t temp;
+
+      switch (round)
+	{
+	case FE_TONEAREST:
+	case FE_UPWARD:
+	case FE_DOWNWARD:
+	case FE_TOWARDZERO:
+	  _FPU_GETCW (temp);
+	  temp = (temp & ~FE_TOWARDZERO) | round;
+	  _FPU_SETCW (temp);
+	  return 0;
+	default:
+	  return 1;
+	}
+    }
+  else if (round == FE_TONEAREST)
+    /* This is the only supported rounding mode for soft-fp.  */
+    return 0;
+
+  /* Unsupported, so fail.  */
+  return 1;
+}
+
+libm_hidden_def (fesetround)
diff --git a/sysdeps/arm/feupdateenv.c b/sysdeps/arm/feupdateenv.c
new file mode 100644
index 0000000000..58ec5f66db
--- /dev/null
+++ b/sysdeps/arm/feupdateenv.c
@@ -0,0 +1,56 @@
+/* Install given floating-point environment and raise exceptions.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <arm-features.h>
+
+
+int
+__feupdateenv (const fenv_t *envp)
+{
+  if (ARM_HAVE_VFP)
+    {
+      unsigned int temp;
+
+      /* Get the current exception state.  */
+      _FPU_GETCW (temp);
+
+      /* Install new environment.  */
+      fesetenv (envp);
+
+      /* Raise the saved exceptions.  */
+      feraiseexcept (temp & FE_ALL_EXCEPT);
+
+      /* Success.  */
+      return 0;
+    }
+
+  /* Unsupported, so fail.  */
+  return 1;
+}
+
+#include <shlib-compat.h>
+#if SHLIB_COMPAT (libm, GLIBC_2_1, GLIBC_2_2)
+strong_alias (__feupdateenv, __old_feupdateenv)
+compat_symbol (libm, __old_feupdateenv, feupdateenv, GLIBC_2_1);
+#endif
+
+libm_hidden_ver (__feupdateenv, feupdateenv)
+versioned_symbol (libm, __feupdateenv, feupdateenv, GLIBC_2_2);
diff --git a/sysdeps/arm/fgetexcptflg.c b/sysdeps/arm/fgetexcptflg.c
new file mode 100644
index 0000000000..114597990a
--- /dev/null
+++ b/sysdeps/arm/fgetexcptflg.c
@@ -0,0 +1,50 @@
+/* Store current representation for exceptions.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <arm-features.h>
+
+
+int
+__fegetexceptflag (fexcept_t *flagp, int excepts)
+{
+  if (ARM_HAVE_VFP)
+    {
+      unsigned long temp;
+
+      /* Get the current exceptions.  */
+      _FPU_GETCW (temp);
+
+      *flagp = temp & excepts & FE_ALL_EXCEPT;
+
+      /* Success.  */
+      return 0;
+    }
+
+  /* Unsupported, so fail.  */
+  return 1;
+}
+
+#include <shlib-compat.h>
+#if SHLIB_COMPAT (libm, GLIBC_2_1, GLIBC_2_2)
+strong_alias (__fegetexceptflag, __old_fegetexceptflag)
+compat_symbol (libm, __old_fegetexceptflag, fegetexceptflag, GLIBC_2_1);
+#endif
+versioned_symbol (libm, __fegetexceptflag, fegetexceptflag, GLIBC_2_2);
diff --git a/sysdeps/arm/find_exidx.c b/sysdeps/arm/find_exidx.c
new file mode 100644
index 0000000000..39910ed350
--- /dev/null
+++ b/sysdeps/arm/find_exidx.c
@@ -0,0 +1,79 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <link.h>
+#include <unwind.h>
+
+struct unw_eh_callback_data
+{
+  _Unwind_Ptr pc;
+  _Unwind_Ptr exidx_start;
+  int exidx_len;
+};
+
+
+/* Callback to determins if the PC lies within an object, and remember the
+   location of the exception index table if it does.  */
+
+static int
+find_exidx_callback (struct dl_phdr_info * info, size_t size, void * ptr)
+{
+  struct unw_eh_callback_data * data;
+  const ElfW(Phdr) *phdr;
+  int i;
+  int match;
+  _Unwind_Ptr load_base;
+
+  data = (struct unw_eh_callback_data *) ptr;
+  load_base = info->dlpi_addr;
+  phdr = info->dlpi_phdr;
+
+  match = 0;
+  for (i = info->dlpi_phnum; i > 0; i--, phdr++)
+    {
+      if (phdr->p_type == PT_LOAD)
+        {
+          _Unwind_Ptr vaddr = phdr->p_vaddr + load_base;
+          if (data->pc >= vaddr && data->pc < vaddr + phdr->p_memsz)
+            match = 1;
+        }
+      else if (phdr->p_type == PT_ARM_EXIDX)
+	{
+	  data->exidx_start = (_Unwind_Ptr) (phdr->p_vaddr + load_base);
+	  data->exidx_len = phdr->p_memsz;
+	}
+    }
+
+  return match;
+}
+
+
+/* Find the exception index table containing PC.  */
+
+_Unwind_Ptr
+__gnu_Unwind_Find_exidx (_Unwind_Ptr pc, int * pcount)
+{
+  struct unw_eh_callback_data data;
+
+  data.pc = pc;
+  data.exidx_start = 0;
+  if (__dl_iterate_phdr (find_exidx_callback, &data) <= 0)
+    return 0;
+
+  *pcount = data.exidx_len / 8;
+  return data.exidx_start;
+}
diff --git a/sysdeps/arm/fpu_control.h b/sysdeps/arm/fpu_control.h
new file mode 100644
index 0000000000..6d54b9bfee
--- /dev/null
+++ b/sysdeps/arm/fpu_control.h
@@ -0,0 +1,63 @@
+/* FPU control word definitions.  ARM VFP version.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _FPU_CONTROL_H
+#define _FPU_CONTROL_H
+
+#if !(defined(_LIBC) && !defined(_LIBC_TEST)) && defined(__SOFTFP__)
+
+#define _FPU_RESERVED 0xffffffff
+#define _FPU_DEFAULT  0x00000000
+typedef unsigned int fpu_control_t;
+#define _FPU_GETCW(cw) (cw) = 0
+#define _FPU_SETCW(cw) (void) (cw)
+extern fpu_control_t __fpu_control;
+
+#else
+
+/* masking of interrupts */
+#define _FPU_MASK_IM	0x00000100	/* invalid operation */
+#define _FPU_MASK_ZM	0x00000200	/* divide by zero */
+#define _FPU_MASK_OM	0x00000400	/* overflow */
+#define _FPU_MASK_UM	0x00000800	/* underflow */
+#define _FPU_MASK_PM	0x00001000	/* inexact */
+
+/* Some bits in the FPSCR are not yet defined.  They must be preserved when
+   modifying the contents.  */
+#define _FPU_RESERVED	0x00086060
+#define _FPU_DEFAULT    0x00000000
+/* Default + exceptions enabled. */
+#define _FPU_IEEE	(_FPU_DEFAULT | 0x00001f00)
+
+/* Type of the control word.  */
+typedef unsigned int fpu_control_t;
+
+/* Macros for accessing the hardware control word.  */
+/* This is fmrx %0, fpscr.  */
+#define _FPU_GETCW(cw) \
+  __asm__ __volatile__ ("mrc p10, 7, %0, cr1, cr0, 0" : "=r" (cw))
+/* This is fmxr fpscr, %0.  */
+#define _FPU_SETCW(cw) \
+  __asm__ __volatile__ ("mcr p10, 7, %0, cr1, cr0, 0" : : "r" (cw))
+
+/* Default control word set at startup.  */
+extern fpu_control_t __fpu_control;
+
+#endif /* __SOFTFP__ */
+
+#endif /* _FPU_CONTROL_H */
diff --git a/sysdeps/arm/fraiseexcpt.c b/sysdeps/arm/fraiseexcpt.c
new file mode 100644
index 0000000000..8b320651eb
--- /dev/null
+++ b/sysdeps/arm/fraiseexcpt.c
@@ -0,0 +1,106 @@
+/* Raise given exceptions.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fpu_control.h>
+#include <fenv.h>
+#include <float.h>
+#include <arm-features.h>
+
+
+int
+feraiseexcept (int excepts)
+{
+  if (ARM_HAVE_VFP)
+    {
+      int fpscr;
+      const float fp_zero = 0.0, fp_one = 1.0, fp_max = FLT_MAX,
+                  fp_min = FLT_MIN, fp_1e32 = 1.0e32f, fp_two = 2.0,
+		  fp_three = 3.0;
+
+      /* Raise exceptions represented by EXPECTS.  But we must raise only
+	 one signal at a time.  It is important that if the overflow/underflow
+	 exception and the inexact exception are given at the same time,
+	 the overflow/underflow exception follows the inexact exception.  After
+	 each exception we read from the fpscr, to force the exception to be
+	 raised immediately.  */
+
+      /* There are additional complications because this file may be compiled
+         without VFP support enabled, and we also can't assume that the
+	 assembler has VFP instructions enabled. To get around this we use the
+	 generic coprocessor mnemonics and avoid asking GCC to put float values
+	 in VFP registers.  */
+
+      /* First: invalid exception.  */
+      if (FE_INVALID & excepts)
+	__asm__ __volatile__ (
+	  "ldc p10, cr0, %1\n\t"                        /* flds s0, %1  */
+	  "cdp p10, 8, cr0, cr0, cr0, 0\n\t"            /* fdivs s0, s0, s0  */
+	  "mrc p10, 7, %0, cr1, cr0, 0" : "=r" (fpscr)  /* fmrx %0, fpscr  */
+			                : "m" (fp_zero)
+					: "s0");
+
+      /* Next: division by zero.  */
+      if (FE_DIVBYZERO & excepts)
+	__asm__ __volatile__ (
+	  "ldc p10, cr0, %1\n\t"                        /* flds s0, %1  */
+	  "ldcl p10, cr0, %2\n\t"                       /* flds s1, %2  */
+	  "cdp p10, 8, cr0, cr0, cr0, 1\n\t"            /* fdivs s0, s0, s1  */
+	  "mrc p10, 7, %0, cr1, cr0, 0" : "=r" (fpscr)  /* fmrx %0, fpscr  */
+			                : "m" (fp_one), "m" (fp_zero)
+					: "s0", "s1");
+
+      /* Next: overflow.  */
+      if (FE_OVERFLOW & excepts)
+	/* There's no way to raise overflow without also raising inexact.  */
+	__asm__ __volatile__ (
+	  "ldc p10, cr0, %1\n\t"                        /* flds s0, %1  */
+	  "ldcl p10, cr0, %2\n\t"                       /* flds s1, %2  */
+	  "cdp p10, 3, cr0, cr0, cr0, 1\n\t"            /* fadds s0, s0, s1  */
+	  "mrc p10, 7, %0, cr1, cr0, 0" : "=r" (fpscr)  /* fmrx %0, fpscr  */
+			                : "m" (fp_max), "m" (fp_1e32)
+					: "s0", "s1");
+
+      /* Next: underflow.  */
+      if (FE_UNDERFLOW & excepts)
+	__asm__ __volatile__ (
+	  "ldc p10, cr0, %1\n\t"                        /* flds s0, %1  */
+	  "ldcl p10, cr0, %2\n\t"                       /* flds s1, %2  */
+	  "cdp p10, 8, cr0, cr0, cr0, 1\n\t"            /* fdivs s0, s0, s1  */
+	  "mrc p10, 7, %0, cr1, cr0, 0" : "=r" (fpscr)  /* fmrx %0, fpscr  */
+			                : "m" (fp_min), "m" (fp_three)
+					: "s0", "s1");
+
+      /* Last: inexact.  */
+      if (FE_INEXACT & excepts)
+	__asm__ __volatile__ (
+	  "ldc p10, cr0, %1\n\t"                        /* flds s0, %1  */
+	  "ldcl p10, cr0, %2\n\t"                       /* flds s1, %2  */
+	  "cdp p10, 8, cr0, cr0, cr0, 1\n\t"            /* fdivs s0, s0, s1  */
+	  "mrc p10, 7, %0, cr1, cr0, 0" : "=r" (fpscr)  /* fmrx %0, fpscr  */
+			                : "m" (fp_two), "m" (fp_three)
+					: "s0", "s1");
+
+      /* Success.  */
+      return 0;
+    }
+
+  /* Unsupported, so fail unless nothing needs to be done.  */
+  return (excepts != 0);
+}
+
+libm_hidden_def (feraiseexcept)
diff --git a/sysdeps/arm/frame.h b/sysdeps/arm/frame.h
new file mode 100644
index 0000000000..eba5967c3f
--- /dev/null
+++ b/sysdeps/arm/frame.h
@@ -0,0 +1,27 @@
+/* Definition of stack frame structure.  ARM/APCS version.
+   Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* This is the APCS stack backtrace structure.  */
+struct layout
+{
+  struct layout *next;
+  void *sp;
+  void *return_address;
+};
+
+#define FIRST_FRAME_POINTER ADVANCE_STACK_FRAME (__builtin_frame_address (0))
diff --git a/sysdeps/arm/framestate.c b/sysdeps/arm/framestate.c
new file mode 100644
index 0000000000..710cecca97
--- /dev/null
+++ b/sysdeps/arm/framestate.c
@@ -0,0 +1 @@
+/* Empty */
diff --git a/sysdeps/arm/fsetexcptflg.c b/sysdeps/arm/fsetexcptflg.c
new file mode 100644
index 0000000000..0c88c0fa70
--- /dev/null
+++ b/sysdeps/arm/fsetexcptflg.c
@@ -0,0 +1,56 @@
+/* Set floating-point environment exception handling.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <math.h>
+#include <fpu_control.h>
+#include <arm-features.h>
+
+
+int
+__fesetexceptflag (const fexcept_t *flagp, int excepts)
+{
+  if (ARM_HAVE_VFP)
+    {
+      fexcept_t temp;
+
+      /* Get the current environment.  */
+      _FPU_GETCW (temp);
+
+      /* Set the desired exception mask.  */
+      temp &= ~(excepts & FE_ALL_EXCEPT);
+      temp |= (*flagp & excepts & FE_ALL_EXCEPT);
+
+      /* Save state back to the FPU.  */
+      _FPU_SETCW (temp);
+
+      /* Success.  */
+      return 0;
+    }
+
+  /* Unsupported, so fail unless nothing needs to be done.  */
+  return (excepts != 0);
+}
+
+#include <shlib-compat.h>
+#if SHLIB_COMPAT (libm, GLIBC_2_1, GLIBC_2_2)
+strong_alias (__fesetexceptflag, __old_fesetexceptflag)
+compat_symbol (libm, __old_fesetexceptflag, fesetexceptflag, GLIBC_2_1);
+#endif
+
+versioned_symbol (libm, __fesetexceptflag, fesetexceptflag, GLIBC_2_2);
diff --git a/sysdeps/arm/ftestexcept.c b/sysdeps/arm/ftestexcept.c
new file mode 100644
index 0000000000..9295c0fec2
--- /dev/null
+++ b/sysdeps/arm/ftestexcept.c
@@ -0,0 +1,40 @@
+/* Test exception in current environment.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include <arm-features.h>
+
+
+int
+fetestexcept (int excepts)
+{
+  if (ARM_HAVE_VFP)
+    {
+      fexcept_t temp;
+
+      /* Get current exceptions.  */
+      _FPU_GETCW(temp);
+
+      return temp & excepts & FE_ALL_EXCEPT;
+    }
+
+  /* Unsupported, return 0.  */
+  return 0;
+}
+libm_hidden_def (fetestexcept)
diff --git a/sysdeps/arm/gcc-compat.h b/sysdeps/arm/gcc-compat.h
new file mode 100644
index 0000000000..680f30e3a7
--- /dev/null
+++ b/sysdeps/arm/gcc-compat.h
@@ -0,0 +1,35 @@
+/* Macros for checking required GCC compatibility.  ARM version.
+   Copyright (C) 2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _ARM_GCC_COMPAT_H
+#define _ARM_GCC_COMPAT_H 1
+
+#ifndef GCC_COMPAT_VERSION
+# ifdef __ARM_PCS_VFP
+/* The hard-float ABI was first supported in 4.5.  */
+#  define GCC_COMPAT_VERSION    GCC_VERSION (4, 5)
+# else
+/* The EABI configurations (the only ones we handle) were first supported
+   in 4.1.  */
+#  define GCC_COMPAT_VERSION    GCC_VERSION (4, 1)
+# endif
+#endif
+
+#include_next <gcc-compat.h>
+
+#endif
diff --git a/sysdeps/arm/gccframe.h b/sysdeps/arm/gccframe.h
new file mode 100644
index 0000000000..f417b45791
--- /dev/null
+++ b/sysdeps/arm/gccframe.h
@@ -0,0 +1,21 @@
+/* Definition of object in frame unwind info.  arm version.
+   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define FIRST_PSEUDO_REGISTER 27
+
+#include <sysdeps/generic/gccframe.h>
diff --git a/sysdeps/arm/get-rounding-mode.h b/sysdeps/arm/get-rounding-mode.h
new file mode 100644
index 0000000000..7d6054cd89
--- /dev/null
+++ b/sysdeps/arm/get-rounding-mode.h
@@ -0,0 +1,42 @@
+/* Determine floating-point rounding mode within libc.  ARM version.
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _ARM_GET_ROUNDING_MODE_H
+#define _ARM_GET_ROUNDING_MODE_H	1
+
+#include <arm-features.h>
+#include <fenv.h>
+#include <fpu_control.h>
+
+/* Return the floating-point rounding mode.  */
+
+static inline int
+get_rounding_mode (void)
+{
+  if (ARM_HAVE_VFP)
+    {
+      fpu_control_t fc;
+
+      _FPU_GETCW (fc);
+      return fc & FE_TOWARDZERO;
+    }
+  else
+    return FE_TONEAREST;
+}
+
+#endif /* get-rounding-mode.h */
diff --git a/sysdeps/arm/gmp-mparam.h b/sysdeps/arm/gmp-mparam.h
new file mode 100644
index 0000000000..e2276b7bce
--- /dev/null
+++ b/sysdeps/arm/gmp-mparam.h
@@ -0,0 +1,36 @@
+/* gmp-mparam.h -- Compiler/machine parameter header file.
+
+Copyright (C) 1991-2014 Free Software Foundation, Inc.
+
+This file is part of the GNU MP Library.
+
+The GNU MP Library is free software; you can redistribute it and/or modify
+it under the terms of the GNU Lesser General Public License as published by
+the Free Software Foundation; either version 2.1 of the License, or (at your
+option) any later version.
+
+The GNU MP Library is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
+License for more details.
+
+You should have received a copy of the GNU Lesser General Public License
+along with the GNU MP Library.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#define BITS_PER_MP_LIMB 32
+#define BYTES_PER_MP_LIMB 4
+#define BITS_PER_LONGINT 32
+#define BITS_PER_INT 32
+#define BITS_PER_SHORTINT 16
+#define BITS_PER_CHAR 8
+
+#if defined(__ARMEB__)
+# define IEEE_DOUBLE_MIXED_ENDIAN 0
+# define IEEE_DOUBLE_BIG_ENDIAN 1
+#elif defined(__VFP_FP__)
+# define IEEE_DOUBLE_MIXED_ENDIAN 0
+# define IEEE_DOUBLE_BIG_ENDIAN 0
+#else
+# define IEEE_DOUBLE_BIG_ENDIAN 0
+# define IEEE_DOUBLE_MIXED_ENDIAN 1
+#endif
diff --git a/sysdeps/arm/include/bits/setjmp.h b/sysdeps/arm/include/bits/setjmp.h
new file mode 100644
index 0000000000..220dfe8d96
--- /dev/null
+++ b/sysdeps/arm/include/bits/setjmp.h
@@ -0,0 +1,36 @@
+/* Private jmp_buf-related definitions.  ARM EABI version.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _INCLUDE_BITS_SETJMP_H
+#define _INCLUDE_BITS_SETJMP_H 1
+
+#ifndef __ASSEMBLER__
+/* Get the public declarations.  */
+# include <sysdeps/arm/bits/setjmp.h>
+#endif
+
+#ifndef _ISOMAC
+/* Register list for a ldm/stm instruction to load/store
+   the general registers from a __jmp_buf.  */
+# define JMP_BUF_REGLIST	{v1-v6, sl, fp}
+
+/* Index of __jmp_buf where the sp register resides.  */
+# define __JMP_BUF_SP		8
+#endif
+
+#endif  /* include/bits/setjmp.h */
diff --git a/sysdeps/arm/jmpbuf-unwind.h b/sysdeps/arm/jmpbuf-unwind.h
new file mode 100644
index 0000000000..4dfba44ef8
--- /dev/null
+++ b/sysdeps/arm/jmpbuf-unwind.h
@@ -0,0 +1,45 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <setjmp.h>
+#include <stdint.h>
+#include <sysdep.h>
+#include <unwind.h>
+
+/* Test if longjmp to JMPBUF would unwind the frame
+   containing a local variable at ADDRESS.  */
+#define _JMPBUF_UNWINDS(jmpbuf, address, demangle) \
+  ((void *) (address) < (void *) demangle (jmpbuf[__JMP_BUF_SP]))
+
+#define _JMPBUF_CFA_UNWINDS_ADJ(_jmpbuf, _context, _adj) \
+  _JMPBUF_UNWINDS_ADJ (_jmpbuf, (void *) _Unwind_GetCFA (_context), _adj)
+
+static inline uintptr_t __attribute__ ((unused))
+_jmpbuf_sp (__jmp_buf regs)
+{
+  uintptr_t sp = regs[__JMP_BUF_SP];
+#ifdef PTR_DEMANGLE
+  PTR_DEMANGLE (sp);
+#endif
+  return sp;
+}
+
+#define _JMPBUF_UNWINDS_ADJ(_jmpbuf, _address, _adj) \
+  ((uintptr_t) (_address) - (_adj) < _jmpbuf_sp (_jmpbuf) - (_adj))
+
+/* We use the normal longjmp for unwinding.  */
+#define __libc_unwind_longjmp(buf, val) __libc_longjmp (buf, val)
diff --git a/sysdeps/arm/ldsodefs.h b/sysdeps/arm/ldsodefs.h
new file mode 100644
index 0000000000..47cbc4f205
--- /dev/null
+++ b/sysdeps/arm/ldsodefs.h
@@ -0,0 +1,40 @@
+/* Run-time dynamic linker data structures for loaded ELF shared objects.
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _ARM_LDSODEFS_H
+#define _ARM_LDSODEFS_H 1
+
+#include <elf.h>
+
+struct La_arm_regs;
+struct La_arm_retval;
+
+#define ARCH_PLTENTER_MEMBERS \
+    Elf32_Addr (*arm_gnu_pltenter) (Elf32_Sym *, unsigned int, uintptr_t *,  \
+				    uintptr_t *, struct La_arm_regs *,	     \
+				    unsigned int *, const char *,	     \
+				    long int *)
+
+#define ARCH_PLTEXIT_MEMBERS \
+    Elf32_Addr (*arm_gnu_pltexit) (Elf32_Sym *, unsigned int, uintptr_t *,   \
+				   uintptr_t *, const struct La_arm_regs *,  \
+				   struct La_arm_retval *, const char *)
+
+#include_next <ldsodefs.h>
+
+#endif
diff --git a/sysdeps/arm/libc-tls.c b/sysdeps/arm/libc-tls.c
new file mode 100644
index 0000000000..b364401bbe
--- /dev/null
+++ b/sysdeps/arm/libc-tls.c
@@ -0,0 +1,32 @@
+/* Thread-local storage handling in the ELF dynamic linker.  ARM version.
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <csu/libc-tls.c>
+#include <dl-tls.h>
+
+/* On ARM, linker optimizations are not required, so __tls_get_addr
+   can be called even in statically linked binaries.  In this case module
+   must be always 1 and PT_TLS segment exist in the binary, otherwise it
+   would not link.  */
+
+void *
+__tls_get_addr (tls_index *ti)
+{
+  dtv_t *dtv = THREAD_DTV ();
+  return (char *) dtv[1].pointer.val + ti->ti_offset;
+}
diff --git a/sysdeps/arm/libm-test-ulps b/sysdeps/arm/libm-test-ulps
new file mode 100644
index 0000000000..3811ff0309
--- /dev/null
+++ b/sysdeps/arm/libm-test-ulps
@@ -0,0 +1,8028 @@
+# Begin of automatic generation
+
+# acos_downward
+Test "acos_downward (-0x8p-4)":
+float: 1
+ifloat: 1
+
+# acos_towardzero
+Test "acos_towardzero (-0x8p-4)":
+float: 1
+ifloat: 1
+
+# acos_upward
+Test "acos_upward (+0)":
+double: 1
+idouble: 1
+Test "acos_upward (-0)":
+double: 1
+idouble: 1
+Test "acos_upward (-0x1p+0)":
+double: 1
+idouble: 1
+Test "acos_upward (-0x4p-1024)":
+double: 1
+idouble: 1
+Test "acos_upward (-0x4p-1076)":
+double: 1
+idouble: 1
+Test "acos_upward (-0x4p-128)":
+double: 1
+idouble: 1
+Test "acos_upward (-0x8p-152)":
+double: 1
+idouble: 1
+Test "acos_upward (-0x8p-972)":
+double: 1
+idouble: 1
+Test "acos_upward (0x1.70ef54646d496p-56)":
+double: 1
+idouble: 1
+Test "acos_upward (0x1.70ef54646d497p-56)":
+double: 1
+idouble: 1
+Test "acos_upward (0x1.70ef54p-56)":
+double: 1
+idouble: 1
+Test "acos_upward (0x1.70ef56p-56)":
+double: 1
+idouble: 1
+Test "acos_upward (0x4p-1024)":
+double: 1
+idouble: 1
+Test "acos_upward (0x4p-1076)":
+double: 1
+idouble: 1
+Test "acos_upward (0x4p-128)":
+double: 1
+idouble: 1
+Test "acos_upward (0x8p-152)":
+double: 1
+idouble: 1
+Test "acos_upward (0x8p-972)":
+double: 1
+idouble: 1
+
+# acosh
+Test "acosh (0x6.4p+4)":
+double: 1
+idouble: 1
+Test "acosh (0xf.ffffffffffff8p+1020)":
+double: 1
+
+# asin_downward
+Test "asin_downward (-0x1p+0)":
+double: 1
+idouble: 1
+Test "asin_downward (-0x8p-4)":
+double: 1
+idouble: 1
+Test "asin_downward (-0xf.fffffff8p-4)":
+double: 1
+idouble: 1
+Test "asin_downward (-0xf.ffffffffffff8p-4)":
+double: 1
+idouble: 1
+Test "asin_downward (-0xf.fffffffffffp-4)":
+double: 1
+idouble: 1
+Test "asin_downward (-0xf.fffffp-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "asin_downward (0x8p-4)":
+float: 1
+ifloat: 1
+
+# asin_towardzero
+Test "asin_towardzero (-0x4p-1024)":
+double: 1
+idouble: 1
+Test "asin_towardzero (-0x4p-1076)":
+double: 1
+idouble: 1
+Test "asin_towardzero (-0x4p-128)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "asin_towardzero (-0x8p-152)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "asin_towardzero (-0x8p-4)":
+float: 1
+ifloat: 1
+Test "asin_towardzero (-0x8p-972)":
+double: 1
+idouble: 1
+Test "asin_towardzero (0x8p-4)":
+float: 1
+ifloat: 1
+
+# asin_upward
+Test "asin_upward (-0x4p-1024)":
+double: 1
+idouble: 1
+Test "asin_upward (-0x4p-1076)":
+double: 1
+idouble: 1
+Test "asin_upward (-0x4p-128)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "asin_upward (-0x8p-152)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "asin_upward (-0x8p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "asin_upward (-0x8p-972)":
+double: 1
+idouble: 1
+Test "asin_upward (-0xf.fffffff8p-4)":
+double: 1
+idouble: 1
+Test "asin_upward (-0xf.ffffffffffff8p-4)":
+double: 1
+idouble: 1
+Test "asin_upward (-0xf.fffffffffffp-4)":
+double: 1
+idouble: 1
+Test "asin_upward (-0xf.fffffp-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "asin_upward (0x1p+0)":
+double: 1
+idouble: 1
+Test "asin_upward (0x4p-1024)":
+double: 1
+idouble: 1
+Test "asin_upward (0x4p-1076)":
+double: 1
+idouble: 1
+Test "asin_upward (0x4p-128)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "asin_upward (0x8p-152)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "asin_upward (0x8p-972)":
+double: 1
+idouble: 1
+
+# asinh
+Test "asinh (-0xf.ffffffffffff8p+1020)":
+double: 1
+Test "asinh (0xap+0)":
+float: 1
+ifloat: 1
+Test "asinh (0xf.ffffffffffff8p+1020)":
+double: 1
+
+# atan2
+Test "atan2 (-0x1.effe82p-8, -0x7.57d1d8p-12)":
+float: 1
+ifloat: 1
+Test "atan2 (-0xcp-4, -0x1p+0)":
+float: 1
+ifloat: 1
+Test "atan2 (-0xf.fffffp+124, -0x4p-128)":
+float: 1
+ifloat: 1
+Test "atan2 (-0xf.fffffp+124, -0x8p-152)":
+float: 1
+ifloat: 1
+Test "atan2 (0x1.64p+0, 0xe.ep-4)":
+float: 1
+ifloat: 1
+Test "atan2 (0xcp-4, -0x1p+0)":
+float: 1
+ifloat: 1
+Test "atan2 (0xf.fffffp+124, -0x4p-128)":
+float: 1
+ifloat: 1
+Test "atan2 (0xf.fffffp+124, -0x8p-152)":
+float: 1
+ifloat: 1
+
+# atanh
+Test "atanh (-0xcp-4)":
+float: 1
+ifloat: 1
+Test "atanh (0xcp-4)":
+float: 1
+ifloat: 1
+
+# cacos
+Test "Imaginary part of: cacos (+0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (+0 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacos (+0 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (+0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (+0 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacos (+0 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (-0.25 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0.25 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0.25 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0.25 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0.5 + 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0.5 + 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0.5 + 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0.5 + 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (-0.5 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0.5 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0.5 - 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0.5 - 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0.5 - 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0.5 - 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (-0.5 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0.5 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0x0.fffffffffffff8p0 + 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0x0.fffffffffffff8p0 - 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0x0.ffffffp0 + 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: cacos (-0x0.ffffffp0 - 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: cacos (-0x1.000002p0 + 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1.000002p0 - 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1.fp-10 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0x1.fp-10 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (-0x1.fp-100 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1.fp-100 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1.fp-100 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1.fp-100 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1.fp-1000 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0x1.fp-1000 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0x1.fp-1025 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0x1.fp-1025 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0x1.fp-1025 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (-0x1.fp-1025 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (-0x1.fp-129 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1.fp-129 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1.fp-129 + 0x0.ffffffp0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1.fp-129 + 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1.fp-129 + 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1.fp-129 + 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1.fp-129 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1.fp-129 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1.fp-129 + 1.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1.fp-129 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (-0x1.fp-129 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1.fp-129 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1.fp-129 - 0x0.ffffffp0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1.fp-129 - 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1.fp-129 - 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1.fp-129 - 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1.fp-129 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1.fp-129 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1.fp-129 - 1.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1.fp-129 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (-0x1.fp-30 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1.fp-30 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1.fp-30 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1.fp-30 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-105 + 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-105 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1p-105 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-105 + 0x1p-105 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-105 - 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-105 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1p-105 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-105 - 0x1p-105 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-112 + 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-112 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1p-112 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-112 + 0x1p-112 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-112 - 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-112 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1p-112 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-112 - 0x1p-112 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-23 + 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-23 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1p-23 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1p-23 + 0x0.ffffffp0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (-0x1p-23 + 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-23 + 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-23 - 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-23 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1p-23 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1p-23 - 0x0.ffffffp0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (-0x1p-23 - 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-23 - 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-52 + 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-52 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1p-52 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-52 + 0x1p-52 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-52 - 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-52 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1p-52 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-52 - 0x1p-52 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-63 + 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-63 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1p-63 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-63 + 0x1p-63 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-63 - 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-63 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-0x1p-63 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-0x1p-63 - 0x1p-63 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-1.0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-1.0 + 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-1.0 + 0x1p50 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-1.0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (-1.0 - 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-1.0 - 0x1p50 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (-2 - 3 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0.25 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0.25 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (0.5 + +0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0.5 + 0x1.fp-1025 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0.5 + 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0.5 + 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0.5 + 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0.5 + 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0.5 + 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0.5 + 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0.5 + 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0.5 + 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0.5 + 0x1p-63 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0.5 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0.5 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0.5 - 0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0.5 - 0x1.fp-1025 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0.5 - 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0.5 - 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0.5 - 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0.5 - 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0.5 - 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0.5 - 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0.5 - 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0.5 - 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0.5 - 0x1p-63 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0.5 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0.5 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x0.fffffffffffff8p0 + 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x0.fffffffffffff8p0 - 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0x0.ffffffp0 + 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (0x0.ffffffp0 + 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (0x0.ffffffp0 + 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: cacos (0x0.ffffffp0 + 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Real part of: cacos (0x0.ffffffp0 - 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (0x0.ffffffp0 - 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (0x0.ffffffp0 - 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: cacos (0x0.ffffffp0 - 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Real part of: cacos (0x1.0000000000001p0 + 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0x1.0000000000001p0 - 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (0x1.000002p0 + 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: cacos (0x1.000002p0 + 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (0x1.000002p0 - 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: cacos (0x1.000002p0 - 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1.fp-10 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x1.fp-10 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x1.fp-100 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1.fp-100 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1.fp-1000 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x1.fp-1000 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x1.fp-1025 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x1.fp-1025 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x1.fp-1025 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x1.fp-1025 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x1.fp-129 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1.fp-129 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1.fp-129 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x1.fp-129 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1.fp-129 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1.fp-129 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x1.fp-30 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1.fp-30 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1.fp1023 + 0x1.fp1023 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x1.fp127 + 0x1.fp127 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x1p-105 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1p-105 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1p-112 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1p-112 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1p-23 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1p-23 + 0x0.ffffffp0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x1p-23 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1p-23 - 0x0.ffffffp0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacos (0x1p-52 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1p-52 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1p-63 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (0x1p-63 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (1.0 + 0.25 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (1.0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (1.0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (1.0 + 0x1.fp-10 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: cacos (1.0 + 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (1.0 - 0.25 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacos (1.0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacos (1.0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacos (1.0 - 0x1.fp-10 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: cacos (1.0 - 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+
+# cacosh
+Test "Real part of: cacosh (+0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (+0 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacosh (+0 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (+0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (+0 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacosh (+0 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacosh (-0 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacosh (-0 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0.25 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0.25 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacosh (-0.25 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0.25 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacosh (-0.5 + 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0.5 + 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0.5 + 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0.5 + 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0.5 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (-0.5 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0.5 - 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0.5 - 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0.5 - 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0.5 - 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0.5 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (-0.5 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x0.fffffffffffff8p0 + 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0x0.fffffffffffff8p0 - 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0x0.ffffffp0 + 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Real part of: cacosh (-0x0.ffffffp0 - 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Real part of: cacosh (-0x1.000002p0 + 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1.000002p0 - 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1.fp-10 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0x1.fp-10 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0x1.fp-100 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-100 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1.fp-100 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-100 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1.fp-1000 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0x1.fp-1000 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0x1.fp-1025 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0x1.fp-1025 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0x1.fp-1025 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0x1.fp-1025 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (-0x1.fp-129 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-129 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-129 + 0x0.ffffffp0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-129 + 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-129 + 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-129 + 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1.fp-129 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-129 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1.fp-129 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (-0x1.fp-129 + 1.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1.fp-129 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-129 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-129 - 0x0.ffffffp0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-129 - 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-129 - 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-129 - 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1.fp-129 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-129 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1.fp-129 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (-0x1.fp-129 - 1.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1.fp-30 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-30 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1.fp-30 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1.fp-30 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-105 + 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1p-105 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-105 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-105 + 0x1p-105 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-105 - 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1p-105 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-105 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-105 - 0x1p-105 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-112 + 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1p-112 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-112 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-112 + 0x1p-112 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-112 - 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1p-112 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-112 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-112 - 0x1p-112 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-23 + 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1p-23 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-23 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1p-23 + 0x0.ffffffp0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (-0x1p-23 + 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-23 + 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-23 - 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1p-23 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-23 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1p-23 - 0x0.ffffffp0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (-0x1p-23 - 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-23 - 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-52 + 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1p-52 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-52 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-52 + 0x1p-52 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-52 - 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1p-52 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-52 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-52 - 0x1p-52 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-63 + 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1p-63 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-63 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-63 + 0x1p-63 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-63 - 0.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-0x1p-63 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-63 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-0x1p-63 - 0x1p-63 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-1.0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-1.0 + 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-1.0 + 0x1p50 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-1.0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (-1.0 - 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-1.0 - 0x1p50 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (-2 - 3 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0.25 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0.25 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (0.5 + +0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0.5 + 0x1.fp-1025 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0.5 + 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0.5 + 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0.5 + 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0.5 + 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0.5 + 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0.5 + 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0.5 + 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0.5 + 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0.5 + 0x1p-63 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0.5 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0.5 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (0.5 - 0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0.5 - 0x1.fp-1025 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0.5 - 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0.5 - 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0.5 - 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0.5 - 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0.5 - 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0.5 - 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0.5 - 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0.5 - 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0.5 - 0x1p-63 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0.5 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0.5 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0x0.fffffffffffff8p0 + 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x0.fffffffffffff8p0 - 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0x0.ffffffp0 + 0.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (0x0.ffffffp0 + 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0x0.ffffffp0 + 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: cacosh (0x0.ffffffp0 + 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: cacosh (0x0.ffffffp0 - 0.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (0x0.ffffffp0 - 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0x0.ffffffp0 - 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: cacosh (0x0.ffffffp0 - 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: cacosh (0x1.0000000000001p0 + 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cacosh (0x1.0000000000001p0 - 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x1.000002p0 + 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (0x1.000002p0 + 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Real part of: cacosh (0x1.000002p0 - 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (0x1.000002p0 - 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Real part of: cacosh (0x1.fp-10 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x1.fp-10 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x1.fp-100 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1.fp-100 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1.fp-1000 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x1.fp-1000 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x1.fp-1025 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x1.fp-1025 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x1.fp-1025 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x1.fp-1025 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x1.fp-129 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1.fp-129 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1.fp-129 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x1.fp-129 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1.fp-129 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1.fp-129 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x1.fp-30 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1.fp-30 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1.fp1023 + 0x1.fp1023 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x1.fp127 + 0x1.fp127 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x1p-105 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1p-105 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1p-112 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1p-112 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1p-23 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1p-23 + 0x0.ffffffp0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x1p-23 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1p-23 - 0x0.ffffffp0 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (0x1p-52 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1p-52 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1p-63 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (0x1p-63 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (1.0 + 0.25 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (1.0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (1.0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (1.0 + 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (1.0 + 0x1.fp-10 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: cacosh (1.0 - 0.25 i)":
+double: 1
+idouble: 1
+Test "Real part of: cacosh (1.0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (1.0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cacosh (1.0 - 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cacosh (1.0 - 0x1.fp-10 i)":
+float: 2
+ifloat: 2
+
+# casin
+Test "Imaginary part of: casin (+0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (+0 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (+0 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (+0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (+0 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (+0 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0.25 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0.25 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0.5 + 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0.5 + 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0.5 + 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0.5 + 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0.5 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0.5 - 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0.5 - 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0.5 - 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0.5 - 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0.5 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0x0.fffffffffffff8p0 + 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0x0.fffffffffffff8p0 - 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0x0.ffffffp0 + 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: casin (-0x0.ffffffp0 - 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: casin (-0x1.000002p0 + 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1.000002p0 - 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casin (-0x1.fp-10 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1.fp-10 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casin (-0x1.fp-10 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1.fp-10 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0x1.fp-100 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1.fp-100 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1.fp-1000 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0x1.fp-1000 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0x1.fp-1025 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0x1.fp-1025 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0x1.fp-1025 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0x1.fp-1025 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0x1.fp-129 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1.fp-129 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1.fp-129 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0x1.fp-129 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1.fp-129 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1.fp-129 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (-0x1.fp-30 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1.fp-30 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1p-105 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1p-105 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1p-112 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1p-112 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casin (-0x1p-23 + 0.5 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1p-23 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1p-23 + 0x0.ffffffp0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casin (-0x1p-23 + 0x1.000002p0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casin (-0x1p-23 - 0.5 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1p-23 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1p-23 - 0x0.ffffffp0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casin (-0x1p-23 - 0x1.000002p0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1p-52 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1p-52 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1p-63 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-0x1p-63 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casin (-1.0 + 0.25 i)":
+double: 1
+idouble: 1
+Test "Real part of: casin (-1.0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-1.0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-1.0 + 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casin (-1.0 - 0.25 i)":
+double: 1
+idouble: 1
+Test "Real part of: casin (-1.0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-1.0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (-1.0 - 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0.25 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0.25 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0.5 + 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0.5 + 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0.5 + 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0.5 + 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0.5 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0.5 - 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0.5 - 0x1p-105 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0.5 - 0x1p-112 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0.5 - 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0.5 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casin (0.75 + 1.25 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x0.fffffffffffff8p0 + 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0x0.fffffffffffff8p0 - 0x1p-52 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0x0.ffffffp0 + 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: casin (0x0.ffffffp0 - 0x1p-23 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: casin (0x1.000002p0 + 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1.000002p0 - 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casin (0x1.fp-10 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1.fp-10 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casin (0x1.fp-10 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1.fp-10 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0x1.fp-100 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1.fp-100 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1.fp-1000 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0x1.fp-1000 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0x1.fp-1025 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0x1.fp-1025 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0x1.fp-1025 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0x1.fp-1025 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0x1.fp-129 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1.fp-129 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1.fp-129 + 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0x1.fp-129 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1.fp-129 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1.fp-129 - 1.5 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0x1.fp-30 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1.fp-30 - 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1.fp1023 + 0x1.fp1023 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0x1.fp127 + 0x1.fp127 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casin (0x1p-105 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1p-105 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1p-112 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1p-112 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casin (0x1p-23 + 0.5 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1p-23 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1p-23 + 0x0.ffffffp0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casin (0x1p-23 + 0x1.000002p0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casin (0x1p-23 - 0.5 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1p-23 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1p-23 - 0x0.ffffffp0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casin (0x1p-23 - 0x1.000002p0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1p-52 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1p-52 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1p-63 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (0x1p-63 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casin (1.0 + 0.25 i)":
+double: 1
+idouble: 1
+Test "Real part of: casin (1.0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (1.0 + 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (1.0 + 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casin (1.0 - 0.25 i)":
+double: 1
+idouble: 1
+Test "Real part of: casin (1.0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (1.0 - 0.5 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casin (1.0 - 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+
+# casinh
+Test "Imaginary part of: casinh (-0.25 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casinh (-0.25 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-0.5 + +0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0.5 + 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0.5 + 0x1p-105 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0.5 + 0x1p-112 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0.5 + 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casinh (-0.5 + 0x1p-23 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (-0.5 + 0x1p-52 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0.5 + 0x1p-63 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0.5 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casinh (-0.5 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0.5 - 0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0.5 - 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0.5 - 0x1p-105 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0.5 - 0x1p-112 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0.5 - 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casinh (-0.5 - 0x1p-23 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (-0.5 - 0x1p-52 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0.5 - 0x1p-63 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0.5 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casinh (-0.5 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0x0.ffffffp0 + 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-0x0.ffffffp0 - 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casinh (-0x1.000002p0 + 0x1p-23 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casinh (-0x1.000002p0 - 0x1p-23 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (-0x1.fp-10 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0x1.fp-10 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0x1.fp-129 + 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-0x1.fp-129 - 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-0x1p-105 + 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-0x1p-105 - 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-0x1p-112 + 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-0x1p-112 - 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-0x1p-23 + 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-0x1p-23 + 0x0.ffffffp0 i)":
+float: 2
+ifloat: 2
+Test "Real part of: casinh (-0x1p-23 + 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0x1p-23 - 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-0x1p-23 - 0x0.ffffffp0 i)":
+float: 2
+ifloat: 2
+Test "Real part of: casinh (-0x1p-23 - 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-0x1p-52 + 0x0.fffffffffffff8p0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-0x1p-52 - 0x0.fffffffffffff8p0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-1.0 + +0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (-1.0 + 0.25 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-1.0 + 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-1.0 + 0x1.fp-10 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casinh (-1.0 + 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-1.0 + 0x1.fp-100 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (-1.0 + 0x1.fp-1000 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-1.0 + 0x1.fp-1025 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-1.0 + 0x1.fp-129 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (-1.0 + 0x1.fp-30 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (-1.0 - 0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (-1.0 - 0.25 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-1.0 - 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-1.0 - 0x1.fp-10 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casinh (-1.0 - 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (-1.0 - 0x1.fp-100 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (-1.0 - 0x1.fp-1000 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-1.0 - 0x1.fp-1025 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-1.0 - 0x1.fp-129 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (-1.0 - 0x1.fp-30 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (-1.5 + +0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-1.5 + 0x1.fp-1025 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-1.5 + 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-1.5 - 0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-1.5 - 0x1.fp-1025 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (-1.5 - 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casinh (0.25 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casinh (0.25 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (0.5 + +0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0.5 + 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0.5 + 0x1p-105 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0.5 + 0x1p-112 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0.5 + 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casinh (0.5 + 0x1p-23 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (0.5 + 0x1p-52 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0.5 + 0x1p-63 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0.5 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casinh (0.5 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0.5 - 0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0.5 - 0x1.fp-129 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0.5 - 0x1p-105 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0.5 - 0x1p-112 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0.5 - 0x1p-23 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casinh (0.5 - 0x1p-23 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (0.5 - 0x1p-52 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0.5 - 0x1p-63 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0.5 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casinh (0.5 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0.75 + 1.25 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: casinh (0.75 + 1.25 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (0x0.ffffffp0 + 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (0x0.ffffffp0 - 0x1p-23 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casinh (0x1.000002p0 + 0x1p-23 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: casinh (0x1.000002p0 - 0x1p-23 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (0x1.fp-10 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0x1.fp-10 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0x1.fp-129 + 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (0x1.fp-129 - 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (0x1.fp1023 + 0x1.fp1023 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (0x1.fp127 + 0x1.fp127 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (0x1p-105 + 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (0x1p-105 - 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (0x1p-112 + 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (0x1p-112 - 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (0x1p-23 + 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (0x1p-23 + 0x0.ffffffp0 i)":
+float: 2
+ifloat: 2
+Test "Real part of: casinh (0x1p-23 + 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0x1p-23 - 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (0x1p-23 - 0x0.ffffffp0 i)":
+float: 2
+ifloat: 2
+Test "Real part of: casinh (0x1p-23 - 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (0x1p-52 + 0x0.fffffffffffff8p0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (0x1p-52 - 0x0.fffffffffffff8p0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (1.0 + +0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (1.0 + 0.25 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (1.0 + 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (1.0 + 0x1.fp-10 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casinh (1.0 + 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (1.0 + 0x1.fp-100 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (1.0 + 0x1.fp-1000 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (1.0 + 0x1.fp-1025 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (1.0 + 0x1.fp-129 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (1.0 + 0x1.fp-30 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (1.0 - 0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (1.0 - 0.25 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (1.0 - 0.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (1.0 - 0x1.fp-10 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: casinh (1.0 - 0x1.fp-10 i)":
+float: 1
+ifloat: 1
+Test "Real part of: casinh (1.0 - 0x1.fp-100 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (1.0 - 0x1.fp-1000 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (1.0 - 0x1.fp-1025 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (1.0 - 0x1.fp-129 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (1.0 - 0x1.fp-30 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: casinh (1.5 + +0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (1.5 + 0x1.fp-1025 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (1.5 + 0x1.fp-129 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (1.5 - 0 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (1.5 - 0x1.fp-1025 i)":
+double: 1
+idouble: 1
+Test "Real part of: casinh (1.5 - 0x1.fp-129 i)":
+double: 1
+idouble: 1
+
+# catan
+Test "Imaginary part of: catan (-0x0.fffffffffffff8p0 + 0x1p-27 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catan (-0x0.ffffffp0 + 0x1p-13 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: catan (-0x1.0000000000001p0 - 0x1p-27 i)":
+double: 1
+idouble: 1
+Test "Real part of: catan (-0x1.000002p0 + 0x1p-126 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (-0x1.000002p0 + 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (-0x1.000002p0 - 0x1p-126 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (-0x1.000002p0 - 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catan (-0x1.000002p0 - 0x1p-13 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catan (-0x1.fp1023 + 0x1.fp1023 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catan (-0x1.fp1023 - 0x1.fp1023 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catan (-0x1.fp127 + 0x1.fp127 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catan (-0x1.fp127 - 0x1.fp127 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catan (-0x1p-1020 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catan (-0x1p-1020 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: catan (-0x1p-13 + 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (-0x1p-13 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (-0x1p-13 - 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catan (-0x1p-13 - 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (-0x1p-13 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catan (-0x1p-54 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catan (-0x1p-54 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catan (-0x1p-57 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catan (-0x1p-57 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (-1.0 + 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (-1.0 - 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catan (-2 - 3 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: catan (0x0.fffffffffffff8p0 + 0x1p-27 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catan (0x0.ffffffp0 + 0x1p-13 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: catan (0x1.0000000000001p0 - 0x1p-27 i)":
+double: 1
+idouble: 1
+Test "Real part of: catan (0x1.000002p0 + 0x1p-126 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (0x1.000002p0 + 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (0x1.000002p0 - 0x1p-126 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (0x1.000002p0 - 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catan (0x1.000002p0 - 0x1p-13 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catan (0x1.fp1023 + 0x1.fp1023 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catan (0x1.fp1023 - 0x1.fp1023 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catan (0x1.fp127 + 0x1.fp127 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catan (0x1.fp127 - 0x1.fp127 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catan (0x1p-1020 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catan (0x1p-1020 - 1.0 i)":
+double: 1
+idouble: 1
+Test "Real part of: catan (0x1p-13 + 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (0x1p-13 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (0x1p-13 - 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catan (0x1p-13 - 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (0x1p-13 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catan (0x1p-54 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catan (0x1p-54 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catan (0x1p-57 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catan (0x1p-57 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (1.0 + 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catan (1.0 - 0x1p-13 i)":
+float: 1
+ifloat: 1
+
+# catanh
+Test "Real part of: catanh (-0x1.000002p0 + 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catanh (-0x1.000002p0 + 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (-0x1.000002p0 - 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catanh (-0x1.000002p0 - 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (-0x1.fp1023 + 0x1.fp1023 i)":
+double: 1
+idouble: 1
+Test "Real part of: catanh (-0x1.fp1023 - 0x1.fp1023 i)":
+double: 1
+idouble: 1
+Test "Real part of: catanh (-0x1.fp127 + 0x1.fp127 i)":
+double: 1
+idouble: 1
+Test "Real part of: catanh (-0x1.fp127 - 0x1.fp127 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catanh (-0x1p-126 + 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catanh (-0x1p-126 - 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (-0x1p-13 + 0x1.000002p0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catanh (-0x1p-13 + 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catanh (-0x1p-13 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (-0x1p-13 - 0x1.000002p0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catanh (-0x1p-13 - 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catanh (-0x1p-13 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (-0x1p-27 + 0x1.0000000000001p0 i)":
+double: 1
+idouble: 1
+Test "Real part of: catanh (-0x1p-27 - 0x1.0000000000001p0 i)":
+double: 1
+idouble: 1
+Test "Real part of: catanh (-1.0 + 0x1p-1020 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catanh (-1.0 + 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (-1.0 + 0x1p-54 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (-1.0 + 0x1p-57 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (-1.0 - 0x1p-1020 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catanh (-1.0 - 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (-1.0 - 0x1p-54 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (-1.0 - 0x1p-57 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (-2 - 3 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catanh (0x1.000002p0 + 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catanh (0x1.000002p0 - 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (0x1.fp1023 + 0x1.fp1023 i)":
+double: 1
+idouble: 1
+Test "Real part of: catanh (0x1.fp1023 - 0x1.fp1023 i)":
+double: 1
+idouble: 1
+Test "Real part of: catanh (0x1.fp127 + 0x1.fp127 i)":
+double: 1
+idouble: 1
+Test "Real part of: catanh (0x1.fp127 - 0x1.fp127 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catanh (0x1p-126 + 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catanh (0x1p-126 - 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (0x1p-13 + 0x0.ffffffp0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: catanh (0x1p-13 + 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catanh (0x1p-13 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (0x1p-13 - 0x0.ffffffp0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: catanh (0x1p-13 - 0x1.000002p0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: catanh (0x1p-13 - 1.0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (0x1p-27 + 0x0.fffffffffffff8p0 i)":
+double: 1
+idouble: 1
+Test "Real part of: catanh (0x1p-27 - 0x0.fffffffffffff8p0 i)":
+double: 1
+idouble: 1
+Test "Real part of: catanh (1.0 + 0x1p-1020 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catanh (1.0 + 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (1.0 + 0x1p-54 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (1.0 + 0x1p-57 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (1.0 - 0x1p-1020 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: catanh (1.0 - 0x1p-13 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (1.0 - 0x1p-54 i)":
+float: 1
+ifloat: 1
+Test "Real part of: catanh (1.0 - 0x1p-57 i)":
+float: 1
+ifloat: 1
+
+# cbrt
+Test "cbrt (-0x1.bp+4)":
+double: 1
+idouble: 1
+Test "cbrt (-0x4.18937p-12)":
+float: 1
+ifloat: 1
+Test "cbrt (0xcp-4)":
+double: 1
+idouble: 1
+Test "cbrt (0xf.ep-4)":
+double: 1
+idouble: 1
+
+# ccos
+Test "Imaginary part of: ccos (-0x2p+0 - 0x3p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ccos (-0xcp-4 + 0x2.c68p+8 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ccos (-0xcp-4 + 0x5.98p+4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ccos (-0xcp-4 - 0x2.c68p+8 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ccos (-0xcp-4 - 0x5.98p+4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ccos (0x4p-1076 + 0x5.ap+8 i)":
+double: 1
+idouble: 1
+Test "Real part of: ccos (0xcp-4 + 0x1.4p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ccos (0xcp-4 + 0x1.4p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ccos (0xcp-4 + 0x2.c68p+8 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ccos (0xcp-4 + 0x5.98p+4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ccos (0xcp-4 - 0x2.c68p+8 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ccos (0xcp-4 - 0x5.98p+4 i)":
+float: 1
+ifloat: 1
+
+# ccosh
+Test "Imaginary part of: ccosh (-0x2.c68p+8 + 0xcp-4 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ccosh (-0x2.c68p+8 - 0xcp-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: ccosh (-0x2p+0 - 0x3p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ccosh (-0x2p+0 - 0x3p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ccosh (-0x5.98p+4 + 0xcp-4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ccosh (-0x5.98p+4 - 0xcp-4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ccosh (0x2.c68p+8 + 0xcp-4 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ccosh (0x2.c68p+8 - 0xcp-4 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ccosh (0x5.98p+4 + 0xcp-4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ccosh (0x5.98p+4 - 0xcp-4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ccosh (0x5.ap+8 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Real part of: ccosh (0xcp-4 + 0x1.4p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ccosh (0xcp-4 + 0x1.4p+0 i)":
+float: 1
+ifloat: 1
+
+# cexp
+Test "Imaginary part of: cexp (-0x2p+0 - 0x3p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cexp (-0x5.fp+4 + 0xcp-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: cexp (0x1.f4p+8 + 0x8p+1020 i)":
+double: 1
+idouble: 1
+Test "Real part of: cexp (0x2.c5dp+8 + 0xcp-4 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: cexp (0x2.c5dp+8 + 0xcp-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: cexp (0x3.2p+4 + 0x8p+124 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Imaginary part of: cexp (0x3.2p+4 + 0x8p+124 i)":
+double: 1
+idouble: 1
+Test "Real part of: cexp (0x5.8cp+4 + 0xcp-4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: cexp (0x5.8cp+4 + 0xcp-4 i)":
+float: 2
+ifloat: 2
+Test "Imaginary part of: cexp (0x5.ap+8 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Real part of: cexp (0xcp-4 + 0x1.4p+0 i)":
+float: 1
+ifloat: 1
+
+# clog
+Test "Real part of: clog (+0 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (-0x1.0000000123456p+0 + +0 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (-0x1.0000000123456p+0 + 0x1.2345678p-1000 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (-0x1.0000000123456p+0 + 0x4.8d1598p-32 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (-0x1.0000000123456p+0 + 0x4.8d159ep-32 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (-0x1.0000000123456p+0 + 0x8p-152 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (-0x1.000002p+0 + +0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (-0x1.000002p+0 + 0x4.8d1598p-32 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: clog (-0x1.000002p+0 + 0x4.8d159ep-32 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (-0x1.000002p+0 + 0x4.8d15ap-32 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: clog (-0x1.000002p+0 + 0x8p-152 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (-0x1.234566p-40 - 0x1p+0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (-0x8p-152 + 0xf.8p+124 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (-0x8p-152 + 0xf.8p+124 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (-0x8p-152 + 0xf.fffffp+124 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (-0x8p-152 - 0xf.8p+124 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (-0x8p-152 - 0xf.8p+124 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (-0x8p-152 - 0xf.fffffp+124 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (-0xf.8p+124 + 0x8p-152 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (-0xf.8p+124 - 0x8p-152 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x1.0000000000001p+0 + +0 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x1.0000000000001p+0 + 0x1.234566p-60 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x1.0000000000001p+0 + 0x1.23456789p-1000 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x1.0000000000001p+0 + 0x1.23456789p-60 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x1.0000000000001p+0 + 0x1.234568p-60 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x1.0000000000001p+0 + 0x8p-152 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x1.000002p+0 + +0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x1.000002p+0 + 0x1.234566p-60 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x1.000002p+0 + 0x1.234568p-60 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x1.000002p+0 + 0x8p-152 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x1.000566p+0 + 0x4.8dp-12 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x1.48e45e3268d8p-4 + 0xf.f2c64p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x1.48e45ep-4 + 0xf.f2c63p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x1.48e45ep-4 + 0xf.f2c64p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x1.8907bc3694fd4p-4 + 0xf.ed1990460bdf8p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x1.8907bc3694fd5p-4 + 0xf.ed1990460bdf8p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x1.c67eccp-4 + 0xf.e6b4d1d7a6e08p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x1.c67eccp-4 + 0xf.e6b4d1d7a6e1p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x1.c67eccp-4 + 0xf.e6b4ep-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x1.c67ecd92a8594p-4 + 0xf.e6b4dp-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x1.c67ecd92a8594p-4 + 0xf.e6b4ep-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x1.c67ecep-4 + 0xf.e6b4d1d7a6e1p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x1p+0 + 0x4.8d1598p-12 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x2.0ce7ba1e4902p-4 + 0xf.de3a3p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x2.82b794p-4 + 0xf.cd42a15bf9a38p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x2.82b795e420b28p-4 + 0xf.cd42a15bf9a3p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x2p-148 + 0x2p-148 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x3.3b8f94p-4 + 0xf.ab873p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x3.6e17119fb8aacp-4 + 0xf.a0c58p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x3.6e1714p-4 + 0xf.a0c58a83e57cp-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x3.6e1714p-4 + 0xf.a0c58p-4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (0x3.6e1714p-4 + 0xf.a0c58p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x3.6e1714p-4 + 0xf.a0c59p-4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (0x3.6e1714p-4 + 0xf.a0c59p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x3.bea2bcp-4 + 0xf.8e3d619a8d118p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x3.bea2bd62e35p-4 + 0xf.8e3d6p-4 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog (0x3.bea2cp-4 + 0xf.8e3d6p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x3.bea2cp-4 + 0xf.8e3d7p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x3.e1d0a105ac4eap-4 + 0xf.859b3d1b06d08p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x3.e1d0ap-4 + 0xf.859b3d1b06d08p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x3.e1d0ap-4 + 0xf.859b3p-4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (0x3.e1d0ap-4 + 0xf.859b4p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x4.0dbf7d40fe1acp-4 + 0xf.7a5c1af8e3ce8p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x4.0dbf7d40fe1acp-4 + 0xf.7a5c1p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x4.7017a2e36807cp-4 + 0xf.5f4a550c9d758p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x4.7017a8p-4 + 0xf.5f4a550c9d76p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x4.7017a8p-4 + 0xf.5f4a6p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x4.d9e8c8p-4 + 0xf.3f303p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x4.d9e8cp-4 + 0xf.3f30281507d8p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x4p-1076 + +0 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x4p-1076 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog (0x5.03p-4 + 0xf.31ep-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x5.318c596a8cb1p-4 + 0xf.22364p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x5.b06b68p-4 + 0xe.f452b965da9fp-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x5.b06b68p-4 + 0xe.f452bp-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x5.b06b7p-4 + 0xe.f452b965da9fp-4 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog (0x5.b06b7p-4 + 0xe.f452bp-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x6.02fd5037c479p-4 + 0xe.d3e21p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x6.02fd5037c479p-4 + 0xe.d3e2p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x6.02fd58p-4 + 0xe.d3e2086dcca8p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x6.02fd58p-4 + 0xe.d3e21p-4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (0x6.02fd5p-4 + 0xe.d3e21p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x6.1c643068cd128p-4 + 0xe.c97c2p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x6.1c6438p-4 + 0xe.c97c2018b4288p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x6.1c6438p-4 + 0xe.c97c2018b428p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x6.1c6438p-4 + 0xe.c97c3p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x6.2aff83ae6467cp-4 + 0xe.c36a6p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x6.2aff83ae6468p-4 + 0xe.c36a599a86ba8p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x6.2aff83ae6468p-4 + 0xe.c36a5p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x6.2aff88p-4 + 0xe.c36a599a86ba8p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x6.b10b48p-4 + 0xe.8893cbb44925p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x6.b10b4f3520218p-4 + 0xe.8893dp-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x6.b10b5p-4 + 0xe.8893cbb449258p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x6.b10b5p-4 + 0xe.8893cbb44925p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x7.eca921b40e028p-4 + 0xd.e655fp-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x7.eca928p-4 + 0xd.e655e694e5108p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x7.eca928p-4 + 0xd.e655fp-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x7.f2c8d20a1eca4p-4 + 0xd.e2d66p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x7.f2c8d20a1ecap-4 + 0xd.e2d65p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x7.f2c8d8p-4 + 0xd.e2d65939160b8p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x7.f2c8dp-4 + 0xd.e2d65939160bp-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x7.f4b088p-4 + 0xd.e1bf04f3688p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x8.88faep-4 + 0xd.888bdp-4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (0x8.88faep-4 + 0xd.888bdp-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x8.88fafp-4 + 0xd.888bdp-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x8.ecbf810c4ae6p-4 + 0xd.47946p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x8.ecbf8p-4 + 0xd.479468b09a37p-4 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog (0x8.ecbf8p-4 + 0xd.47946p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x8.ecbf9p-4 + 0xd.479468b09a37p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x8p-152 + 0xf.8p+124 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x8p-152 - 0xf.8p+124 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x9.b386fp-4 + 0xc.b9317p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0x9.c1b6ac509a248p-4 + 0xc.ae53de1d5a7dp-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x9.c1b6ac509a248p-4 + 0xc.ae53ep-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x9.c1b6ac509a24p-4 + 0xc.ae53dp-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x9.c1b6ac509a24p-4 + 0xc.ae53ep-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x9.c1b6ap-4 + 0xc.ae53de1d5a7dp-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0x9.c1b6ap-4 + 0xc.ae53dp-4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (0x9.c1b6ap-4 + 0xc.ae53ep-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0xa.47c0c65bd4928p-4 + 0xc.42a51p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0xa.47c0cp-4 + 0xc.42a51p-4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog (0xa.47c0cp-4 + 0xc.42a51p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0xa.afc57p-4 + 0xb.e867932966df8p-4 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog (0xa.afc58p-4 + 0xb.e867ap-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0xa.b96da19075eap-8 + 0xf.fc679p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0xa.b96dap-8 + 0xf.fc67818f89d2p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0xa.b96dap-8 + 0xf.fc678p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0xa.b96dap-8 + 0xf.fc679p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0xa.e7de8cc868ff8p-4 + 0xb.b51cbp-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0xa.e7de8p-4 + 0xb.b51cbp-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0xa.e7de9p-4 + 0xb.b51cb9f04d4dp-4 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog (0xa.e7de9p-4 + 0xb.b51cbp-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0xa.ec55b7682e528p-4 + 0xb.b0f24p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0xa.ec55cp-4 + 0xb.b0f2405504a68p-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0xa.ec55cp-4 + 0xb.b0f25p-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0xb.263a77543bp-4 + 0xb.79c9ap-4 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0xb.263a8p-4 + 0xb.79c9bp-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0xf.8p+124 + 0x8p-152 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0xf.8p+124 - 0x8p-152 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0xf.fffffp+124 + 0x8p+1020 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog (0xf.fffffp-4 + +0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0xf.fffffp-4 + 0x8p-152 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog (0xf.fffffp-4 + 0xf.fffffp-104 i)":
+float: 1
+ifloat: 1
+
+# clog10
+Test "Imaginary part of: clog10 (-0 + inf i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (-0 - inf i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: clog10 (-0x1.0000000123456p0 + 0x1.2345678p-1000 i)":
+double: 2
+idouble: 2
+Test "Imaginary part of: clog10 (-0x1.0000000123456p0 + 0x1.2345678p-1000 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog10 (-0x1.0000000123456p0 + 0x1.2345678p-30 i)":
+double: 2
+idouble: 2
+Test "Imaginary part of: clog10 (-0x1.0000000123456p0 + 0x1.2345678p-30 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (-0x1.fp+1023 + 0x1p-1074 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (-0x1.fp+1023 - 0x1p-1074 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (-0x1.fp+127 + 0x1p-149 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (-0x1.fp+127 - 0x1p-149 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (-0x1p-1074 + 0x1.fp+1023 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (-0x1p-1074 - 0x1.fp+1023 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (-0x1p-149 + 0x1.fp+127 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (-0x1p-149 - 0x1.fp+127 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (-1.0 + 0x1.234566p-20 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (-2 - 3 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (-3 + inf i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (-3 - inf i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (-inf + 0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (-inf + 1 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (-inf + inf i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (-inf - 0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (-inf - 1 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0 + inf i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0 - inf i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: clog10 (0x0.fffffffffffff8p0 + 0x0.fffffffffffff8p-1000 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog10 (0x0.ffffffp0 + 0x0.ffffffp-100 i)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "Real part of: clog10 (0x1.000566p0 + 0x1.234p-10 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1.000566p0 + 0x1.234p-10 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog10 (0x1.000566p0 + 0x1.234p-100 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1.234566p-30 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1.234566p-50 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1.234566p-60 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1.fffffep+127 + 0x1.fffffep+127 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: clog10 (0x1.fffffep+127 + 1.0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1.fffffffffffffp+1023 + 0x1.fffffffffffffp+1023 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog10 (0x10673dd0f2481p-51 + 0x7ef1d17cefbd2p-51 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog10 (0x1367a310575591p-54 + 0x3cfcc0a0541f60p-54 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x1367a310575591p-54 + 0x3cfcc0a0541f60p-54 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x164c74eea876p-45 + 0x16f393482f77p-45 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x1a6p-10 + 0x3a5p-10 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x1p-1073 + 0x1p-1073 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x1p-1074 + 0x1.fp+1023 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog10 (0x1p-1074 + 0x1p-1074 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x1p-1074 + 0x1p-1074 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x1p-1074 - 0x1.fp+1023 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x1p-147 + 0x1p-147 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1p-149 + 0x1.fp+127 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1p-149 + 0x1p-149 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1p-149 - 0x1.fp+127 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1p-509 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x1p-510 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x1p-511 + 1.0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x1p-61 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1p-62 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x1p-63 + 1.0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: clog10 (0x2818p-15 + 0x798fp-15 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x2818p-15 + 0x798fp-15 i)":
+float: 1
+ifloat: 1
+Test "Real part of: clog10 (0x2dd46725bp-35 + 0x7783a1284p-35 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog10 (0x2ede88p-23 + 0x771c3fp-23 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (0x2ede88p-23 + 0x771c3fp-23 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog10 (0x4447d7175p-35 + 0x6c445e00ap-35 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x5b06b680ea2ccp-52 + 0xef452b965da9fp-52 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0x9b57bp-20 + 0xcb7b4p-20 i)":
+double: 1
+idouble: 1
+Test "Real part of: clog10 (0xf2p-10 + 0x3e3p-10 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0xf2p-10 + 0x3e3p-10 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (0xfe961079616p-45 + 0x1bc37e09e6d1p-45 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (1.0 + 0x1.234566p-10 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: clog10 (3 + inf i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (3 - inf i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (inf + inf i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: clog10 (inf - inf i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+# cos
+Test "cos (0x1p+120)":
+float: 1
+ifloat: 1
+Test "cos (0x7p+0)":
+float: 1
+ifloat: 1
+Test "cos (0x8p+124)":
+float: 1
+ifloat: 1
+Test "cos (0xc.d4967p-4)":
+float: 1
+ifloat: 1
+
+# cos_downward
+Test "cos_downward (-0x4p-1024)":
+double: 1
+idouble: 1
+Test "cos_downward (-0x4p-1076)":
+double: 1
+idouble: 1
+Test "cos_downward (-0x4p-128)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_downward (-0x8p-152)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_downward (-0x8p-972)":
+double: 1
+idouble: 1
+Test "cos_downward (-0xf.ffffffffffff8p+1020)":
+double: 1
+idouble: 1
+Test "cos_downward (-0xf.fffffp+124)":
+double: 1
+idouble: 1
+Test "cos_downward (0x1.000000cf4a2a2p+0)":
+double: 1
+idouble: 1
+Test "cos_downward (0x1.0000010b239a9p+0)":
+double: 1
+idouble: 1
+Test "cos_downward (0x1.00000162a932bp+0)":
+double: 1
+idouble: 1
+Test "cos_downward (0x1.000002d452a1p+0)":
+double: 1
+idouble: 1
+Test "cos_downward (0x1.000002p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_downward (0x1.000004p+0)":
+float: 1
+ifloat: 1
+Test "cos_downward (0x1.000006p+0)":
+float: 1
+ifloat: 1
+Test "cos_downward (0x1.0c1522p+0)":
+float: 1
+ifloat: 1
+Test "cos_downward (0x1.0c152382d7365p+0)":
+double: 1
+idouble: 1
+Test "cos_downward (0x1.0c1524p+0)":
+float: 1
+ifloat: 1
+Test "cos_downward (0x1.921fb4p+0)":
+float: 1
+ifloat: 1
+Test "cos_downward (0x1.921fb54442d18p+0)":
+double: 1
+idouble: 1
+Test "cos_downward (0x1.921fb6p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_downward (0x1p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_downward (0x1p+120)":
+float: 2
+ifloat: 2
+Test "cos_downward (0x1p+28)":
+double: 1
+idouble: 1
+Test "cos_downward (0x2.182a44p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_downward (0x2.182a4705ae6cap+0)":
+double: 1
+idouble: 1
+Test "cos_downward (0x2.182a48p+0)":
+float: 1
+ifloat: 1
+Test "cos_downward (0x2.1e19e0c9bab24p+72)":
+double: 1
+idouble: 1
+Test "cos_downward (0x2.1e19e4p+72)":
+double: 1
+idouble: 1
+Test "cos_downward (0x2.1e19ep+72)":
+double: 1
+idouble: 1
+Test "cos_downward (0x2p+0)":
+float: 1
+ifloat: 1
+Test "cos_downward (0x3p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_downward (0x4p+48)":
+double: 1
+idouble: 1
+Test "cos_downward (0x4p-1024)":
+double: 1
+idouble: 1
+Test "cos_downward (0x4p-1076)":
+double: 1
+idouble: 1
+Test "cos_downward (0x4p-128)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_downward (0x8p+0)":
+float: 1
+ifloat: 1
+Test "cos_downward (0x8p-152)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_downward (0x8p-972)":
+double: 1
+idouble: 1
+Test "cos_downward (0x9p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_downward (0xa.217bap+12)":
+float: 1
+ifloat: 1
+Test "cos_downward (0xap+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_downward (0xc.d4966d92d1708p-4)":
+double: 1
+idouble: 1
+Test "cos_downward (0xc.d4966d92d171p-4)":
+double: 1
+idouble: 1
+Test "cos_downward (0xc.d4966p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_downward (0xc.d4967p-4)":
+float: 1
+ifloat: 1
+Test "cos_downward (0xcp-4)":
+double: 1
+idouble: 1
+Test "cos_downward (0xf.ffffffffffff8p+1020)":
+double: 1
+idouble: 1
+Test "cos_downward (0xf.fffffp+124)":
+double: 1
+idouble: 1
+
+# cos_tonearest
+Test "cos_tonearest (0x1p+120)":
+float: 1
+ifloat: 1
+Test "cos_tonearest (0x7p+0)":
+float: 1
+ifloat: 1
+Test "cos_tonearest (0x8p+124)":
+float: 1
+ifloat: 1
+Test "cos_tonearest (0xc.d4967p-4)":
+float: 1
+ifloat: 1
+
+# cos_towardzero
+Test "cos_towardzero (-0x4p-1024)":
+double: 1
+idouble: 1
+Test "cos_towardzero (-0x4p-1076)":
+double: 1
+idouble: 1
+Test "cos_towardzero (-0x4p-128)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_towardzero (-0x8p-152)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_towardzero (-0x8p-972)":
+double: 1
+idouble: 1
+Test "cos_towardzero (-0xf.fffffp+124)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x1.000000cf4a2a2p+0)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x1.0000010b239a9p+0)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x1.00000162a932bp+0)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x1.000002d452a1p+0)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x1.000002p+0)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x1.0c152382d7365p+0)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x1.921fb54442d18p+0)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x1.921fb54442d19p+0)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x1p+0)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x1p+120)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_towardzero (0x2.182a4705ae6ccp+0)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x2.182a48p+0)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x2.1e19e0c9bab24p+72)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x2.1e19e4p+72)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x2.1e19ep+72)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x2p+0)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x4p+0)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x4p+48)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x4p-1024)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x4p-1076)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x4p-128)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_towardzero (0x8p+0)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x8p+1020)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0x8p-152)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_towardzero (0x8p-972)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0xc.d4966d92d1708p-4)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0xc.d4966d92d171p-4)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0xc.d4966p-4)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0xcp-4)":
+double: 1
+idouble: 1
+Test "cos_towardzero (0xf.fffffp+124)":
+double: 1
+idouble: 1
+
+# cos_upward
+Test "cos_upward (-0x2p+64)":
+double: 1
+idouble: 1
+Test "cos_upward (0x1.000002p+0)":
+float: 1
+ifloat: 1
+Test "cos_upward (0x1.000004p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_upward (0x1.000005bc7d86dp+0)":
+double: 1
+idouble: 1
+Test "cos_upward (0x1.000006p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_upward (0x1.0c1522p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_upward (0x1.0c152382d7366p+0)":
+double: 1
+idouble: 1
+Test "cos_upward (0x1.0c1524p+0)":
+double: 1
+idouble: 1
+Test "cos_upward (0x1.921fb4p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_upward (0x1.921fb54442d19p+0)":
+double: 1
+idouble: 1
+Test "cos_upward (0x1.921fb6p+0)":
+float: 1
+ifloat: 1
+Test "cos_upward (0x1p+0)":
+float: 1
+ifloat: 1
+Test "cos_upward (0x1p+120)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_upward (0x2.182a44p+0)":
+float: 1
+ifloat: 1
+Test "cos_upward (0x2.182a4705ae6ccp+0)":
+double: 1
+idouble: 1
+Test "cos_upward (0x2.182a48p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_upward (0x2.1e19e4p+72)":
+float: 1
+ifloat: 1
+Test "cos_upward (0x2p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_upward (0x2p+64)":
+double: 1
+idouble: 1
+Test "cos_upward (0x3p+0)":
+float: 1
+ifloat: 1
+Test "cos_upward (0x4p+0)":
+double: 1
+idouble: 1
+Test "cos_upward (0x5p+0)":
+double: 1
+idouble: 1
+Test "cos_upward (0x6p+0)":
+double: 1
+idouble: 1
+Test "cos_upward (0x7p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_upward (0x8p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_upward (0x8p+1020)":
+double: 1
+idouble: 1
+Test "cos_upward (0x8p+124)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_upward (0x9p+0)":
+float: 2
+ifloat: 2
+Test "cos_upward (0xa.217bap+12)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_upward (0xap+0)":
+float: 1
+ifloat: 1
+Test "cos_upward (0xc.d4966p-4)":
+float: 1
+ifloat: 1
+Test "cos_upward (0xc.d4967p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "cos_upward (0xf.ffffcp+124)":
+double: 1
+idouble: 1
+
+# cosh
+Test "cosh (-0x1p+0)":
+float: 1
+ifloat: 1
+Test "cosh (-0x2.c5e3acp+8)":
+double: 1
+idouble: 1
+Test "cosh (-0x2.c679dp+8)":
+double: 1
+idouble: 1
+Test "cosh (0x2.c5e3acp+8)":
+double: 1
+idouble: 1
+Test "cosh (0x2.c679dp+8)":
+double: 1
+idouble: 1
+
+# cosh_downward
+Test "cosh_downward (-0x2.c5e3bp+8)":
+double: 1
+idouble: 1
+Test "cosh_downward (-0x2.c679d1f73f0fap+8)":
+double: 1
+idouble: 1
+Test "cosh_downward (-0x2.c679dp+8)":
+double: 1
+idouble: 1
+Test "cosh_downward (-0x5.96a7ep+4)":
+float: 1
+ifloat: 1
+Test "cosh_downward (0x1.6p+4)":
+double: 1
+idouble: 1
+Test "cosh_downward (0x1.7p+4)":
+double: 1
+idouble: 1
+Test "cosh_downward (0x2.c5e3bp+8)":
+double: 1
+idouble: 1
+Test "cosh_downward (0x2.c679d1f73f0fap+8)":
+double: 1
+idouble: 1
+Test "cosh_downward (0x2.c679dp+8)":
+double: 1
+idouble: 1
+Test "cosh_downward (0x5.96a7ep+4)":
+float: 1
+ifloat: 1
+
+# cosh_tonearest
+Test "cosh_tonearest (-0x1p+0)":
+float: 1
+ifloat: 1
+Test "cosh_tonearest (-0x2.c5e3acp+8)":
+double: 1
+idouble: 1
+Test "cosh_tonearest (-0x2.c679dp+8)":
+double: 1
+idouble: 1
+Test "cosh_tonearest (0x2.c5e3acp+8)":
+double: 1
+idouble: 1
+Test "cosh_tonearest (0x2.c679dp+8)":
+double: 1
+idouble: 1
+
+# cosh_towardzero
+Test "cosh_towardzero (-0x2.c5e3bp+8)":
+double: 1
+idouble: 1
+Test "cosh_towardzero (-0x2.c679d1f73f0fap+8)":
+double: 1
+idouble: 1
+Test "cosh_towardzero (-0x2.c679dp+8)":
+double: 1
+idouble: 1
+Test "cosh_towardzero (-0x5.96a7ep+4)":
+float: 1
+ifloat: 1
+Test "cosh_towardzero (0x1.6p+4)":
+double: 1
+idouble: 1
+Test "cosh_towardzero (0x1.7p+4)":
+double: 1
+idouble: 1
+Test "cosh_towardzero (0x2.c5e3bp+8)":
+double: 1
+idouble: 1
+Test "cosh_towardzero (0x2.c679d1f73f0fap+8)":
+double: 1
+idouble: 1
+Test "cosh_towardzero (0x2.c679dp+8)":
+double: 1
+idouble: 1
+Test "cosh_towardzero (0x5.96a7ep+4)":
+float: 1
+ifloat: 1
+
+# cosh_upward
+Test "cosh_upward (-0x1p+0)":
+float: 1
+ifloat: 1
+Test "cosh_upward (-0x2.c5e3bp+8)":
+double: 1
+idouble: 1
+Test "cosh_upward (-0x2.c679d1f73f0fap+8)":
+double: 1
+idouble: 1
+Test "cosh_upward (-0x2.c679dp+8)":
+double: 1
+idouble: 1
+Test "cosh_upward (-0x5.96a7e8p+4)":
+double: 1
+idouble: 1
+Test "cosh_upward (-0x5.96a7ep+4)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "cosh_upward (0x1.8p+4)":
+double: 1
+idouble: 1
+Test "cosh_upward (0x2.c5e3bp+8)":
+double: 1
+idouble: 1
+Test "cosh_upward (0x2.c679d1f73f0fap+8)":
+double: 1
+idouble: 1
+Test "cosh_upward (0x2.c679dp+8)":
+double: 1
+idouble: 1
+Test "cosh_upward (0x3.2p+4)":
+double: 1
+idouble: 1
+Test "cosh_upward (0x5.96a7e8p+4)":
+double: 1
+idouble: 1
+Test "cosh_upward (0x5.96a7ep+4)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+# cpow
+Test "Real part of: cpow (0x2p+0 + 0x3p+0 i, 0x4p+0 + +0 i)":
+double: 1
+float: 4
+idouble: 1
+ifloat: 4
+Test "Imaginary part of: cpow (0x2p+0 + 0x3p+0 i, 0x4p+0 + +0 i)":
+float: 2
+ifloat: 2
+Test "Real part of: cpow (0xcp-4 + 0x1.4p+0 i, +0 + 0x1p+0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: cpow (0xcp-4 + 0x1.4p+0 i, 0x1p+0 + 0x1p+0 i)":
+double: 2
+float: 3
+idouble: 2
+ifloat: 3
+Test "Real part of: cpow (0xcp-4 + 0x1.4p+0 i, 0xcp-4 + 0x1.4p+0 i)":
+double: 1
+float: 4
+idouble: 1
+ifloat: 4
+
+# csin
+Test "Real part of: csin (-0.75 + 710.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: csin (-0.75 + 89.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: csin (-0.75 - 710.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: csin (-0.75 - 89.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: csin (0.75 + 710.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: csin (0.75 + 89.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: csin (0.75 - 710.5 i)":
+double: 1
+idouble: 1
+Test "Real part of: csin (0.75 - 89.5 i)":
+float: 1
+ifloat: 1
+Test "Real part of: csin (0x1p-1074 + 1440 i)":
+double: 1
+idouble: 1
+
+# csinh
+Test "Imaginary part of: csinh (-2 - 3 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csinh (-710.5 + 0.75 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csinh (-710.5 - 0.75 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csinh (-89.5 + 0.75 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: csinh (-89.5 - 0.75 i)":
+float: 1
+ifloat: 1
+Test "Real part of: csinh (0.75 + 1.25 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: csinh (0.75 + 1.25 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: csinh (1440 + 0x1p-1074 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csinh (710.5 + 0.75 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csinh (710.5 - 0.75 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csinh (89.5 + 0.75 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: csinh (89.5 - 0.75 i)":
+float: 1
+ifloat: 1
+
+# csqrt
+Test "Real part of: csqrt (-0x2p+0 + 0x3p+0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: csqrt (-0x2p+0 - 0x3p+0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: csqrt (-0x4.000008p-128 - 0x4.000008p-128 i)":
+double: 1
+idouble: 1
+Test "Real part of: csqrt (-0x8p-152 - 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csqrt (0x4.000008p-128 + 0x4.000008p-128 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csqrt (0x4p-1076 + 0xf.fffffp+124 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csqrt (0x8p+1020 + 0x8p-152 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csqrt (0x8p+124 + 0x8p-152 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csqrt (0x8p-152 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csqrt (0x8p-152 + 0x8p-1076 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csqrt (0x8p-152 + 0xf.fffffp+124 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csqrt (0xf.ffffffffffff8p+1020 + 0x8p+1020 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csqrt (0xf.ffffffffffff8p+1020 + 0x8p-152 i)":
+double: 1
+idouble: 1
+Test "Real part of: csqrt (0xf.ffffffffffff8p+1020 + 0xf.ffffffffffff8p+1020 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csqrt (0xf.ffffffffffff8p+1020 + 0xf.ffffffffffff8p+1020 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csqrt (0xf.ffffffffffff8p+1020 + 0xf.fffffp+124 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: csqrt (0xf.fffffp+124 + 0x1p+0 i)":
+float: 1
+ifloat: 1
+
+# ctan
+Test "Real part of: ctan (-0x2p+0 - 0x3p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctan (-0x2p+0 - 0x3p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan (0x1.921fb4p+0 + +0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctan (0x1.921fb4p+0 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan (0x1.921fb4p+0 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan (0x1.921fb4p+0 + 0x8p-152 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctan (0x1.921fb4p+0 + 0x8p-152 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan (0x1.921fb54442d19p+0 + +0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan (0x1.921fb54442d19p+0 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan (0x1.921fb54442d19p+0 + 0x4p-1076 i)":
+double: 2
+idouble: 2
+Test "Real part of: ctan (0x1.921fb54442d19p+0 + 0x8p-152 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan (0x1.921fb54442d19p+0 + 0x8p-152 i)":
+double: 2
+idouble: 2
+Test "Real part of: ctan (0x1.921fb6p+0 + +0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctan (0x1.921fb6p+0 + 0x8p-152 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctan (0x1.921fb6p+0 + 0x8p-152 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctan (0x8p+1020 + 0x1p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan (0x8p+124 + 0x1p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan (0xcp-4 + 0x1.4p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan (0xf.ffffffffffff8p+1020 + 0x1p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan (0xf.fffffp+124 + 0x1p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan (0xf.fffffp+124 + 0x1p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+# ctan_downward
+Test "Real part of: ctan_downward (-0x2p+0 - 0x3p+0 i)":
+double: 3
+idouble: 3
+Test "Imaginary part of: ctan_downward (-0x2p+0 - 0x3p+0 i)":
+double: 2
+idouble: 2
+Test "Real part of: ctan_downward (0x1.921fb4p+0 + +0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctan_downward (0x1.921fb4p+0 + 0x8p-152 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctan_downward (0x1.921fb4p+0 + 0x8p-152 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_downward (0x1.921fb54442d18p+0 + +0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_downward (0x1.921fb54442d18p+0 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_downward (0x1.921fb54442d18p+0 + 0x8p-152 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_downward (0x1.921fb6p+0 + +0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_downward (0x1.921fb6p+0 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_downward (0x1.921fb6p+0 + 0x8p-152 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan_downward (0x1.921fb6p+0 + 0x8p-152 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctan_downward (0x1p+0 + 0x2.dp+4 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctan_downward (0x8p+1020 + 0x1p+0 i)":
+double: 6
+idouble: 6
+Test "Real part of: ctan_downward (0x8p+124 + 0x1p+0 i)":
+double: 4
+float: 3
+idouble: 4
+ifloat: 3
+Test "Imaginary part of: ctan_downward (0x8p+124 + 0x1p+0 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Real part of: ctan_downward (0xcp-4 + 0x1.4p+0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctan_downward (0xf.ffffffffffff8p+1020 + 0x1p+0 i)":
+double: 3
+idouble: 3
+Test "Real part of: ctan_downward (0xf.fffffp+124 + 0x1p+0 i)":
+double: 5
+float: 5
+idouble: 5
+ifloat: 5
+Test "Imaginary part of: ctan_downward (0xf.fffffp+124 + 0x1p+0 i)":
+double: 1
+idouble: 1
+
+# ctan_tonearest
+Test "Real part of: ctan_tonearest (-0x2p+0 - 0x3p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctan_tonearest (-0x2p+0 - 0x3p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_tonearest (0x1.921fb4p+0 + +0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctan_tonearest (0x1.921fb4p+0 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan_tonearest (0x1.921fb4p+0 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_tonearest (0x1.921fb4p+0 + 0x8p-152 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctan_tonearest (0x1.921fb4p+0 + 0x8p-152 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_tonearest (0x1.921fb54442d19p+0 + +0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_tonearest (0x1.921fb54442d19p+0 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan_tonearest (0x1.921fb54442d19p+0 + 0x4p-1076 i)":
+double: 2
+idouble: 2
+Test "Real part of: ctan_tonearest (0x1.921fb54442d19p+0 + 0x8p-152 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan_tonearest (0x1.921fb54442d19p+0 + 0x8p-152 i)":
+double: 2
+idouble: 2
+Test "Real part of: ctan_tonearest (0x1.921fb6p+0 + +0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctan_tonearest (0x1.921fb6p+0 + 0x8p-152 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctan_tonearest (0x1.921fb6p+0 + 0x8p-152 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctan_tonearest (0x8p+1020 + 0x1p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan_tonearest (0x8p+124 + 0x1p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan_tonearest (0xcp-4 + 0x1.4p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_tonearest (0xf.ffffffffffff8p+1020 + 0x1p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_tonearest (0xf.fffffp+124 + 0x1p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan_tonearest (0xf.fffffp+124 + 0x1p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+# ctan_towardzero
+Test "Real part of: ctan_towardzero (-0x2p+0 - 0x3p+0 i)":
+double: 5
+float: 3
+idouble: 5
+ifloat: 3
+Test "Imaginary part of: ctan_towardzero (-0x2p+0 - 0x3p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan_towardzero (-0xc.35p+12 - 0xc.35p+12 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctan_towardzero (0x1.921fb4p+0 + +0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctan_towardzero (0x1.921fb4p+0 + 0x8p-152 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctan_towardzero (0x1.921fb4p+0 + 0x8p-152 i)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "Real part of: ctan_towardzero (0x1.921fb54442d18p+0 + +0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_towardzero (0x1.921fb54442d18p+0 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_towardzero (0x1.921fb54442d18p+0 + 0x8p-152 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_towardzero (0x1.921fb6p+0 + +0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctan_towardzero (0x1.921fb6p+0 + 0x8p-152 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctan_towardzero (0x1.921fb6p+0 + 0x8p-152 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctan_towardzero (0x1p+0 + 0x2.dp+4 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_towardzero (0x8p+1020 + 0x1p+0 i)":
+double: 5
+idouble: 5
+Test "Real part of: ctan_towardzero (0x8p+124 + 0x1p+0 i)":
+double: 4
+float: 3
+idouble: 4
+ifloat: 3
+Test "Imaginary part of: ctan_towardzero (0x8p+124 + 0x1p+0 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Imaginary part of: ctan_towardzero (0xc.35p+12 - 0xc.35p+12 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctan_towardzero (0xcp-4 + 0x1.4p+0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctan_towardzero (0xf.ffffffffffff8p+1020 + 0x1p+0 i)":
+double: 2
+idouble: 2
+Test "Real part of: ctan_towardzero (0xf.fffffp+124 + 0x1p+0 i)":
+double: 4
+float: 2
+idouble: 4
+ifloat: 2
+Test "Imaginary part of: ctan_towardzero (0xf.fffffp+124 + 0x1p+0 i)":
+double: 1
+idouble: 1
+
+# ctan_upward
+Test "Real part of: ctan_upward (-0x2p+0 - 0x3p+0 i)":
+double: 2
+float: 3
+idouble: 2
+ifloat: 3
+Test "Imaginary part of: ctan_upward (-0x2p+0 - 0x3p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctan_upward (-0xc.35p+12 + 0xc.35p+12 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctan_upward (-0xc.35p+12 - 0xc.35p+12 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctan_upward (0x1.921fb4p+0 + +0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctan_upward (0x1.921fb4p+0 + 0x8p-152 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctan_upward (0x1.921fb4p+0 + 0x8p-152 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Real part of: ctan_upward (0x1.921fb54442d18p+0 + +0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_upward (0x1.921fb54442d18p+0 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan_upward (0x1.921fb54442d18p+0 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_upward (0x1.921fb54442d18p+0 + 0x8p-152 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_upward (0x1.921fb54442d19p+0 + +0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_upward (0x1.921fb54442d19p+0 + 0x4p-1076 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan_upward (0x1.921fb54442d19p+0 + 0x4p-1076 i)":
+double: 2
+idouble: 2
+Test "Real part of: ctan_upward (0x1.921fb54442d19p+0 + 0x8p-152 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_upward (0x1.921fb6p+0 + +0 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Real part of: ctan_upward (0x1.921fb6p+0 + 0x4p-1076 i)":
+double: 2
+idouble: 2
+Test "Real part of: ctan_upward (0x1.921fb6p+0 + 0x8p-152 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Imaginary part of: ctan_upward (0x1.921fb6p+0 + 0x8p-152 i)":
+double: 1
+float: 3
+idouble: 1
+ifloat: 3
+Test "Imaginary part of: ctan_upward (0x1p+0 + 0x1.63ap+12 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctan_upward (0x1p+0 + 0x1.63p+12 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctan_upward (0x1p+0 + 0x1.63p+8 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctan_upward (0x1p+0 + 0x1.6dp+8 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctan_upward (0x1p+0 + 0x2.dp+4 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctan_upward (0x1p+0 + 0x2.dp+4 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Real part of: ctan_upward (0x1p+0 + 0x2.fp+4 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan_upward (0x1p+0 + 0x2.fp+4 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Real part of: ctan_upward (0x8p+1020 + 0x1p+0 i)":
+double: 2
+idouble: 2
+Test "Imaginary part of: ctan_upward (0x8p+1020 + 0x1p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_upward (0x8p+124 + 0x1p+0 i)":
+double: 2
+idouble: 2
+Test "Imaginary part of: ctan_upward (0x8p+124 + 0x1p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctan_upward (0xc.35p+12 + 0xc.35p+12 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctan_upward (0xc.35p+12 - 0xc.35p+12 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctan_upward (0xcp-4 + 0x1.4p+0 i)":
+double: 2
+idouble: 2
+Test "Imaginary part of: ctan_upward (0xcp-4 + 0x1.4p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctan_upward (0xf.ffffffffffff8p+1020 + 0x1p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctan_upward (0xf.fffffp+124 + 0x1p+0 i)":
+double: 2
+float: 3
+idouble: 2
+ifloat: 3
+
+# ctanh
+Test "Imaginary part of: ctanh (+0 + 0x1.921fb4p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh (+0 + 0x1.921fb54442d19p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh (+0 + 0x1.921fb6p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctanh (+0 + 0xc.90fdaa22168cp-4 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh (+0 + 0xc.90fdap-4 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Imaginary part of: ctanh (+0 + 0xc.90fdbp-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctanh (-0x2p+0 - 0x3p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh (-0x2p+0 - 0x3p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh (0x1p+0 + 0x8p+1020 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh (0x1p+0 + 0x8p+124 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh (0x1p+0 + 0xf.ffffffffffff8p+1020 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh (0x1p+0 + 0xf.fffffp+124 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh (0x1p+0 + 0xf.fffffp+124 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh (0x4p-1076 + 0x1.921fb4p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh (0x4p-1076 + 0x1.921fb4p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh (0x4p-1076 + 0x1.921fb54442d19p+0 i)":
+double: 2
+idouble: 2
+Test "Imaginary part of: ctanh (0x4p-1076 + 0x1.921fb54442d19p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh (0x8p-152 + 0x1.921fb4p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh (0x8p-152 + 0x1.921fb4p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctanh (0x8p-152 + 0x1.921fb54442d19p+0 i)":
+double: 2
+idouble: 2
+Test "Imaginary part of: ctanh (0x8p-152 + 0x1.921fb54442d19p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh (0x8p-152 + 0x1.921fb6p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctanh (0x8p-152 + 0x1.921fb6p+0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctanh (0xcp-4 + 0x1.4p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh (0xcp-4 + 0x1.4p+0 i)":
+float: 2
+ifloat: 2
+
+# ctanh_downward
+Test "Imaginary part of: ctanh_downward (+0 + 0x1.921fb4p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_downward (+0 + 0x1.921fb54442d18p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_downward (+0 + 0x1.921fb6p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_downward (+0 + 0xc.90fdap-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctanh_downward (-0x2p+0 - 0x3p+0 i)":
+double: 4
+float: 1
+idouble: 4
+ifloat: 1
+Test "Imaginary part of: ctanh_downward (-0x2p+0 - 0x3p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_downward (0x1p+0 + 0x8p+1020 i)":
+double: 6
+idouble: 6
+Test "Real part of: ctanh_downward (0x1p+0 + 0x8p+124 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Imaginary part of: ctanh_downward (0x1p+0 + 0x8p+124 i)":
+double: 4
+float: 3
+idouble: 4
+ifloat: 3
+Test "Imaginary part of: ctanh_downward (0x1p+0 + 0xf.ffffffffffff8p+1020 i)":
+double: 3
+idouble: 3
+Test "Real part of: ctanh_downward (0x1p+0 + 0xf.fffffp+124 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_downward (0x1p+0 + 0xf.fffffp+124 i)":
+double: 5
+float: 5
+idouble: 5
+ifloat: 5
+Test "Imaginary part of: ctanh_downward (0x2.dp+4 + 0x1p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_downward (0x4p-1076 + 0x1.921fb54442d18p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_downward (0x4p-1076 + 0x1.921fb6p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh_downward (0x8p-152 + 0x1.921fb4p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_downward (0x8p-152 + 0x1.921fb4p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_downward (0x8p-152 + 0x1.921fb54442d18p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh_downward (0x8p-152 + 0x1.921fb6p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_downward (0x8p-152 + 0x1.921fb6p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_downward (0xcp-4 + 0x1.4p+0 i)":
+double: 1
+idouble: 1
+
+# ctanh_tonearest
+Test "Imaginary part of: ctanh_tonearest (+0 + 0x1.921fb4p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_tonearest (+0 + 0x1.921fb54442d19p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_tonearest (+0 + 0x1.921fb6p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_tonearest (+0 + 0xc.90fdaa22168cp-4 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_tonearest (+0 + 0xc.90fdap-4 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Imaginary part of: ctanh_tonearest (+0 + 0xc.90fdbp-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctanh_tonearest (-0x2p+0 - 0x3p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_tonearest (-0x2p+0 - 0x3p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_tonearest (0x1p+0 + 0x8p+1020 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh_tonearest (0x1p+0 + 0x8p+124 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_tonearest (0x1p+0 + 0xf.ffffffffffff8p+1020 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh_tonearest (0x1p+0 + 0xf.fffffp+124 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_tonearest (0x1p+0 + 0xf.fffffp+124 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh_tonearest (0x4p-1076 + 0x1.921fb4p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_tonearest (0x4p-1076 + 0x1.921fb4p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh_tonearest (0x4p-1076 + 0x1.921fb54442d19p+0 i)":
+double: 2
+idouble: 2
+Test "Imaginary part of: ctanh_tonearest (0x4p-1076 + 0x1.921fb54442d19p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh_tonearest (0x8p-152 + 0x1.921fb4p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_tonearest (0x8p-152 + 0x1.921fb4p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctanh_tonearest (0x8p-152 + 0x1.921fb54442d19p+0 i)":
+double: 2
+idouble: 2
+Test "Imaginary part of: ctanh_tonearest (0x8p-152 + 0x1.921fb54442d19p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh_tonearest (0x8p-152 + 0x1.921fb6p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_tonearest (0x8p-152 + 0x1.921fb6p+0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctanh_tonearest (0xcp-4 + 0x1.4p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_tonearest (0xcp-4 + 0x1.4p+0 i)":
+float: 2
+ifloat: 2
+
+# ctanh_towardzero
+Test "Imaginary part of: ctanh_towardzero (+0 + 0x1.921fb4p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_towardzero (+0 + 0x1.921fb54442d18p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_towardzero (+0 + 0x1.921fb6p+0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctanh_towardzero (-0x2p+0 - 0x3p+0 i)":
+double: 2
+idouble: 2
+Test "Imaginary part of: ctanh_towardzero (-0x2p+0 - 0x3p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctanh_towardzero (-0xc.35p+12 + 0xc.35p+12 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctanh_towardzero (-0xc.35p+12 - 0xc.35p+12 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_towardzero (0x1p+0 + 0x8p+1020 i)":
+double: 5
+idouble: 5
+Test "Real part of: ctanh_towardzero (0x1p+0 + 0x8p+124 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Imaginary part of: ctanh_towardzero (0x1p+0 + 0x8p+124 i)":
+double: 4
+float: 3
+idouble: 4
+ifloat: 3
+Test "Imaginary part of: ctanh_towardzero (0x1p+0 + 0xf.ffffffffffff8p+1020 i)":
+double: 2
+idouble: 2
+Test "Real part of: ctanh_towardzero (0x1p+0 + 0xf.fffffp+124 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_towardzero (0x1p+0 + 0xf.fffffp+124 i)":
+double: 4
+float: 2
+idouble: 4
+ifloat: 2
+Test "Imaginary part of: ctanh_towardzero (0x2.dp+4 + 0x1p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_towardzero (0x4p-1076 + 0x1.921fb54442d18p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh_towardzero (0x8p-152 + 0x1.921fb4p+0 i)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "Imaginary part of: ctanh_towardzero (0x8p-152 + 0x1.921fb4p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_towardzero (0x8p-152 + 0x1.921fb54442d18p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh_towardzero (0x8p-152 + 0x1.921fb6p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_towardzero (0x8p-152 + 0x1.921fb6p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_towardzero (0xcp-4 + 0x1.4p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+# ctanh_upward
+Test "Imaginary part of: ctanh_upward (+0 + 0x1.921fb4p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_upward (+0 + 0x1.921fb54442d18p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_upward (+0 + 0x1.921fb54442d19p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_upward (+0 + 0x1.921fb6p+0 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Imaginary part of: ctanh_upward (+0 + 0xc.90fdap-4 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_upward (+0 + 0xc.90fdbp-4 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctanh_upward (-0x2p+0 - 0x3p+0 i)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "Imaginary part of: ctanh_upward (-0x2p+0 - 0x3p+0 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Real part of: ctanh_upward (-0xc.35p+12 + 0xc.35p+12 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctanh_upward (-0xc.35p+12 - 0xc.35p+12 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctanh_upward (0x1.63ap+12 + 0x1p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctanh_upward (0x1.63p+12 + 0x1p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctanh_upward (0x1.63p+8 + 0x1p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctanh_upward (0x1.6dp+8 + 0x1p+0 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctanh_upward (0x1p+0 + 0x8p+1020 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_upward (0x1p+0 + 0x8p+1020 i)":
+double: 2
+idouble: 2
+Test "Real part of: ctanh_upward (0x1p+0 + 0x8p+124 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_upward (0x1p+0 + 0x8p+124 i)":
+double: 2
+idouble: 2
+Test "Imaginary part of: ctanh_upward (0x1p+0 + 0xf.ffffffffffff8p+1020 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_upward (0x1p+0 + 0xf.fffffp+124 i)":
+double: 2
+float: 3
+idouble: 2
+ifloat: 3
+Test "Real part of: ctanh_upward (0x2.dp+4 + 0x1p+0 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Imaginary part of: ctanh_upward (0x2.dp+4 + 0x1p+0 i)":
+float: 1
+ifloat: 1
+Test "Real part of: ctanh_upward (0x2.fp+4 + 0x1p+0 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Imaginary part of: ctanh_upward (0x2.fp+4 + 0x1p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh_upward (0x4p-1076 + 0x1.921fb54442d18p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_upward (0x4p-1076 + 0x1.921fb54442d18p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh_upward (0x4p-1076 + 0x1.921fb54442d19p+0 i)":
+double: 2
+idouble: 2
+Test "Imaginary part of: ctanh_upward (0x4p-1076 + 0x1.921fb54442d19p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_upward (0x4p-1076 + 0x1.921fb6p+0 i)":
+double: 2
+idouble: 2
+Test "Real part of: ctanh_upward (0x8p-152 + 0x1.921fb4p+0 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Imaginary part of: ctanh_upward (0x8p-152 + 0x1.921fb4p+0 i)":
+float: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_upward (0x8p-152 + 0x1.921fb54442d18p+0 i)":
+double: 1
+idouble: 1
+Test "Imaginary part of: ctanh_upward (0x8p-152 + 0x1.921fb54442d19p+0 i)":
+double: 1
+idouble: 1
+Test "Real part of: ctanh_upward (0x8p-152 + 0x1.921fb6p+0 i)":
+double: 1
+float: 3
+idouble: 1
+ifloat: 3
+Test "Imaginary part of: ctanh_upward (0x8p-152 + 0x1.921fb6p+0 i)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "Real part of: ctanh_upward (0xc.35p+12 + 0xc.35p+12 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Real part of: ctanh_upward (0xc.35p+12 - 0xc.35p+12 i)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "Imaginary part of: ctanh_upward (0xcp-4 + 0x1.4p+0 i)":
+float: 2
+ifloat: 2
+
+# erf
+Test "erf (0x1.4p+0)":
+double: 1
+idouble: 1
+
+# erfc
+Test "erfc (-0x8p-4)":
+float: 1
+ifloat: 1
+Test "erfc (0x2p+0)":
+double: 1
+idouble: 1
+Test "erfc (0x3.ee6078p+0)":
+double: 1
+idouble: 1
+Test "erfc (0x4.2p+0)":
+double: 1
+idouble: 1
+Test "erfc (0x7.fe8008p+0)":
+float: 1
+ifloat: 1
+Test "erfc (0x7.fffd6p+0)":
+float: 1
+ifloat: 1
+
+# exp10
+Test "exp10 (-0x1.31p+8)":
+double: 1
+idouble: 1
+Test "exp10 (-0x1p+0)":
+double: 1
+idouble: 1
+Test "exp10 (-0x2.4p+4)":
+double: 1
+idouble: 1
+Test "exp10 (0x2.4p+4)":
+double: 1
+idouble: 1
+Test "exp10 (0x3p+0)":
+double: 1
+idouble: 1
+
+# exp10_downward
+Test "exp10_downward (0x2.4p+4)":
+double: 1
+idouble: 1
+
+# exp10_tonearest
+Test "exp10_tonearest (-0x1.31p+8)":
+double: 1
+idouble: 1
+Test "exp10_tonearest (-0x1p+0)":
+double: 1
+idouble: 1
+Test "exp10_tonearest (-0x2.4p+4)":
+double: 1
+idouble: 1
+Test "exp10_tonearest (0x2.4p+4)":
+double: 1
+idouble: 1
+Test "exp10_tonearest (0x3p+0)":
+double: 1
+idouble: 1
+
+# exp10_towardzero
+Test "exp10_towardzero (0x2.4p+4)":
+double: 1
+idouble: 1
+
+# exp10_upward
+Test "exp10_upward (-0x1.344p+12)":
+float: 1
+ifloat: 1
+Test "exp10_upward (-0x1.86ap+16)":
+float: 1
+ifloat: 1
+Test "exp10_upward (-0xf.424p+16)":
+float: 1
+ifloat: 1
+Test "exp10_upward (-0xf.fffffp+124)":
+float: 1
+ifloat: 1
+Test "exp10_upward (0x2.4p+4)":
+double: 1
+idouble: 1
+Test "exp10_upward (0x3p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+# exp_downward
+Test "exp_downward (0x2p+0)":
+double: 1
+idouble: 1
+Test "exp_downward (0x3p+0)":
+double: 1
+idouble: 1
+Test "exp_downward (0x5.8b9028p+4)":
+double: 1
+idouble: 1
+Test "exp_downward (0xcp-4)":
+double: 1
+idouble: 1
+
+# exp_towardzero
+Test "exp_towardzero (0x2p+0)":
+double: 1
+idouble: 1
+Test "exp_towardzero (0x3p+0)":
+double: 1
+idouble: 1
+Test "exp_towardzero (0x5.8b9028p+4)":
+double: 1
+idouble: 1
+Test "exp_towardzero (0xcp-4)":
+double: 1
+idouble: 1
+
+# exp_upward
+Test "exp_upward (-0x2.e870a4p+8)":
+double: 1
+idouble: 1
+Test "exp_upward (-0x2.e870a7e5e88c2p+8)":
+double: 1
+idouble: 1
+Test "exp_upward (-0x2.e870a7e5e88cp+8)":
+double: 1
+idouble: 1
+Test "exp_upward (-0x2.e870a8p+8)":
+double: 1
+idouble: 1
+Test "exp_upward (-0x2.ebe224p+8)":
+double: 1
+idouble: 1
+Test "exp_upward (-0x2.ebe227861639p+8)":
+double: 1
+idouble: 1
+Test "exp_upward (-0x2.ebe228p+8)":
+double: 1
+idouble: 1
+Test "exp_upward (-0x4.d2p+8)":
+double: 1
+idouble: 1
+Test "exp_upward (-0xf.ffffffffffff8p+1020)":
+double: 1
+idouble: 1
+Test "exp_upward (-0xf.fffffp+124)":
+double: 1
+idouble: 1
+Test "exp_upward (0x1p+0)":
+double: 1
+idouble: 1
+Test "exp_upward (0x2.c5cp+8)":
+double: 1
+idouble: 1
+Test "exp_upward (0x3.2p+4)":
+double: 1
+idouble: 1
+
+# expm1
+Test "expm1 (0x1.f4p+8)":
+double: 1
+idouble: 1
+Test "expm1 (0x1p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "expm1 (0xcp-4)":
+double: 1
+idouble: 1
+
+# expm1_downward
+Test "expm1_downward (0x1.f4p+8)":
+double: 1
+idouble: 1
+Test "expm1_downward (0x3.2p+4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "expm1_downward (0x7.fp+4)":
+double: 1
+idouble: 1
+
+# expm1_tonearest
+Test "expm1_tonearest (0x1.f4p+8)":
+double: 1
+idouble: 1
+Test "expm1_tonearest (0x1p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "expm1_tonearest (0xcp-4)":
+double: 1
+idouble: 1
+
+# expm1_towardzero
+Test "expm1_towardzero (-0x1p-100)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "expm1_towardzero (-0x1p-32)":
+float: 1
+ifloat: 1
+Test "expm1_towardzero (-0x1p-64)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "expm1_towardzero (-0x4p-52)":
+float: 1
+ifloat: 1
+Test "expm1_towardzero (-0x8p-32)":
+float: 1
+ifloat: 1
+Test "expm1_towardzero (0x1.f4p+8)":
+double: 1
+idouble: 1
+Test "expm1_towardzero (0x3.2p+4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "expm1_towardzero (0x7.fp+4)":
+double: 1
+idouble: 1
+
+# expm1_upward
+Test "expm1_upward (-0x1p-100)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "expm1_upward (-0x1p-32)":
+float: 1
+ifloat: 1
+Test "expm1_upward (-0x1p-64)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "expm1_upward (-0x4p-52)":
+float: 1
+ifloat: 1
+Test "expm1_upward (-0x8p-32)":
+float: 1
+ifloat: 1
+Test "expm1_upward (0x1p-100)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "expm1_upward (0x1p-32)":
+float: 1
+ifloat: 1
+Test "expm1_upward (0x1p-64)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "expm1_upward (0x4p-52)":
+float: 1
+ifloat: 1
+Test "expm1_upward (0x8p-32)":
+float: 1
+ifloat: 1
+
+# gamma
+Test "gamma (-0x1p-20)":
+double: 1
+idouble: 1
+Test "gamma (-0x2p-16)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "gamma (-0x4p-12)":
+double: 1
+idouble: 1
+Test "gamma (-0x8p-8)":
+double: 1
+idouble: 1
+Test "gamma (0x4p-12)":
+float: 1
+ifloat: 1
+Test "gamma (0x4p-32)":
+double: 1
+idouble: 1
+Test "gamma (0xb.333333333333p-4)":
+double: 1
+idouble: 1
+Test "gamma (0xb.33333p-4)":
+double: 1
+idouble: 1
+
+# hypot
+Test "hypot (-0xb.33334p-4, -0xc.6666666666668p+0)":
+double: 1
+idouble: 1
+Test "hypot (-0xb.33334p-4, 0xc.6666666666668p+0)":
+double: 1
+idouble: 1
+Test "hypot (-0xc.6666666666668p+0, -0xb.33334p-4)":
+double: 1
+idouble: 1
+Test "hypot (-0xc.6666666666668p+0, 0xb.33334p-4)":
+double: 1
+idouble: 1
+Test "hypot (0xb.33334p-4, -0xc.6666666666668p+0)":
+double: 1
+idouble: 1
+Test "hypot (0xb.33334p-4, 0xc.6666666666668p+0)":
+double: 1
+idouble: 1
+Test "hypot (0xc.6666666666668p+0, -0xb.33334p-4)":
+double: 1
+idouble: 1
+Test "hypot (0xc.6666666666668p+0, 0xb.33334p-4)":
+double: 1
+idouble: 1
+
+# j0
+Test "j0 (-0x4p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "j0 (-0xf.fffffp+124)":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+Test "j0 (0x2p+0)":
+float: 2
+ifloat: 2
+Test "j0 (0x4p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "j0 (0x8p+0)":
+float: 1
+ifloat: 1
+Test "j0 (0xap+0)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "j0 (0xcp-4)":
+float: 1
+ifloat: 1
+Test "j0 (0xe.be71dp+104)":
+float: 2
+ifloat: 2
+Test "j0 (0xf.fffffp+124)":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+# j1
+Test "j1 (0x1.ff00000000002p+840)":
+double: 1
+idouble: 1
+Test "j1 (0x2p+0)":
+double: 1
+idouble: 1
+Test "j1 (0x4.ffcp+72)":
+double: 1
+idouble: 1
+Test "j1 (0x8p+0)":
+double: 1
+idouble: 1
+Test "j1 (0xap+0)":
+float: 2
+ifloat: 2
+Test "j1 (0xf.ffffffffffff8p+1020)":
+double: 1
+idouble: 1
+Test "j1 (0xf.fffffp+124)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+# jn
+Test "jn (0, -0x4p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "jn (0, 0x2p+0)":
+float: 2
+ifloat: 2
+Test "jn (0, 0x4p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "jn (0, 0x8p+0)":
+float: 1
+ifloat: 1
+Test "jn (0, 0xap+0)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "jn (0, 0xcp-4)":
+float: 1
+ifloat: 1
+Test "jn (1, 0x2p+0)":
+double: 1
+idouble: 1
+Test "jn (1, 0x8p+0)":
+double: 1
+idouble: 1
+Test "jn (1, 0xap+0)":
+float: 2
+ifloat: 2
+Test "jn (10, 0x2p+0)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "jn (10, 0x2p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "jn (10, 0xap+0)":
+double: 4
+float: 2
+idouble: 4
+ifloat: 2
+Test "jn (10, 0xcp-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "jn (2, 0x2.67a2a4p+0)":
+float: 1
+ifloat: 1
+Test "jn (2, 0x2.67a2a5d2e3682p+0)":
+double: 1
+idouble: 1
+Test "jn (2, 0x2.67a2a5d2e368p+0)":
+double: 2
+idouble: 2
+Test "jn (2, 0x2.67a2a8p+0)":
+double: 1
+float: 3
+idouble: 1
+ifloat: 3
+Test "jn (2, 0x8p+124)":
+double: 1
+idouble: 1
+Test "jn (2, 0xf.fffb1p+96)":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+Test "jn (2, 0xf.fffffp+124)":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+Test "jn (3, 0x2.67a2a4p+0)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "jn (3, 0x2.67a2a5d2e3682p+0)":
+double: 1
+idouble: 1
+Test "jn (3, 0x2.67a2a5d2e368p+0)":
+double: 3
+idouble: 3
+Test "jn (3, 0x2.67a2a8p+0)":
+double: 1
+float: 3
+idouble: 1
+ifloat: 3
+Test "jn (3, 0x2p+0)":
+float: 1
+ifloat: 1
+Test "jn (3, 0x2p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "jn (3, 0xap+0)":
+double: 3
+idouble: 3
+Test "jn (3, 0xcp-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "jn (4, 0x2.67a2a4p+0)":
+float: 1
+ifloat: 1
+Test "jn (4, 0x2.67a2a5d2e3682p+0)":
+double: 1
+idouble: 1
+Test "jn (4, 0x2.67a2a5d2e368p+0)":
+double: 1
+idouble: 1
+Test "jn (4, 0x2.67a2a8p+0)":
+float: 1
+ifloat: 1
+Test "jn (5, 0x2.67a2a4p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "jn (5, 0x2.67a2a5d2e3682p+0)":
+double: 1
+idouble: 1
+Test "jn (5, 0x2.67a2a5d2e368p+0)":
+double: 2
+idouble: 2
+Test "jn (5, 0x2.67a2a8p+0)":
+float: 2
+ifloat: 2
+Test "jn (6, 0x2.67a2a4p+0)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "jn (6, 0x2.67a2a5d2e3682p+0)":
+double: 2
+idouble: 2
+Test "jn (6, 0x2.67a2a5d2e368p+0)":
+double: 4
+idouble: 4
+Test "jn (6, 0x2.67a2a8p+0)":
+double: 2
+float: 3
+idouble: 2
+ifloat: 3
+Test "jn (7, 0x2.67a2a4p+0)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "jn (7, 0x2.67a2a5d2e368p+0)":
+double: 3
+idouble: 3
+Test "jn (7, 0x2.67a2a8p+0)":
+double: 2
+float: 3
+idouble: 2
+ifloat: 3
+Test "jn (8, 0x2.67a2a4p+0)":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+Test "jn (8, 0x2.67a2a5d2e3682p+0)":
+double: 1
+idouble: 1
+Test "jn (8, 0x2.67a2a5d2e368p+0)":
+double: 3
+idouble: 3
+Test "jn (8, 0x2.67a2a8p+0)":
+double: 2
+float: 4
+idouble: 2
+ifloat: 4
+Test "jn (9, 0x2.67a2a4p+0)":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+Test "jn (9, 0x2.67a2a5d2e3682p+0)":
+double: 4
+idouble: 4
+Test "jn (9, 0x2.67a2a5d2e368p+0)":
+double: 1
+idouble: 1
+Test "jn (9, 0x2.67a2a8p+0)":
+double: 3
+float: 3
+idouble: 3
+ifloat: 3
+
+# lgamma
+Test "lgamma (-0x1p-20)":
+double: 1
+idouble: 1
+Test "lgamma (-0x2p-16)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "lgamma (-0x4p-12)":
+double: 1
+idouble: 1
+Test "lgamma (-0x8p-8)":
+double: 1
+idouble: 1
+Test "lgamma (0x4p-12)":
+float: 1
+ifloat: 1
+Test "lgamma (0x4p-32)":
+double: 1
+idouble: 1
+Test "lgamma (0xb.333333333333p-4)":
+double: 1
+idouble: 1
+Test "lgamma (0xb.33333p-4)":
+double: 1
+idouble: 1
+
+# log
+Test "log (0x2.b7e15p+0)":
+float: 1
+ifloat: 1
+
+# log10
+Test "log10 (0x2.b7e154p+0)":
+float: 1
+ifloat: 1
+Test "log10 (0xcp-4)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+# log1p
+Test "log1p (-0x4p-4)":
+float: 1
+ifloat: 1
+Test "log1p (0x1.b7e15p+0)":
+float: 1
+ifloat: 1
+
+# pow
+Test "pow (0x1.000002p+0, 0x1p+24)":
+float: 1
+ifloat: 1
+Test "pow (0xf.fffffp-4, -0x1p+24)":
+float: 1
+ifloat: 1
+Test "pow (0xf.fffffp-4, 0x1p+24)":
+float: 1
+ifloat: 1
+
+# pow10
+Test "pow10 (-0x1.31p+8)":
+double: 1
+idouble: 1
+Test "pow10 (-0x1p+0)":
+double: 1
+idouble: 1
+Test "pow10 (-0x2.4p+4)":
+double: 1
+idouble: 1
+Test "pow10 (0x2.4p+4)":
+double: 1
+idouble: 1
+Test "pow10 (0x3p+0)":
+double: 1
+idouble: 1
+
+# pow_downward
+Test "pow_downward (1.5, 1.03125)":
+float: 1
+ifloat: 1
+
+# pow_tonearest
+Test "pow_tonearest (0x1.000002p+0, 0x1p+24)":
+float: 1
+ifloat: 1
+Test "pow_tonearest (0xf.fffffp-4, -0x1p+24)":
+float: 1
+ifloat: 1
+Test "pow_tonearest (0xf.fffffp-4, 0x1p+24)":
+float: 1
+ifloat: 1
+
+# pow_towardzero
+Test "pow_towardzero (1.5, 1.03125)":
+float: 1
+ifloat: 1
+
+# pow_upward
+Test "pow_upward (1.0625, 1.125)":
+float: 1
+ifloat: 1
+
+# sin
+Test "sin (0x1p+0)":
+float: 1
+ifloat: 1
+
+# sin_downward
+Test "sin_downward (-0x1.921fb4p+0)":
+double: 1
+idouble: 1
+Test "sin_downward (-0x1.921fb6p+0)":
+double: 1
+idouble: 1
+Test "sin_downward (-0x2p+64)":
+double: 1
+idouble: 1
+Test "sin_downward (-0x8.60a91c16b9b3p-4)":
+double: 1
+idouble: 1
+Test "sin_downward (-0x8.60a91p-4)":
+double: 1
+idouble: 1
+Test "sin_downward (-0x8.60a92p-4)":
+double: 1
+idouble: 1
+Test "sin_downward (0x1.921fb54442d18p+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x1.921fb54442d19p+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x1p+120)":
+float: 1
+ifloat: 1
+Test "sin_downward (0x1p+28)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_downward (0x2.1e19e0c9bab24p+72)":
+double: 1
+idouble: 1
+Test "sin_downward (0x2.1e19ep+72)":
+float: 2
+ifloat: 2
+Test "sin_downward (0x2.553534p+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x2.5535376715bap+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x2p+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x3.be735c19be9fep+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x3.be736p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_downward (0x3.ec2a0250032a2p+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x3.ec2a0250032ap+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x3.ec2ap+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_downward (0x3p+0)":
+float: 1
+ifloat: 1
+Test "sin_downward (0x4.093388p-4)":
+double: 1
+idouble: 1
+Test "sin_downward (0x4.1237e153f7084p+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x4.1237e153f708p+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x4.1237ep+0)":
+float: 1
+ifloat: 1
+Test "sin_downward (0x4.c92d08p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_downward (0x4.c92d1p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_downward (0x4p+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x4p+48)":
+double: 1
+idouble: 1
+Test "sin_downward (0x5.fbec7477d4a84p+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x5.fbec7477d4a8p+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x5.fbec78p+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x5p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_downward (0x6p+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x8p+0)":
+double: 1
+idouble: 1
+Test "sin_downward (0x8p+1020)":
+double: 1
+idouble: 1
+Test "sin_downward (0x9p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_downward (0xap+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_downward (0xc.d4966d92d1708p-4)":
+double: 1
+idouble: 1
+Test "sin_downward (0xc.d4966p-4)":
+double: 1
+idouble: 1
+Test "sin_downward (0xf.ffffcp+124)":
+double: 1
+idouble: 1
+Test "sin_downward (0xf.ffffffffffff8p+1020)":
+double: 1
+idouble: 1
+Test "sin_downward (0xf.fffffp+124)":
+double: 1
+idouble: 1
+
+# sin_tonearest
+Test "sin_tonearest (0x1p+0)":
+float: 1
+ifloat: 1
+
+# sin_towardzero
+Test "sin_towardzero (-0x1.921fb54442d18p+0)":
+double: 1
+idouble: 1
+Test "sin_towardzero (-0x1.921fb54442d19p+0)":
+double: 1
+idouble: 1
+Test "sin_towardzero (-0x2p+64)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x1.921fb54442d18p+0)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x1.921fb54442d19p+0)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x1p+0)":
+float: 1
+ifloat: 1
+Test "sin_towardzero (0x2.1e19e4p+72)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x2.1e19ep+72)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_towardzero (0x2.553534p+0)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x2.5535376715bap+0)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x2p+0)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x2p+64)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x3.be735c19beap+0)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x3.be735cp+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_towardzero (0x3.ec2a04p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_towardzero (0x4.093388p-4)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x4.1237e8p+0)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x4.1237ep+0)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x4.c92d0ffa4bf04p+0)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x4.c92d0ffa4bfp+0)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x4p+48)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x5.fbec7p+0)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x8p+0)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x8p+1020)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0x9p+0)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0xb.fa09ap+100)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0xc.d4966d92d1708p-4)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0xc.d4966p-4)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0xc.d4967p-4)":
+float: 1
+ifloat: 1
+Test "sin_towardzero (0xe.ef3afp-4)":
+float: 1
+ifloat: 1
+Test "sin_towardzero (0xf.ffffcp+124)":
+double: 1
+idouble: 1
+Test "sin_towardzero (0xf.ffffffffffff8p+1020)":
+double: 1
+idouble: 1
+
+# sin_upward
+Test "sin_upward (-0x1.921fb4p+0)":
+float: 1
+ifloat: 1
+Test "sin_upward (-0x1.921fb54442d18p+0)":
+double: 1
+idouble: 1
+Test "sin_upward (-0x1.921fb54442d19p+0)":
+double: 1
+idouble: 1
+Test "sin_upward (-0x1.921fb6p+0)":
+float: 1
+ifloat: 1
+Test "sin_upward (0x1.921fb4p+0)":
+double: 1
+idouble: 1
+Test "sin_upward (0x1.921fb6p+0)":
+double: 1
+idouble: 1
+Test "sin_upward (0x1p+0)":
+double: 1
+idouble: 1
+Test "sin_upward (0x1p+120)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_upward (0x1p+28)":
+float: 1
+ifloat: 1
+Test "sin_upward (0x2.1e19e4p+72)":
+double: 1
+idouble: 1
+Test "sin_upward (0x2.1e19ep+72)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_upward (0x2.5535376715b9ep+0)":
+double: 1
+idouble: 1
+Test "sin_upward (0x2.553538p+0)":
+double: 1
+idouble: 1
+Test "sin_upward (0x2p+0)":
+float: 1
+ifloat: 1
+Test "sin_upward (0x2p+64)":
+double: 1
+idouble: 1
+Test "sin_upward (0x3.be735c19beap+0)":
+double: 1
+idouble: 1
+Test "sin_upward (0x3.be735cp+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_upward (0x3.be736p+0)":
+float: 1
+ifloat: 1
+Test "sin_upward (0x3.ec2a04p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_upward (0x3p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_upward (0x4.093385688a2d4p-4)":
+double: 1
+idouble: 1
+Test "sin_upward (0x4.093385688a2dp-4)":
+double: 1
+idouble: 1
+Test "sin_upward (0x4.09338p-4)":
+double: 1
+idouble: 1
+Test "sin_upward (0x4.1237e8p+0)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "sin_upward (0x4.1237ep+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_upward (0x4.c92d08p+0)":
+float: 1
+ifloat: 1
+Test "sin_upward (0x4.c92d0ffa4bf04p+0)":
+double: 1
+idouble: 1
+Test "sin_upward (0x4.c92d0ffa4bfp+0)":
+double: 1
+idouble: 1
+Test "sin_upward (0x4.c92d1p+0)":
+float: 1
+ifloat: 1
+Test "sin_upward (0x4p+0)":
+float: 2
+ifloat: 2
+Test "sin_upward (0x4p+48)":
+float: 1
+ifloat: 1
+Test "sin_upward (0x5.fbec7p+0)":
+double: 1
+idouble: 1
+Test "sin_upward (0x5p+0)":
+float: 1
+ifloat: 1
+Test "sin_upward (0x7p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "sin_upward (0x8.60a91c16b9b3p-4)":
+double: 1
+idouble: 1
+Test "sin_upward (0x8.60a91p-4)":
+double: 1
+idouble: 1
+Test "sin_upward (0x8.60a92p-4)":
+double: 1
+idouble: 1
+Test "sin_upward (0x8p+0)":
+float: 1
+ifloat: 1
+Test "sin_upward (0x8p+124)":
+double: 1
+idouble: 1
+Test "sin_upward (0x9p+0)":
+float: 1
+ifloat: 1
+Test "sin_upward (0xap+0)":
+float: 1
+ifloat: 1
+Test "sin_upward (0xb.fa09ap+100)":
+double: 1
+idouble: 1
+Test "sin_upward (0xc.d4966d92d171p-4)":
+double: 1
+idouble: 1
+Test "sin_upward (0xc.d4967p-4)":
+double: 1
+idouble: 1
+Test "sin_upward (0xcp-4)":
+double: 1
+idouble: 1
+Test "sin_upward (0xe.ef3af1b5d8008p-4)":
+double: 1
+idouble: 1
+Test "sin_upward (0xe.ef3af1b5d8p-4)":
+double: 1
+idouble: 1
+Test "sin_upward (0xe.ef3afp-4)":
+double: 1
+idouble: 1
+Test "sin_upward (0xe.ef3bp-4)":
+double: 1
+idouble: 1
+
+# sincos
+Test "sincos (0x1.0c1522p+0) extra output 1":
+float: 1
+ifloat: 1
+Test "sincos (0x1p+120) extra output 2":
+float: 1
+ifloat: 1
+Test "sincos (0x8.60a92p-4) extra output 2":
+float: 1
+ifloat: 1
+Test "sincos (0x8p+124) extra output 2":
+float: 1
+ifloat: 1
+Test "sincos (0xc.d4967p-4) extra output 2":
+float: 1
+ifloat: 1
+
+# sinh_downward
+Test "sinh_downward (0x1.6p+4)":
+double: 1
+idouble: 1
+Test "sinh_downward (0x1.7p+4)":
+double: 1
+idouble: 1
+
+# sinh_towardzero
+Test "sinh_towardzero (0x1.6p+4)":
+double: 1
+idouble: 1
+Test "sinh_towardzero (0x1.7p+4)":
+double: 1
+idouble: 1
+
+# sinh_upward
+Test "sinh_upward (0x1.8p+4)":
+double: 1
+idouble: 1
+Test "sinh_upward (0x8p-32)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+# tan_downward
+Test "tan_downward (-0x2p+64)":
+double: 1
+idouble: 1
+Test "tan_downward (-0xc.908p-4)":
+float: 2
+ifloat: 2
+Test "tan_downward (-0xc.90cp-4)":
+float: 1
+ifloat: 1
+Test "tan_downward (-0xc.90ep-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_downward (-0xc.90f8p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_downward (-0xc.90fcp-4)":
+float: 1
+ifloat: 1
+Test "tan_downward (-0xc.90fd8p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_downward (-0xc.90fdap-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_downward (-0xc.90fdbp-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_downward (-0xc.90fdcp-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_downward (-0xc.90fdp-4)":
+float: 1
+ifloat: 1
+Test "tan_downward (-0xc.90fep-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_downward (-0xc.90fp-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_downward (-0xc.91p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_downward (-0xc.92p-4)":
+double: 1
+idouble: 1
+Test "tan_downward (-0xc.9p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_downward (-0xc.ap-4)":
+double: 1
+idouble: 1
+Test "tan_downward (0x1p+0)":
+double: 1
+idouble: 1
+Test "tan_downward (0x2.1e19e0c9bab24p+72)":
+double: 1
+idouble: 1
+Test "tan_downward (0x2p+0)":
+double: 1
+idouble: 1
+Test "tan_downward (0x3p+0)":
+double: 1
+idouble: 1
+Test "tan_downward (0x4p+0)":
+float: 1
+ifloat: 1
+Test "tan_downward (0x6p+0)":
+double: 1
+idouble: 1
+Test "tan_downward (0x7p+0)":
+double: 1
+idouble: 1
+Test "tan_downward (0x8p+1020)":
+double: 1
+idouble: 1
+Test "tan_downward (0xc.908p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_downward (0xc.90cp-4)":
+double: 1
+idouble: 1
+Test "tan_downward (0xc.90fcp-4)":
+double: 1
+idouble: 1
+Test "tan_downward (0xc.90fdaa22168c8p-4)":
+double: 1
+idouble: 1
+Test "tan_downward (0xc.90fdp-4)":
+double: 1
+idouble: 1
+Test "tan_downward (0xc.92p-4)":
+float: 1
+ifloat: 1
+Test "tan_downward (0xc.94p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_downward (0xc.98p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_downward (0xc.ap-4)":
+float: 1
+ifloat: 1
+Test "tan_downward (0xcp-4)":
+double: 1
+idouble: 1
+
+# tan_towardzero
+Test "tan_towardzero (-0x2p+64)":
+double: 1
+idouble: 1
+Test "tan_towardzero (-0xc.908p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_towardzero (-0xc.90cp-4)":
+double: 1
+idouble: 1
+Test "tan_towardzero (-0xc.90fcp-4)":
+double: 1
+idouble: 1
+Test "tan_towardzero (-0xc.90fdp-4)":
+double: 1
+idouble: 1
+Test "tan_towardzero (-0xc.94p-4)":
+double: 1
+idouble: 1
+Test "tan_towardzero (-0xc.98p-4)":
+double: 1
+idouble: 1
+Test "tan_towardzero (0x1p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_towardzero (0x2.1e19e4p+72)":
+double: 1
+idouble: 1
+Test "tan_towardzero (0x2.1e19ep+72)":
+double: 1
+idouble: 1
+Test "tan_towardzero (0x2p+64)":
+double: 1
+idouble: 1
+Test "tan_towardzero (0x5p+0)":
+double: 1
+idouble: 1
+Test "tan_towardzero (0x7p+0)":
+double: 1
+idouble: 1
+Test "tan_towardzero (0x8p+0)":
+double: 1
+idouble: 1
+Test "tan_towardzero (0x9p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_towardzero (0xc.908p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_towardzero (0xc.90cp-4)":
+double: 1
+idouble: 1
+Test "tan_towardzero (0xc.90fcp-4)":
+double: 1
+idouble: 1
+Test "tan_towardzero (0xc.90fdaa22168c8p-4)":
+double: 1
+idouble: 1
+Test "tan_towardzero (0xc.90fdp-4)":
+double: 1
+idouble: 1
+Test "tan_towardzero (0xc.94p-4)":
+double: 1
+idouble: 1
+Test "tan_towardzero (0xc.98p-4)":
+double: 1
+idouble: 1
+Test "tan_towardzero (0xcp-4)":
+double: 1
+idouble: 1
+Test "tan_towardzero (0xf.ffffffffffff8p+1020)":
+double: 1
+idouble: 1
+Test "tan_towardzero (0xf.fffffp+124)":
+double: 1
+idouble: 1
+
+# tan_upward
+Test "tan_upward (-0xc.908p-4)":
+double: 1
+idouble: 1
+Test "tan_upward (-0xc.90cp-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_upward (-0xc.90ep-4)":
+float: 1
+ifloat: 1
+Test "tan_upward (-0xc.90f8p-4)":
+float: 1
+ifloat: 1
+Test "tan_upward (-0xc.90fcp-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_upward (-0xc.90fd8p-4)":
+float: 1
+ifloat: 1
+Test "tan_upward (-0xc.90fdap-4)":
+float: 1
+ifloat: 1
+Test "tan_upward (-0xc.90fdbp-4)":
+float: 1
+ifloat: 1
+Test "tan_upward (-0xc.90fdcp-4)":
+float: 1
+ifloat: 1
+Test "tan_upward (-0xc.90fdp-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_upward (-0xc.90fep-4)":
+float: 1
+ifloat: 1
+Test "tan_upward (-0xc.90fp-4)":
+float: 1
+ifloat: 1
+Test "tan_upward (-0xc.91p-4)":
+float: 1
+ifloat: 1
+Test "tan_upward (-0xc.94p-4)":
+double: 1
+idouble: 1
+Test "tan_upward (-0xc.98p-4)":
+double: 1
+idouble: 1
+Test "tan_upward (-0xc.9p-4)":
+float: 1
+ifloat: 1
+Test "tan_upward (0x1p+0)":
+float: 1
+ifloat: 1
+Test "tan_upward (0x2.1e19e4p+72)":
+double: 1
+idouble: 1
+Test "tan_upward (0x2.1e19ep+72)":
+double: 1
+idouble: 1
+Test "tan_upward (0x2p+64)":
+double: 1
+idouble: 1
+Test "tan_upward (0x4p+0)":
+double: 1
+idouble: 1
+Test "tan_upward (0x5p+0)":
+double: 1
+idouble: 1
+Test "tan_upward (0x7p+0)":
+float: 1
+ifloat: 1
+Test "tan_upward (0x8p+0)":
+double: 1
+idouble: 1
+Test "tan_upward (0x9p+0)":
+double: 1
+idouble: 1
+Test "tan_upward (0xap+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_upward (0xc.908p-4)":
+float: 1
+ifloat: 1
+Test "tan_upward (0xc.90ep-4)":
+double: 1
+idouble: 1
+Test "tan_upward (0xc.90f8p-4)":
+double: 1
+idouble: 1
+Test "tan_upward (0xc.90fd8p-4)":
+double: 1
+idouble: 1
+Test "tan_upward (0xc.90fdap-4)":
+double: 1
+idouble: 1
+Test "tan_upward (0xc.90fdbp-4)":
+double: 1
+idouble: 1
+Test "tan_upward (0xc.90fdcp-4)":
+double: 1
+idouble: 1
+Test "tan_upward (0xc.90fep-4)":
+double: 1
+idouble: 1
+Test "tan_upward (0xc.90fp-4)":
+double: 1
+idouble: 1
+Test "tan_upward (0xc.91p-4)":
+double: 1
+idouble: 1
+Test "tan_upward (0xc.92p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_upward (0xc.94p-4)":
+float: 1
+ifloat: 1
+Test "tan_upward (0xc.98p-4)":
+float: 1
+ifloat: 1
+Test "tan_upward (0xc.9p-4)":
+double: 1
+idouble: 1
+Test "tan_upward (0xc.ap-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tan_upward (0xcp-4)":
+float: 1
+ifloat: 1
+Test "tan_upward (0xf.ffffffffffff8p+1020)":
+double: 1
+idouble: 1
+Test "tan_upward (0xf.fffffp+124)":
+double: 1
+idouble: 1
+
+# tgamma
+Test "tgamma (-0x1.000002p+0)":
+double: 2
+idouble: 2
+Test "tgamma (-0x1.3ffffep+4)":
+float: 2
+ifloat: 2
+Test "tgamma (-0x1.4000000000001p+4)":
+double: 1
+idouble: 1
+Test "tgamma (-0x1.400002p+4)":
+float: 1
+ifloat: 1
+Test "tgamma (-0x1.dffffep+4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (-0x1.e000000000001p+4)":
+double: 3
+idouble: 3
+Test "tgamma (-0x1.e00002p+4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (-0x2.0000000000002p+0)":
+double: 1
+idouble: 1
+Test "tgamma (-0x2.000004p+0)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "tgamma (-0x2.146544p+4)":
+float: 2
+ifloat: 2
+Test "tgamma (-0x2.7fffffffffffep+4)":
+double: 1
+idouble: 1
+Test "tgamma (-0x2.8000000000002p+4)":
+double: 1
+idouble: 1
+Test "tgamma (-0x2.800004p+4)":
+double: 2
+idouble: 2
+Test "tgamma (-0x2.8p+0)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "tgamma (-0x2.900004p+4)":
+double: 1
+idouble: 1
+Test "tgamma (-0x2.9ffffcp+4)":
+double: 1
+idouble: 1
+Test "tgamma (-0x2.fffffcp+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (-0x3.000004p+0)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "tgamma (-0x3.1ffffcp+4)":
+double: 1
+idouble: 1
+Test "tgamma (-0x3.1fffffffffffep+4)":
+double: 3
+idouble: 3
+Test "tgamma (-0x3.8p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (-0x3.fffffcp+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (-0x3.ffffffffffffep+0)":
+double: 2
+idouble: 2
+Test "tgamma (-0x4.000008p+0)":
+float: 1
+ifloat: 1
+Test "tgamma (-0x4.8p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (-0x4.fffff8p+0)":
+double: 1
+idouble: 1
+Test "tgamma (-0x4.ffffffffffffcp+0)":
+double: 1
+idouble: 1
+Test "tgamma (-0x5.000008p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (-0x5.8p+0)":
+double: 1
+idouble: 1
+Test "tgamma (-0x5.ffffffffffffcp+0)":
+double: 1
+idouble: 1
+Test "tgamma (-0x6.000008p+0)":
+float: 2
+ifloat: 2
+Test "tgamma (-0x6.3fffffffffffcp+4)":
+double: 2
+idouble: 2
+Test "tgamma (-0x6.4000000000004p+4)":
+double: 1
+idouble: 1
+Test "tgamma (-0x6.400008p+4)":
+double: 1
+idouble: 1
+Test "tgamma (-0x6.8p+0)":
+float: 1
+ifloat: 1
+Test "tgamma (-0x6.fffff8p+0)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "tgamma (-0x6.ffffffffffffcp+0)":
+double: 4
+idouble: 4
+Test "tgamma (-0x7.0000000000004p+0)":
+double: 3
+idouble: 3
+Test "tgamma (-0x7.000008p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (-0x7.8p+0)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "tgamma (-0x7.fffff8p+0)":
+double: 3
+float: 1
+idouble: 3
+ifloat: 1
+Test "tgamma (-0x7.ffffffffffffcp+0)":
+double: 3
+idouble: 3
+Test "tgamma (-0x8.00001p+0)":
+double: 2
+idouble: 2
+Test "tgamma (-0x8.8p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (-0x8p-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (-0x9.6000000000008p+4)":
+double: 1
+idouble: 1
+Test "tgamma (-0x9.60001p+4)":
+double: 1
+idouble: 1
+Test "tgamma (-0x9.8p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (-0x9.ffffffffffff8p+0)":
+double: 1
+idouble: 1
+Test "tgamma (-0x9.fffffp+0)":
+float: 1
+ifloat: 1
+Test "tgamma (-0xa.00001p+0)":
+double: 1
+idouble: 1
+Test "tgamma (-0xa.c0001p+4)":
+double: 1
+idouble: 1
+Test "tgamma (-0xf.ffffffffffff8p-4)":
+double: 1
+idouble: 1
+Test "tgamma (-0xf.fffffp-4)":
+float: 1
+ifloat: 1
+Test "tgamma (0x1.28p+4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (0x1.38p+4)":
+double: 2
+idouble: 2
+Test "tgamma (0x1.78p+4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (0x1.d8p+4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (0x1.e8p+4)":
+float: 1
+ifloat: 1
+Test "tgamma (0x1.fffffep+0)":
+float: 1
+ifloat: 1
+Test "tgamma (0x1.fffffffffffffp+0)":
+double: 1
+idouble: 1
+Test "tgamma (0x1p-24)":
+float: 1
+ifloat: 1
+Test "tgamma (0x2.18p+4)":
+float: 1
+ifloat: 1
+Test "tgamma (0x2.28p+4)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "tgamma (0x2.30a43cp+4)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "tgamma (0x2.8p+0)":
+float: 2
+ifloat: 2
+Test "tgamma (0x2.fffffcp+0)":
+float: 3
+ifloat: 3
+Test "tgamma (0x3.8p+0)":
+float: 2
+ifloat: 2
+Test "tgamma (0x3.fffffcp+0)":
+float: 1
+ifloat: 1
+Test "tgamma (0x3.ffffffffffffep+0)":
+double: 1
+idouble: 1
+Test "tgamma (0x3p+0)":
+float: 1
+ifloat: 1
+Test "tgamma (0x4.0000000000004p+0)":
+double: 1
+idouble: 1
+Test "tgamma (0x4.8p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (0x4.ffffffffffffcp+0)":
+double: 1
+idouble: 1
+Test "tgamma (0x4p+0)":
+float: 1
+ifloat: 1
+Test "tgamma (0x5.0000000000004p+0)":
+double: 1
+idouble: 1
+Test "tgamma (0x5.000008p+0)":
+float: 2
+ifloat: 2
+Test "tgamma (0x5.fffff8p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (0x6.0000000000004p+0)":
+double: 1
+idouble: 1
+Test "tgamma (0x6.000008p+0)":
+float: 2
+ifloat: 2
+Test "tgamma (0x6.8p+0)":
+float: 1
+ifloat: 1
+Test "tgamma (0x6.fffff8p+0)":
+double: 1
+idouble: 1
+Test "tgamma (0x6.ffffffffffffcp+0)":
+double: 4
+idouble: 4
+Test "tgamma (0x6p+0)":
+float: 1
+ifloat: 1
+Test "tgamma (0x7.0000000000004p+0)":
+double: 4
+idouble: 4
+Test "tgamma (0x7.000008p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (0x7.8p+0)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "tgamma (0x7.fffff8p+0)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "tgamma (0x7.ffffffffffffcp+0)":
+double: 2
+idouble: 2
+Test "tgamma (0x7p+0)":
+double: 1
+idouble: 1
+Test "tgamma (0x8.00001p+0)":
+double: 2
+idouble: 2
+Test "tgamma (0x8.8p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "tgamma (0x8p+0)":
+double: 1
+idouble: 1
+Test "tgamma (0x8p-4)":
+float: 1
+ifloat: 1
+Test "tgamma (0x8p-56)":
+double: 1
+idouble: 1
+Test "tgamma (0x9.8p+0)":
+double: 1
+idouble: 1
+Test "tgamma (0x9p+0)":
+double: 1
+idouble: 1
+Test "tgamma (0xa.b9fd72b0fb238p+4)":
+double: 1
+idouble: 1
+Test "tgamma (0xa.b9fd7p+4)":
+double: 2
+idouble: 2
+Test "tgamma (0xap+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+# y0
+Test "y0 (0x1.8p+0)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "y0 (0x1.ff00000000002p+840)":
+double: 1
+idouble: 1
+Test "y0 (0x1p+0)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "y0 (0x1p-20)":
+float: 1
+ifloat: 1
+Test "y0 (0x1p-40)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "y0 (0x1p-80)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "y0 (0x4.ffcp+72)":
+double: 1
+idouble: 1
+Test "y0 (0x4p-112)":
+double: 1
+idouble: 1
+Test "y0 (0x4p-12)":
+double: 1
+idouble: 1
+Test "y0 (0x4p-32)":
+float: 1
+ifloat: 1
+Test "y0 (0x4p-52)":
+float: 1
+ifloat: 1
+Test "y0 (0x4p-72)":
+double: 1
+idouble: 1
+Test "y0 (0x8p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "y0 (0xap+0)":
+float: 1
+ifloat: 1
+Test "y0 (0xf.ffffffffffff8p+1020)":
+double: 1
+idouble: 1
+Test "y0 (0xf.fffffp+124)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+# y1
+Test "y1 (0x1.8p+0)":
+float: 1
+ifloat: 1
+Test "y1 (0x2p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "y1 (0x2p-4)":
+double: 1
+idouble: 1
+Test "y1 (0x4p-12)":
+double: 1
+idouble: 1
+Test "y1 (0x8p+0)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "y1 (0x9.3f102p+96)":
+double: 1
+idouble: 1
+Test "y1 (0xap+0)":
+double: 3
+float: 1
+idouble: 3
+ifloat: 1
+Test "y1 (0xf.fffffp+124)":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+# yn
+Test "yn (-10, 0x1p+0)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "yn (0, 0x1.8p+0)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "yn (0, 0x1p+0)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "yn (0, 0x8p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "yn (0, 0xap+0)":
+float: 1
+ifloat: 1
+Test "yn (1, 0x1.8p+0)":
+float: 1
+ifloat: 1
+Test "yn (1, 0x2p+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "yn (1, 0x2p-4)":
+double: 1
+idouble: 1
+Test "yn (1, 0x8p+0)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "yn (1, 0xap+0)":
+double: 3
+float: 1
+idouble: 3
+ifloat: 1
+Test "yn (10, 0x1p+0)":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+Test "yn (10, 0x2p+0)":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+Test "yn (10, 0x2p-4)":
+double: 1
+idouble: 1
+Test "yn (10, 0xap+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "yn (10, 0xcp-4)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "yn (2, 0x8p+124)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "yn (2, 0xf.fffb1p+96)":
+double: 1
+idouble: 1
+Test "yn (2, 0xf.ffffffffffff8p+1020)":
+double: 1
+idouble: 1
+Test "yn (2, 0xf.fffffp+124)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "yn (3, 0x2p+0)":
+double: 1
+idouble: 1
+Test "yn (3, 0x2p-4)":
+double: 1
+idouble: 1
+Test "yn (3, 0xap+0)":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+Test "yn (3, 0xcp-4)":
+double: 1
+idouble: 1
+
+# Maximal error of functions:
+Function: "acos_downward":
+float: 1
+ifloat: 1
+
+Function: "acos_towardzero":
+float: 1
+ifloat: 1
+
+Function: "acos_upward":
+double: 1
+idouble: 1
+
+Function: "acosh":
+double: 1
+idouble: 1
+
+Function: "asin_downward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "asin_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "asin_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "asinh":
+double: 1
+float: 1
+ifloat: 1
+
+Function: "atan2":
+float: 1
+ifloat: 1
+
+Function: "atanh":
+float: 1
+ifloat: 1
+
+Function: Real part of "cacos":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Imaginary part of "cacos":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "cacosh":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Imaginary part of "cacosh":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "casin":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "casin":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "casinh":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Imaginary part of "casinh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "catan":
+float: 1
+ifloat: 1
+
+Function: Imaginary part of "catan":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "catanh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "catanh":
+float: 1
+ifloat: 1
+
+Function: "cbrt":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "ccos":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "ccos":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "ccosh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "ccosh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "cexp":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: Imaginary part of "cexp":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "clog":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "clog":
+float: 1
+ifloat: 1
+
+Function: Real part of "clog10":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "clog10":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "cos":
+float: 1
+ifloat: 1
+
+Function: "cos_downward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "cos_tonearest":
+float: 1
+ifloat: 1
+
+Function: "cos_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "cos_upward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "cosh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "cosh_downward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "cosh_tonearest":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "cosh_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "cosh_upward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: Real part of "cpow":
+double: 2
+float: 4
+idouble: 2
+ifloat: 4
+
+Function: Imaginary part of "cpow":
+float: 2
+ifloat: 2
+
+Function: Real part of "csin":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "csinh":
+float: 1
+ifloat: 1
+
+Function: Imaginary part of "csinh":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "csqrt":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "csqrt":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Real part of "ctan":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "ctan":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: Real part of "ctan_downward":
+double: 6
+float: 5
+idouble: 6
+ifloat: 5
+
+Function: Imaginary part of "ctan_downward":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: Real part of "ctan_tonearest":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: Imaginary part of "ctan_tonearest":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: Real part of "ctan_towardzero":
+double: 5
+float: 3
+idouble: 5
+ifloat: 3
+
+Function: Imaginary part of "ctan_towardzero":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "ctan_upward":
+double: 2
+float: 3
+idouble: 2
+ifloat: 3
+
+Function: Imaginary part of "ctan_upward":
+double: 2
+float: 3
+idouble: 2
+ifloat: 3
+
+Function: Real part of "ctanh":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: Imaginary part of "ctanh":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "ctanh_downward":
+double: 4
+float: 1
+idouble: 4
+ifloat: 1
+
+Function: Imaginary part of "ctanh_downward":
+double: 6
+float: 5
+idouble: 6
+ifloat: 5
+
+Function: Real part of "ctanh_tonearest":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: Imaginary part of "ctanh_tonearest":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Real part of "ctanh_towardzero":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: Imaginary part of "ctanh_towardzero":
+double: 5
+float: 3
+idouble: 5
+ifloat: 3
+
+Function: Real part of "ctanh_upward":
+double: 2
+float: 3
+idouble: 2
+ifloat: 3
+
+Function: Imaginary part of "ctanh_upward":
+double: 2
+float: 3
+idouble: 2
+ifloat: 3
+
+Function: "erf":
+double: 1
+idouble: 1
+
+Function: "erfc":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "exp10":
+double: 1
+idouble: 1
+
+Function: "exp10_downward":
+double: 1
+idouble: 1
+
+Function: "exp10_tonearest":
+double: 1
+idouble: 1
+
+Function: "exp10_towardzero":
+double: 1
+idouble: 1
+
+Function: "exp10_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "exp_downward":
+double: 1
+idouble: 1
+
+Function: "exp_towardzero":
+double: 1
+idouble: 1
+
+Function: "exp_upward":
+double: 1
+idouble: 1
+
+Function: "expm1":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "expm1_downward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "expm1_tonearest":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "expm1_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "expm1_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "gamma":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "hypot":
+double: 1
+idouble: 1
+
+Function: "j0":
+double: 2
+float: 2
+idouble: 2
+ifloat: 2
+
+Function: "j1":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "jn":
+double: 4
+float: 4
+idouble: 4
+ifloat: 4
+
+Function: "lgamma":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "log":
+float: 1
+ifloat: 1
+
+Function: "log10":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "log1p":
+float: 1
+ifloat: 1
+
+Function: "pow":
+float: 1
+ifloat: 1
+
+Function: "pow10":
+double: 1
+idouble: 1
+
+Function: "pow_downward":
+float: 1
+ifloat: 1
+
+Function: "pow_tonearest":
+float: 1
+ifloat: 1
+
+Function: "pow_towardzero":
+float: 1
+ifloat: 1
+
+Function: "pow_upward":
+float: 1
+ifloat: 1
+
+Function: "sin":
+float: 1
+ifloat: 1
+
+Function: "sin_downward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "sin_tonearest":
+float: 1
+ifloat: 1
+
+Function: "sin_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "sin_upward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "sincos":
+float: 1
+ifloat: 1
+
+Function: "sinh_downward":
+double: 1
+idouble: 1
+
+Function: "sinh_towardzero":
+double: 1
+idouble: 1
+
+Function: "sinh_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "tan_downward":
+double: 1
+float: 2
+idouble: 1
+ifloat: 2
+
+Function: "tan_towardzero":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "tan_upward":
+double: 1
+float: 1
+idouble: 1
+ifloat: 1
+
+Function: "tgamma":
+double: 4
+float: 3
+idouble: 4
+ifloat: 3
+
+Function: "y0":
+double: 2
+float: 1
+idouble: 2
+ifloat: 1
+
+Function: "y1":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+Function: "yn":
+double: 3
+float: 2
+idouble: 3
+ifloat: 2
+
+# end of automatic generation
diff --git a/sysdeps/arm/machine-gmon.h b/sysdeps/arm/machine-gmon.h
new file mode 100644
index 0000000000..43e980148d
--- /dev/null
+++ b/sysdeps/arm/machine-gmon.h
@@ -0,0 +1,33 @@
+/* Machine-dependent definitions for profiling support.  ARM EABI version.
+   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+/* GCC for the ARM cannot compile __builtin_return_address(N) for N != 0,
+   so we must use an assembly stub.  */
+
+/* We must not pollute the global namespace.  */
+#define mcount_internal __mcount_internal
+
+extern void mcount_internal (u_long frompc, u_long selfpc) internal_function;
+#define _MCOUNT_DECL(frompc, selfpc) \
+  void internal_function mcount_internal (u_long frompc, u_long selfpc)
+
+
+/* Define MCOUNT as empty since we have the implementation in another file.  */
+#define MCOUNT
diff --git a/sysdeps/arm/math-tests.h b/sysdeps/arm/math-tests.h
new file mode 100644
index 0000000000..e65f135e97
--- /dev/null
+++ b/sysdeps/arm/math-tests.h
@@ -0,0 +1,32 @@
+/* Configuration for math tests.  ARM version.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* On systems with VFP support, but where glibc is built for
+   soft-float, the libgcc functions used in libc and libm do not
+   support rounding modes, although fesetround succeeds, and do not
+   support exceptions.  */
+#ifdef __SOFTFP__
+# define ROUNDING_TESTS_float(MODE)	((MODE) == FE_TONEAREST)
+# define ROUNDING_TESTS_double(MODE)	((MODE) == FE_TONEAREST)
+# define ROUNDING_TESTS_long_double(MODE)	((MODE) == FE_TONEAREST)
+# define EXCEPTION_TESTS_float	0
+# define EXCEPTION_TESTS_double	0
+# define EXCEPTION_TESTS_long_double	0
+#endif
+
+#include_next <math-tests.h>
diff --git a/sysdeps/arm/memcpy.S b/sysdeps/arm/memcpy.S
new file mode 100644
index 0000000000..3e985dad68
--- /dev/null
+++ b/sysdeps/arm/memcpy.S
@@ -0,0 +1,344 @@
+/* Copyright (C) 2006-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   Contributed by MontaVista Software, Inc. (written by Nicolas Pitre)
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Thumb requires excessive IT insns here.  */
+#define NO_THUMB
+#include <sysdep.h>
+#include <arm-features.h>
+
+/*
+ * Data preload for architectures that support it (ARM V5TE and above)
+ */
+#if (!defined (__ARM_ARCH_2__) && !defined (__ARM_ARCH_3__) \
+     && !defined (__ARM_ARCH_3M__) && !defined (__ARM_ARCH_4__) \
+     && !defined (__ARM_ARCH_4T__) && !defined (__ARM_ARCH_5__) \
+     && !defined (__ARM_ARCH_5T__))
+#define PLD(code...)    code
+#else
+#define PLD(code...)
+#endif
+
+/*
+ * This can be used to enable code to cacheline align the source pointer.
+ * Experiments on tested architectures (StrongARM and XScale) didn't show
+ * this a worthwhile thing to do.  That might be different in the future.
+ */
+//#define CALGN(code...)        code
+#define CALGN(code...)
+
+/*
+ * Endian independent macros for shifting bytes within registers.
+ */
+#ifndef __ARMEB__
+#define PULL            lsr
+#define PUSH            lsl
+#else
+#define PULL            lsl
+#define PUSH            lsr
+#endif
+
+		.text
+		.syntax unified
+
+/* Prototype: void *memcpy(void *dest, const void *src, size_t n); */
+
+ENTRY(memcpy)
+
+		push	{r0, r4, lr}
+		cfi_adjust_cfa_offset (12)
+		cfi_rel_offset (r4, 4)
+		cfi_rel_offset (lr, 8)
+
+		cfi_remember_state
+
+		subs	r2, r2, #4
+		blt	8f
+		ands	ip, r0, #3
+	PLD(	sfi_pld	r1, #0			)
+		bne	9f
+		ands	ip, r1, #3
+		bne	10f
+
+1:		subs	r2, r2, #(28)
+		push	{r5 - r8}
+		cfi_adjust_cfa_offset (16)
+		cfi_rel_offset (r5, 0)
+		cfi_rel_offset (r6, 4)
+		cfi_rel_offset (r7, 8)
+		cfi_rel_offset (r8, 12)
+		blt	5f
+
+	CALGN(	ands	ip, r1, #31		)
+	CALGN(	rsb	r3, ip, #32		)
+	CALGN(	sbcsne	r4, r3, r2		)  @ C is always set here
+	CALGN(	bcs	2f			)
+	CALGN(	adr	r4, 6f			)
+	CALGN(	subs	r2, r2, r3		)  @ C gets set
+#ifndef ARM_ALWAYS_BX
+	CALGN(	add	pc, r4, ip, lsl	#(ARM_BX_ALIGN_LOG2 - 2))
+#else
+	CALGN(	add	r4, r4, ip, lsl	#(ARM_BX_ALIGN_LOG2 - 2))
+	CALGN(	bx	r4			)
+#endif
+
+	PLD(	sfi_pld	r1, #0			)
+2:	PLD(	subs	r2, r2, #96		)
+	PLD(	sfi_pld	r1, #28			)
+	PLD(	blt	4f			)
+	PLD(	sfi_pld	r1, #60			)
+	PLD(	sfi_pld	r1, #92			)
+
+3:	PLD(	sfi_pld	r1, #124		)
+4:		sfi_breg r1, \
+		ldmia	\B!, {r3, r4, r5, r6, r7, r8, ip, lr}
+		subs	r2, r2, #32
+		sfi_breg r0, \
+		stmia	\B!, {r3, r4, r5, r6, r7, r8, ip, lr}
+		bge	3b
+	PLD(	cmn	r2, #96			)
+	PLD(	bge	4b			)
+
+5:		ands	ip, r2, #28
+		rsb	ip, ip, #32
+#ifndef ARM_ALWAYS_BX
+		/* C is always clear here.  */
+		addne	pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+		b	7f
+#else
+		beq	7f
+		push	{r10}
+		cfi_adjust_cfa_offset (4)
+		cfi_rel_offset (r10, 0)
+		add	r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+		bx	r10
+#endif
+		.p2align ARM_BX_ALIGN_LOG2
+6:		nop
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r1, \
+		ldr	r3, [\B], #4
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r1, \
+		ldr	r4, [\B], #4
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r1, \
+		ldr	r5, [\B], #4
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r1, \
+		ldr	r6, [\B], #4
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r1, \
+		ldr	r7, [\B], #4
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r1, \
+		ldr	r8, [\B], #4
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r1, \
+		ldr	lr, [\B], #4
+
+#ifndef ARM_ALWAYS_BX
+		add	pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+		nop
+#else
+		add	r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+		bx	r10
+#endif
+		.p2align ARM_BX_ALIGN_LOG2
+		nop
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r0, \
+		str	r3, [\B], #4
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r0, \
+		str	r4, [\B], #4
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r0, \
+		str	r5, [\B], #4
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r0, \
+		str	r6, [\B], #4
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r0, \
+		str	r7, [\B], #4
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r0, \
+		str	r8, [\B], #4
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r0, \
+		str	lr, [\B], #4
+
+#ifdef ARM_ALWAYS_BX
+		pop	{r10}
+		cfi_adjust_cfa_offset (-4)
+		cfi_restore (r10)
+#endif
+
+	CALGN(	bcs	2b			)
+
+7:		pop	{r5 - r8}
+		cfi_adjust_cfa_offset (-16)
+		cfi_restore (r5)
+		cfi_restore (r6)
+		cfi_restore (r7)
+		cfi_restore (r8)
+
+8:		movs	r2, r2, lsl #31
+		sfi_breg r1, \
+		ldrbne	r3, [\B], #1
+		sfi_breg r1, \
+		ldrbcs	r4, [\B], #1
+		sfi_breg r1, \
+		ldrbcs	ip, [\B]
+		sfi_breg r0, \
+		strbne	r3, [\B], #1
+		sfi_breg r0, \
+		strbcs	r4, [\B], #1
+		sfi_breg r0, \
+		strbcs	ip, [\B]
+
+#if ((defined (__ARM_ARCH_4T__) && defined(__THUMB_INTERWORK__)) \
+     || defined (ARM_ALWAYS_BX))
+		pop	{r0, r4, lr}
+		cfi_adjust_cfa_offset (-12)
+		cfi_restore (r4)
+		cfi_restore (lr)
+		bx      lr
+#else
+		pop	{r0, r4, pc}
+#endif
+
+		cfi_restore_state
+
+9:		rsb	ip, ip, #4
+		cmp	ip, #2
+		sfi_breg r1, \
+		ldrbgt	r3, [\B], #1
+		sfi_breg r1, \
+		ldrbge	r4, [\B], #1
+		sfi_breg r1, \
+		ldrb	lr, [\B], #1
+		sfi_breg r0, \
+		strbgt	r3, [\B], #1
+		sfi_breg r0, \
+		strbge	r4, [\B], #1
+		subs	r2, r2, ip
+		sfi_breg r0, \
+		strb	lr, [\B], #1
+		blt	8b
+		ands	ip, r1, #3
+		beq	1b
+
+10:		bic	r1, r1, #3
+		cmp	ip, #2
+		sfi_breg r1, \
+		ldr	lr, [\B], #4
+		beq	17f
+		bgt	18f
+
+
+		.macro	forward_copy_shift pull push
+
+		subs	r2, r2, #28
+		blt	14f
+
+	CALGN(	ands	ip, r1, #31		)
+	CALGN(	rsb	ip, ip, #32		)
+	CALGN(	sbcsne	r4, ip, r2		)  @ C is always set here
+	CALGN(	subcc	r2, r2, ip		)
+	CALGN(	bcc	15f			)
+
+11:		push	{r5 - r8, r10}
+		cfi_adjust_cfa_offset (20)
+		cfi_rel_offset (r5, 0)
+		cfi_rel_offset (r6, 4)
+		cfi_rel_offset (r7, 8)
+		cfi_rel_offset (r8, 12)
+		cfi_rel_offset (r10, 16)
+
+	PLD(	sfi_pld	r1, #0			)
+	PLD(	subs	r2, r2, #96		)
+	PLD(	sfi_pld	r1, #28			)
+	PLD(	blt	13f			)
+	PLD(	sfi_pld	r1, #60			)
+	PLD(	sfi_pld	r1, #92			)
+
+12:	PLD(	sfi_pld	r1, #124		)
+13:		sfi_breg r1, \
+		ldmia	\B!, {r4, r5, r6, r7}
+		mov	r3, lr, PULL #\pull
+		subs	r2, r2, #32
+		sfi_breg r1, \
+		ldmia	\B!, {r8, r10, ip, lr}
+		orr	r3, r3, r4, PUSH #\push
+		mov	r4, r4, PULL #\pull
+		orr	r4, r4, r5, PUSH #\push
+		mov	r5, r5, PULL #\pull
+		orr	r5, r5, r6, PUSH #\push
+		mov	r6, r6, PULL #\pull
+		orr	r6, r6, r7, PUSH #\push
+		mov	r7, r7, PULL #\pull
+		orr	r7, r7, r8, PUSH #\push
+		mov	r8, r8, PULL #\pull
+		orr	r8, r8, r10, PUSH #\push
+		mov	r10, r10, PULL #\pull
+		orr	r10, r10, ip, PUSH #\push
+		mov	ip, ip, PULL #\pull
+		orr	ip, ip, lr, PUSH #\push
+		sfi_breg r0, \
+		stmia	\B!, {r3, r4, r5, r6, r7, r8, r10, ip}
+		bge	12b
+	PLD(	cmn	r2, #96			)
+	PLD(	bge	13b			)
+
+		pop	{r5 - r8, r10}
+		cfi_adjust_cfa_offset (-20)
+		cfi_restore (r5)
+		cfi_restore (r6)
+		cfi_restore (r7)
+		cfi_restore (r8)
+		cfi_restore (r10)
+
+14:		ands	ip, r2, #28
+		beq	16f
+
+15:		mov	r3, lr, PULL #\pull
+		sfi_breg r1, \
+		ldr	lr, [\B], #4
+		subs	ip, ip, #4
+		orr	r3, r3, lr, PUSH #\push
+		sfi_breg r0, \
+		str	r3, [\B], #4
+		bgt	15b
+	CALGN(	cmp	r2, #0			)
+	CALGN(	bge	11b			)
+
+16:		sub	r1, r1, #(\push / 8)
+		b	8b
+
+		.endm
+
+
+		forward_copy_shift	pull=8	push=24
+
+17:		forward_copy_shift	pull=16	push=16
+
+18:		forward_copy_shift	pull=24	push=8
+
+END(memcpy)
+libc_hidden_builtin_def (memcpy)
diff --git a/sysdeps/arm/memmove.S b/sysdeps/arm/memmove.S
new file mode 100644
index 0000000000..04aa7db7b4
--- /dev/null
+++ b/sysdeps/arm/memmove.S
@@ -0,0 +1,360 @@
+/* Copyright (C) 2006-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   Contributed by MontaVista Software, Inc. (written by Nicolas Pitre)
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Thumb requires excessive IT insns here.  */
+#define NO_THUMB
+#include <sysdep.h>
+#include <arm-features.h>
+
+/*
+ * Data preload for architectures that support it (ARM V5TE and above)
+ */
+#if (!defined (__ARM_ARCH_2__) && !defined (__ARM_ARCH_3__) \
+     && !defined (__ARM_ARCH_3M__) && !defined (__ARM_ARCH_4__) \
+     && !defined (__ARM_ARCH_4T__) && !defined (__ARM_ARCH_5__) \
+     && !defined (__ARM_ARCH_5T__))
+#define PLD(code...)    code
+#else
+#define PLD(code...)
+#endif
+
+/*
+ * This can be used to enable code to cacheline align the source pointer.
+ * Experiments on tested architectures (StrongARM and XScale) didn't show
+ * this a worthwhile thing to do.  That might be different in the future.
+ */
+//#define CALGN(code...)        code
+#define CALGN(code...)
+
+/*
+ * Endian independent macros for shifting bytes within registers.
+ */
+#ifndef __ARMEB__
+#define PULL            lsr
+#define PUSH            lsl
+#else
+#define PULL            lsl
+#define PUSH            lsr
+#endif
+
+		.text
+		.syntax unified
+
+/*
+ * Prototype: void *memmove(void *dest, const void *src, size_t n);
+ *
+ * Note:
+ *
+ * If the memory regions don't overlap, we simply branch to memcpy which is
+ * normally a bit faster. Otherwise the copy is done going downwards.
+ */
+
+ENTRY(memmove)
+
+		subs	ip, r0, r1
+		cmphi	r2, ip
+#ifdef NOT_IN_libc
+		bls	memcpy
+#else
+		bls	HIDDEN_JUMPTARGET(memcpy)
+#endif
+
+		push	{r0, r4, lr}
+		cfi_adjust_cfa_offset (12)
+		cfi_rel_offset (r4, 4)
+		cfi_rel_offset (lr, 8)
+
+		cfi_remember_state
+
+		add	r1, r1, r2
+		add	r0, r0, r2
+		subs	r2, r2, #4
+		blt	8f
+		ands	ip, r0, #3
+	PLD(	sfi_pld	r1, #-4			)
+		bne	9f
+		ands	ip, r1, #3
+		bne	10f
+
+1:		subs	r2, r2, #(28)
+		push	{r5 - r8}
+		cfi_adjust_cfa_offset (16)
+		cfi_rel_offset (r5, 0)
+		cfi_rel_offset (r6, 4)
+		cfi_rel_offset (r7, 8)
+		cfi_rel_offset (r8, 12)
+		blt	5f
+
+	CALGN(	ands	ip, r1, #31		)
+	CALGN(	sbcsne	r4, ip, r2		)  @ C is always set here
+	CALGN(	bcs	2f			)
+	CALGN(	adr	r4, 6f			)
+	CALGN(	subs	r2, r2, ip		)  @ C is set here
+#ifndef ARM_ALWAYS_BX
+	CALGN(	add	pc, r4, ip, lsl	#(ARM_BX_ALIGN_LOG2 - 2))
+#else
+	CALGN(	add	r4, r4, ip, lsl	#(ARM_BX_ALIGN_LOG2 - 2))
+	CALGN(	bx	r4			)
+#endif
+
+	PLD(	sfi_pld	r1, #-4			)
+2:	PLD(	subs	r2, r2, #96		)
+	PLD(	sfi_pld	r1, #-32		)
+	PLD(	blt	4f			)
+	PLD(	sfi_pld	r1, #-64		)
+	PLD(	sfi_pld	r1, #-96		)
+
+3:	PLD(	sfi_pld	r1, #-128		)
+4:		sfi_breg r1, \
+		ldmdb	\B!, {r3, r4, r5, r6, r7, r8, ip, lr}
+		subs	r2, r2, #32
+		sfi_breg r0, \
+		stmdb	\B!, {r3, r4, r5, r6, r7, r8, ip, lr}
+		bge	3b
+	PLD(	cmn	r2, #96			)
+	PLD(	bge	4b			)
+
+5:		ands	ip, r2, #28
+		rsb	ip, ip, #32
+#ifndef ARM_ALWAYS_BX
+		/* C is always clear here.  */
+		addne	pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+		b	7f
+#else
+		beq	7f
+		push	{r10}
+		cfi_adjust_cfa_offset (4)
+		cfi_rel_offset (r10, 0)
+		add	r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+		bx	r10
+#endif
+		.p2align ARM_BX_ALIGN_LOG2
+6:		nop
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r1, \
+		ldr	r3, [\B, #-4]!
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r1, \
+		ldr	r4, [\B, #-4]!
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r1, \
+		ldr	r5, [\B, #-4]!
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r1, \
+		ldr	r6, [\B, #-4]!
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r1, \
+		ldr	r7, [\B, #-4]!
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r1, \
+		ldr	r8, [\B, #-4]!
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r1, \
+		ldr	lr, [\B, #-4]!
+
+#ifndef ARM_ALWAYS_BX
+		add	pc, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+		nop
+#else
+		add	r10, pc, ip, lsl #(ARM_BX_ALIGN_LOG2 - 2)
+		bx	r10
+#endif
+		.p2align ARM_BX_ALIGN_LOG2
+		nop
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r0, \
+		str	r3, [\B, #-4]!
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r0, \
+		str	r4, [\B, #-4]!
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r0, \
+		str	r5, [\B, #-4]!
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r0, \
+		str	r6, [\B, #-4]!
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r0, \
+		str	r7, [\B, #-4]!
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r0, \
+		str	r8, [\B, #-4]!
+		.p2align ARM_BX_ALIGN_LOG2
+		sfi_breg r0, \
+		str	lr, [\B, #-4]!
+
+#ifdef ARM_ALWAYS_BX
+		pop	{r10}
+		cfi_adjust_cfa_offset (-4)
+		cfi_restore (r10)
+#endif
+
+	CALGN(	bcs	2b			)
+
+7:		pop	{r5 - r8}
+		cfi_adjust_cfa_offset (-16)
+		cfi_restore (r5)
+		cfi_restore (r6)
+		cfi_restore (r7)
+		cfi_restore (r8)
+
+8:		movs	r2, r2, lsl #31
+		sfi_breg r1, \
+		ldrbne	r3, [\B, #-1]!
+		sfi_breg r1, \
+		ldrbcs	r4, [\B, #-1]!
+		sfi_breg r1, \
+		ldrbcs	ip, [\B, #-1]
+		sfi_breg r0, \
+		strbne	r3, [\B, #-1]!
+		sfi_breg r0, \
+		strbcs	r4, [\B, #-1]!
+		sfi_breg r0, \
+		strbcs	ip, [\B, #-1]
+
+#if ((defined (__ARM_ARCH_4T__) && defined (__THUMB_INTERWORK__)) \
+     || defined (ARM_ALWAYS_BX))
+		pop	{r0, r4, lr}
+		cfi_adjust_cfa_offset (-12)
+		cfi_restore (r4)
+		cfi_restore (lr)
+		bx      lr
+#else
+		pop	{r0, r4, pc}
+#endif
+
+		cfi_restore_state
+
+9:		cmp	ip, #2
+		sfi_breg r1, \
+		ldrbgt	r3, [\B, #-1]!
+		sfi_breg r1, \
+		ldrbge	r4, [\B, #-1]!
+		sfi_breg r1, \
+		ldrb	lr, [\B, #-1]!
+		sfi_breg r0, \
+		strbgt	r3, [\B, #-1]!
+		sfi_breg r0, \
+		strbge	r4, [\B, #-1]!
+		subs	r2, r2, ip
+		sfi_breg r0, \
+		strb	lr, [\B, #-1]!
+		blt	8b
+		ands	ip, r1, #3
+		beq	1b
+
+10:		bic	r1, r1, #3
+		cmp	ip, #2
+		sfi_breg r1, \
+		ldr	r3, [\B, #0]
+		beq	17f
+		blt	18f
+
+
+		.macro	backward_copy_shift push pull
+
+		subs	r2, r2, #28
+		blt	14f
+
+	CALGN(	ands	ip, r1, #31		)
+	CALGN(	rsb	ip, ip, #32		)
+	CALGN(	sbcsne	r4, ip, r2		)  @ C is always set here
+	CALGN(	subcc	r2, r2, ip		)
+	CALGN(	bcc	15f			)
+
+11:		push	{r5 - r8, r10}
+		cfi_adjust_cfa_offset (20)
+		cfi_rel_offset (r5, 0)
+		cfi_rel_offset (r6, 4)
+		cfi_rel_offset (r7, 8)
+		cfi_rel_offset (r8, 12)
+		cfi_rel_offset (r10, 16)
+
+	PLD(	sfi_pld	r1, #-4			)
+	PLD(	subs	r2, r2, #96		)
+	PLD(	sfi_pld	r1, #-32		)
+	PLD(	blt	13f			)
+	PLD(	sfi_pld	r1, #-64		)
+	PLD(	sfi_pld	r1, #-96		)
+
+12:	PLD(	sfi_pld	r1, #-128		)
+13:		sfi_breg r1, \
+		ldmdb   \B!, {r7, r8, r10, ip}
+		mov     lr, r3, PUSH #\push
+		subs    r2, r2, #32
+		sfi_breg r1, \
+		ldmdb   \B!, {r3, r4, r5, r6}
+		orr     lr, lr, ip, PULL #\pull
+		mov     ip, ip, PUSH #\push
+		orr     ip, ip, r10, PULL #\pull
+		mov     r10, r10, PUSH #\push
+		orr     r10, r10, r8, PULL #\pull
+		mov     r8, r8, PUSH #\push
+		orr     r8, r8, r7, PULL #\pull
+		mov     r7, r7, PUSH #\push
+		orr     r7, r7, r6, PULL #\pull
+		mov     r6, r6, PUSH #\push
+		orr     r6, r6, r5, PULL #\pull
+		mov     r5, r5, PUSH #\push
+		orr     r5, r5, r4, PULL #\pull
+		mov     r4, r4, PUSH #\push
+		orr     r4, r4, r3, PULL #\pull
+		sfi_breg r0, \
+		stmdb   \B!, {r4 - r8, r10, ip, lr}
+		bge	12b
+	PLD(	cmn	r2, #96			)
+	PLD(	bge	13b			)
+
+		pop	{r5 - r8, r10}
+		cfi_adjust_cfa_offset (-20)
+		cfi_restore (r5)
+		cfi_restore (r6)
+		cfi_restore (r7)
+		cfi_restore (r8)
+		cfi_restore (r10)
+
+14:		ands	ip, r2, #28
+		beq	16f
+
+15:		mov     lr, r3, PUSH #\push
+		sfi_breg r1, \
+		ldr	r3, [\B, #-4]!
+		subs	ip, ip, #4
+		orr	lr, lr, r3, PULL #\pull
+		sfi_breg r0, \
+		str	lr, [\B, #-4]!
+		bgt	15b
+	CALGN(	cmp	r2, #0			)
+	CALGN(	bge	11b			)
+
+16:		add	r1, r1, #(\pull / 8)
+		b	8b
+
+		.endm
+
+
+		backward_copy_shift	push=8	pull=24
+
+17:		backward_copy_shift	push=16	pull=16
+
+18:		backward_copy_shift	push=24	pull=8
+
+
+END(memmove)
+libc_hidden_builtin_def (memmove)
diff --git a/sysdeps/arm/memset.S b/sysdeps/arm/memset.S
new file mode 100644
index 0000000000..cf04db4634
--- /dev/null
+++ b/sysdeps/arm/memset.S
@@ -0,0 +1,78 @@
+/* Copyright (C) 1998-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Philip Blundell <philb@gnu.org>
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Thumb requires excessive IT insns here.  */
+#define NO_THUMB
+#include <sysdep.h>
+
+	.text
+	.syntax unified
+
+/* void *memset (dstpp, c, len) */
+
+ENTRY(memset)
+	mov	r3, r0
+	cmp	r2, #8
+	bcc	2f		@ less than 8 bytes to move
+
+1:
+	tst	r3, #3		@ aligned yet?
+	sfi_breg r3, \
+	strbne	r1, [\B], #1
+	subne	r2, r2, #1
+	bne	1b
+
+	and	r1, r1, #255	@ clear any sign bits
+	orr	r1, r1, r1, lsl $8
+	orr	r1, r1, r1, lsl $16
+	mov	ip, r1
+
+1:
+	subs	r2, r2, #8
+	sfi_breg r3, \
+	stmiacs	\B!, {r1, ip}	@ store up to 32 bytes per loop iteration
+	subscs	r2, r2, #8
+	sfi_breg r3, \
+	stmiacs	\B!, {r1, ip}
+	subscs	r2, r2, #8
+	sfi_breg r3, \
+	stmiacs	\B!, {r1, ip}
+	subscs	r2, r2, #8
+	sfi_breg r3, \
+	stmiacs	\B!, {r1, ip}
+	bcs	1b
+
+	and	r2, r2, #7
+2:
+	subs	r2, r2, #1	@ store up to 4 bytes per loop iteration
+	sfi_breg r3, \
+	strbcs	r1, [\B], #1
+	subscs	r2, r2, #1
+	sfi_breg r3, \
+	strbcs	r1, [\B], #1
+	subscs	r2, r2, #1
+	sfi_breg r3, \
+	strbcs	r1, [\B], #1
+	subscs	r2, r2, #1
+	sfi_breg r3, \
+	strbcs	r1, [\B], #1
+	bcs	2b
+
+	DO_RET(lr)
+END(memset)
+libc_hidden_builtin_def (memset)
diff --git a/sysdeps/arm/memusage.h b/sysdeps/arm/memusage.h
new file mode 100644
index 0000000000..51f276c200
--- /dev/null
+++ b/sysdeps/arm/memusage.h
@@ -0,0 +1,20 @@
+/* Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define GETSP() ({ register uintptr_t stack_ptr asm ("sp"); stack_ptr; })
+
+#include <sysdeps/generic/memusage.h>
diff --git a/sysdeps/arm/nptl/Makefile b/sysdeps/arm/nptl/Makefile
new file mode 100644
index 0000000000..143850e6c8
--- /dev/null
+++ b/sysdeps/arm/nptl/Makefile
@@ -0,0 +1,20 @@
+# Copyright (C) 2005-2014 Free Software Foundation, Inc.
+# This file is part of the GNU C Library.
+#
+# The GNU C Library is free software; you can redistribute it and/or
+# modify it under the terms of the GNU Lesser General Public
+# License as published by the Free Software Foundation; either
+# version 2.1 of the License, or (at your option) any later version.
+#
+# The GNU C Library is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public
+# License along with the GNU C Library.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+ifeq ($(subdir),csu)
+gen-as-const-headers += tcb-offsets.sym
+endif
diff --git a/sysdeps/arm/nptl/pthread_spin_lock.c b/sysdeps/arm/nptl/pthread_spin_lock.c
new file mode 100644
index 0000000000..7105c73594
--- /dev/null
+++ b/sysdeps/arm/nptl/pthread_spin_lock.c
@@ -0,0 +1,23 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define SPIN_LOCK_READS_BETWEEN_CMPXCHG 1000
+
+/* We can't use the normal "#include <nptl/pthread_spin_lock.c>" because
+   it will resolve to this very file.  Using "sysdeps/.." as reference to the
+   top level directory does the job.  */
+#include <sysdeps/../nptl/pthread_spin_lock.c>
diff --git a/sysdeps/arm/nptl/pthreaddef.h b/sysdeps/arm/nptl/pthreaddef.h
new file mode 100644
index 0000000000..2488af9828
--- /dev/null
+++ b/sysdeps/arm/nptl/pthreaddef.h
@@ -0,0 +1,46 @@
+/* Copyright (C) 2002-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Default stack size.  */
+#define ARCH_STACK_DEFAULT_SIZE	(2 * 1024 * 1024)
+
+/* Required stack pointer alignment at beginning.  SSE requires 16
+   bytes.  */
+#define STACK_ALIGN		16
+
+/* Minimal stack size after allocating thread descriptor and guard size.  */
+#define MINIMAL_REST_STACK	2048
+
+/* Alignment requirement for TCB.  */
+#define TCB_ALIGNMENT		16
+
+
+/* Location of current stack frame.
+
+   __builtin_frame_address (0) returns the value of the hard frame
+   pointer, which will point at the location of the saved PC on the
+   stack.  Below this in memory is the remainder of the linkage info,
+   occupying 12 bytes.  Therefore in order to address from
+   CURRENT_STACK_FRAME using "struct layout", we need to have the macro
+   return the hard FP minus 12.  Of course, this makes no sense
+   without the obsolete APCS stack layout...  */
+#define CURRENT_STACK_FRAME	(__builtin_frame_address (0) - 12)
+
+
+/* XXX Until we have a better place keep the definitions here.  */
+#define __exit_thread_inline(val) \
+  INLINE_SYSCALL (exit, 1, (val))
diff --git a/sysdeps/arm/nptl/tcb-offsets.sym b/sysdeps/arm/nptl/tcb-offsets.sym
new file mode 100644
index 0000000000..92cc441d3d
--- /dev/null
+++ b/sysdeps/arm/nptl/tcb-offsets.sym
@@ -0,0 +1,11 @@
+#include <sysdep.h>
+#include <tls.h>
+
+--
+
+-- Derive offsets relative to the thread register.
+#define thread_offsetof(mem)	(long)(offsetof(struct pthread, mem) - sizeof(struct pthread))
+
+MULTIPLE_THREADS_OFFSET		thread_offsetof (header.multiple_threads)
+PID_OFFSET			thread_offsetof (pid)
+TID_OFFSET			thread_offsetof (tid)
diff --git a/sysdeps/arm/nptl/tls.h b/sysdeps/arm/nptl/tls.h
new file mode 100644
index 0000000000..8cc0a62173
--- /dev/null
+++ b/sysdeps/arm/nptl/tls.h
@@ -0,0 +1,147 @@
+/* Definition for thread-local data handling.  NPTL/ARM version.
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _TLS_H
+#define _TLS_H	1
+
+#include <dl-sysdep.h>
+
+#ifndef __ASSEMBLER__
+# include <stdbool.h>
+# include <stddef.h>
+# include <stdint.h>
+
+/* Type for the dtv.  */
+typedef union dtv
+{
+  size_t counter;
+  struct
+  {
+    void *val;
+    bool is_static;
+  } pointer;
+} dtv_t;
+
+#else /* __ASSEMBLER__ */
+# include <tcb-offsets.h>
+#endif /* __ASSEMBLER__ */
+
+
+#ifndef __ASSEMBLER__
+
+/* Get system call information.  */
+# include <sysdep.h>
+
+/* The TP points to the start of the thread blocks.  */
+# define TLS_DTV_AT_TP	1
+
+/* Get the thread descriptor definition.  */
+# include <nptl/descr.h>
+
+typedef struct
+{
+  dtv_t *dtv;
+  void *private;
+} tcbhead_t;
+
+/* This is the size of the initial TCB.  */
+# define TLS_INIT_TCB_SIZE	sizeof (tcbhead_t)
+
+/* Alignment requirements for the initial TCB.  */
+# define TLS_INIT_TCB_ALIGN	16
+
+/* This is the size of the TCB.  */
+# define TLS_TCB_SIZE		sizeof (tcbhead_t)
+
+/* This is the size we need before TCB.  */
+# define TLS_PRE_TCB_SIZE	sizeof (struct pthread)
+
+/* Alignment requirements for the TCB.  */
+# define TLS_TCB_ALIGN		16
+
+/* Install the dtv pointer.  The pointer passed is to the element with
+   index -1 which contain the length.  */
+# define INSTALL_DTV(tcbp, dtvp) \
+  (((tcbhead_t *) (tcbp))->dtv = (dtvp) + 1)
+
+/* Install new dtv for current thread.  */
+# define INSTALL_NEW_DTV(dtv) \
+  (THREAD_DTV() = (dtv))
+
+/* Return dtv of given thread descriptor.  */
+# define GET_DTV(tcbp) \
+  (((tcbhead_t *) (tcbp))->dtv)
+
+/* Code to initially initialize the thread pointer.  This might need
+   special attention since 'errno' is not yet available and if the
+   operation can cause a failure 'errno' must not be touched.  */
+# define TLS_INIT_TP(tcbp, secondcall) \
+  ({ INTERNAL_SYSCALL_DECL (err);					\
+     long result_var;							\
+     result_var = INTERNAL_SYSCALL_ARM (set_tls, err, 1, (tcbp));	\
+     INTERNAL_SYSCALL_ERROR_P (result_var, err)				\
+       ? "unknown error" : NULL; })
+
+/* Return the address of the dtv for the current thread.  */
+# define THREAD_DTV() \
+  (((tcbhead_t *) __builtin_thread_pointer ())->dtv)
+
+/* Return the thread descriptor for the current thread.  */
+# define THREAD_SELF \
+ ((struct pthread *)__builtin_thread_pointer () - 1)
+
+/* Magic for libthread_db to know how to do THREAD_SELF.  */
+# define DB_THREAD_SELF \
+  CONST_THREAD_AREA (32, sizeof (struct pthread))
+
+/* Access to data in the thread descriptor is easy.  */
+#define THREAD_GETMEM(descr, member) \
+  descr->member
+#define THREAD_GETMEM_NC(descr, member, idx) \
+  descr->member[idx]
+#define THREAD_SETMEM(descr, member, value) \
+  descr->member = (value)
+#define THREAD_SETMEM_NC(descr, member, idx, value) \
+  descr->member[idx] = (value)
+
+/* Get and set the global scope generation counter in struct pthread.  */
+#define THREAD_GSCOPE_FLAG_UNUSED 0
+#define THREAD_GSCOPE_FLAG_USED   1
+#define THREAD_GSCOPE_FLAG_WAIT   2
+#define THREAD_GSCOPE_RESET_FLAG() \
+  do									     \
+    { int __res								     \
+	= atomic_exchange_rel (&THREAD_SELF->header.gscope_flag,	     \
+			       THREAD_GSCOPE_FLAG_UNUSED);		     \
+      if (__res == THREAD_GSCOPE_FLAG_WAIT)				     \
+	lll_futex_wake (&THREAD_SELF->header.gscope_flag, 1, LLL_PRIVATE);   \
+    }									     \
+  while (0)
+#define THREAD_GSCOPE_SET_FLAG() \
+  do									     \
+    {									     \
+      THREAD_SELF->header.gscope_flag = THREAD_GSCOPE_FLAG_USED;	     \
+      atomic_write_barrier ();						     \
+    }									     \
+  while (0)
+#define THREAD_GSCOPE_WAIT() \
+  GL(dl_wait_lookup_done) ()
+
+#endif /* __ASSEMBLER__ */
+
+#endif	/* tls.h */
diff --git a/sysdeps/arm/preconfigure b/sysdeps/arm/preconfigure
new file mode 100644
index 0000000000..b3124edae2
--- /dev/null
+++ b/sysdeps/arm/preconfigure
@@ -0,0 +1,63 @@
+# This file is generated from configure.ac by Autoconf.  DO NOT EDIT!
+ # Local preconfigure fragment for sysdeps/arm
+
+case "$machine" in
+arm*)
+  case $config_os in
+  linux-gnueabi*)
+    # If the compiler enables unwind tables by default, this causes
+    # problems with undefined symbols in -nostdlib link tests.  To
+    # avoid this, add -fno-unwind-tables here and remove it in
+    # sysdeps/unix/sysv/linux/arm/configure.ac after those tests have
+    # been run.
+    if test "${CFLAGS+set}" != "set"; then
+      CFLAGS="-g -O2"
+    fi
+    CFLAGS="$CFLAGS -fno-unwind-tables"
+    ;;
+  linux*)
+    as_fn_error $? "Old ABI no longer supported" "$LINENO" 5
+    ;;
+  esac
+
+  base_machine=arm
+  # Lets ask the compiler which ARM family we've got
+  # Unfortunately it doesn't define any flags for implementations
+  # that you might pass to -mcpu or -mtune
+  # Note if you add patterns here you must ensure that
+  # an appropriate directory exists in sysdeps/arm
+  archcppflag=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null |
+    sed -n 's/^#define \(__ARM_ARCH_[0-9].*__\) .*$/\1/p'`
+
+  case "x$archcppflag" in
+  x__ARM_ARCH_89*__)
+    machine=armv7
+    { $as_echo "$as_me:${as_lineno-$LINENO}: Found compiler is configured for something newer than v7 - using v7" >&5
+$as_echo "$as_me: Found compiler is configured for something newer than v7 - using v7" >&6;}
+    ;;
+
+  x__ARM_ARCH_7A__)
+    machine=armv7
+    { $as_echo "$as_me:${as_lineno-$LINENO}: Found compiler is configured for $machine" >&5
+$as_echo "$as_me: Found compiler is configured for $machine" >&6;}
+    ;;
+
+  x__ARM_ARCH_6T2__)
+    machine=armv6t2
+    { $as_echo "$as_me:${as_lineno-$LINENO}: Found compiler is configured for $machine" >&5
+$as_echo "$as_me: Found compiler is configured for $machine" >&6;}
+    ;;
+  x__ARM_ARCH_6*__)
+    machine=armv6
+    { $as_echo "$as_me:${as_lineno-$LINENO}: Found compiler is configured for $machine" >&5
+$as_echo "$as_me: Found compiler is configured for $machine" >&6;}
+    ;;
+  *)
+    machine=arm
+    { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: arm/preconfigure: Did not find ARM architecture type; using default" >&5
+$as_echo "$as_me: WARNING: arm/preconfigure: Did not find ARM architecture type; using default" >&2;}
+    ;;
+  esac
+
+  machine=arm/$machine
+esac
diff --git a/sysdeps/arm/preconfigure.ac b/sysdeps/arm/preconfigure.ac
new file mode 100644
index 0000000000..39c86218aa
--- /dev/null
+++ b/sysdeps/arm/preconfigure.ac
@@ -0,0 +1,58 @@
+GLIBC_PROVIDES dnl See aclocal.m4 in the top level source directory.
+# Local preconfigure fragment for sysdeps/arm
+
+case "$machine" in
+arm*)
+  case $config_os in
+  linux-gnueabi*)
+    # If the compiler enables unwind tables by default, this causes
+    # problems with undefined symbols in -nostdlib link tests.  To
+    # avoid this, add -fno-unwind-tables here and remove it in
+    # sysdeps/unix/sysv/linux/arm/configure.ac after those tests have
+    # been run.
+    if test "${CFLAGS+set}" != "set"; then
+      CFLAGS="-g -O2"
+    fi
+    CFLAGS="$CFLAGS -fno-unwind-tables"
+    ;;
+  linux*)
+    AC_MSG_ERROR([Old ABI no longer supported])
+    ;;
+  esac
+
+  base_machine=arm
+  # Lets ask the compiler which ARM family we've got
+  # Unfortunately it doesn't define any flags for implementations
+  # that you might pass to -mcpu or -mtune
+  # Note if you add patterns here you must ensure that
+  # an appropriate directory exists in sysdeps/arm
+  archcppflag=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null |
+    sed -n 's/^#define \(__ARM_ARCH_[0-9].*__\) .*$/\1/p'`
+
+  case "x$archcppflag" in
+  x__ARM_ARCH_[89]*__)
+    machine=armv7
+    AC_MSG_NOTICE([Found compiler is configured for something newer than v7 - using v7])
+    ;;
+
+  x__ARM_ARCH_7A__)
+    machine=armv7
+    AC_MSG_NOTICE([Found compiler is configured for $machine])
+    ;;
+
+  x__ARM_ARCH_6T2__)
+    machine=armv6t2
+    AC_MSG_NOTICE([Found compiler is configured for $machine])
+    ;;
+  x__ARM_ARCH_6*__)
+    machine=armv6
+    AC_MSG_NOTICE([Found compiler is configured for $machine])
+    ;;
+  *)
+    machine=arm
+    AC_MSG_WARN([arm/preconfigure: Did not find ARM architecture type; using default])
+    ;;
+  esac
+
+  machine=arm/$machine
+esac
diff --git a/sysdeps/arm/rtld-global-offsets.sym b/sysdeps/arm/rtld-global-offsets.sym
new file mode 100644
index 0000000000..ff4e97f2a6
--- /dev/null
+++ b/sysdeps/arm/rtld-global-offsets.sym
@@ -0,0 +1,7 @@
+#define SHARED 1
+
+#include <ldsodefs.h>
+
+#define rtld_global_ro_offsetof(mem) offsetof (struct rtld_global_ro, mem)
+
+RTLD_GLOBAL_RO_DL_HWCAP_OFFSET	rtld_global_ro_offsetof (_dl_hwcap)
diff --git a/sysdeps/arm/s_fma.c b/sysdeps/arm/s_fma.c
new file mode 100644
index 0000000000..dc4e27bfc1
--- /dev/null
+++ b/sysdeps/arm/s_fma.c
@@ -0,0 +1,5 @@
+#ifdef __SOFTFP__
+# include <soft-fp/fmadf4.c>
+#else
+# include <sysdeps/ieee754/dbl-64/s_fma.c>
+#endif
diff --git a/sysdeps/arm/s_fmaf.c b/sysdeps/arm/s_fmaf.c
new file mode 100644
index 0000000000..550d8b85d3
--- /dev/null
+++ b/sysdeps/arm/s_fmaf.c
@@ -0,0 +1,5 @@
+#ifdef __SOFTFP__
+# include <soft-fp/fmasf4.c>
+#else
+# include <sysdeps/ieee754/dbl-64/s_fmaf.c>
+#endif
diff --git a/sysdeps/arm/setfpucw.c b/sysdeps/arm/setfpucw.c
new file mode 100644
index 0000000000..92333eb364
--- /dev/null
+++ b/sysdeps/arm/setfpucw.c
@@ -0,0 +1,43 @@
+/* Set the FPU control word.
+   Copyright (C) 1996-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <math.h>
+#include <fpu_control.h>
+#include <arm-features.h>
+
+
+void
+__setfpucw (fpu_control_t set)
+{
+  if (ARM_HAVE_VFP)
+    {
+      fpu_control_t cw;
+
+      /* Fetch the current control word.  */
+      _FPU_GETCW (cw);
+
+      /* Preserve the reserved bits, and set the rest as the user
+	 specified (or the default, if the user gave zero).  */
+      cw &= _FPU_RESERVED;
+      cw |= set & ~_FPU_RESERVED;
+
+      _FPU_SETCW (cw);
+    }
+
+  /* Do nothing if a VFP unit isn't present.  */
+}
diff --git a/sysdeps/arm/setjmp.S b/sysdeps/arm/setjmp.S
new file mode 100644
index 0000000000..b0b45ed8da
--- /dev/null
+++ b/sysdeps/arm/setjmp.S
@@ -0,0 +1,126 @@
+/* setjmp for ARM.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <bits/setjmp.h>
+#include <rtld-global-offsets.h>
+#include <arm-features.h>
+
+ENTRY (__sigsetjmp)
+#ifdef PTR_MANGLE
+	PTR_MANGLE_LOAD (a3, ip)
+#endif
+	mov	ip, r0
+
+	/* Save registers */
+	sfi_breg ip, \
+	stmia	\B!, JMP_BUF_REGLIST
+#ifdef PTR_MANGLE
+	mov	a4, sp
+	PTR_MANGLE2 (a4, a4, a3)
+	str	a4, [ip], #4
+	PTR_MANGLE2 (a4, lr, a3)
+	str	a4, [ip], #4
+#else
+	str	sp, [ip], #4
+	str	lr, [ip], #4
+#endif
+
+#if !defined ARM_ASSUME_NO_IWMMXT || defined __SOFTFP__
+# define NEED_HWCAP 1
+#endif
+
+#ifdef NEED_HWCAP
+	/* Check if we have a VFP unit.  */
+# ifdef IS_IN_rtld
+	ldr	a3, 1f
+	ldr	a4, .Lrtld_local_ro
+0:	add	a3, pc, a3
+	add	a3, a3, a4
+	ldr	a3, [a3, #RTLD_GLOBAL_RO_DL_HWCAP_OFFSET]
+# else
+#  ifdef PIC
+	ldr	a3, 1f
+	ldr	a4, .Lrtld_global_ro
+0:	add	a3, pc, a3
+	ldr	a3, [a3, a4]
+	ldr	a3, [a3, #RTLD_GLOBAL_RO_DL_HWCAP_OFFSET]
+#  else
+	ldr	a3, .Lhwcap
+	ldr	a3, [a3, #0]
+#  endif
+# endif
+#endif
+
+#ifdef __SOFTFP__
+	tst	a3, #HWCAP_ARM_VFP
+	beq	.Lno_vfp
+#endif
+
+	/* Store the VFP registers.
+	   Don't use VFP instructions directly because this code
+	   is used in non-VFP multilibs.  */
+	/* Following instruction is vstmia ip!, {d8-d15}.  */
+	sfi_breg ip, \
+	stc	p11, cr8, [\B], #64
+.Lno_vfp:
+
+#ifndef ARM_ASSUME_NO_IWMMXT
+	tst	a3, #HWCAP_ARM_IWMMXT
+	beq	.Lno_iwmmxt
+
+	/* Save the call-preserved iWMMXt registers.  */
+	/* Following instructions are wstrd wr10, [ip], #8 (etc.)  */
+	sfi_breg r12, \
+	stcl	p1, cr10, [\B], #8
+	sfi_breg r12, \
+	stcl	p1, cr11, [\B], #8
+	sfi_breg r12, \
+	stcl	p1, cr12, [\B], #8
+	sfi_breg r12, \
+	stcl	p1, cr13, [\B], #8
+	sfi_breg r12, \
+	stcl	p1, cr14, [\B], #8
+	sfi_breg r12, \
+	stcl	p1, cr15, [\B], #8
+.Lno_iwmmxt:
+#endif
+
+	/* Make a tail call to __sigjmp_save; it takes the same args.  */
+	B	PLTJMP(C_SYMBOL_NAME(__sigjmp_save))
+
+#ifdef NEED_HWCAP
+# ifdef IS_IN_rtld
+1:	.long	_GLOBAL_OFFSET_TABLE_ - 0b - PC_OFS
+.Lrtld_local_ro:
+	.long	C_SYMBOL_NAME(_rtld_local_ro)(GOTOFF)
+# else
+#  ifdef PIC
+1:	.long	_GLOBAL_OFFSET_TABLE_ - 0b - PC_OFS
+.Lrtld_global_ro:
+	.long	C_SYMBOL_NAME(_rtld_global_ro)(GOT)
+#  else
+.Lhwcap:
+	.long	C_SYMBOL_NAME(_dl_hwcap)
+#  endif
+# endif
+#endif
+
+END (__sigsetjmp)
+
+hidden_def (__sigsetjmp)
diff --git a/sysdeps/arm/shlib-versions b/sysdeps/arm/shlib-versions
new file mode 100644
index 0000000000..1ac597abbb
--- /dev/null
+++ b/sysdeps/arm/shlib-versions
@@ -0,0 +1,9 @@
+arm.*-.*-linux-gnueabi.*	DEFAULT			GLIBC_2.4
+
+%ifdef HAVE_ARM_PCS_VFP
+# The EABI-derived hard-float ABI uses a new dynamic linker.
+arm.*-.*-linux-gnueabi.*       ld=ld-linux-armhf.so.3
+%else
+# The EABI-derived soft-float ABI continues to use ld-linux.so.3.
+arm.*-.*-linux-gnueabi.*       ld=ld-linux.so.3
+%endif
diff --git a/sysdeps/arm/soft-fp/sfp-machine.h b/sysdeps/arm/soft-fp/sfp-machine.h
new file mode 100644
index 0000000000..eba6e35ced
--- /dev/null
+++ b/sysdeps/arm/soft-fp/sfp-machine.h
@@ -0,0 +1,49 @@
+#define _FP_W_TYPE_SIZE		32
+#define _FP_W_TYPE		unsigned long
+#define _FP_WS_TYPE		signed long
+#define _FP_I_TYPE		long
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_MUL_MEAT_DW_S(R,X,Y)				\
+  _FP_MUL_MEAT_DW_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_DW_D(R,X,Y)				\
+  _FP_MUL_MEAT_DW_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_DW_Q(R,X,Y)				\
+  _FP_MUL_MEAT_DW_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1), -1
+#define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#define _FP_NANSIGN_S		0
+#define _FP_NANSIGN_D		0
+#define _FP_NANSIGN_Q		0
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+/* Someone please check this.  */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)		\
+	&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))	\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
diff --git a/sysdeps/arm/sotruss-lib.c b/sysdeps/arm/sotruss-lib.c
new file mode 100644
index 0000000000..1f5431c36b
--- /dev/null
+++ b/sysdeps/arm/sotruss-lib.c
@@ -0,0 +1,49 @@
+/* Override generic sotruss-lib.c to define actual functions for ARM.
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define HAVE_ARCH_PLTENTER
+#define HAVE_ARCH_PLTEXIT
+
+#include <elf/sotruss-lib.c>
+
+ElfW(Addr)
+la_arm_gnu_pltenter (ElfW(Sym) *sym __attribute__ ((unused)),
+                     unsigned int ndx __attribute__ ((unused)),
+                     uintptr_t *refcook, uintptr_t *defcook,
+                     La_arm_regs *regs, unsigned int *flags,
+                     const char *symname, long int *framesizep)
+{
+  print_enter (refcook, defcook, symname,
+	       regs->lr_reg[0], regs->lr_reg[1], regs->lr_reg[2],
+	       *flags);
+
+  /* No need to copy anything, we will not need the parameters in any case.  */
+  *framesizep = 0;
+
+  return sym->st_value;
+}
+
+unsigned int
+la_arm_gnu_pltexit (ElfW(Sym) *sym, unsigned int ndx, uintptr_t *refcook,
+                    uintptr_t *defcook, const struct La_arm_regs *inregs,
+                    struct La_arm_retval *outregs, const char *symname)
+{
+  print_exit (refcook, defcook, symname, outregs->lrv_reg[0]);
+
+  return 0;
+}
diff --git a/sysdeps/arm/stackinfo.h b/sysdeps/arm/stackinfo.h
new file mode 100644
index 0000000000..dc08a17894
--- /dev/null
+++ b/sysdeps/arm/stackinfo.h
@@ -0,0 +1,33 @@
+/* Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* This file contains a bit of information about the stack allocation
+   of the processor.  */
+
+#ifndef _STACKINFO_H
+#define _STACKINFO_H	1
+
+#include <elf.h>
+
+/* On Arm the stack grows down.  */
+#define _STACK_GROWS_DOWN	1
+
+/* Default to an executable stack.  PF_X can be overridden if PT_GNU_STACK is
+ * present, but it is presumed absent.  */
+#define DEFAULT_STACK_PERMS (PF_R|PF_W|PF_X)
+
+#endif	/* stackinfo.h */
diff --git a/sysdeps/arm/start.S b/sysdeps/arm/start.S
new file mode 100644
index 0000000000..adf6531892
--- /dev/null
+++ b/sysdeps/arm/start.S
@@ -0,0 +1,148 @@
+/* Startup code for ARM & ELF
+   Copyright (C) 1995-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file with other
+   programs, and to distribute those programs without any restriction
+   coming from the use of this file. (The GNU Lesser General Public
+   License restrictions do apply in other respects; for example, they
+   cover modification of the file, and distribution when not linked
+   into another program.)
+
+   Note that people who make modified versions of this file are not
+   obligated to grant this special exception for their modified
+   versions; it is their choice whether to do so. The GNU Lesser
+   General Public License gives permission to release a modified
+   version without this exception; this exception also makes it
+   possible to release a modified version which carries forward this
+   exception.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* This is the canonical entry point, usually the first thing in the text
+   segment.
+
+	Note that the code in the .init section has already been run.
+	This includes _init and _libc_init
+
+
+	At this entry point, most registers' values are unspecified, except:
+
+   a1		Contains a function pointer to be registered with `atexit'.
+		This is how the dynamic linker arranges to have DT_FINI
+		functions called for shared libraries that have been loaded
+		before this code runs.
+
+   sp		The stack contains the arguments and environment:
+		0(sp)			argc
+		4(sp)			argv[0]
+		...
+		(4*argc)(sp)		NULL
+		(4*(argc+1))(sp)	envp[0]
+		...
+					NULL
+*/
+
+/* Tag_ABI_align8_preserved: This code preserves 8-byte
+   alignment in any callee.  */
+	.eabi_attribute 25, 1
+/* Tag_ABI_align8_needed: This code may require 8-byte alignment from
+   the caller.  */
+	.eabi_attribute 24, 1
+
+#if defined(__thumb2__)
+	.thumb
+	.syntax unified
+#endif
+
+	.text
+	.globl _start
+	.type _start,#function
+_start:
+       /* Protect against unhandled exceptions.  */
+       .fnstart
+	/* Clear the frame pointer and link register since this is the outermost frame. */
+	mov fp, #0
+	mov lr, #0
+
+	/* Pop argc off the stack and save a pointer to argv */
+	pop { a2 }
+	mov a3, sp
+
+	/* Push stack limit */
+	push { a3 }
+
+	/* Push rtld_fini */
+	push { a1 }
+
+#ifdef SHARED
+	ldr sl, .L_GOT
+	adr a4, .L_GOT
+	add sl, sl, a4
+
+	ldr ip, .L_GOT+4	/* __libc_csu_fini */
+	ldr ip, [sl, ip]
+
+	push { ip }		/* Push __libc_csu_fini */
+
+	ldr a4, .L_GOT+8	/* __libc_csu_init */
+	ldr a4, [sl, a4]
+
+	ldr a1, .L_GOT+12	/* main */
+	ldr a1, [sl, a1]
+
+	/* __libc_start_main (main, argc, argv, init, fini, rtld_fini, stack_end) */
+	/* Let the libc call main and exit with its return code.  */
+	bl __libc_start_main(PLT)
+#else
+	/* Fetch address of __libc_csu_fini */
+	ldr ip, =__libc_csu_fini
+
+	/* Push __libc_csu_fini */
+	push { ip }
+
+	/* Set up the other arguments in registers */
+	ldr a1, =main
+	ldr a4, =__libc_csu_init
+
+	/* __libc_start_main (main, argc, argv, init, fini, rtld_fini, stack_end) */
+	/* Let the libc call main and exit with its return code.  */
+	bl __libc_start_main
+#endif
+
+	/* should never get here....*/
+	bl abort
+
+#ifdef SHARED
+	.align 2
+.L_GOT:
+	.word _GLOBAL_OFFSET_TABLE_ - .L_GOT
+	.word __libc_csu_fini(GOT)
+	.word __libc_csu_init(GOT)
+	.word main(GOT)
+#endif
+
+       .cantunwind
+       .fnend
+
+/* Define a symbol for the first piece of initialized data.  */
+	.data
+	.globl __data_start
+__data_start:
+	.long 0
+	.weak data_start
+	data_start = __data_start
diff --git a/sysdeps/arm/static-stubs.c b/sysdeps/arm/static-stubs.c
new file mode 100644
index 0000000000..d90d603a95
--- /dev/null
+++ b/sysdeps/arm/static-stubs.c
@@ -0,0 +1,7 @@
+/* When building with GCC with static-only libgcc, the dummy
+   _Unwind_Resume from static-stubs.c needs to be used together with
+   the dummy __aeabi_unwind_cpp_pr* from aeabi_unwind_cpp_pr1.c
+   instead of the copies from libgcc.  */
+
+#include <elf/static-stubs.c>
+#include <aeabi_unwind_cpp_pr1.c>
diff --git a/sysdeps/arm/strlen.S b/sysdeps/arm/strlen.S
new file mode 100644
index 0000000000..c812202bc3
--- /dev/null
+++ b/sysdeps/arm/strlen.S
@@ -0,0 +1,79 @@
+/* Copyright (C) 1998-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Code contributed by Matthew Wilcox <willy@odie.barnet.ac.uk>
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Thumb requires excessive IT insns here.  */
+#define NO_THUMB
+#include <sysdep.h>
+
+/* size_t strlen(const char *S)
+ * entry: r0 -> string
+ * exit: r0 = len
+ */
+
+	.syntax unified
+	.text
+
+ENTRY(strlen)
+	bic     r1, r0, $3              @ addr of word containing first byte
+	sfi_breg r1, \
+	ldr     r2, [\B], $4            @ get the first word
+	ands    r3, r0, $3              @ how many bytes are duff?
+	rsb     r0, r3, $0              @ get - that number into counter.
+	beq     Laligned                @ skip into main check routine if no
+					@ more
+#ifdef __ARMEB__
+	orr     r2, r2, $0xff000000     @ set this byte to non-zero
+	subs    r3, r3, $1              @ any more to do?
+	orrgt   r2, r2, $0x00ff0000     @ if so, set this byte
+	subs    r3, r3, $1              @ more?
+	orrgt   r2, r2, $0x0000ff00     @ then set.
+#else
+	orr     r2, r2, $0x000000ff     @ set this byte to non-zero
+	subs    r3, r3, $1              @ any more to do?
+	orrgt   r2, r2, $0x0000ff00     @ if so, set this byte
+	subs    r3, r3, $1              @ more?
+	orrgt   r2, r2, $0x00ff0000     @ then set.
+#endif
+Laligned:				@ here, we have a word in r2.  Does it
+	tst     r2, $0x000000ff         @ contain any zeroes?
+	tstne   r2, $0x0000ff00         @
+	tstne   r2, $0x00ff0000         @
+	tstne   r2, $0xff000000         @
+	addne   r0, r0, $4              @ if not, the string is 4 bytes longer
+	sfi_breg r1, \
+	ldrne   r2, [\B], $4            @ and we continue to the next word
+	bne     Laligned                @
+Llastword:				@ drop through to here once we find a
+#ifdef __ARMEB__
+	tst     r2, $0xff000000         @ word that has a zero byte in it
+	addne   r0, r0, $1              @
+	tstne   r2, $0x00ff0000         @ and add up to 3 bytes on to it
+	addne   r0, r0, $1              @
+	tstne   r2, $0x0000ff00         @ (if first three all non-zero, 4th
+	addne   r0, r0, $1              @  must be zero)
+#else
+	tst     r2, $0x000000ff         @ word that has a zero byte in it
+	addne   r0, r0, $1              @
+	tstne   r2, $0x0000ff00         @ and add up to 3 bytes on to it
+	addne   r0, r0, $1              @
+	tstne   r2, $0x00ff0000         @ (if first three all non-zero, 4th
+	addne   r0, r0, $1              @  must be zero)
+#endif
+	DO_RET(lr)
+END(strlen)
+libc_hidden_builtin_def (strlen)
diff --git a/sysdeps/arm/sub_n.S b/sysdeps/arm/sub_n.S
new file mode 100644
index 0000000000..8eafa41e64
--- /dev/null
+++ b/sysdeps/arm/sub_n.S
@@ -0,0 +1,2 @@
+#define USE_AS_SUB_N
+#include "add_n.S"
diff --git a/sysdeps/arm/submul_1.S b/sysdeps/arm/submul_1.S
new file mode 100644
index 0000000000..76b9cda865
--- /dev/null
+++ b/sysdeps/arm/submul_1.S
@@ -0,0 +1,74 @@
+/* mpn_submul_1 -- multiply and subtract bignums.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	.syntax unified
+	.text
+
+@		cycles/limb
+@ StrongArm	   ?
+@ Cortex-A8	   ?
+@ Cortex-A9	   ?
+@ Cortex-A15	   4
+
+/* mp_limb_t mpn_submul_1(res_ptr, src1_ptr, size, s2_limb) */
+
+ENTRY (__mpn_submul_1)
+	push	{ r4, r5, r6, r7 }
+	cfi_adjust_cfa_offset (16)
+	cfi_rel_offset (r4, 0)
+	cfi_rel_offset (r5, 4)
+	cfi_rel_offset (r6, 8)
+	cfi_rel_offset (r7, 12)
+
+	sfi_breg r1, \
+	ldr	r6, [\B], #4
+	sfi_breg r0, \
+	ldr	r7, [\B]
+	mov	r4, #0			/* init carry in */
+	b	1f
+0:
+	sfi_breg r1, \
+	ldr	r6, [\B], #4		/* load next ul */
+	adds	r5, r5, r4		/* (lpl, c) = lpl + cl */
+	adc	r4, ip, #0		/* cl = hpl + c */
+	subs	r5, r7, r5		/* (lpl, !c) = rl - lpl */
+	sfi_breg r0, \
+	ldr	r7, [\B, #4]		/* load next rl */
+	it	cc
+	addcc	r4, r4, #1		/* cl += !c */
+	sfi_breg r0, \
+	str	r5, [\B], #4
+1:
+	umull	r5, ip, r6, r3		/* (hpl, lpl) = ul * vl */
+	subs	r2, r2, #1
+	bne	0b
+
+	adds	r5, r5, r4		/* (lpl, c) = lpl + cl */
+	adc	r4, ip, #0		/* cl = hpl + c */
+	subs	r5, r7, r5		/* (lpl, !c) = rl - lpl */
+	sfi_breg r0, \
+	str	r5, [\B], #4
+	it	cc
+	addcc	r4, r4, #1		/* cl += !c */
+	mov	r0, r4			/* return carry */
+
+	pop	{ r4, r5, r6, r7 }
+	DO_RET	(lr)
+END (__mpn_submul_1)
diff --git a/sysdeps/arm/sys/ucontext.h b/sysdeps/arm/sys/ucontext.h
new file mode 100644
index 0000000000..a913f68884
--- /dev/null
+++ b/sysdeps/arm/sys/ucontext.h
@@ -0,0 +1,94 @@
+/* Copyright (C) 1998-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* System V/ARM ABI compliant context switching support.  */
+
+#ifndef _SYS_UCONTEXT_H
+#define _SYS_UCONTEXT_H	1
+
+#include <features.h>
+#include <signal.h>
+
+typedef int greg_t;
+
+/* Number of general registers.  */
+#define NGREG	16
+
+/* Container for all general registers.  */
+typedef greg_t gregset_t[NGREG];
+
+/* Number of each register is the `gregset_t' array.  */
+enum
+{
+  R0 = 0,
+#define R0	R0
+  R1 = 1,
+#define R1	R1
+  R2 = 2,
+#define R2	R2
+  R3 = 3,
+#define R3	R3
+  R4 = 4,
+#define R4	R4
+  R5 = 5,
+#define R5	R5
+  R6 = 6,
+#define R6	R6
+  R7 = 7,
+#define R7	R7
+  R8 = 8,
+#define R8	R8
+  R9 = 9,
+#define R9	R9
+  R10 = 10,
+#define R10	R10
+  R11 = 11,
+#define R11	R11
+  R12 = 12,
+#define R12	R12
+  R13 = 13,
+#define R13	R13
+  R14 = 14,
+#define R14	R14
+  R15 = 15,
+#define R15	R15
+};
+
+/* Structure to describe FPU registers.  */
+typedef struct fpregset
+  {
+  } fpregset_t;
+
+/* Context to describe whole processor state.  */
+typedef struct
+  {
+    gregset_t gregs;
+    fpregset_t fpregs;
+  } mcontext_t;
+
+/* Userlevel context.  */
+typedef struct ucontext
+  {
+    unsigned long int uc_flags;
+    struct ucontext *uc_link;
+    __sigset_t uc_sigmask;
+    stack_t uc_stack;
+    mcontext_t uc_mcontext;
+    long int uc_filler[5];
+  } ucontext_t;
+
+#endif /* sys/ucontext.h */
diff --git a/sysdeps/arm/sysdep.h b/sysdeps/arm/sysdep.h
new file mode 100644
index 0000000000..7f34ab042f
--- /dev/null
+++ b/sysdeps/arm/sysdep.h
@@ -0,0 +1,288 @@
+/* Assembler macros for ARM.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdeps/generic/sysdep.h>
+#include <features.h>
+
+/* The __ARM_ARCH define is provided by gcc 4.8.  Construct it otherwise.  */
+#ifndef __ARM_ARCH
+# ifdef __ARM_ARCH_2__
+#  define __ARM_ARCH 2
+# elif defined (__ARM_ARCH_3__) || defined (__ARM_ARCH_3M__)
+#  define __ARM_ARCH 3
+# elif defined (__ARM_ARCH_4__) || defined (__ARM_ARCH_4T__)
+#  define __ARM_ARCH 4
+# elif defined (__ARM_ARCH_5__) || defined (__ARM_ARCH_5E__) \
+       || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__) \
+       || defined(__ARM_ARCH_5TEJ__)
+#  define __ARM_ARCH 5
+# elif defined (__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \
+       || defined (__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__) \
+       || defined (__ARM_ARCH_6K__) || defined(__ARM_ARCH_6T2__)
+#  define __ARM_ARCH 6
+# elif defined (__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \
+       || defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) \
+       || defined(__ARM_ARCH_7EM__)
+#  define __ARM_ARCH 7
+# else
+#  error unknown arm architecture
+# endif
+#endif
+
+#if __ARM_ARCH > 4 || defined (__ARM_ARCH_4T__)
+# define ARCH_HAS_BX
+#endif
+#if __ARM_ARCH > 4
+# define ARCH_HAS_BLX
+#endif
+#if __ARM_ARCH > 6 || defined (__ARM_ARCH_6K__) || defined (__ARM_ARCH_6ZK__)
+# define ARCH_HAS_HARD_TP
+#endif
+#if __ARM_ARCH > 6 || defined (__ARM_ARCH_6T2__)
+# define ARCH_HAS_T2
+#endif
+
+#ifdef	__ASSEMBLER__
+
+/* Syntactic details of assembler.  */
+
+#define ALIGNARG(log2) log2
+#define ASM_SIZE_DIRECTIVE(name) .size name,.-name
+
+#define PLTJMP(_x)	_x##(PLT)
+
+#ifdef ARCH_HAS_BX
+# define BX(R)		bx	R
+# define BXC(C, R)	bx##C	R
+# ifdef ARCH_HAS_BLX
+#  define BLX(R)	blx	R
+# else
+#  define BLX(R)	mov	lr, pc; bx R
+# endif
+#else
+# define BX(R)		mov	pc, R
+# define BXC(C, R)	mov##C	pc, R
+# define BLX(R)		mov	lr, pc; mov pc, R
+#endif
+
+#define DO_RET(R)	BX(R)
+#define RETINSTR(C, R)	BXC(C, R)
+
+/* Define an entry point visible from C.  */
+#define	ENTRY(name)					\
+	.globl	C_SYMBOL_NAME(name);			\
+	.type	C_SYMBOL_NAME(name),%function;		\
+	.align	ALIGNARG(4);				\
+  C_LABEL(name)						\
+	CFI_SECTIONS;					\
+	cfi_startproc;					\
+	CALL_MCOUNT
+
+#define CFI_SECTIONS					\
+	.cfi_sections .debug_frame
+
+#undef	END
+#define END(name)					\
+	cfi_endproc;					\
+	ASM_SIZE_DIRECTIVE(name)
+
+/* If compiled for profiling, call `mcount' at the start of each function.  */
+#ifdef	PROF
+/* Call __gnu_mcount_nc if GCC >= 4.4.  */
+#if __GNUC_PREREQ(4,4)
+#define CALL_MCOUNT					\
+	push	{lr};					\
+	cfi_adjust_cfa_offset (4);			\
+	cfi_rel_offset (lr, 0);				\
+	bl	PLTJMP(mcount);				\
+	cfi_adjust_cfa_offset (-4);			\
+	cfi_restore (lr)
+#else /* else call _mcount */
+#define CALL_MCOUNT					\
+	push	{lr};					\
+	cfi_adjust_cfa_offset (4);			\
+	cfi_rel_offset (lr, 0);				\
+	bl	PLTJMP(mcount);				\
+	pops	{lr};					\
+	cfi_adjust_cfa_offset (-4);			\
+	cfi_restore (lr)
+#endif
+#else
+#define CALL_MCOUNT		/* Do nothing.  */
+#endif
+
+/* Since C identifiers are not normally prefixed with an underscore
+   on this system, the asm identifier `syscall_error' intrudes on the
+   C name space.  Make sure we use an innocuous name.  */
+#define	syscall_error	__syscall_error
+#if __GNUC_PREREQ(4,4)
+#define mcount		__gnu_mcount_nc
+#else
+#define mcount		_mcount
+#endif
+
+/* Tag_ABI_align8_preserved: This code preserves 8-byte
+   alignment in any callee.  */
+	.eabi_attribute 25, 1
+/* Tag_ABI_align8_needed: This code may require 8-byte alignment from
+   the caller.  */
+	.eabi_attribute 24, 1
+
+/* The thumb2 encoding is reasonably complete.  Unless suppressed, use it.  */
+	.syntax unified
+# if defined(__thumb2__) && !defined(NO_THUMB)
+	.thumb
+#else
+#  undef __thumb__
+#  undef __thumb2__
+	.arm
+# endif
+
+/* Load or store to/from a pc-relative EXPR into/from R, using T.  */
+# ifdef __thumb2__
+#  define LDST_PCREL(OP, R, T, EXPR) \
+	ldr	T, 98f;					\
+	.subsection 2;					\
+98:	.word	EXPR - 99f - PC_OFS;			\
+	.previous;					\
+99:	add	T, T, pc;				\
+	OP	R, [T]
+# else
+#  define LDST_PCREL(OP, R, T, EXPR) \
+	ldr	T, 98f;					\
+	.subsection 2;					\
+98:	.word	EXPR - 99f - PC_OFS;			\
+	.previous;					\
+99:	OP	R, [pc, T]
+# endif
+
+/* Load or store to/from a global EXPR into/from R, using T.  */
+# define LDST_GLOBAL(OP, R, T, EXPR)			\
+	ldr	T, 99f;					\
+	ldr	R, 100f;				\
+98:	add	T, T, pc;				\
+	ldr	T, [T, R];				\
+	.subsection 2;					\
+99:	.word	_GLOBAL_OFFSET_TABLE_ - 98b - PC_OFS;	\
+100:	.word	EXPR##(GOT);				\
+	.previous;					\
+	OP	R, [T]
+
+/* Cope with negative memory offsets, which thumb can't encode.
+   Use NEGOFF_ADJ_BASE to (conditionally) alter the base register,
+   and then NEGOFF_OFF1 to use 0 for thumb and the offset for arm,
+   or NEGOFF_OFF2 to use A-B for thumb and A for arm.  */
+# ifdef __thumb2__
+#  define NEGOFF_ADJ_BASE(R, OFF)	add R, R, $OFF
+#  define NEGOFF_ADJ_BASE2(D, S, OFF)	add D, S, $OFF
+#  define NEGOFF_OFF1(R, OFF)		[R]
+#  define NEGOFF_OFF2(R, OFFA, OFFB)	[R, $((OFFA) - (OFFB))]
+# else
+#  define NEGOFF_ADJ_BASE(R, OFF)
+#  define NEGOFF_ADJ_BASE2(D, S, OFF)	mov D, S
+#  define NEGOFF_OFF1(R, OFF)		[R, $OFF]
+#  define NEGOFF_OFF2(R, OFFA, OFFB)	[R, $OFFA]
+# endif
+
+/* Helper to get the TLS base pointer.  The interface is that TMP is a
+   register that may be used to hold the LR, if necessary.  TMP may be
+   LR itself to indicate that LR need not be saved.  The base pointer
+   is returned in R0.  Only R0 and TMP are modified.  */
+
+# ifdef ARCH_HAS_HARD_TP
+/* If the cpu has cp15 available, use it.  */
+#  define GET_TLS(TMP)		mrc p15, 0, r0, c13, c0, 3
+# else
+/* At this generic level we have no tricks to pull.  Call the ABI routine.  */
+#  define GET_TLS(TMP)					\
+	push	{ r1, r2, r3, lr };			\
+	cfi_remember_state;				\
+	cfi_adjust_cfa_offset (16);			\
+	cfi_rel_offset (r1, 0);				\
+	cfi_rel_offset (r2, 4);				\
+	cfi_rel_offset (r3, 8);				\
+	cfi_rel_offset (lr, 12);			\
+	bl	__aeabi_read_tp;			\
+	pop	{ r1, r2, r3, lr };			\
+	cfi_restore_state
+# endif /* ARCH_HAS_HARD_TP */
+
+# ifndef ARM_SFI_MACROS
+# define ARM_SFI_MACROS 1
+/* This assembly macro is prepended to any load/store instruction,
+   pulling the base register out of the addressing mode syntax and
+   making it the first operand of the macro.  For example:
+	ldr r0, [r1]
+   becomes:
+	sfi_breg r1, ldr r0, [\B]
+   The \B stands in for the base register that is the first operand
+   to the macro, so we can avoid error-prone repetition of the base
+   register in two places on the line.
+
+   This is used for all memory access through a base register other
+   than PC or SP.  It's intended to support SFI schemes such as
+   Native Client, where the OS will enforce that all load/store
+   instructions use a special form.  In any such configuration,
+   another sysdep.h file will have defined ARM_SFI_MACROS and
+   provided its own assembly macros with the same interface.  */
+
+        .macro sfi_breg basereg, insn, operands:vararg
+                .macro _sfi_breg_doit B
+                \insn \operands
+                .endm
+                _sfi_breg_doit \basereg
+                .purgem _sfi_breg_doit
+        .endm
+
+/* This assembly macro replaces the "pld" instruction.
+   The syntax:
+	sfi_pld REGISTER, #OFFSET
+   is exactly equivalent to:
+	sfi_breg REGISTER, pld [\B, #OFFSET]
+   (and ", #OFFSET" is optional).  We have a separate macro
+   only to work around a bug in GAS versions prior to 2.23.2,
+   that misparses the sfi_breg macro expansion in this case.  */
+
+	.macro sfi_pld basereg, offset=#0
+		pld [\basereg, \offset]
+	.endm
+
+/* This macro precedes any instruction that directly changes the SP.
+   It's not needed for push/pop or for any kind of load or store that
+   implicitly changes the SP via the ! syntax.  */
+# define sfi_sp	/* Nothing to do.  */
+
+# endif
+
+/* These are the directives used for EABI unwind info.
+   Wrap them in macros so another configuration's sysdep.h
+   file can define them away if it doesn't use EABI unwind info.  */
+# define eabi_fnstart		.fnstart
+# define eabi_fnend		.fnend
+# define eabi_save(...)		.save __VA_ARGS__
+# define eabi_cantunwind	.cantunwind
+# define eabi_pad(n)		.pad n
+
+#endif	/* __ASSEMBLER__ */
+
+/* This number is the offset from the pc at the current location.  */
+#ifdef __thumb__
+# define PC_OFS  4
+#else
+# define PC_OFS  8
+#endif
diff --git a/sysdeps/arm/test-fpucw.c b/sysdeps/arm/test-fpucw.c
new file mode 100644
index 0000000000..9fc721c7f4
--- /dev/null
+++ b/sysdeps/arm/test-fpucw.c
@@ -0,0 +1,5 @@
+/* Defining _LIBC_TEST stops fpu_control.h from defining the
+   hard-float versions of macros (for use with dynamic VFP detection)
+   when compiling for soft-float.  */
+#define _LIBC_TEST
+#include <math/test-fpucw.c>
diff --git a/sysdeps/arm/tls-macros.h b/sysdeps/arm/tls-macros.h
new file mode 100644
index 0000000000..e41d3bc5aa
--- /dev/null
+++ b/sysdeps/arm/tls-macros.h
@@ -0,0 +1,78 @@
+#ifdef __thumb2__
+#define ARM_PC_OFFSET "4"
+#else
+#define ARM_PC_OFFSET "8"
+#endif
+
+#define TLS_LE(x)					\
+  ({ int *__result;					\
+     void *tp = __builtin_thread_pointer ();		\
+     asm ("ldr %0, 1f; "				\
+	  "add %0, %1, %0; "				\
+	  "b 2f; "					\
+	  ".align 2; "					\
+	  "1: .word " #x "(tpoff); "			\
+	  "2: "						\
+	  : "=&r" (__result) : "r" (tp));		\
+     __result; })
+
+#ifdef __thumb2__
+#define TLS_IE(x)					\
+  ({ int *__result;					\
+     void *tp = __builtin_thread_pointer ();		\
+     asm ("ldr %0, 1f; "				\
+	  "3: add %0, pc, %0;"				\
+	  "ldr %0, [%0];"				\
+	  "add %0, %1, %0; "				\
+	  "b 2f; "					\
+	  ".align 2; "					\
+	  "1: .word " #x "(gottpoff) + (. - 3b - 4); "	\
+	  "2: "						\
+	  : "=&r" (__result) : "r" (tp));		\
+     __result; })
+#else
+#define TLS_IE(x)					\
+  ({ int *__result;					\
+     void *tp = __builtin_thread_pointer ();		\
+     asm ("ldr %0, 1f; "				\
+	  "3: ldr %0, [pc, %0];"			\
+	  "add %0, %1, %0; "				\
+	  "b 2f; "					\
+	  ".align 2; "					\
+	  "1: .word " #x "(gottpoff) + (. - 3b - 8); "	\
+	  "2: "						\
+	  : "=&r" (__result) : "r" (tp));		\
+     __result; })
+#endif
+
+#define TLS_LD(x)					\
+  ({ char *__result;					\
+     int __offset;					\
+     extern void *__tls_get_addr (void *);		\
+     asm ("ldr %0, 2f; "				\
+	  "1: add %0, pc, %0; "				\
+	  "b 3f; "					\
+	  ".align 2; "					\
+	  "2: .word " #x "(tlsldm) + (. - 1b - "ARM_PC_OFFSET"); "	\
+	  "3: "						\
+	  : "=r" (__result));				\
+     __result = (char *)__tls_get_addr (__result);	\
+     asm ("ldr %0, 1f; "				\
+	  "b 2f; "					\
+	  ".align 2; "					\
+	  "1: .word " #x "(tlsldo); "			\
+	  "2: "						\
+	  : "=r" (__offset));				\
+     (int *) (__result + __offset); })
+
+#define TLS_GD(x)					\
+  ({ int *__result;					\
+     extern void *__tls_get_addr (void *);		\
+     asm ("ldr %0, 2f; "				\
+	  "1: add %0, pc, %0; "				\
+	  "b 3f; "					\
+	  ".align 2; "					\
+	  "2: .word " #x "(tlsgd) + (. - 1b - "ARM_PC_OFFSET"); "	\
+	  "3: "						\
+	  : "=r" (__result));				\
+     (int *)__tls_get_addr (__result); })
diff --git a/sysdeps/arm/tlsdesc.c b/sysdeps/arm/tlsdesc.c
new file mode 100644
index 0000000000..fc754d6c42
--- /dev/null
+++ b/sysdeps/arm/tlsdesc.c
@@ -0,0 +1,160 @@
+/* Manage TLS descriptors.  ARM version.
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <link.h>
+#include <ldsodefs.h>
+#include <elf/dynamic-link.h>
+#include <tls.h>
+#include <dl-tlsdesc.h>
+#include <tlsdeschtab.h>
+
+/* This function is used to lazily resolve TLS_DESC REL relocations
+   Besides the TLS descriptor itself, we get the module's got address
+   as the second parameter. */
+
+void
+attribute_hidden
+_dl_tlsdesc_lazy_resolver_fixup (struct tlsdesc volatile *td,
+				 Elf32_Addr *got)
+{
+  struct link_map *l = (struct link_map *)got[1];
+  lookup_t result;
+  unsigned long value;
+
+  if (_dl_tlsdesc_resolve_early_return_p
+      (td, (void*)(D_PTR (l, l_info[ADDRIDX (DT_TLSDESC_PLT)]) + l->l_addr)))
+    return;
+
+  if (td->argument.value & 0x80000000)
+    {
+      /* A global symbol, this is the symbol index.  */
+      /* The code below was borrowed from _dl_fixup().  */
+      const Elf_Symndx symndx = td->argument.value ^ 0x80000000;
+      const ElfW(Sym) *const symtab
+	= (const void *) D_PTR (l, l_info[DT_SYMTAB]);
+      const char *strtab = (const void *) D_PTR (l, l_info[DT_STRTAB]);
+      const ElfW(Sym) *sym = &symtab[symndx];
+
+      /* Look up the target symbol.  If the normal lookup rules are not
+	 used don't look in the global scope.  */
+      if (ELFW(ST_BIND) (sym->st_info) != STB_LOCAL
+	  && __builtin_expect (ELFW(ST_VISIBILITY) (sym->st_other), 0) == 0)
+	{
+	  const struct r_found_version *version = NULL;
+
+	  if (l->l_info[VERSYMIDX (DT_VERSYM)] != NULL)
+	    {
+	      const ElfW(Half) *vernum =
+		(const void *) D_PTR (l, l_info[VERSYMIDX (DT_VERSYM)]);
+	      ElfW(Half) ndx = vernum[symndx] & 0x7fff;
+	      version = &l->l_versions[ndx];
+	      if (version->hash == 0)
+		version = NULL;
+	    }
+
+	  result = _dl_lookup_symbol_x
+	    (strtab + sym->st_name, l, &sym,
+	     l->l_scope, version, ELF_RTYPE_CLASS_PLT,
+	     DL_LOOKUP_ADD_DEPENDENCY, NULL);
+	  if (sym)
+	    value = sym->st_value;
+	  else
+	    {
+	      td->entry = _dl_tlsdesc_undefweak;
+	      goto done;
+	    }
+	}
+      else
+	{
+	  /* We already found the symbol.  The module (and therefore its load
+	     address) is also known.  */
+	  result = l;
+	  value = sym->st_value;
+	}
+    }
+  else
+    {
+      /* A local symbol, this is the offset within our tls section.
+	 */
+      value = td->argument.value;
+      result = l;
+    }
+
+#ifndef SHARED
+  CHECK_STATIC_TLS (l, result);
+#else
+  if (!TRY_STATIC_TLS (l, result))
+    {
+      td->argument.pointer = _dl_make_tlsdesc_dynamic (result, value);
+      td->entry = _dl_tlsdesc_dynamic;
+    }
+  else
+#endif
+    {
+      td->argument.value = value + result->l_tls_offset;
+      td->entry = _dl_tlsdesc_return;
+    }
+
+ done:
+  _dl_tlsdesc_wake_up_held_fixups ();
+}
+
+/* This function is used to avoid busy waiting for other threads to
+   complete the lazy relocation.  Once another thread wins the race to
+   relocate a TLS descriptor, it sets the descriptor up such that this
+   function is called to wait until the resolver releases the
+   lock.  */
+
+void
+attribute_hidden
+_dl_tlsdesc_resolve_hold_fixup (struct tlsdesc volatile *td,
+				void *caller)
+{
+  /* Maybe we're lucky and can return early.  */
+  if (caller != td->entry)
+    return;
+
+  /* Locking here will stop execution until the running resolver runs
+     _dl_tlsdesc_wake_up_held_fixups(), releasing the lock.
+
+     FIXME: We'd be better off waiting on a condition variable, such
+     that we didn't have to hold the lock throughout the relocation
+     processing.  */
+  __rtld_lock_lock_recursive (GL(dl_load_lock));
+  __rtld_lock_unlock_recursive (GL(dl_load_lock));
+}
+
+/* Unmap the dynamic object, but also release its TLS descriptor table
+   if there is one.  */
+
+void
+internal_function
+_dl_unmap (struct link_map *map)
+{
+  __munmap ((void *) (map)->l_map_start,
+	    (map)->l_map_end - (map)->l_map_start);
+
+#if SHARED
+  /* _dl_unmap is only called for dlopen()ed libraries, for which
+     calling free() is safe, or before we've completed the initial
+     relocation, in which case calling free() is probably pointless,
+     but still safe.  */
+  if (map->l_mach.tlsdesc_table)
+    htab_delete (map->l_mach.tlsdesc_table);
+#endif
+}
diff --git a/sysdeps/arm/tlsdesc.sym b/sysdeps/arm/tlsdesc.sym
new file mode 100644
index 0000000000..3f3a13e2c4
--- /dev/null
+++ b/sysdeps/arm/tlsdesc.sym
@@ -0,0 +1,15 @@
+#include <stddef.h>
+#include <sysdep.h>
+#include <tls.h>
+#include <link.h>
+#include <dl-tlsdesc.h>
+
+--
+
+-- Abuse tls.h macros to derive offsets relative to the thread register.
+
+TLSDESC_ARG			offsetof(struct tlsdesc, argument.pointer)
+
+TLSDESC_GEN_COUNT		offsetof(struct tlsdesc_dynamic_arg, gen_count)
+TLSDESC_MODID			offsetof(struct tlsdesc_dynamic_arg, tlsinfo.ti_module)
+TLSDESC_MODOFF			offsetof(struct tlsdesc_dynamic_arg, tlsinfo.ti_offset)
diff --git a/sysdeps/arm/tst-audit.h b/sysdeps/arm/tst-audit.h
new file mode 100644
index 0000000000..4f46fa0f23
--- /dev/null
+++ b/sysdeps/arm/tst-audit.h
@@ -0,0 +1,25 @@
+/* Definitions for testing PLT entry/exit auditing.  ARM version.
+
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define pltenter la_arm_gnu_pltenter
+#define pltexit la_arm_gnu_pltexit
+#define La_regs La_arm_regs
+#define La_retval La_arm_retval
+#define int_retval lrv_reg[0]
diff --git a/sysdeps/arm/unwind-dw2-fde-glibc.c b/sysdeps/arm/unwind-dw2-fde-glibc.c
new file mode 100644
index 0000000000..6b2110c2db
--- /dev/null
+++ b/sysdeps/arm/unwind-dw2-fde-glibc.c
@@ -0,0 +1,79 @@
+/* Dummy exception handling and frame unwind runtime interface routines.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* ARM uses setjmp-longjmp exceptions.  However, previous versions of
+   GNU libc exported some DWARF-2 exception handling support routines.
+   They are not necessary, but older (or broken) configurations of GCC
+   will do so.  Even though all references to these are weak, because
+   they refer to versioned symbols, they must be provided.  */
+
+#include <stdlib.h>
+#include <unwind.h>
+#include <unwind-dw2-fde.h>
+
+/* These may be called from startup code, but don't need to do
+   anything.  */
+
+void __register_frame_info_bases (void *a1, struct object *a2,
+				  void *a3, void *a4)
+{
+}
+
+void __register_frame_info (void *a1, struct object *a2)
+{
+}
+
+void __register_frame (void *a1)
+{
+}
+
+void __register_frame_info_table_bases (void *a1, struct object *a2,
+					void *a3, void *a4)
+{
+}
+
+void __register_frame_info_table (void *a1, struct object *a2)
+{
+}
+
+void __register_frame_table (void *a1)
+{
+}
+
+void *__deregister_frame_info (void *a1)
+{
+  return NULL;
+}
+
+void *__deregister_frame_info_bases (void *a1)
+{
+  return NULL;
+}
+
+void __deregister_frame (void *a1)
+{
+}
+
+/* This should not be called.  */
+
+fde *
+_Unwind_Find_FDE (void *a1, struct dwarf_eh_bases *a2)
+{
+  abort ();
+}
diff --git a/sysdeps/arm/unwind-pe.c b/sysdeps/arm/unwind-pe.c
new file mode 100644
index 0000000000..710cecca97
--- /dev/null
+++ b/sysdeps/arm/unwind-pe.c
@@ -0,0 +1 @@
+/* Empty */
diff --git a/sysdeps/unix/arm/sysdep.S b/sysdeps/unix/arm/sysdep.S
new file mode 100644
index 0000000000..1a0f093238
--- /dev/null
+++ b/sysdeps/unix/arm/sysdep.S
@@ -0,0 +1,63 @@
+/* Copyright (C) 1991-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#define _ERRNO_H
+#include <bits/errno.h>
+
+#ifdef IS_IN_rtld
+# include <dl-sysdep.h>			/* Defines RTLD_PRIVATE_ERRNO.  */
+#endif
+
+#include <tls.h>
+
+#undef syscall_error
+__syscall_error:
+#if defined (EWOULDBLOCK_sys) && EWOULDBLOCK_sys != EAGAIN
+	/* We translate the system's EWOULDBLOCK error into EAGAIN.
+	   The GNU C library always defines EWOULDBLOCK==EAGAIN.
+	   EWOULDBLOCK_sys is the original number.  */
+	cmp	r0, $EWOULDBLOCK_sys /* Is it the old EWOULDBLOCK?  */
+	it	eq
+	moveq	r0, $EAGAIN	/* Yes; translate it to EAGAIN.  */
+#endif
+
+#ifndef IS_IN_rtld
+	mov	r1, r0
+	GET_TLS (r2)
+	ldr	r2, 1f
+#ifdef __thumb__
+2:	add	r2, r2, pc
+	ldr	r2, [r2]
+#else
+2:	ldr	r2, [pc, r2]
+#endif
+	str	r1, [r0, r2]
+	mvn	r0, #0
+	DO_RET(lr)
+
+1:	.word errno(gottpoff) + (. - 2b - PC_OFS)
+#elif RTLD_PRIVATE_ERRNO
+	LDST_PCREL(str, r0, r1, C_SYMBOL_NAME(rtld_errno))
+	mvn	r0, #0
+	DO_RET(r14)
+#else
+#error "Unsupported non-TLS case"
+#endif
+
+#undef	__syscall_error
+END (__syscall_error)
diff --git a/sysdeps/unix/arm/sysdep.h b/sysdeps/unix/arm/sysdep.h
new file mode 100644
index 0000000000..ad069c33de
--- /dev/null
+++ b/sysdeps/unix/arm/sysdep.h
@@ -0,0 +1,29 @@
+/* Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdeps/unix/sysdep.h>
+#include <sysdeps/arm/sysdep.h>
+
+/* Some definitions to allow the assembler in sysdeps/unix/ to build
+   without needing ARM-specific versions of all the files.  */
+
+#ifdef __ASSEMBLER__
+
+#define ret		DO_RET (r14)
+#define MOVE(a,b)	mov b,a
+
+#endif
diff --git a/sysdeps/unix/sysv/linux/arm/Makefile b/sysdeps/unix/sysv/linux/arm/Makefile
new file mode 100644
index 0000000000..aa7526a258
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/Makefile
@@ -0,0 +1,85 @@
+ifeq ($(subdir),csu)
+# In order for unwinding to fail when it falls out of main, we need a
+# cantunwind marker.  There's one in start.S.  To make sure we reach it, add
+# unwind tables for __libc_start_main.
+CFLAGS-libc-start.c += -fexceptions
+
+sysdep_routines += aeabi_read_tp libc-aeabi_read_tp
+static-only-routines += aeabi_read_tp
+shared-only-routines += libc-aeabi_read_tp
+endif
+
+ifeq ($(subdir),elf)
+sysdep-rtld-routines += aeabi_read_tp libc-do-syscall
+endif
+
+ifeq ($(subdir),misc)
+sysdep_routines += ioperm
+sysdep_headers += sys/elf.h sys/io.h
+endif
+
+ifeq ($(subdir),signal)
+sysdep_routines += sigrestorer
+endif
+
+ifeq ($(subdir),resource)
+sysdep_routines += oldgetrlimit64
+endif
+
+ifeq ($(subdir),stdlib)
+gen-as-const-headers += ucontext_i.sym
+endif
+
+# Add a syscall function to each library that needs one.
+
+ifeq ($(subdir),crypt)
+libcrypt-sysdep_routines += libc-do-syscall
+endif
+
+ifeq ($(subdir),rt)
+librt-sysdep_routines += libc-do-syscall
+librt-shared-only-routines += libc-do-syscall
+endif
+
+ifeq ($(subdir),nptl)
+libpthread-sysdep_routines += libc-do-syscall
+libpthread-shared-only-routines += libc-do-syscall
+endif
+
+ifeq ($(subdir),resolv)
+libanl-sysdep_routines += libc-do-syscall
+libanl-shared-only-routines += libc-do-syscall
+endif
+
+ifeq ($(subdir),csu)
+sysdep_routines += libc-do-syscall
+endif
+
+ifeq ($(subdir),nscd)
+nscd-modules += libc-do-syscall
+endif
+
+ifeq ($(subdir),nss)
+libnss_db-sysdep_routines += libc-do-syscall
+libnss_db-shared-only-routines += libc-do-syscall
+endif
+
+ifeq ($(subdir),posix)
+LDFLAGS-tst-rfc3484 += $(common-objpfx)csu/libc-do-syscall.o
+LDFLAGS-tst-rfc3484-2 += $(common-objpfx)csu/libc-do-syscall.o
+LDFLAGS-tst-rfc3484-3 += $(common-objpfx)csu/libc-do-syscall.o
+endif
+
+abi-variants := soft hard
+
+ifeq (,$(filter $(default-abi),$(abi-variants)))
+Unknown ABI, must be one of $(abi-variants)
+endif
+
+abi-includes :=
+abi-soft-options := -U__ARM_PCS_VFP
+abi-soft-condition := !defined __ARM_PCS_VFP
+abi-soft-ld-soname := ld-linux.so.3
+abi-hard-options := -D__ARM_PCS_VFP
+abi-hard-condition := defined __ARM_PCS_VFP
+abi-hard-ld-soname := ld-linux-armhf.so.3
diff --git a/sysdeps/unix/sysv/linux/arm/Versions b/sysdeps/unix/sysv/linux/arm/Versions
new file mode 100644
index 0000000000..1d9e964640
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/Versions
@@ -0,0 +1,40 @@
+libc {
+  GLIBC_2.0 {
+    # Exception handling support functions from libgcc
+    __register_frame; __register_frame_table; __deregister_frame;
+    __frame_state_for; __register_frame_info_table;
+  }
+  GLIBC_2.1 {
+    ioperm; iopl;
+    inb; inw; inl;
+    outb; outw; outl;
+  }
+  GLIBC_2.2 {
+    # functions used in other libraries
+    __xstat64; __fxstat64; __lxstat64;
+
+    # a*
+    alphasort64;
+
+    # g*
+    glob64;
+
+    # New rlimit interface
+    getrlimit; setrlimit; getrlimit64;
+
+    # r*
+    readdir64; readdir64_r;
+
+    # s*
+    scandir64;
+
+    # v*
+    versionsort64;
+  }
+  GLIBC_2.3.3 {
+    posix_fadvise64; posix_fallocate64;
+  }
+  GLIBC_2.11 {
+    fallocate64;
+  }
+}
diff --git a/sysdeps/unix/sysv/linux/arm/____longjmp_chk.S b/sysdeps/unix/sysv/linux/arm/____longjmp_chk.S
new file mode 100644
index 0000000000..96f8b4eb2d
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/____longjmp_chk.S
@@ -0,0 +1,90 @@
+/* Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	.section .rodata.str1.1,"aMS",%progbits,1
+	.type	longjmp_msg,%object
+longjmp_msg:
+	.string "longjmp causes uninitialized stack frame"
+	.size	longjmp_msg, .-longjmp_msg
+	.text
+
+#define __longjmp ____longjmp_chk
+
+#ifdef PIC
+# define CALL_FAIL						\
+	ldr	sl, .L_GOT;					\
+	cfi_undefined (sl);					\
+.L_GOT_OFF:							\
+	add	sl, pc, sl;					\
+	ldr	r0, .Lstr;					\
+	add	r0, sl, r0;					\
+	B	PLTJMP(HIDDEN_JUMPTARGET(__fortify_fail));	\
+.L_GOT:								\
+	.word	_GLOBAL_OFFSET_TABLE_-(.L_GOT_OFF+8);		\
+.Lstr:								\
+	.word	longjmp_msg(GOTOFF);
+#else
+# define CALL_FAIL					\
+	ldr	r0, .Lstr;				\
+	B	HIDDEN_JUMPTARGET(__fortify_fail);	\
+.Lstr:							\
+	.word	longjmp_msg;
+#endif
+
+#define CHECK_SP(reg)				\
+	cfi_remember_state;			\
+	cmp	sp, reg;			\
+	bls	.Lok;				\
+	push	{ r7 };				\
+	cfi_adjust_cfa_offset (4);		\
+	cfi_rel_offset (r7, 0);			\
+	mov	r5, r0;				\
+	cfi_undefined (r5);			\
+	mov	r7, #SYS_ify(sigaltstack);	\
+	mov	r0, #0;				\
+	sub	sp, sp, #12; /* == sizeof (stack_t) */ \
+	cfi_adjust_cfa_offset (12);		\
+	cfi_remember_state;			\
+	mov	r1, sp;				\
+	swi	#0;				\
+	cmp	r0, #0;				\
+	bne	.Lok2;				\
+	ldr	r1, [sp, #4];			\
+	tst	r1, #1;				\
+	beq	.Lfail;				\
+	ldr	r2, [sp, #0];			\
+	ldr	r3, [sp, #8];			\
+	add	r2, r2, r3;			\
+	sub	r2, r2, reg;			\
+	cmp	r2, r3;				\
+	bhi	.Lok2;				\
+.Lfail:						\
+	add	sp, sp, #12;			\
+	cfi_adjust_cfa_offset (-12);		\
+	pop	{ r7 };				\
+	cfi_adjust_cfa_offset (-4);		\
+	cfi_restore (r7);			\
+	CALL_FAIL				\
+	cfi_restore_state;			\
+.Lok2:						\
+	mov	r0, r5;				\
+	cfi_restore_state;			\
+.Lok:
+
+#include <__longjmp.S>
diff --git a/sysdeps/unix/sysv/linux/arm/aeabi_read_tp.S b/sysdeps/unix/sysv/linux/arm/aeabi_read_tp.S
new file mode 100644
index 0000000000..9351233873
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/aeabi_read_tp.S
@@ -0,0 +1,55 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file with other
+   programs, and to distribute those programs without any restriction
+   coming from the use of this file. (The GNU Lesser General Public
+   License restrictions do apply in other respects; for example, they
+   cover modification of the file, and distribution when not linked
+   into another program.)
+
+   Note that people who make modified versions of this file are not
+   obligated to grant this special exception for their modified
+   versions; it is their choice whether to do so. The GNU Lesser
+   General Public License gives permission to release a modified
+   version without this exception; this exception also makes it
+   possible to release a modified version which carries forward this
+   exception.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+/* GCC will emit calls to this routine under -mtp=soft.  Linux has an
+   equivalent helper function (which clobbers fewer registers than
+   a normal function call) in a high page of memory; tail call to the
+   helper.  */
+
+	.hidden __aeabi_read_tp
+ENTRY (__aeabi_read_tp)
+#ifdef ARCH_HAS_HARD_TP
+	mrc	p15, 0, r0, c13, c0, 3
+	bx	lr
+#elif defined(__thumb2__)
+	movw	r0, #0x0fe0
+	movt	r0, #0xffff
+	bx	r0
+#else
+	mov	r0, #0xffff0fff
+	sub	pc, r0, #31
+#endif
+END (__aeabi_read_tp)
diff --git a/sysdeps/unix/sysv/linux/arm/alphasort64.c b/sysdeps/unix/sysv/linux/arm/alphasort64.c
new file mode 100644
index 0000000000..0b5ae47d2f
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/alphasort64.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/alphasort64.c>
diff --git a/sysdeps/unix/sysv/linux/arm/arm-features.h b/sysdeps/unix/sysv/linux/arm/arm-features.h
new file mode 100644
index 0000000000..5c721ef17d
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/arm-features.h
@@ -0,0 +1,30 @@
+/* Macros to test for CPU features on ARM.  Linux version.
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _LINUX_ARM_FEATURES_H
+#define _LINUX_ARM_FEATURES_H 1
+
+#ifndef __ASSEMBLER__
+# include <ldsodefs.h>
+
+# define ARM_HAVE_VFP	(GLRO (dl_hwcap) & HWCAP_ARM_VFP)
+#endif
+
+#include_next <arm-features.h>
+
+#endif  /* arm-features.h */
diff --git a/sysdeps/unix/sysv/linux/arm/bits/atomic.h b/sysdeps/unix/sysv/linux/arm/bits/atomic.h
new file mode 100644
index 0000000000..cc73684e8a
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/bits/atomic.h
@@ -0,0 +1,107 @@
+/* Atomic operations.  ARM/Linux version.
+   Copyright (C) 2002-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <stdint.h>
+
+/* If the compiler doesn't provide a primitive, we'll use this macro
+   to get assistance from the kernel.  */
+#ifdef __thumb2__
+# define __arm_assisted_full_barrier() \
+     __asm__ __volatile__						      \
+	     ("movw\tip, #0x0fa0\n\t"					      \
+	      "movt\tip, #0xffff\n\t"					      \
+	      "blx\tip"							      \
+	      : : : "ip", "lr", "cc", "memory");
+#else
+# define __arm_assisted_full_barrier() \
+     __asm__ __volatile__						      \
+	     ("mov\tip, #0xffff0fff\n\t"				      \
+	      "mov\tlr, pc\n\t"						      \
+	      "add\tpc, ip, #(0xffff0fa0 - 0xffff0fff)"			      \
+	      : : : "ip", "lr", "cc", "memory");
+#endif
+
+/* Atomic compare and exchange.  This sequence relies on the kernel to
+   provide a compare and exchange operation which is atomic on the
+   current architecture, either via cleverness on pre-ARMv6 or via
+   ldrex / strex on ARMv6.
+
+   It doesn't matter what register is used for a_oldval2, but we must
+   specify one to work around GCC PR rtl-optimization/21223.  Otherwise
+   it may cause a_oldval or a_tmp to be moved to a different register.
+
+   We use the union trick rather than simply using __typeof (...) in the
+   declarations of A_OLDVAL et al because when NEWVAL or OLDVAL is of the
+   form *PTR and PTR has a 'volatile ... *' type, then __typeof (*PTR) has
+   a 'volatile ...' type and this triggers -Wvolatile-register-var to
+   complain about 'register volatile ... asm ("reg")'.  */
+#ifdef __thumb2__
+/* Thumb-2 has ldrex/strex.  However it does not have barrier instructions,
+   so we still need to use the kernel helper.  */
+# define __arm_assisted_compare_and_exchange_val_32_acq(mem, newval, oldval) \
+  ({ union { __typeof (oldval) a; uint32_t v; } oldval_arg = { .a = (oldval) };\
+     union { __typeof (newval) a; uint32_t v; } newval_arg = { .a = (newval) };\
+     register uint32_t a_oldval asm ("r0");				      \
+     register uint32_t a_newval asm ("r1") = newval_arg.v;		      \
+     register __typeof (mem) a_ptr asm ("r2") = (mem);			      \
+     register uint32_t a_tmp asm ("r3");				      \
+     register uint32_t a_oldval2 asm ("r4") = oldval_arg.v;		      \
+     __asm__ __volatile__						      \
+	     ("0:\tldr\t%[tmp],[%[ptr]]\n\t"				      \
+	      "cmp\t%[tmp], %[old2]\n\t"				      \
+	      "bne\t1f\n\t"						      \
+	      "mov\t%[old], %[old2]\n\t"				      \
+	      "movw\t%[tmp], #0x0fc0\n\t"				      \
+	      "movt\t%[tmp], #0xffff\n\t"				      \
+	      "blx\t%[tmp]\n\t"						      \
+	      "bcc\t0b\n\t"						      \
+	      "mov\t%[tmp], %[old2]\n\t"				      \
+	      "1:"							      \
+	      : [old] "=&r" (a_oldval), [tmp] "=&r" (a_tmp)		      \
+	      : [new] "r" (a_newval), [ptr] "r" (a_ptr),		      \
+		[old2] "r" (a_oldval2)					      \
+	      : "ip", "lr", "cc", "memory");				      \
+     (__typeof (oldval)) a_tmp; })
+#else
+# define __arm_assisted_compare_and_exchange_val_32_acq(mem, newval, oldval) \
+  ({ union { __typeof (oldval) a; uint32_t v; } oldval_arg = { .a = (oldval) };\
+     union { __typeof (newval) a; uint32_t v; } newval_arg = { .a = (newval) };\
+     register uint32_t a_oldval asm ("r0");				      \
+     register uint32_t a_newval asm ("r1") = newval_arg.v;		      \
+     register __typeof (mem) a_ptr asm ("r2") = (mem);			      \
+     register uint32_t a_tmp asm ("r3");				      \
+     register uint32_t a_oldval2 asm ("r4") = oldval_arg.v;		      \
+     __asm__ __volatile__						      \
+	     ("0:\tldr\t%[tmp],[%[ptr]]\n\t"				      \
+	      "cmp\t%[tmp], %[old2]\n\t"				      \
+	      "bne\t1f\n\t"						      \
+	      "mov\t%[old], %[old2]\n\t"				      \
+	      "mov\t%[tmp], #0xffff0fff\n\t"				      \
+	      "mov\tlr, pc\n\t"						      \
+	      "add\tpc, %[tmp], #(0xffff0fc0 - 0xffff0fff)\n\t"		      \
+	      "bcc\t0b\n\t"						      \
+	      "mov\t%[tmp], %[old2]\n\t"				      \
+	      "1:"							      \
+	      : [old] "=&r" (a_oldval), [tmp] "=&r" (a_tmp)		      \
+	      : [new] "r" (a_newval), [ptr] "r" (a_ptr),		      \
+		[old2] "r" (a_oldval2)					      \
+	      : "ip", "lr", "cc", "memory");				      \
+     (__typeof (oldval)) a_tmp; })
+#endif
+
+#include <sysdeps/arm/bits/atomic.h>
diff --git a/sysdeps/unix/sysv/linux/arm/bits/fcntl.h b/sysdeps/unix/sysv/linux/arm/bits/fcntl.h
new file mode 100644
index 0000000000..a5f5f448e8
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/bits/fcntl.h
@@ -0,0 +1,54 @@
+/* O_*, F_*, FD_* bit values for Linux.
+   Copyright (C) 1995-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef	_FCNTL_H
+# error "Never use <bits/fcntl.h> directly; include <fcntl.h> instead."
+#endif
+
+#define __O_DIRECTORY	 040000	/* Must be a directory.	 */
+#define __O_NOFOLLOW	0100000	/* Do not follow links.	 */
+#define __O_DIRECT	0200000	/* Direct disk access.	*/
+#define __O_LARGEFILE	0400000
+
+struct flock
+  {
+    short int l_type;	/* Type of lock: F_RDLCK, F_WRLCK, or F_UNLCK.	*/
+    short int l_whence;	/* Where `l_start' is relative to (like `lseek').  */
+#ifndef __USE_FILE_OFFSET64
+    __off_t l_start;	/* Offset where the lock begins.  */
+    __off_t l_len;	/* Size of the locked area; zero means until EOF.  */
+#else
+    __off64_t l_start;	/* Offset where the lock begins.  */
+    __off64_t l_len;	/* Size of the locked area; zero means until EOF.  */
+#endif
+    __pid_t l_pid;	/* Process holding the lock.  */
+  };
+
+#ifdef __USE_LARGEFILE64
+struct flock64
+  {
+    short int l_type;	/* Type of lock: F_RDLCK, F_WRLCK, or F_UNLCK.	*/
+    short int l_whence;	/* Where `l_start' is relative to (like `lseek').  */
+    __off64_t l_start;	/* Offset where the lock begins.  */
+    __off64_t l_len;	/* Size of the locked area; zero means until EOF.  */
+    __pid_t l_pid;	/* Process holding the lock.  */
+  };
+#endif
+
+/* Include generic Linux declarations.  */
+#include <bits/fcntl-linux.h>
diff --git a/sysdeps/unix/sysv/linux/arm/bits/hwcap.h b/sysdeps/unix/sysv/linux/arm/bits/hwcap.h
new file mode 100644
index 0000000000..b438d2a02f
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/bits/hwcap.h
@@ -0,0 +1,42 @@
+/* Defines for bits in AT_HWCAP.  ARM Linux version.
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _SYS_AUXV_H
+# error "Never include <bits/hwcap.h> directly; use <sys/auxv.h> instead."
+#endif
+
+/* The following must match the kernel's <asm/hwcap.h>.  */
+#define HWCAP_ARM_SWP		1
+#define HWCAP_ARM_HALF		2
+#define HWCAP_ARM_THUMB		4
+#define HWCAP_ARM_26BIT		8
+#define HWCAP_ARM_FAST_MULT	16
+#define HWCAP_ARM_FPA		32
+#define HWCAP_ARM_VFP		64
+#define HWCAP_ARM_EDSP		128
+#define HWCAP_ARM_JAVA		256
+#define HWCAP_ARM_IWMMXT	512
+#define HWCAP_ARM_CRUNCH	1024
+#define HWCAP_ARM_THUMBEE	2048
+#define HWCAP_ARM_NEON		4096
+#define HWCAP_ARM_VFPv3		8192
+#define HWCAP_ARM_VFPv3D16	16384
+#define HWCAP_ARM_TLS		32768
+#define HWCAP_ARM_VFPv4		65536
+#define HWCAP_ARM_IDIVA		131072
+#define HWCAP_ARM_IDIVT		262144
diff --git a/sysdeps/unix/sysv/linux/arm/bits/mman.h b/sysdeps/unix/sysv/linux/arm/bits/mman.h
new file mode 100644
index 0000000000..8259b96894
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/bits/mman.h
@@ -0,0 +1,40 @@
+/* Definitions for POSIX memory map interface.  Linux/ARM version.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _SYS_MMAN_H
+# error "Never use <bits/mman.h> directly; include <sys/mman.h> instead."
+#endif
+
+/* The following definitions basically come from the kernel headers.
+   But the kernel header is not namespace clean.  */
+
+/* These are Linux-specific.  */
+#ifdef __USE_MISC
+# define MAP_GROWSDOWN	0x00100		/* Stack-like segment.  */
+# define MAP_DENYWRITE	0x00800		/* ETXTBSY */
+# define MAP_EXECUTABLE	0x01000		/* Mark it as an executable.  */
+# define MAP_LOCKED	0x02000		/* Lock the mapping.  */
+# define MAP_NORESERVE	0x04000		/* Don't check for reservations.  */
+# define MAP_POPULATE	0x08000		/* Populate (prefault) pagetables.  */
+# define MAP_NONBLOCK	0x10000		/* Do not block on IO.  */
+# define MAP_STACK	0x20000		/* Allocation is for a stack.  */
+# define MAP_HUGETLB	0x40000		/* Create huge page mapping.  */
+#endif
+
+/* Include generic Linux declarations.  */
+#include <bits/mman-linux.h>
diff --git a/sysdeps/unix/sysv/linux/arm/bits/shm.h b/sysdeps/unix/sysv/linux/arm/bits/shm.h
new file mode 100644
index 0000000000..a479054495
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/bits/shm.h
@@ -0,0 +1,103 @@
+/* Copyright (C) 1995-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _SYS_SHM_H
+# error "Never include <bits/shm.h> directly; use <sys/shm.h> instead."
+#endif
+
+#include <bits/types.h>
+
+/* Permission flag for shmget.  */
+#define SHM_R		0400		/* or S_IRUGO from <linux/stat.h> */
+#define SHM_W		0200		/* or S_IWUGO from <linux/stat.h> */
+
+/* Flags for `shmat'.  */
+#define SHM_RDONLY	010000		/* attach read-only else read-write */
+#define SHM_RND		020000		/* round attach address to SHMLBA */
+#define SHM_REMAP	040000		/* take-over region on attach */
+#define SHM_EXEC	0100000		/* execution access */
+
+/* Commands for `shmctl'.  */
+#define SHM_LOCK	11		/* lock segment (root only) */
+#define SHM_UNLOCK	12		/* unlock segment (root only) */
+
+__BEGIN_DECLS
+
+/* Segment low boundary address multiple.  */
+#define SHMLBA		(__getpagesize () << 2)
+extern int __getpagesize (void) __THROW __attribute__ ((__const__));
+
+
+/* Type to count number of attaches.  */
+typedef unsigned long int shmatt_t;
+
+/* Data structure describing a shared memory segment.  */
+struct shmid_ds
+  {
+    struct ipc_perm shm_perm;		/* operation permission struct */
+    size_t shm_segsz;			/* size of segment in bytes */
+    __time_t shm_atime;			/* time of last shmat() */
+    unsigned long int __glibc_reserved1;
+    __time_t shm_dtime;			/* time of last shmdt() */
+    unsigned long int __glibc_reserved2;
+    __time_t shm_ctime;			/* time of last change by shmctl() */
+    unsigned long int __glibc_reserved3;
+    __pid_t shm_cpid;			/* pid of creator */
+    __pid_t shm_lpid;			/* pid of last shmop */
+    shmatt_t shm_nattch;		/* number of current attaches */
+    unsigned long int __glibc_reserved4;
+    unsigned long int __glibc_reserved5;
+  };
+
+#ifdef __USE_MISC
+
+/* ipcs ctl commands */
+# define SHM_STAT 	13
+# define SHM_INFO 	14
+
+/* shm_mode upper byte flags */
+# define SHM_DEST	01000	/* segment will be destroyed on last detach */
+# define SHM_LOCKED	02000   /* segment will not be swapped */
+# define SHM_HUGETLB	04000	/* segment is mapped via hugetlb */
+# define SHM_NORESERVE	010000	/* don't check for reservations */
+
+struct	shminfo
+  {
+    unsigned long int shmmax;
+    unsigned long int shmmin;
+    unsigned long int shmmni;
+    unsigned long int shmseg;
+    unsigned long int shmall;
+    unsigned long int __glibc_reserved1;
+    unsigned long int __glibc_reserved2;
+    unsigned long int __glibc_reserved3;
+    unsigned long int __glibc_reserved4;
+  };
+
+struct shm_info
+  {
+    int used_ids;
+    unsigned long int shm_tot;	/* total allocated shm */
+    unsigned long int shm_rss;	/* total resident shm */
+    unsigned long int shm_swp;	/* total swapped shm */
+    unsigned long int swap_attempts;
+    unsigned long int swap_successes;
+  };
+
+#endif /* __USE_MISC */
+
+__END_DECLS
diff --git a/sysdeps/unix/sysv/linux/arm/brk.c b/sysdeps/unix/sysv/linux/arm/brk.c
new file mode 100644
index 0000000000..f442b5381d
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/brk.c
@@ -0,0 +1,41 @@
+/* brk system call for Linux/ARM.
+   Copyright (C) 1995-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <errno.h>
+#include <unistd.h>
+#include <sysdep.h>
+
+/* This must be initialized data because commons can't have aliases.  */
+void *__curbrk = 0;
+
+int
+__brk (void *addr)
+{
+  void *newbrk;
+
+  __curbrk = newbrk = (void *) INLINE_SYSCALL (brk, 1, addr);
+
+  if (newbrk < addr)
+    {
+      __set_errno (ENOMEM);
+      return -1;
+    }
+
+  return 0;
+}
+weak_alias (__brk, brk)
diff --git a/sysdeps/unix/sysv/linux/arm/clone.S b/sysdeps/unix/sysv/linux/arm/clone.S
new file mode 100644
index 0000000000..03fe9ab728
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/clone.S
@@ -0,0 +1,99 @@
+/* Copyright (C) 1996-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Pat Beirne <patb@corelcomputer.com>
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* clone() is even more special than fork() as it mucks with stacks
+   and invokes a function in the right context after its all over.  */
+
+#include <sysdep.h>
+#define _ERRNO_H	1
+#include <bits/errno.h>
+
+#define CLONE_VM      0x00000100
+#define CLONE_THREAD  0x00010000
+
+/* int clone(int (*fn)(void *arg), void *child_stack, int flags, void *arg,
+	     pid_t *ptid, struct user_desc *tls, pid_t *ctid); */
+
+        .text
+ENTRY(__clone)
+	@ sanity check args
+	cmp	r0, #0
+	ite	ne
+	cmpne	r1, #0
+	moveq	r0, #-EINVAL
+	beq	PLTJMP(syscall_error)
+
+	@ insert the args onto the new stack
+	str	r3, [r1, #-4]!
+	str	r0, [r1, #-4]!
+
+	@ do the system call
+	@ get flags
+	mov	r0, r2
+#ifdef RESET_PID
+	mov	ip, r2
+#endif
+	@ new sp is already in r1
+	push	{r4, r7}
+	cfi_adjust_cfa_offset (8)
+	cfi_rel_offset (r4, 0)
+	cfi_rel_offset (r7, 4)
+	ldr	r2, [sp, #8]
+	ldr	r3, [sp, #12]
+	ldr	r4, [sp, #16]
+	ldr	r7, =SYS_ify(clone)
+	swi	0x0
+	cfi_endproc
+	cmp	r0, #0
+	beq	1f
+	pop	{r4, r7}
+	blt	PLTJMP(C_SYMBOL_NAME(__syscall_error))
+	RETINSTR(, lr)
+
+	cfi_startproc
+PSEUDO_END (__clone)
+
+1:
+	.fnstart
+	.cantunwind
+#ifdef RESET_PID
+	tst	ip, #CLONE_THREAD
+	bne	3f
+	GET_TLS (lr)
+	mov	r1, r0
+	tst	ip, #CLONE_VM
+	ldr	r7, =SYS_ify(getpid)
+	ite	ne
+	movne	r0, #-1
+	swieq	0x0
+	NEGOFF_ADJ_BASE (r1, TID_OFFSET)
+	str	r0, NEGOFF_OFF1 (r1, TID_OFFSET)
+	str	r0, NEGOFF_OFF2 (r1, PID_OFFSET, TID_OFFSET)
+3:
+#endif
+	@ pick the function arg and call address off the stack and execute
+	ldr	r0, [sp, #4]
+	ldr 	ip, [sp], #8
+	BLX (ip)
+
+	@ and we are done, passing the return value through r0
+	b	PLTJMP(HIDDEN_JUMPTARGET(_exit))
+
+	.fnend
+
+weak_alias (__clone, clone)
diff --git a/sysdeps/unix/sysv/linux/arm/configure b/sysdeps/unix/sysv/linux/arm/configure
new file mode 100644
index 0000000000..71eb195942
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/configure
@@ -0,0 +1,6 @@
+# This file is generated from configure.ac by Autoconf.  DO NOT EDIT!
+ # Local configure fragment for sysdeps/unix/sysv/linux/arm.
+
+libc_cv_gcc_unwind_find_fde=no
+# Remove -fno-unwind-tables that was added in sysdeps/arm/preconfigure.ac.
+CFLAGS=${CFLAGS% -fno-unwind-tables}
diff --git a/sysdeps/unix/sysv/linux/arm/configure.ac b/sysdeps/unix/sysv/linux/arm/configure.ac
new file mode 100644
index 0000000000..8e4e20d2b8
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/configure.ac
@@ -0,0 +1,6 @@
+GLIBC_PROVIDES dnl See aclocal.m4 in the top level source directory.
+# Local configure fragment for sysdeps/unix/sysv/linux/arm.
+
+libc_cv_gcc_unwind_find_fde=no
+# Remove -fno-unwind-tables that was added in sysdeps/arm/preconfigure.ac.
+CFLAGS=${CFLAGS% -fno-unwind-tables}
diff --git a/sysdeps/unix/sysv/linux/arm/dl-cache.h b/sysdeps/unix/sysv/linux/arm/dl-cache.h
new file mode 100644
index 0000000000..66e6cdbfc6
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/dl-cache.h
@@ -0,0 +1,34 @@
+/* Support for reading /etc/ld.so.cache files written by Linux ldconfig.
+   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <ldconfig.h>
+
+/* In order to support the transition from unmarked objects
+   to marked objects we must treat unmarked objects as
+   compatible with either FLAG_ARM_LIBHF or FLAG_ARM_LIBSF.  */
+#ifdef __ARM_PCS_VFP
+# define _dl_cache_check_flags(flags) \
+  ((flags) == (FLAG_ARM_LIBHF | FLAG_ELF_LIBC6) \
+   || (flags) == FLAG_ELF_LIBC6)
+#else
+# define _dl_cache_check_flags(flags) \
+  ((flags) == (FLAG_ARM_LIBSF | FLAG_ELF_LIBC6) \
+   || (flags) == FLAG_ELF_LIBC6)
+#endif
+
+#include_next <dl-cache.h>
diff --git a/sysdeps/unix/sysv/linux/arm/dl-machine.h b/sysdeps/unix/sysv/linux/arm/dl-machine.h
new file mode 100644
index 0000000000..9946db8a56
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/dl-machine.h
@@ -0,0 +1,30 @@
+/* Machine-dependent ELF dynamic relocation inline functions.  ARM/Linux version
+   Copyright (C) 1995-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef dl_machine_h
+
+/* This definition is Linux-specific.  */
+#define CLEAR_CACHE(BEG,END)                                            \
+  INTERNAL_SYSCALL_ARM (cacheflush, , 3, (BEG), (END), 0)
+
+#endif
+
+/* The rest is just machine-specific.
+   This #include is outside the #ifndef because the parts of
+   dl-machine.h used only by dynamic-link.h are outside the guard.  */
+#include <sysdeps/arm/dl-machine.h>
diff --git a/sysdeps/unix/sysv/linux/arm/dl-procinfo.c b/sysdeps/unix/sysv/linux/arm/dl-procinfo.c
new file mode 100644
index 0000000000..d304539f0c
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/dl-procinfo.c
@@ -0,0 +1,65 @@
+/* Data for Linux/ARM version of processor capability information.
+   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Philip Blundell <philb@gnu.org>, 2001.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* This information must be kept in sync with the _DL_HWCAP_COUNT and
+   _DL_PLATFORM_COUNT definitions in procinfo.h.
+
+   If anything should be added here check whether the size of each string
+   is still ok with the given array size.
+
+   All the #ifdefs in the definitions ar equite irritating but
+   necessary if we want to avoid duplicating the information.  There
+   are three different modes:
+
+   - PROCINFO_DECL is defined.  This means we are only interested in
+     declarations.
+
+   - PROCINFO_DECL is not defined:
+
+     + if SHARED is defined the file is included in an array
+       initializer.  The .element = { ... } syntax is needed.
+
+     + if SHARED is not defined a normal array initialization is
+       needed.
+  */
+
+#ifndef PROCINFO_CLASS
+#define PROCINFO_CLASS
+#endif
+
+#if !defined PROCINFO_DECL && defined SHARED
+  ._dl_arm_cap_flags
+#else
+PROCINFO_CLASS const char _dl_arm_cap_flags[19][10]
+#endif
+#ifndef PROCINFO_DECL
+= {
+    "swp", "half", "thumb", "26bit", "fastmult", "fpa", "vfp", "edsp",
+    "java", "iwmmxt", "crunch", "thumbee", "neon", "vfpv3", "vfpv3d16",
+    "tls", "vfpv4", "idiva", "idivt",
+  }
+#endif
+#if !defined SHARED || defined PROCINFO_DECL
+;
+#else
+,
+#endif
+
+#undef PROCINFO_DECL
+#undef PROCINFO_CLASS
diff --git a/sysdeps/unix/sysv/linux/arm/dl-procinfo.h b/sysdeps/unix/sysv/linux/arm/dl-procinfo.h
new file mode 100644
index 0000000000..2f8f003e9f
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/dl-procinfo.h
@@ -0,0 +1,78 @@
+/* Linux/ARM version of processor capability information handling macros.
+   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Philip Blundell <philb@gnu.org>, 2001.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _DL_PROCINFO_H
+#define _DL_PROCINFO_H	1
+
+#include <ldsodefs.h>
+#include <sysdep.h>
+
+#define _DL_HWCAP_COUNT 19
+
+/* The kernel provides platform data but it is not interesting.  */
+#define _DL_HWCAP_PLATFORM 	0
+
+
+static inline int
+__attribute__ ((unused))
+_dl_procinfo (unsigned int type, unsigned long int word)
+{
+  int i;
+
+  /* Fallback to unknown output mechanism.  */
+  if (type == AT_HWCAP2)
+    return -1;
+
+  _dl_printf ("AT_HWCAP:   ");
+
+  for (i = 0; i < _DL_HWCAP_COUNT; ++i)
+    if (word & (1 << i))
+      _dl_printf (" %s", GLRO(dl_arm_cap_flags)[i]);
+
+  _dl_printf ("\n");
+
+  return 0;
+}
+
+static inline const char *
+__attribute__ ((unused))
+_dl_hwcap_string (int idx)
+{
+  return GLRO(dl_arm_cap_flags)[idx];
+};
+
+#define HWCAP_IMPORTANT		(HWCAP_ARM_VFP | HWCAP_ARM_NEON)
+
+static inline int
+__attribute__ ((unused))
+_dl_string_hwcap (const char *str)
+{
+  int i;
+
+  for (i = 0; i < _DL_HWCAP_COUNT; i++)
+    {
+      if (strcmp (str, GLRO(dl_arm_cap_flags)[i]) == 0)
+	return i;
+    }
+  return -1;
+};
+
+#define _dl_string_platform(str) (-1)
+
+#endif /* dl-procinfo.h */
diff --git a/sysdeps/unix/sysv/linux/arm/fchown.c b/sysdeps/unix/sysv/linux/arm/fchown.c
new file mode 100644
index 0000000000..3a69ecc9e7
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/fchown.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/fchown.c>
diff --git a/sysdeps/unix/sysv/linux/arm/fcntl.c b/sysdeps/unix/sysv/linux/arm/fcntl.c
new file mode 100644
index 0000000000..ea951bc4f9
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/fcntl.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/fcntl.c>
diff --git a/sysdeps/unix/sysv/linux/arm/ftruncate64.c b/sysdeps/unix/sysv/linux/arm/ftruncate64.c
new file mode 100644
index 0000000000..49631d4432
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/ftruncate64.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sys/types.h>
+#include <errno.h>
+#include <endian.h>
+#include <unistd.h>
+
+#include <sysdep.h>
+#include <sys/syscall.h>
+
+/* Truncate the file FD refers to to LENGTH bytes.  */
+int
+__ftruncate64 (int fd, off64_t length)
+{
+  unsigned int low = length & 0xffffffff;
+  unsigned int high = length >> 32;
+  int result = INLINE_SYSCALL (ftruncate64, 4, fd, 0,
+			       __LONG_LONG_PAIR (high, low));
+  return result;
+}
+weak_alias (__ftruncate64, ftruncate64)
diff --git a/sysdeps/unix/sysv/linux/arm/fxstat.c b/sysdeps/unix/sysv/linux/arm/fxstat.c
new file mode 100644
index 0000000000..4f219f0b9d
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/fxstat.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/fxstat.c>
diff --git a/sysdeps/unix/sysv/linux/arm/fxstatat.c b/sysdeps/unix/sysv/linux/arm/fxstatat.c
new file mode 100644
index 0000000000..0f8b3135d8
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/fxstatat.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/fxstatat.c>
diff --git a/sysdeps/unix/sysv/linux/arm/getcontext.S b/sysdeps/unix/sysv/linux/arm/getcontext.S
new file mode 100644
index 0000000000..b8b7b202b8
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/getcontext.S
@@ -0,0 +1,115 @@
+/* Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <rtld-global-offsets.h>
+
+#include "ucontext_i.h"
+
+	.syntax unified
+	.text
+
+/* int getcontext (ucontext_t *ucp) */
+
+ENTRY(__getcontext)
+	/* No need to save r0-r3, d0-d7, or d16-d31.  */
+	add	r1, r0, #MCONTEXT_ARM_R4
+	stmia   r1, {r4-r11}
+
+	/* Save R13 separately as Thumb can't STM it.  */
+	str     r13, [r0, #MCONTEXT_ARM_SP]
+	str     r14, [r0, #MCONTEXT_ARM_LR]
+	/* Return to LR */
+	str     r14, [r0, #MCONTEXT_ARM_PC]
+	/* Return zero */
+	mov     r2, #0
+	str     r2, [r0, #MCONTEXT_ARM_R0]
+
+	/* Save ucontext_t * across the next call.  */
+	mov	r4, r0
+
+	/* __sigprocmask(SIG_BLOCK, NULL, &(ucontext->uc_sigmask)) */
+	mov     r0, #SIG_BLOCK
+	mov     r1, #0
+	add     r2, r4, #UCONTEXT_SIGMASK
+	bl      PLTJMP(__sigprocmask)
+
+	/* Store FP regs.  Much of the FP code is copied from arm/setjmp.S.  */
+
+#ifdef PIC
+	ldr     r2, 1f
+	ldr     r1, .Lrtld_global_ro
+0:      add     r2, pc, r2
+	ldr     r2, [r2, r1]
+	ldr     r2, [r2, #RTLD_GLOBAL_RO_DL_HWCAP_OFFSET]
+#else
+	ldr     r2, .Lhwcap
+	ldr     r2, [r2, #0]
+#endif
+
+	add	r0, r4, #UCONTEXT_REGSPACE
+
+#ifdef __SOFTFP__
+	tst     r2, #HWCAP_ARM_VFP
+	beq     .Lno_vfp
+#endif
+
+	/* Store the VFP registers.
+	   Don't use VFP instructions directly because this code
+	   is used in non-VFP multilibs.  */
+	/* Following instruction is vstmia r0!, {d8-d15}.  */
+	stc     p11, cr8, [r0], #64
+	/* Store the floating-point status register.  */
+	/* Following instruction is vmrs r1, fpscr.  */
+	mrc     p10, 7, r1, cr1, cr0, 0
+	str     r1, [r0], #4
+.Lno_vfp:
+
+	tst     r2, #HWCAP_ARM_IWMMXT
+	beq     .Lno_iwmmxt
+
+	/* Save the call-preserved iWMMXt registers.  */
+	/* Following instructions are wstrd wr10, [r0], #8 (etc.)  */
+	stcl    p1, cr10, [r0], #8
+	stcl    p1, cr11, [r0], #8
+	stcl    p1, cr12, [r0], #8
+	stcl    p1, cr13, [r0], #8
+	stcl    p1, cr14, [r0], #8
+	stcl    p1, cr15, [r0], #8
+.Lno_iwmmxt:
+
+	/* Restore the clobbered R4 and LR.  */
+	ldr	r14, [r4, #MCONTEXT_ARM_LR]
+	ldr	r4, [r4, #MCONTEXT_ARM_R4]
+
+	mov	r0, #0
+
+	DO_RET(r14)
+
+END(__getcontext)
+
+#ifdef PIC
+1:      .long   _GLOBAL_OFFSET_TABLE_ - 0b - PC_OFS
+.Lrtld_global_ro:
+	.long   C_SYMBOL_NAME(_rtld_global_ro)(GOT)
+#else
+.Lhwcap:
+	.long   C_SYMBOL_NAME(_dl_hwcap)
+#endif
+
+
+weak_alias(__getcontext, getcontext)
diff --git a/sysdeps/unix/sysv/linux/arm/getdents64.c b/sysdeps/unix/sysv/linux/arm/getdents64.c
new file mode 100644
index 0000000000..0c75fb5a06
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/getdents64.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/getdents64.c>
diff --git a/sysdeps/unix/sysv/linux/arm/getegid.c b/sysdeps/unix/sysv/linux/arm/getegid.c
new file mode 100644
index 0000000000..37b4b4a530
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/getegid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/getegid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/geteuid.c b/sysdeps/unix/sysv/linux/arm/geteuid.c
new file mode 100644
index 0000000000..ebcb555b5e
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/geteuid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/geteuid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/getgid.c b/sysdeps/unix/sysv/linux/arm/getgid.c
new file mode 100644
index 0000000000..0a4d6061f0
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/getgid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/getgid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/getgroups.c b/sysdeps/unix/sysv/linux/arm/getgroups.c
new file mode 100644
index 0000000000..102ea24e14
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/getgroups.c
@@ -0,0 +1,2 @@
+/* We also have to rewrite the kernel gid_t to the user land type.  */
+#include <sysdeps/unix/sysv/linux/i386/getgroups.c>
diff --git a/sysdeps/unix/sysv/linux/arm/getresgid.c b/sysdeps/unix/sysv/linux/arm/getresgid.c
new file mode 100644
index 0000000000..b703a414cc
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/getresgid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/getresgid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/getresuid.c b/sysdeps/unix/sysv/linux/arm/getresuid.c
new file mode 100644
index 0000000000..0b14cefe34
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/getresuid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/getresuid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/getrlimit64.c b/sysdeps/unix/sysv/linux/arm/getrlimit64.c
new file mode 100644
index 0000000000..fef018f471
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/getrlimit64.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/getrlimit64.c>
diff --git a/sysdeps/unix/sysv/linux/arm/getuid.c b/sysdeps/unix/sysv/linux/arm/getuid.c
new file mode 100644
index 0000000000..d682c79a49
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/getuid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/getuid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/glob64.c b/sysdeps/unix/sysv/linux/arm/glob64.c
new file mode 100644
index 0000000000..82a9a296a7
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/glob64.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/glob64.c>
diff --git a/sysdeps/unix/sysv/linux/arm/internal_accept4.S b/sysdeps/unix/sysv/linux/arm/internal_accept4.S
new file mode 100644
index 0000000000..eeb5f50a26
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/internal_accept4.S
@@ -0,0 +1,6 @@
+/* Tag_ABI_align8_preserved: This code preserves 8-byte
+   alignment in any callee.  */
+	.eabi_attribute 25, 1
+/* Tag_ABI_align8_needed: This code may require 8-byte alignment from
+   the caller.  */
+	.eabi_attribute 24, 1
diff --git a/sysdeps/unix/sysv/linux/arm/internal_recvmmsg.S b/sysdeps/unix/sysv/linux/arm/internal_recvmmsg.S
new file mode 100644
index 0000000000..eeb5f50a26
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/internal_recvmmsg.S
@@ -0,0 +1,6 @@
+/* Tag_ABI_align8_preserved: This code preserves 8-byte
+   alignment in any callee.  */
+	.eabi_attribute 25, 1
+/* Tag_ABI_align8_needed: This code may require 8-byte alignment from
+   the caller.  */
+	.eabi_attribute 24, 1
diff --git a/sysdeps/unix/sysv/linux/arm/internal_sendmmsg.S b/sysdeps/unix/sysv/linux/arm/internal_sendmmsg.S
new file mode 100644
index 0000000000..eeb5f50a26
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/internal_sendmmsg.S
@@ -0,0 +1,6 @@
+/* Tag_ABI_align8_preserved: This code preserves 8-byte
+   alignment in any callee.  */
+	.eabi_attribute 25, 1
+/* Tag_ABI_align8_needed: This code may require 8-byte alignment from
+   the caller.  */
+	.eabi_attribute 24, 1
diff --git a/sysdeps/unix/sysv/linux/arm/ioperm.c b/sysdeps/unix/sysv/linux/arm/ioperm.c
new file mode 100644
index 0000000000..19b79f4bc6
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/ioperm.c
@@ -0,0 +1,279 @@
+/* Copyright (C) 1998-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Phil Blundell, based on the Alpha version by
+   David Mosberger.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* I/O port access on the ARM is something of a fiction.  What we do is to
+   map an appropriate area of /dev/mem into user space so that a program
+   can blast away at the hardware in such a way as to generate I/O cycles
+   on the bus.  To insulate user code from dependencies on particular
+   hardware we don't allow calls to inb() and friends to be inlined, but
+   force them to come through code in here every time.  Performance-critical
+   registers tend to be memory mapped these days so this should be no big
+   problem.  */
+
+/* Once upon a time this file used mprotect to enable and disable
+   access to particular areas of I/O space.  Unfortunately the
+   mprotect syscall also has the side effect of enabling caching for
+   the area affected (this is a kernel limitation).  So we now just
+   enable all the ports all of the time.  */
+
+#include <errno.h>
+#include <fcntl.h>
+#include <stdio.h>
+#include <ctype.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+#include <sys/types.h>
+#include <sys/mman.h>
+
+#include <linux/version.h>
+#include <sys/sysctl.h>
+
+#define PATH_ARM_SYSTYPE	"/etc/arm_systype"
+#define PATH_CPUINFO		"/proc/cpuinfo"
+
+#define MAX_PORT	0x10000
+
+static struct {
+  unsigned long int	base;
+  unsigned long int	io_base;
+  unsigned int		shift;
+  unsigned int		initdone;	/* since all the above could be 0 */
+} io;
+
+#define IO_BASE_FOOTBRIDGE	0x7c000000
+#define IO_SHIFT_FOOTBRIDGE	0
+
+static struct platform {
+  const char		*name;
+  unsigned long int	io_base;
+  unsigned int		shift;
+} platform[] = {
+  /* All currently supported platforms are in fact the same. :-)  */
+  {"Chalice-CATS",	IO_BASE_FOOTBRIDGE,	IO_SHIFT_FOOTBRIDGE},
+  {"DEC-EBSA285",	IO_BASE_FOOTBRIDGE,	IO_SHIFT_FOOTBRIDGE},
+  {"Corel-NetWinder",	IO_BASE_FOOTBRIDGE,	IO_SHIFT_FOOTBRIDGE},
+  {"Rebel-NetWinder",	IO_BASE_FOOTBRIDGE,	IO_SHIFT_FOOTBRIDGE},
+};
+
+#define IO_ADDR(port)	(io.base + ((port) << io.shift))
+
+/*
+ * Initialize I/O system.  There are several ways to get the information
+ * we need.  Each is tried in turn until one succeeds.
+ *
+ * 1. Sysctl (CTL_BUS, CTL_BUS_ISA, ISA_*).  This is the preferred method
+ *    but not all kernels support it.
+ *
+ * 2. Read the value (not the contents) of symlink PATH_ARM_SYSTYPE.
+ *    - If it matches one of the entries in the table above, use the
+ *      corresponding values.
+ *    - If it begins with a number, assume this is a previously
+ *      unsupported system and the values encode, in order,
+ *      "<io_base>,<port_shift>".
+ *
+ * 3. Lookup the "system type" field in /proc/cpuinfo.  Again, if it
+ *    matches an entry in the platform[] table, use the corresponding
+ *    values.
+ */
+
+/* The Linux kernel headers renamed this constant between 2.5.26 and
+   2.5.27.  It was backported to 2.4 between 2.4.22 and 2.4.23.  */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,23)
+# define BUS_ISA CTL_BUS_ISA
+#endif
+
+static int
+init_iosys (void)
+{
+  char systype[256];
+  int i, n;
+  static int iobase_name[] = { CTL_BUS, BUS_ISA, BUS_ISA_PORT_BASE };
+  static int ioshift_name[] = { CTL_BUS, BUS_ISA, BUS_ISA_PORT_SHIFT };
+  size_t len = sizeof(io.base);
+
+  if (! __sysctl (iobase_name, 3, &io.io_base, &len, NULL, 0)
+      && ! __sysctl (ioshift_name, 3, &io.shift, &len, NULL, 0))
+    {
+      io.initdone = 1;
+      return 0;
+    }
+
+  n = __readlink (PATH_ARM_SYSTYPE, systype, sizeof (systype) - 1);
+  if (n > 0)
+    {
+      systype[n] = '\0';
+      if (isdigit (systype[0]))
+	{
+	  if (sscanf (systype, "%li,%i", &io.io_base, &io.shift) == 2)
+	    {
+	      io.initdone = 1;
+	      return 0;
+	    }
+	  /* else we're likely going to fail with the system match below */
+	}
+    }
+  else
+    {
+      FILE * fp;
+
+      fp = fopen (PATH_CPUINFO, "rce");
+      if (! fp)
+	return -1;
+      while ((n = fscanf (fp, "Hardware\t: %256[^\n]\n", systype))
+	     != EOF)
+	{
+	  if (n == 1)
+	    break;
+	  else
+	    fgets_unlocked (systype, 256, fp);
+	}
+      fclose (fp);
+
+      if (n == EOF)
+	{
+	  /* this can happen if the format of /proc/cpuinfo changes...  */
+	  fprintf (stderr,
+		   "ioperm: Unable to determine system type.\n"
+		   "\t(May need " PATH_ARM_SYSTYPE " symlink?)\n");
+	  __set_errno (ENODEV);
+	  return -1;
+	}
+    }
+
+  /* translate systype name into i/o system: */
+  for (i = 0; i < sizeof (platform) / sizeof (platform[0]); ++i)
+    {
+      if (strcmp (platform[i].name, systype) == 0)
+	{
+	  io.shift = platform[i].shift;
+	  io.io_base = platform[i].io_base;
+	  io.initdone = 1;
+	  return 0;
+	}
+    }
+
+  /* systype is not a known platform name... */
+  __set_errno (ENODEV);
+  return -1;
+}
+
+int
+_ioperm (unsigned long int from, unsigned long int num, int turn_on)
+{
+  if (! io.initdone && init_iosys () < 0)
+    return -1;
+
+  /* this test isn't as silly as it may look like; consider overflows! */
+  if (from >= MAX_PORT || from + num > MAX_PORT)
+    {
+      __set_errno (EINVAL);
+      return -1;
+    }
+
+  if (turn_on)
+    {
+      if (! io.base)
+	{
+	  int fd;
+
+	  fd = __open ("/dev/mem", O_RDWR);
+	  if (fd < 0)
+	    return -1;
+
+	  io.base =
+	    (unsigned long int) __mmap (0, MAX_PORT << io.shift,
+					PROT_READ | PROT_WRITE,
+					MAP_SHARED, fd, io.io_base);
+	  __close (fd);
+	  if ((long) io.base == -1)
+	    return -1;
+	}
+    }
+
+  return 0;
+}
+
+
+int
+_iopl (unsigned int level)
+{
+    if (level > 3)
+      {
+	__set_errno (EINVAL);
+	return -1;
+      }
+    if (level)
+      {
+	return _ioperm (0, MAX_PORT, 1);
+      }
+    return 0;
+}
+
+
+void
+_outb (unsigned char b, unsigned long int port)
+{
+  *((volatile unsigned char *)(IO_ADDR (port))) = b;
+}
+
+
+void
+_outw (unsigned short b, unsigned long int port)
+{
+  *((volatile unsigned short *)(IO_ADDR (port))) = b;
+}
+
+
+void
+_outl (unsigned int b, unsigned long int port)
+{
+  *((volatile unsigned long *)(IO_ADDR (port))) = b;
+}
+
+
+unsigned int
+_inb (unsigned long int port)
+{
+  return *((volatile unsigned char *)(IO_ADDR (port)));
+}
+
+
+unsigned int
+_inw (unsigned long int port)
+{
+  return *((volatile unsigned short *)(IO_ADDR (port)));
+}
+
+
+unsigned int
+_inl (unsigned long int port)
+{
+  return *((volatile unsigned long *)(IO_ADDR (port)));
+}
+
+weak_alias (_ioperm, ioperm);
+weak_alias (_iopl, iopl);
+weak_alias (_inb, inb);
+weak_alias (_inw, inw);
+weak_alias (_inl, inl);
+weak_alias (_outb, outb);
+weak_alias (_outw, outw);
+weak_alias (_outl, outl);
diff --git a/sysdeps/unix/sysv/linux/arm/kernel-features.h b/sysdeps/unix/sysv/linux/arm/kernel-features.h
new file mode 100644
index 0000000000..9d7ef877af
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/kernel-features.h
@@ -0,0 +1,45 @@
+/* Set flags signalling availability of kernel features based on given
+   kernel version number.
+   Copyright (C) 2006-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* The utimes syscall was added before 2.6.1.  */
+#define __ASSUME_UTIMES	1
+
+/* The signal frame layout changed in 2.6.18.  */
+#if __LINUX_KERNEL_VERSION >= 132626
+# define __ASSUME_SIGFRAME_V2	1
+#endif
+
+/* Support for the eventfd2 and signalfd4 syscalls was added in 2.6.27.  */
+#if __LINUX_KERNEL_VERSION >= 0x02061b
+# define __ASSUME_EVENTFD2	1
+# define __ASSUME_SIGNALFD4	1
+#endif
+
+/* Support for the accept4 syscall was added in 2.6.36.  */
+#if __LINUX_KERNEL_VERSION >= 0x020624
+# define __ASSUME_ACCEPT4	1
+#endif
+
+#include_next <kernel-features.h>
+
+/* Support for pselect6, ppoll and epoll_pwait was added in 2.6.32.  */
+#if __LINUX_KERNEL_VERSION < 0x020620
+# undef __ASSUME_PSELECT
+# undef __ASSUME_PPOLL
+#endif
diff --git a/sysdeps/unix/sysv/linux/arm/lchown.c b/sysdeps/unix/sysv/linux/arm/lchown.c
new file mode 100644
index 0000000000..c89de99ba2
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/lchown.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/lchown.c>
diff --git a/sysdeps/unix/sysv/linux/arm/ldconfig.h b/sysdeps/unix/sysv/linux/arm/ldconfig.h
new file mode 100644
index 0000000000..316d82bdb3
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/ldconfig.h
@@ -0,0 +1,25 @@
+/* Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdeps/generic/ldconfig.h>
+
+#define SYSDEP_KNOWN_INTERPRETER_NAMES \
+  { "/lib/ld-linux.so.3", FLAG_ELF_LIBC6 }, \
+  { "/lib/ld-linux-armhf.so.3", FLAG_ELF_LIBC6 },
+#define SYSDEP_KNOWN_LIBRARY_NAMES \
+  { "libc.so.6", FLAG_ELF_LIBC6 },	\
+  { "libm.so.6", FLAG_ELF_LIBC6 },
diff --git a/sysdeps/unix/sysv/linux/arm/ldsodefs.h b/sysdeps/unix/sysv/linux/arm/ldsodefs.h
new file mode 100644
index 0000000000..32cdfab64c
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/ldsodefs.h
@@ -0,0 +1,73 @@
+/* Run-time dynamic linker data structures for loaded ELF shared objects.
+   Copyright (C) 2010-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _ARM_LINUX_LDSODEFS_H
+#define _ARM_LINUX_LDSODEFS_H 1
+
+#include_next <ldsodefs.h>
+
+#undef VALID_ELF_HEADER
+#undef VALID_ELF_OSABI
+#undef MORE_ELF_HEADER_DATA
+
+#define EXTRA_OSABI ELFOSABI_ARM_AEABI
+
+#ifdef __ARM_PCS_VFP
+# define VALID_FLOAT_ABI(x) \
+  ((EF_ARM_EABI_VERSION ((x)) != EF_ARM_EABI_VER5)	\
+   || !((x) & EF_ARM_ABI_FLOAT_SOFT))
+#else
+# define VALID_FLOAT_ABI(x) \
+  ((EF_ARM_EABI_VERSION ((x)) != EF_ARM_EABI_VER5)	\
+   || !((x) & EF_ARM_ABI_FLOAT_HARD))
+#endif
+
+#undef VALID_ELF_HEADER
+#define VALID_ELF_HEADER(hdr,exp,size)		\
+  ((memcmp (hdr, exp, size) == 0		\
+    || memcmp (hdr, expected2, size) == 0	\
+    || memcmp (hdr, expected3, size) == 0)	\
+   && VALID_FLOAT_ABI (ehdr->e_flags))
+#define VALID_ELF_OSABI(osabi)		(osabi == ELFOSABI_SYSV		\
+					 || osabi == ELFOSABI_GNU	\
+					 || osabi == EXTRA_OSABI)
+#define MORE_ELF_HEADER_DATA				\
+  static const unsigned char expected2[EI_PAD] =	\
+  {							\
+    [EI_MAG0] = ELFMAG0,				\
+    [EI_MAG1] = ELFMAG1,				\
+    [EI_MAG2] = ELFMAG2,				\
+    [EI_MAG3] = ELFMAG3,				\
+    [EI_CLASS] = ELFW(CLASS),				\
+    [EI_DATA] = byteorder,				\
+    [EI_VERSION] = EV_CURRENT,				\
+    [EI_OSABI] = ELFOSABI_GNU				\
+  };							\
+  static const unsigned char expected3[EI_PAD] =	\
+  {							\
+    [EI_MAG0] = ELFMAG0,				\
+    [EI_MAG1] = ELFMAG1,				\
+    [EI_MAG2] = ELFMAG2,				\
+    [EI_MAG3] = ELFMAG3,				\
+    [EI_CLASS] = ELFW(CLASS),				\
+    [EI_DATA] = byteorder,				\
+    [EI_VERSION] = EV_CURRENT,				\
+    [EI_OSABI] = EXTRA_OSABI				\
+  }
+
+#endif
diff --git a/sysdeps/unix/sysv/linux/arm/libc-aeabi_read_tp.S b/sysdeps/unix/sysv/linux/arm/libc-aeabi_read_tp.S
new file mode 100644
index 0000000000..6132afc151
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/libc-aeabi_read_tp.S
@@ -0,0 +1 @@
+#include <aeabi_read_tp.S>
diff --git a/sysdeps/unix/sysv/linux/arm/libc-do-syscall.S b/sysdeps/unix/sysv/linux/arm/libc-do-syscall.S
new file mode 100644
index 0000000000..d42a94a560
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/libc-do-syscall.S
@@ -0,0 +1,48 @@
+/* Copyright (C) 2010-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+/* Out-of-line syscall stub.  We expect the system call number in ip
+   and return the raw result in r0.  No registers are clobbered.
+   We could avoid using the stack for this, but the goal is accurate
+   unwind information - and while there is a reserved prefix in the
+   ARM unwind tables for register to register moves, the actual opcodes
+   are not defined.  */
+
+#if defined(__thumb__)
+	.thumb
+	.syntax unified
+	.hidden __libc_do_syscall
+
+#undef CALL_MCOUNT
+#define CALL_MCOUNT
+
+ENTRY (__libc_do_syscall)
+	.fnstart
+	push	{r7, lr}
+	.save	{r7, lr}
+	cfi_adjust_cfa_offset (8)
+	cfi_rel_offset (r7, 0)
+	cfi_rel_offset (lr, 4)
+	mov	r7, ip
+	swi	0x0
+	pop	{r7, pc}
+	.fnend
+END (__libc_do_syscall)
+
+#endif /* __thumb__ */
diff --git a/sysdeps/unix/sysv/linux/arm/lockf64.c b/sysdeps/unix/sysv/linux/arm/lockf64.c
new file mode 100644
index 0000000000..a88f5a784a
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/lockf64.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/lockf64.c>
diff --git a/sysdeps/unix/sysv/linux/arm/lxstat.c b/sysdeps/unix/sysv/linux/arm/lxstat.c
new file mode 100644
index 0000000000..2371cd9719
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/lxstat.c
@@ -0,0 +1,2 @@
+#include <sysdeps/unix/sysv/linux/i386/lxstat.c>
+
diff --git a/sysdeps/unix/sysv/linux/arm/makecontext.c b/sysdeps/unix/sysv/linux/arm/makecontext.c
new file mode 100644
index 0000000000..73fbe4a329
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/makecontext.c
@@ -0,0 +1,73 @@
+/* Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <stdarg.h>
+#include <ucontext.h>
+
+/* Number of arguments that go in registers.  */
+#define NREG_ARGS  4
+
+/* Take a context previously prepared via getcontext() and set to
+   call func() with the given int only args.  */
+void
+__makecontext (ucontext_t *ucp, void (*func) (void), int argc, ...)
+{
+  extern void __startcontext (void);
+  unsigned long *funcstack;
+  va_list vl;
+  unsigned long *regptr;
+  unsigned int reg;
+  int misaligned;
+
+  /* Start at the top of stack.  */
+  funcstack = (unsigned long *) (ucp->uc_stack.ss_sp + ucp->uc_stack.ss_size);
+
+  /* Ensure the stack stays eight byte aligned.  */
+  misaligned = ((unsigned long) funcstack & 4) != 0;
+
+  if ((argc > NREG_ARGS) && (argc & 1) != 0)
+    misaligned = !misaligned;
+
+  if (misaligned)
+    funcstack -= 1;
+
+  va_start (vl, argc);
+
+  /* Reserve space for the on-stack arguments.  */
+  if (argc > NREG_ARGS)
+    funcstack -= (argc - NREG_ARGS);
+
+  ucp->uc_mcontext.arm_sp = (unsigned long) funcstack;
+  ucp->uc_mcontext.arm_pc = (unsigned long) func;
+
+  /* Exit to startcontext() with the next context in R4 */
+  ucp->uc_mcontext.arm_r4 = (unsigned long) ucp->uc_link;
+  ucp->uc_mcontext.arm_lr = (unsigned long) __startcontext;
+
+  /* The first four arguments go into registers.  */
+  regptr = &(ucp->uc_mcontext.arm_r0);
+
+  for (reg = 0; (reg < argc) && (reg < NREG_ARGS); reg++)
+    *regptr++ = va_arg (vl, unsigned long);
+
+  /* And the remainder on the stack.  */
+  for (; reg < argc; reg++)
+    *funcstack++ = va_arg (vl, unsigned long);
+
+  va_end (vl);
+}
+weak_alias (__makecontext, makecontext)
diff --git a/sysdeps/unix/sysv/linux/arm/mmap.S b/sysdeps/unix/sysv/linux/arm/mmap.S
new file mode 100644
index 0000000000..0383bb5547
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/mmap.S
@@ -0,0 +1,64 @@
+/* Copyright (C) 1998-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+#define	EINVAL		22
+
+	.text
+
+ENTRY (__mmap)
+	/* shuffle args */
+	push	{ r5 }
+	cfi_adjust_cfa_offset (4)
+	cfi_rel_offset (r5, 0)
+	ldr	r5, [sp, #8]
+	push	{ r4 }
+	cfi_adjust_cfa_offset (4)
+	cfi_rel_offset (r4, 0)
+	cfi_remember_state
+	ldr	r4, [sp, #8]
+
+	/* convert offset to pages */
+	movs	ip, r5, lsl #20
+	bne	.Linval
+	mov	r5, r5, lsr #12
+
+	/* do the syscall */
+	DO_CALL (mmap2, 0)
+
+	/* restore registers */
+2:
+	pop	{ r4 }
+	cfi_adjust_cfa_offset (-4)
+	cfi_restore (r4)
+	pop	{ r5 }
+	cfi_adjust_cfa_offset (-4)
+	cfi_restore (r5)
+
+	cmn	r0, $4096
+	it	cc
+	RETINSTR(cc, lr)
+	b	PLTJMP(syscall_error)
+
+	cfi_restore_state
+.Linval:
+	mov	r0, #-EINVAL
+	b	2b
+PSEUDO_END (__mmap)
+
+weak_alias (__mmap, mmap)
diff --git a/sysdeps/unix/sysv/linux/arm/mmap64.S b/sysdeps/unix/sysv/linux/arm/mmap64.S
new file mode 100644
index 0000000000..eae522988c
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/mmap64.S
@@ -0,0 +1,72 @@
+/* Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	.syntax unified
+
+#define	EINVAL		22
+
+#ifdef __ARMEB__
+# define LOW_OFFSET      8 + 4
+/* The initial + 4 is for the stack postdecrement.  */
+# define HIGH_OFFSET 4 + 8 + 0
+#else
+# define LOW_OFFSET      8 + 0
+# define HIGH_OFFSET 4 + 8 + 4
+#endif
+
+	/* The mmap2 system call takes six arguments, all in registers.  */
+	.text
+ENTRY (__mmap64)
+	ldr	ip, [sp, $LOW_OFFSET]
+	push	{ r5 }
+	cfi_adjust_cfa_offset (4)
+	cfi_rel_offset (r5, 0)
+	ldr	r5, [sp, $HIGH_OFFSET]
+	push	{ r4 }
+	cfi_adjust_cfa_offset (4)
+	cfi_rel_offset (r4, 0)
+	cfi_remember_state
+	movs	r4, ip, lsl $20		@ check that offset is page-aligned
+	mov	ip, ip, lsr $12
+	it	eq
+	movseq	r4, r5, lsr $12		@ check for overflow
+	bne	.Linval
+	ldr	r4, [sp, $8]		@ load fd
+	orr	r5, ip, r5, lsl $20	@ compose page offset
+	DO_CALL (mmap2, 0)
+	cmn	r0, $4096
+	pop	{r4, r5}
+	cfi_adjust_cfa_offset (-8)
+	cfi_restore (r4)
+	cfi_restore (r5)
+	it	cc
+	RETINSTR(cc, lr)
+	b	PLTJMP(syscall_error)
+
+	cfi_restore_state
+.Linval:
+	mov	r0, $-EINVAL
+	pop	{r4, r5}
+	cfi_adjust_cfa_offset (-8)
+	cfi_restore (r4)
+	cfi_restore (r5)
+	b	PLTJMP(syscall_error)
+PSEUDO_END (__mmap64)
+
+weak_alias (__mmap64, mmap64)
diff --git a/sysdeps/unix/sysv/linux/arm/msgctl.c b/sysdeps/unix/sysv/linux/arm/msgctl.c
new file mode 100644
index 0000000000..a0b6cb4372
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/msgctl.c
@@ -0,0 +1,33 @@
+/* Copyright (C) 1995-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Ulrich Drepper <drepper@gnu.ai.mit.edu>, August 1995.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <errno.h>
+#include <sys/msg.h>
+#include <ipc_priv.h>
+#include <sysdep.h>
+#include <sys/syscall.h>
+
+
+int
+__new_msgctl (int msqid, int cmd, struct msqid_ds *buf)
+{
+  return INLINE_SYSCALL (msgctl, 3, msqid, cmd | __IPC_64, buf);
+}
+
+#include <shlib-compat.h>
+versioned_symbol (libc, __new_msgctl, msgctl, GLIBC_2_2);
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/Makefile b/sysdeps/unix/sysv/linux/arm/nptl/Makefile
new file mode 100644
index 0000000000..ef8076cf3f
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/Makefile
@@ -0,0 +1,17 @@
+ifeq ($(subdir),rt)
+librt-sysdep_routines += rt-aeabi_unwind_cpp_pr1
+librt-shared-only-routines += rt-aeabi_unwind_cpp_pr1
+endif
+
+ifeq ($(subdir),nptl)
+libpthread-sysdep_routines += nptl-aeabi_unwind_cpp_pr1
+libpthread-shared-only-routines += nptl-aeabi_unwind_cpp_pr1
+
+# This test relies on compiling part of the binary with EH information,
+# part without, and unwinding through.  The .ARM.exidx tables have
+# start addresses for EH regions, but no end addresses.  Every
+# region an exception needs to propogate through must have unwind
+# information, or a previous function's unwind table may be used
+# by mistake.
+tests := $(filter-out tst-cleanupx4,$(tests))
+endif
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/Versions b/sysdeps/unix/sysv/linux/arm/nptl/Versions
new file mode 100644
index 0000000000..435c9212c4
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/Versions
@@ -0,0 +1,8 @@
+libc {
+  GLIBC_PRIVATE {
+    # A copy of sigaction lives in NPTL, and needs these.
+    __default_sa_restorer; __default_rt_sa_restorer;
+    __default_sa_restorer_v1; __default_rt_sa_restorer_v1;
+    __default_sa_restorer_v2; __default_rt_sa_restorer_v2;
+  }
+}
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/bits/pthreadtypes.h b/sysdeps/unix/sysv/linux/arm/nptl/bits/pthreadtypes.h
new file mode 100644
index 0000000000..26edce54fe
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/bits/pthreadtypes.h
@@ -0,0 +1,184 @@
+/* Copyright (C) 2002-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _BITS_PTHREADTYPES_H
+#define _BITS_PTHREADTYPES_H	1
+
+#include <endian.h>
+
+#define __SIZEOF_PTHREAD_ATTR_T 36
+#define __SIZEOF_PTHREAD_MUTEX_T 24
+#define __SIZEOF_PTHREAD_MUTEXATTR_T 4
+#define __SIZEOF_PTHREAD_COND_T 48
+#define __SIZEOF_PTHREAD_COND_COMPAT_T 12
+#define __SIZEOF_PTHREAD_CONDATTR_T 4
+#define __SIZEOF_PTHREAD_RWLOCK_T 32
+#define __SIZEOF_PTHREAD_RWLOCKATTR_T 8
+#define __SIZEOF_PTHREAD_BARRIER_T 20
+#define __SIZEOF_PTHREAD_BARRIERATTR_T 4
+
+
+/* Thread identifiers.  The structure of the attribute type is not
+   exposed on purpose.  */
+typedef unsigned long int pthread_t;
+
+
+union pthread_attr_t
+{
+  char __size[__SIZEOF_PTHREAD_ATTR_T];
+  long int __align;
+};
+#ifndef __have_pthread_attr_t
+typedef union pthread_attr_t pthread_attr_t;
+# define __have_pthread_attr_t	1
+#endif
+
+
+typedef struct __pthread_internal_slist
+{
+  struct __pthread_internal_slist *__next;
+} __pthread_slist_t;
+
+
+/* Data structures for mutex handling.  The structure of the attribute
+   type is not exposed on purpose.  */
+typedef union
+{
+  struct __pthread_mutex_s
+  {
+    int __lock;
+    unsigned int __count;
+    int __owner;
+    /* KIND must stay at this position in the structure to maintain
+       binary compatibility.  */
+    int __kind;
+    unsigned int __nusers;
+    __extension__ union
+    {
+      int __spins;
+      __pthread_slist_t __list;
+    };
+  } __data;
+  char __size[__SIZEOF_PTHREAD_MUTEX_T];
+  long int __align;
+} pthread_mutex_t;
+
+typedef union
+{
+  char __size[__SIZEOF_PTHREAD_MUTEXATTR_T];
+  long int __align;
+} pthread_mutexattr_t;
+
+
+/* Data structure for conditional variable handling.  The structure of
+   the attribute type is not exposed on purpose.  */
+typedef union
+{
+  struct
+  {
+    int __lock;
+    unsigned int __futex;
+    __extension__ unsigned long long int __total_seq;
+    __extension__ unsigned long long int __wakeup_seq;
+    __extension__ unsigned long long int __woken_seq;
+    void *__mutex;
+    unsigned int __nwaiters;
+    unsigned int __broadcast_seq;
+  } __data;
+  char __size[__SIZEOF_PTHREAD_COND_T];
+  __extension__ long long int __align;
+} pthread_cond_t;
+
+typedef union
+{
+  char __size[__SIZEOF_PTHREAD_CONDATTR_T];
+  long int __align;
+} pthread_condattr_t;
+
+
+/* Keys for thread-specific data */
+typedef unsigned int pthread_key_t;
+
+
+/* Once-only execution */
+typedef int pthread_once_t;
+
+
+#if defined __USE_UNIX98 || defined __USE_XOPEN2K
+/* Data structure for read-write lock variable handling.  The
+   structure of the attribute type is not exposed on purpose.  */
+typedef union
+{
+  struct
+  {
+    int __lock;
+    unsigned int __nr_readers;
+    unsigned int __readers_wakeup;
+    unsigned int __writer_wakeup;
+    unsigned int __nr_readers_queued;
+    unsigned int __nr_writers_queued;
+#if __BYTE_ORDER == __BIG_ENDIAN
+    unsigned char __pad1;
+    unsigned char __pad2;
+    unsigned char __shared;
+    /* FLAGS must stay at this position in the structure to maintain
+       binary compatibility.  */
+    unsigned char __flags;
+#else
+    /* FLAGS must stay at this position in the structure to maintain
+       binary compatibility.  */
+    unsigned char __flags;
+    unsigned char __shared;
+    unsigned char __pad1;
+    unsigned char __pad2;
+#endif
+    int __writer;
+  } __data;
+  char __size[__SIZEOF_PTHREAD_RWLOCK_T];
+  long int __align;
+} pthread_rwlock_t;
+
+typedef union
+{
+  char __size[__SIZEOF_PTHREAD_RWLOCKATTR_T];
+  long int __align;
+} pthread_rwlockattr_t;
+#endif
+
+
+#ifdef __USE_XOPEN2K
+/* POSIX spinlock data type.  */
+typedef volatile int pthread_spinlock_t;
+
+
+/* POSIX barriers data type.  The structure of the type is
+   deliberately not exposed.  */
+typedef union
+{
+  char __size[__SIZEOF_PTHREAD_BARRIER_T];
+  long int __align;
+} pthread_barrier_t;
+
+typedef union
+{
+  char __size[__SIZEOF_PTHREAD_BARRIERATTR_T];
+  int __align;
+} pthread_barrierattr_t;
+#endif
+
+
+#endif	/* bits/pthreadtypes.h */
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/bits/semaphore.h b/sysdeps/unix/sysv/linux/arm/nptl/bits/semaphore.h
new file mode 100644
index 0000000000..50d3a11ebd
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/bits/semaphore.h
@@ -0,0 +1,34 @@
+/* Copyright (C) 2002-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _SEMAPHORE_H
+# error "Never use <bits/semaphore.h> directly; include <semaphore.h> instead."
+#endif
+
+
+#define __SIZEOF_SEM_T	16
+
+
+/* Value returned if `sem_open' failed.  */
+#define SEM_FAILED      ((sem_t *) 0)
+
+
+typedef union
+{
+  char __size[__SIZEOF_SEM_T];
+  long int __align;
+} sem_t;
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/c++-types.data b/sysdeps/unix/sysv/linux/arm/nptl/c++-types.data
new file mode 100644
index 0000000000..fde53bf337
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/c++-types.data
@@ -0,0 +1,67 @@
+blkcnt64_t:x
+blkcnt_t:l
+blksize_t:l
+caddr_t:Pc
+clockid_t:i
+clock_t:l
+daddr_t:i
+dev_t:y
+fd_mask:l
+fsblkcnt64_t:y
+fsblkcnt_t:m
+fsfilcnt64_t:y
+fsfilcnt_t:m
+fsid_t:8__fsid_t
+gid_t:j
+id_t:j
+ino64_t:y
+ino_t:m
+int16_t:s
+int32_t:i
+int64_t:x
+int8_t:a
+intptr_t:i
+key_t:i
+loff_t:x
+mode_t:j
+nlink_t:j
+off64_t:x
+off_t:l
+pid_t:i
+pthread_attr_t:14pthread_attr_t
+pthread_barrier_t:17pthread_barrier_t
+pthread_barrierattr_t:21pthread_barrierattr_t
+pthread_cond_t:14pthread_cond_t
+pthread_condattr_t:18pthread_condattr_t
+pthread_key_t:j
+pthread_mutex_t:15pthread_mutex_t
+pthread_mutexattr_t:19pthread_mutexattr_t
+pthread_once_t:i
+pthread_rwlock_t:16pthread_rwlock_t
+pthread_rwlockattr_t:20pthread_rwlockattr_t
+pthread_spinlock_t:i
+pthread_t:m
+quad_t:x
+register_t:i
+rlim64_t:y
+rlim_t:m
+sigset_t:10__sigset_t
+size_t:j
+socklen_t:j
+ssize_t:i
+suseconds_t:l
+time_t:l
+u_char:h
+uid_t:j
+uint:j
+u_int:j
+u_int16_t:t
+u_int32_t:j
+u_int64_t:y
+u_int8_t:h
+ulong:m
+u_long:m
+u_quad_t:y
+useconds_t:j
+ushort:t
+u_short:t
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/clone.S b/sysdeps/unix/sysv/linux/arm/nptl/clone.S
new file mode 100644
index 0000000000..23750b3f88
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/clone.S
@@ -0,0 +1,3 @@
+#define RESET_PID
+#include <tcb-offsets.h>
+#include "../clone.S"
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/configure b/sysdeps/unix/sysv/linux/arm/nptl/configure
new file mode 100644
index 0000000000..a8c34fa3e4
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/configure
@@ -0,0 +1,4 @@
+# This file is generated from configure.ac by Autoconf.  DO NOT EDIT!
+
+libc_cv_gcc_exceptions=yes
+exceptions=-fexceptions
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/configure.ac b/sysdeps/unix/sysv/linux/arm/nptl/configure.ac
new file mode 100644
index 0000000000..22f6f4b8f2
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/configure.ac
@@ -0,0 +1,8 @@
+dnl configure fragment for NPTL and ARM/Linux EABI.
+GLIBC_PROVIDES dnl See aclocal.m4 in the top level source directory.
+
+dnl The normal configure check for gcc -fexecptions fails because it can't
+dnl find __aeabi_unwind_cpp_pr0.  Work around this here; our GCC definitely
+dnl has -fexceptions.
+libc_cv_gcc_exceptions=yes
+exceptions=-fexceptions
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/createthread.c b/sysdeps/unix/sysv/linux/arm/nptl/createthread.c
new file mode 100644
index 0000000000..5e96513ca8
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/createthread.c
@@ -0,0 +1,22 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Value passed to 'clone' for initialization of the thread register.  */
+#define TLS_VALUE (pd + 1)
+
+/* Get the real implementation.	 */
+#include <nptl/sysdeps/pthread/createthread.c>
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/fork.c b/sysdeps/unix/sysv/linux/arm/nptl/fork.c
new file mode 100644
index 0000000000..0fbea176c3
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/fork.c
@@ -0,0 +1,30 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Phil Blundell <pb@nexus.co.uk>, 2005
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sched.h>
+#include <signal.h>
+#include <sysdep.h>
+#include <tls.h>
+
+
+#define ARCH_FORK()							\
+  INLINE_SYSCALL (clone, 5,						\
+		  CLONE_CHILD_SETTID | CLONE_CHILD_CLEARTID | SIGCHLD,	\
+		  NULL, NULL, NULL, &THREAD_SELF->tid)
+
+#include <nptl/sysdeps/unix/sysv/linux/fork.c>
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/ld.abilist b/sysdeps/unix/sysv/linux/arm/nptl/ld.abilist
new file mode 100644
index 0000000000..8eac745dd1
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/ld.abilist
@@ -0,0 +1,12 @@
+GLIBC_2.4
+ GLIBC_2.4 A
+ __libc_memalign F
+ __libc_stack_end D 0x4
+ __stack_chk_guard D 0x4
+ __tls_get_addr F
+ _dl_mcount F
+ _r_debug D 0x14
+ calloc F
+ free F
+ malloc F
+ realloc F
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/libBrokenLocale.abilist b/sysdeps/unix/sysv/linux/arm/nptl/libBrokenLocale.abilist
new file mode 100644
index 0000000000..9c795c6e96
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/libBrokenLocale.abilist
@@ -0,0 +1,3 @@
+GLIBC_2.4
+ GLIBC_2.4 A
+ __ctype_get_mb_cur_max F
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/libanl.abilist b/sysdeps/unix/sysv/linux/arm/nptl/libanl.abilist
new file mode 100644
index 0000000000..e10833ed25
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/libanl.abilist
@@ -0,0 +1,6 @@
+GLIBC_2.4
+ GLIBC_2.4 A
+ gai_cancel F
+ gai_error F
+ gai_suspend F
+ getaddrinfo_a F
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/libc.abilist b/sysdeps/unix/sysv/linux/arm/nptl/libc.abilist
new file mode 100644
index 0000000000..ce45208b5f
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/libc.abilist
@@ -0,0 +1,2145 @@
+GLIBC_2.10
+ GLIBC_2.10 A
+ __cxa_at_quick_exit F
+ __posix_getopt F
+ accept4 F
+ endsgent F
+ fallocate F
+ fgetsgent F
+ fgetsgent_r F
+ getsgent F
+ getsgent_r F
+ getsgnam F
+ getsgnam_r F
+ malloc_info F
+ preadv F
+ preadv64 F
+ psiginfo F
+ putsgent F
+ pwritev F
+ pwritev64 F
+ quick_exit F
+ register_printf_modifier F
+ register_printf_specifier F
+ register_printf_type F
+ setsgent F
+ sgetsgent F
+ sgetsgent_r F
+GLIBC_2.11
+ GLIBC_2.11 A
+ __longjmp_chk F
+ execvpe F
+ fallocate64 F
+ mkostemps F
+ mkostemps64 F
+ mkstemps F
+ mkstemps64 F
+GLIBC_2.12
+ GLIBC_2.12 A
+ _sys_errlist D 0x21c
+ _sys_nerr D 0x4
+ ntp_gettimex F
+ recvmmsg F
+ sys_errlist D 0x21c
+ sys_nerr D 0x4
+GLIBC_2.13
+ GLIBC_2.13 A
+ fanotify_init F
+ fanotify_mark F
+ prlimit F
+ prlimit64 F
+GLIBC_2.14
+ GLIBC_2.14 A
+ clock_adjtime F
+ name_to_handle_at F
+ open_by_handle_at F
+ sendmmsg F
+ setns F
+ syncfs F
+GLIBC_2.15
+ GLIBC_2.15 A
+ __fdelt_chk F
+ __fdelt_warn F
+ posix_spawn F
+ posix_spawnp F
+ process_vm_readv F
+ process_vm_writev F
+ scandirat F
+ scandirat64 F
+GLIBC_2.16
+ GLIBC_2.16 A
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+ __poll_chk F
+ __ppoll_chk F
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+ c32rtomb F
+ getauxval F
+ mbrtoc16 F
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+ timespec_get F
+GLIBC_2.17
+ GLIBC_2.17 A
+ clock_getcpuclockid F
+ clock_getres F
+ clock_gettime F
+ clock_nanosleep F
+ clock_settime F
+ secure_getenv F
+GLIBC_2.18
+ GLIBC_2.18 A
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+ GLIBC_2.4 A
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+ _IO_2_1_stdin_ D 0xa0
+ _IO_2_1_stdout_ D 0xa0
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+ xdr_int16_t F
+ xdr_int32_t F
+ xdr_int64_t F
+ xdr_int8_t F
+ xdr_key_netstarg F
+ xdr_key_netstres F
+ xdr_keybuf F
+ xdr_keystatus F
+ xdr_long F
+ xdr_longlong_t F
+ xdr_netnamestr F
+ xdr_netobj F
+ xdr_opaque F
+ xdr_opaque_auth F
+ xdr_pmap F
+ xdr_pmaplist F
+ xdr_pointer F
+ xdr_quad_t F
+ xdr_reference F
+ xdr_rejected_reply F
+ xdr_replymsg F
+ xdr_rmtcall_args F
+ xdr_rmtcallres F
+ xdr_short F
+ xdr_sizeof F
+ xdr_string F
+ xdr_u_char F
+ xdr_u_hyper F
+ xdr_u_int F
+ xdr_u_long F
+ xdr_u_longlong_t F
+ xdr_u_quad_t F
+ xdr_u_short F
+ xdr_uint16_t F
+ xdr_uint32_t F
+ xdr_uint64_t F
+ xdr_uint8_t F
+ xdr_union F
+ xdr_unixcred F
+ xdr_vector F
+ xdr_void F
+ xdr_wrapstring F
+ xdrmem_create F
+ xdrrec_create F
+ xdrrec_endofrecord F
+ xdrrec_eof F
+ xdrrec_skiprecord F
+ xdrstdio_create F
+ xencrypt F
+ xprt_register F
+ xprt_unregister F
+GLIBC_2.5
+ GLIBC_2.5 A
+ __readlinkat_chk F
+ inet6_opt_append F
+ inet6_opt_find F
+ inet6_opt_finish F
+ inet6_opt_get_val F
+ inet6_opt_init F
+ inet6_opt_next F
+ inet6_opt_set_val F
+ inet6_rth_add F
+ inet6_rth_getaddr F
+ inet6_rth_init F
+ inet6_rth_reverse F
+ inet6_rth_segments F
+ inet6_rth_space F
+ splice F
+ tee F
+ vmsplice F
+GLIBC_2.6
+ GLIBC_2.6 A
+ __sched_cpucount F
+ epoll_pwait F
+ futimens F
+ sched_getcpu F
+ strerror_l F
+ sync_file_range F
+ utimensat F
+GLIBC_2.7
+ GLIBC_2.7 A
+ __fread_chk F
+ __fread_unlocked_chk F
+ __isoc99_fscanf F
+ __isoc99_fwscanf F
+ __isoc99_scanf F
+ __isoc99_sscanf F
+ __isoc99_swscanf F
+ __isoc99_vfscanf F
+ __isoc99_vfwscanf F
+ __isoc99_vscanf F
+ __isoc99_vsscanf F
+ __isoc99_vswscanf F
+ __isoc99_vwscanf F
+ __isoc99_wscanf F
+ __open64_2 F
+ __open_2 F
+ __openat64_2 F
+ __openat_2 F
+ __sched_cpualloc F
+ __sched_cpufree F
+ eventfd F
+ eventfd_read F
+ eventfd_write F
+ mkostemp F
+ mkostemp64 F
+ signalfd F
+GLIBC_2.8
+ GLIBC_2.8 A
+ __asprintf_chk F
+ __dprintf_chk F
+ __gnu_mcount_nc F
+ __obstack_printf_chk F
+ __obstack_vprintf_chk F
+ __vasprintf_chk F
+ __vdprintf_chk F
+ qsort_r F
+ timerfd_create F
+ timerfd_gettime F
+ timerfd_settime F
+GLIBC_2.9
+ GLIBC_2.9 A
+ dup3 F
+ epoll_create1 F
+ inotify_init1 F
+ pipe2 F
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/libcrypt.abilist b/sysdeps/unix/sysv/linux/arm/nptl/libcrypt.abilist
new file mode 100644
index 0000000000..8c874edffe
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/libcrypt.abilist
@@ -0,0 +1,9 @@
+GLIBC_2.4
+ GLIBC_2.4 A
+ crypt F
+ crypt_r F
+ encrypt F
+ encrypt_r F
+ fcrypt F
+ setkey F
+ setkey_r F
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/libdl.abilist b/sysdeps/unix/sysv/linux/arm/nptl/libdl.abilist
new file mode 100644
index 0000000000..7f3ebed31d
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/libdl.abilist
@@ -0,0 +1,11 @@
+GLIBC_2.4
+ GLIBC_2.4 A
+ dladdr F
+ dladdr1 F
+ dlclose F
+ dlerror F
+ dlinfo F
+ dlmopen F
+ dlopen F
+ dlsym F
+ dlvsym F
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/libm.abilist b/sysdeps/unix/sysv/linux/arm/nptl/libm.abilist
new file mode 100644
index 0000000000..614e5ebe5c
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/libm.abilist
@@ -0,0 +1,374 @@
+GLIBC_2.15
+ GLIBC_2.15 A
+ __acos_finite F
+ __acosf_finite F
+ __acosh_finite F
+ __acoshf_finite F
+ __asin_finite F
+ __asinf_finite F
+ __atan2_finite F
+ __atan2f_finite F
+ __atanh_finite F
+ __atanhf_finite F
+ __cosh_finite F
+ __coshf_finite F
+ __exp10_finite F
+ __exp10f_finite F
+ __exp2_finite F
+ __exp2f_finite F
+ __exp_finite F
+ __expf_finite F
+ __fmod_finite F
+ __fmodf_finite F
+ __gamma_r_finite F
+ __gammaf_r_finite F
+ __hypot_finite F
+ __hypotf_finite F
+ __j0_finite F
+ __j0f_finite F
+ __j1_finite F
+ __j1f_finite F
+ __jn_finite F
+ __jnf_finite F
+ __lgamma_r_finite F
+ __lgammaf_r_finite F
+ __log10_finite F
+ __log10f_finite F
+ __log2_finite F
+ __log2f_finite F
+ __log_finite F
+ __logf_finite F
+ __pow_finite F
+ __powf_finite F
+ __remainder_finite F
+ __remainderf_finite F
+ __scalb_finite F
+ __scalbf_finite F
+ __sinh_finite F
+ __sinhf_finite F
+ __sqrt_finite F
+ __sqrtf_finite F
+ __y0_finite F
+ __y0f_finite F
+ __y1_finite F
+ __y1f_finite F
+ __yn_finite F
+ __ynf_finite F
+GLIBC_2.18
+ GLIBC_2.18 A
+ __issignaling F
+ __issignalingf F
+GLIBC_2.4
+ GLIBC_2.4 A
+ _LIB_VERSION D 0x4
+ __clog10 F
+ __clog10f F
+ __clog10l F
+ __finite F
+ __finitef F
+ __finitel F
+ __fpclassify F
+ __fpclassifyf F
+ __signbit F
+ __signbitf F
+ acos F
+ acosf F
+ acosh F
+ acoshf F
+ acoshl F
+ acosl F
+ asin F
+ asinf F
+ asinh F
+ asinhf F
+ asinhl F
+ asinl F
+ atan F
+ atan2 F
+ atan2f F
+ atan2l F
+ atanf F
+ atanh F
+ atanhf F
+ atanhl F
+ atanl F
+ cabs F
+ cabsf F
+ cabsl F
+ cacos F
+ cacosf F
+ cacosh F
+ cacoshf F
+ cacoshl F
+ cacosl F
+ carg F
+ cargf F
+ cargl F
+ casin F
+ casinf F
+ casinh F
+ casinhf F
+ casinhl F
+ casinl F
+ catan F
+ catanf F
+ catanh F
+ catanhf F
+ catanhl F
+ catanl F
+ cbrt F
+ cbrtf F
+ cbrtl F
+ ccos F
+ ccosf F
+ ccosh F
+ ccoshf F
+ ccoshl F
+ ccosl F
+ ceil F
+ ceilf F
+ ceill F
+ cexp F
+ cexpf F
+ cexpl F
+ cimag F
+ cimagf F
+ cimagl F
+ clog F
+ clog10 F
+ clog10f F
+ clog10l F
+ clogf F
+ clogl F
+ conj F
+ conjf F
+ conjl F
+ copysign F
+ copysignf F
+ copysignl F
+ cos F
+ cosf F
+ cosh F
+ coshf F
+ coshl F
+ cosl F
+ cpow F
+ cpowf F
+ cpowl F
+ cproj F
+ cprojf F
+ cprojl F
+ creal F
+ crealf F
+ creall F
+ csin F
+ csinf F
+ csinh F
+ csinhf F
+ csinhl F
+ csinl F
+ csqrt F
+ csqrtf F
+ csqrtl F
+ ctan F
+ ctanf F
+ ctanh F
+ ctanhf F
+ ctanhl F
+ ctanl F
+ drem F
+ dremf F
+ dreml F
+ erf F
+ erfc F
+ erfcf F
+ erfcl F
+ erff F
+ erfl F
+ exp F
+ exp10 F
+ exp10f F
+ exp10l F
+ exp2 F
+ exp2f F
+ exp2l F
+ expf F
+ expl F
+ expm1 F
+ expm1f F
+ expm1l F
+ fabs F
+ fabsf F
+ fabsl F
+ fdim F
+ fdimf F
+ fdiml F
+ feclearexcept F
+ fedisableexcept F
+ feenableexcept F
+ fegetenv F
+ fegetexcept F
+ fegetexceptflag F
+ fegetround F
+ feholdexcept F
+ feraiseexcept F
+ fesetenv F
+ fesetexceptflag F
+ fesetround F
+ fetestexcept F
+ feupdateenv F
+ finite F
+ finitef F
+ finitel F
+ floor F
+ floorf F
+ floorl F
+ fma F
+ fmaf F
+ fmal F
+ fmax F
+ fmaxf F
+ fmaxl F
+ fmin F
+ fminf F
+ fminl F
+ fmod F
+ fmodf F
+ fmodl F
+ frexp F
+ frexpf F
+ frexpl F
+ gamma F
+ gammaf F
+ gammal F
+ hypot F
+ hypotf F
+ hypotl F
+ ilogb F
+ ilogbf F
+ ilogbl F
+ j0 F
+ j0f F
+ j0l F
+ j1 F
+ j1f F
+ j1l F
+ jn F
+ jnf F
+ jnl F
+ ldexp F
+ ldexpf F
+ ldexpl F
+ lgamma F
+ lgamma_r F
+ lgammaf F
+ lgammaf_r F
+ lgammal F
+ lgammal_r F
+ llrint F
+ llrintf F
+ llrintl F
+ llround F
+ llroundf F
+ llroundl F
+ log F
+ log10 F
+ log10f F
+ log10l F
+ log1p F
+ log1pf F
+ log1pl F
+ log2 F
+ log2f F
+ log2l F
+ logb F
+ logbf F
+ logbl F
+ logf F
+ logl F
+ lrint F
+ lrintf F
+ lrintl F
+ lround F
+ lroundf F
+ lroundl F
+ matherr F
+ modf F
+ modff F
+ modfl F
+ nan F
+ nanf F
+ nanl F
+ nearbyint F
+ nearbyintf F
+ nearbyintl F
+ nextafter F
+ nextafterf F
+ nextafterl F
+ nexttoward F
+ nexttowardf F
+ nexttowardl F
+ pow F
+ pow10 F
+ pow10f F
+ pow10l F
+ powf F
+ powl F
+ remainder F
+ remainderf F
+ remainderl F
+ remquo F
+ remquof F
+ remquol F
+ rint F
+ rintf F
+ rintl F
+ round F
+ roundf F
+ roundl F
+ scalb F
+ scalbf F
+ scalbl F
+ scalbln F
+ scalblnf F
+ scalblnl F
+ scalbn F
+ scalbnf F
+ scalbnl F
+ signgam D 0x4
+ significand F
+ significandf F
+ significandl F
+ sin F
+ sincos F
+ sincosf F
+ sincosl F
+ sinf F
+ sinh F
+ sinhf F
+ sinhl F
+ sinl F
+ sqrt F
+ sqrtf F
+ sqrtl F
+ tan F
+ tanf F
+ tanh F
+ tanhf F
+ tanhl F
+ tanl F
+ tgamma F
+ tgammaf F
+ tgammal F
+ trunc F
+ truncf F
+ truncl F
+ y0 F
+ y0f F
+ y0l F
+ y1 F
+ y1f F
+ y1l F
+ yn F
+ ynf F
+ ynl F
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/libnsl.abilist b/sysdeps/unix/sysv/linux/arm/nptl/libnsl.abilist
new file mode 100644
index 0000000000..1d2670c444
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/libnsl.abilist
@@ -0,0 +1,123 @@
+GLIBC_2.4
+ GLIBC_2.4 A
+ __free_fdresult F
+ __nis_default_access F
+ __nis_default_group F
+ __nis_default_owner F
+ __nis_default_ttl F
+ __nis_finddirectory F
+ __nis_hash F
+ __nisbind_connect F
+ __nisbind_create F
+ __nisbind_destroy F
+ __nisbind_next F
+ __yp_check F
+ nis_add F
+ nis_add_entry F
+ nis_addmember F
+ nis_checkpoint F
+ nis_clone_directory F
+ nis_clone_object F
+ nis_clone_result F
+ nis_creategroup F
+ nis_destroy_object F
+ nis_destroygroup F
+ nis_dir_cmp F
+ nis_domain_of F
+ nis_domain_of_r F
+ nis_first_entry F
+ nis_free_directory F
+ nis_free_object F
+ nis_free_request F
+ nis_freenames F
+ nis_freeresult F
+ nis_freeservlist F
+ nis_freetags F
+ nis_getnames F
+ nis_getservlist F
+ nis_ismember F
+ nis_leaf_of F
+ nis_leaf_of_r F
+ nis_lerror F
+ nis_list F
+ nis_local_directory F
+ nis_local_group F
+ nis_local_host F
+ nis_local_principal F
+ nis_lookup F
+ nis_mkdir F
+ nis_modify F
+ nis_modify_entry F
+ nis_name_of F
+ nis_name_of_r F
+ nis_next_entry F
+ nis_perror F
+ nis_ping F
+ nis_print_directory F
+ nis_print_entry F
+ nis_print_group F
+ nis_print_group_entry F
+ nis_print_link F
+ nis_print_object F
+ nis_print_result F
+ nis_print_rights F
+ nis_print_table F
+ nis_read_obj F
+ nis_remove F
+ nis_remove_entry F
+ nis_removemember F
+ nis_rmdir F
+ nis_servstate F
+ nis_sperrno F
+ nis_sperror F
+ nis_sperror_r F
+ nis_stats F
+ nis_verifygroup F
+ nis_write_obj F
+ readColdStartFile F
+ writeColdStartFile F
+ xdr_cback_data F
+ xdr_domainname F
+ xdr_keydat F
+ xdr_mapname F
+ xdr_obj_p F
+ xdr_peername F
+ xdr_valdat F
+ xdr_yp_buf F
+ xdr_ypall F
+ xdr_ypbind_binding F
+ xdr_ypbind_resp F
+ xdr_ypbind_resptype F
+ xdr_ypbind_setdom F
+ xdr_ypdelete_args F
+ xdr_ypmap_parms F
+ xdr_ypmaplist F
+ xdr_yppush_status F
+ xdr_yppushresp_xfr F
+ xdr_ypreq_key F
+ xdr_ypreq_nokey F
+ xdr_ypreq_xfr F
+ xdr_ypresp_all F
+ xdr_ypresp_key_val F
+ xdr_ypresp_maplist F
+ xdr_ypresp_master F
+ xdr_ypresp_order F
+ xdr_ypresp_val F
+ xdr_ypresp_xfr F
+ xdr_ypstat F
+ xdr_ypupdate_args F
+ xdr_ypxfrstat F
+ yp_all F
+ yp_bind F
+ yp_first F
+ yp_get_default_domain F
+ yp_maplist F
+ yp_master F
+ yp_match F
+ yp_next F
+ yp_order F
+ yp_unbind F
+ yp_update F
+ ypbinderr_string F
+ yperr_string F
+ ypprot_err F
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/libpthread.abilist b/sysdeps/unix/sysv/linux/arm/nptl/libpthread.abilist
new file mode 100644
index 0000000000..ac46302bc7
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/libpthread.abilist
@@ -0,0 +1,232 @@
+GLIBC_2.11
+ GLIBC_2.11 A
+ pthread_sigqueue F
+GLIBC_2.12
+ GLIBC_2.12 A
+ pthread_getname_np F
+ pthread_mutex_consistent F
+ pthread_mutexattr_getrobust F
+ pthread_mutexattr_setrobust F
+ pthread_setname_np F
+GLIBC_2.18
+ GLIBC_2.18 A
+ pthread_getattr_default_np F
+ pthread_setattr_default_np F
+GLIBC_2.4
+ GLIBC_2.4 A
+ _IO_flockfile F
+ _IO_ftrylockfile F
+ _IO_funlockfile F
+ __close F
+ __connect F
+ __errno_location F
+ __fcntl F
+ __fork F
+ __h_errno_location F
+ __libc_allocate_rtsig F
+ __libc_current_sigrtmax F
+ __libc_current_sigrtmin F
+ __lseek F
+ __nanosleep F
+ __open F
+ __open64 F
+ __pread64 F
+ __pthread_cleanup_routine F
+ __pthread_getspecific F
+ __pthread_key_create F
+ __pthread_mutex_destroy F
+ __pthread_mutex_init F
+ __pthread_mutex_lock F
+ __pthread_mutex_trylock F
+ __pthread_mutex_unlock F
+ __pthread_mutexattr_destroy F
+ __pthread_mutexattr_init F
+ __pthread_mutexattr_settype F
+ __pthread_once F
+ __pthread_register_cancel F
+ __pthread_register_cancel_defer F
+ __pthread_rwlock_destroy F
+ __pthread_rwlock_init F
+ __pthread_rwlock_rdlock F
+ __pthread_rwlock_tryrdlock F
+ __pthread_rwlock_trywrlock F
+ __pthread_rwlock_unlock F
+ __pthread_rwlock_wrlock F
+ __pthread_setspecific F
+ __pthread_unregister_cancel F
+ __pthread_unregister_cancel_restore F
+ __pthread_unwind_next F
+ __pwrite64 F
+ __read F
+ __res_state F
+ __send F
+ __sigaction F
+ __vfork F
+ __wait F
+ __write F
+ _pthread_cleanup_pop F
+ _pthread_cleanup_pop_restore F
+ _pthread_cleanup_push F
+ _pthread_cleanup_push_defer F
+ accept F
+ close F
+ connect F
+ fcntl F
+ flockfile F
+ fork F
+ fsync F
+ ftrylockfile F
+ funlockfile F
+ longjmp F
+ lseek F
+ lseek64 F
+ msync F
+ nanosleep F
+ open F
+ open64 F
+ pause F
+ pread F
+ pread64 F
+ pthread_attr_destroy F
+ pthread_attr_getaffinity_np F
+ pthread_attr_getdetachstate F
+ pthread_attr_getguardsize F
+ pthread_attr_getinheritsched F
+ pthread_attr_getschedparam F
+ pthread_attr_getschedpolicy F
+ pthread_attr_getscope F
+ pthread_attr_getstack F
+ pthread_attr_getstackaddr F
+ pthread_attr_getstacksize F
+ pthread_attr_init F
+ pthread_attr_setaffinity_np F
+ pthread_attr_setdetachstate F
+ pthread_attr_setguardsize F
+ pthread_attr_setinheritsched F
+ pthread_attr_setschedparam F
+ pthread_attr_setschedpolicy F
+ pthread_attr_setscope F
+ pthread_attr_setstack F
+ pthread_attr_setstackaddr F
+ pthread_attr_setstacksize F
+ pthread_barrier_destroy F
+ pthread_barrier_init F
+ pthread_barrier_wait F
+ pthread_barrierattr_destroy F
+ pthread_barrierattr_getpshared F
+ pthread_barrierattr_init F
+ pthread_barrierattr_setpshared F
+ pthread_cancel F
+ pthread_cond_broadcast F
+ pthread_cond_destroy F
+ pthread_cond_init F
+ pthread_cond_signal F
+ pthread_cond_timedwait F
+ pthread_cond_wait F
+ pthread_condattr_destroy F
+ pthread_condattr_getclock F
+ pthread_condattr_getpshared F
+ pthread_condattr_init F
+ pthread_condattr_setclock F
+ pthread_condattr_setpshared F
+ pthread_create F
+ pthread_detach F
+ pthread_equal F
+ pthread_exit F
+ pthread_getaffinity_np F
+ pthread_getattr_np F
+ pthread_getconcurrency F
+ pthread_getcpuclockid F
+ pthread_getschedparam F
+ pthread_getspecific F
+ pthread_join F
+ pthread_key_create F
+ pthread_key_delete F
+ pthread_kill F
+ pthread_kill_other_threads_np F
+ pthread_mutex_consistent_np F
+ pthread_mutex_destroy F
+ pthread_mutex_getprioceiling F
+ pthread_mutex_init F
+ pthread_mutex_lock F
+ pthread_mutex_setprioceiling F
+ pthread_mutex_timedlock F
+ pthread_mutex_trylock F
+ pthread_mutex_unlock F
+ pthread_mutexattr_destroy F
+ pthread_mutexattr_getkind_np F
+ pthread_mutexattr_getprioceiling F
+ pthread_mutexattr_getprotocol F
+ pthread_mutexattr_getpshared F
+ pthread_mutexattr_getrobust_np F
+ pthread_mutexattr_gettype F
+ pthread_mutexattr_init F
+ pthread_mutexattr_setkind_np F
+ pthread_mutexattr_setprioceiling F
+ pthread_mutexattr_setprotocol F
+ pthread_mutexattr_setpshared F
+ pthread_mutexattr_setrobust_np F
+ pthread_mutexattr_settype F
+ pthread_once F
+ pthread_rwlock_destroy F
+ pthread_rwlock_init F
+ pthread_rwlock_rdlock F
+ pthread_rwlock_timedrdlock F
+ pthread_rwlock_timedwrlock F
+ pthread_rwlock_tryrdlock F
+ pthread_rwlock_trywrlock F
+ pthread_rwlock_unlock F
+ pthread_rwlock_wrlock F
+ pthread_rwlockattr_destroy F
+ pthread_rwlockattr_getkind_np F
+ pthread_rwlockattr_getpshared F
+ pthread_rwlockattr_init F
+ pthread_rwlockattr_setkind_np F
+ pthread_rwlockattr_setpshared F
+ pthread_self F
+ pthread_setaffinity_np F
+ pthread_setcancelstate F
+ pthread_setcanceltype F
+ pthread_setconcurrency F
+ pthread_setschedparam F
+ pthread_setschedprio F
+ pthread_setspecific F
+ pthread_sigmask F
+ pthread_spin_destroy F
+ pthread_spin_init F
+ pthread_spin_lock F
+ pthread_spin_trylock F
+ pthread_spin_unlock F
+ pthread_testcancel F
+ pthread_timedjoin_np F
+ pthread_tryjoin_np F
+ pthread_yield F
+ pwrite F
+ pwrite64 F
+ raise F
+ read F
+ recv F
+ recvfrom F
+ recvmsg F
+ sem_close F
+ sem_destroy F
+ sem_getvalue F
+ sem_init F
+ sem_open F
+ sem_post F
+ sem_timedwait F
+ sem_trywait F
+ sem_unlink F
+ sem_wait F
+ send F
+ sendmsg F
+ sendto F
+ sigaction F
+ siglongjmp F
+ sigwait F
+ system F
+ tcdrain F
+ vfork F
+ wait F
+ waitpid F
+ write F
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/libresolv.abilist b/sysdeps/unix/sysv/linux/arm/nptl/libresolv.abilist
new file mode 100644
index 0000000000..e781f2f822
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/libresolv.abilist
@@ -0,0 +1,95 @@
+GLIBC_2.4
+ GLIBC_2.4 A
+ __b64_ntop F
+ __b64_pton F
+ __dn_comp F
+ __dn_count_labels F
+ __dn_expand F
+ __dn_skipname F
+ __fp_nquery F
+ __fp_query F
+ __fp_resstat F
+ __hostalias F
+ __loc_aton F
+ __loc_ntoa F
+ __p_cdname F
+ __p_cdnname F
+ __p_class F
+ __p_class_syms D 0x54
+ __p_fqname F
+ __p_fqnname F
+ __p_option F
+ __p_query F
+ __p_rcode F
+ __p_secstodate F
+ __p_time F
+ __p_type F
+ __p_type_syms D 0x228
+ __putlong F
+ __putshort F
+ __res_close F
+ __res_dnok F
+ __res_hnok F
+ __res_hostalias F
+ __res_isourserver F
+ __res_mailok F
+ __res_mkquery F
+ __res_nameinquery F
+ __res_nmkquery F
+ __res_nquery F
+ __res_nquerydomain F
+ __res_nsearch F
+ __res_nsend F
+ __res_ownok F
+ __res_queriesmatch F
+ __res_query F
+ __res_querydomain F
+ __res_search F
+ __res_send F
+ __sym_ntop F
+ __sym_ntos F
+ __sym_ston F
+ _gethtbyaddr F
+ _gethtbyname F
+ _gethtbyname2 F
+ _gethtent F
+ _getlong F
+ _getshort F
+ _res_opcodes D 0x40
+ _sethtent F
+ inet_net_ntop F
+ inet_net_pton F
+ inet_neta F
+ res_gethostbyaddr F
+ res_gethostbyname F
+ res_gethostbyname2 F
+ res_send_setqhook F
+ res_send_setrhook F
+GLIBC_2.9
+ GLIBC_2.9 A
+ ns_datetosecs F
+ ns_format_ttl F
+ ns_get16 F
+ ns_get32 F
+ ns_initparse F
+ ns_makecanon F
+ ns_msg_getflag F
+ ns_name_compress F
+ ns_name_ntol F
+ ns_name_ntop F
+ ns_name_pack F
+ ns_name_pton F
+ ns_name_rollback F
+ ns_name_skip F
+ ns_name_uncompress F
+ ns_name_unpack F
+ ns_parse_ttl F
+ ns_parserr F
+ ns_put16 F
+ ns_put32 F
+ ns_samedomain F
+ ns_samename F
+ ns_skiprr F
+ ns_sprintrr F
+ ns_sprintrrf F
+ ns_subdomain F
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/librt.abilist b/sysdeps/unix/sysv/linux/arm/nptl/librt.abilist
new file mode 100644
index 0000000000..466df4d93b
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/librt.abilist
@@ -0,0 +1,44 @@
+GLIBC_2.4
+ GLIBC_2.4 A
+ aio_cancel F
+ aio_cancel64 F
+ aio_error F
+ aio_error64 F
+ aio_fsync F
+ aio_fsync64 F
+ aio_init F
+ aio_read F
+ aio_read64 F
+ aio_return F
+ aio_return64 F
+ aio_suspend F
+ aio_suspend64 F
+ aio_write F
+ aio_write64 F
+ clock_getcpuclockid F
+ clock_getres F
+ clock_gettime F
+ clock_nanosleep F
+ clock_settime F
+ lio_listio F
+ lio_listio64 F
+ mq_close F
+ mq_getattr F
+ mq_notify F
+ mq_open F
+ mq_receive F
+ mq_send F
+ mq_setattr F
+ mq_timedreceive F
+ mq_timedsend F
+ mq_unlink F
+ shm_open F
+ shm_unlink F
+ timer_create F
+ timer_delete F
+ timer_getoverrun F
+ timer_gettime F
+ timer_settime F
+GLIBC_2.7
+ GLIBC_2.7 A
+ __mq_open_2 F
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/libthread_db.abilist b/sysdeps/unix/sysv/linux/arm/nptl/libthread_db.abilist
new file mode 100644
index 0000000000..523772441b
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/libthread_db.abilist
@@ -0,0 +1,42 @@
+GLIBC_2.4
+ GLIBC_2.4 A
+ td_init F
+ td_log F
+ td_symbol_list F
+ td_ta_clear_event F
+ td_ta_delete F
+ td_ta_enable_stats F
+ td_ta_event_addr F
+ td_ta_event_getmsg F
+ td_ta_get_nthreads F
+ td_ta_get_ph F
+ td_ta_get_stats F
+ td_ta_map_id2thr F
+ td_ta_map_lwp2thr F
+ td_ta_new F
+ td_ta_reset_stats F
+ td_ta_set_event F
+ td_ta_setconcurrency F
+ td_ta_thr_iter F
+ td_ta_tsd_iter F
+ td_thr_clear_event F
+ td_thr_dbresume F
+ td_thr_dbsuspend F
+ td_thr_event_enable F
+ td_thr_event_getmsg F
+ td_thr_get_info F
+ td_thr_getfpregs F
+ td_thr_getgregs F
+ td_thr_getxregs F
+ td_thr_getxregsize F
+ td_thr_set_event F
+ td_thr_setfpregs F
+ td_thr_setgregs F
+ td_thr_setprio F
+ td_thr_setsigpending F
+ td_thr_setxregs F
+ td_thr_sigsetmask F
+ td_thr_tls_get_addr F
+ td_thr_tlsbase F
+ td_thr_tsd F
+ td_thr_validate F
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/libutil.abilist b/sysdeps/unix/sysv/linux/arm/nptl/libutil.abilist
new file mode 100644
index 0000000000..6cb71966a1
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/libutil.abilist
@@ -0,0 +1,8 @@
+GLIBC_2.4
+ GLIBC_2.4 A
+ forkpty F
+ login F
+ login_tty F
+ logout F
+ logwtmp F
+ openpty F
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/localplt.data b/sysdeps/unix/sysv/linux/arm/nptl/localplt.data
new file mode 100644
index 0000000000..109522e37e
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/localplt.data
@@ -0,0 +1,13 @@
+libc.so: __signbit
+libc.so: calloc
+libc.so: free
+libc.so: fscanf
+libc.so: malloc
+libc.so: memalign
+libc.so: raise
+libc.so: realloc
+libm.so: __signbit
+libm.so: __signbitf
+libm.so: matherr
+libpthread.so: __errno_location
+libpthread.so: raise
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/lowlevellock.c b/sysdeps/unix/sysv/linux/arm/nptl/lowlevellock.c
new file mode 100644
index 0000000000..9603d7b328
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/lowlevellock.c
@@ -0,0 +1,132 @@
+/* low level locking for pthread library.  Generic futex-using version.
+   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <errno.h>
+#include <sysdep.h>
+#include <lowlevellock.h>
+#include <sys/time.h>
+
+void
+__lll_lock_wait_private (int *futex)
+{
+  do
+    {
+      int oldval = atomic_compare_and_exchange_val_acq (futex, 2, 1);
+      if (oldval != 0)
+	lll_futex_wait (futex, 2, LLL_PRIVATE);
+    }
+  while (atomic_compare_and_exchange_bool_acq (futex, 2, 0) != 0);
+}
+
+
+/* These functions don't get included in libc.so  */
+#ifdef IS_IN_libpthread
+void
+__lll_lock_wait (int *futex, int private)
+{
+  do
+    {
+      int oldval = atomic_compare_and_exchange_val_acq (futex, 2, 1);
+      if (oldval != 0)
+	lll_futex_wait (futex, 2, private);
+    }
+  while (atomic_compare_and_exchange_bool_acq (futex, 2, 0) != 0);
+}
+
+
+int
+__lll_timedlock_wait (int *futex, const struct timespec *abstime, int private)
+{
+  struct timespec rt;
+
+  /* Reject invalid timeouts.  */
+  if (abstime->tv_nsec < 0 || abstime->tv_nsec >= 1000000000)
+    return EINVAL;
+
+  /* Upgrade the lock.  */
+  if (atomic_exchange_acq (futex, 2) == 0)
+    return 0;
+
+  do
+    {
+      struct timeval tv;
+
+      /* Get the current time.  */
+      (void) __gettimeofday (&tv, NULL);
+
+      /* Compute relative timeout.  */
+      rt.tv_sec = abstime->tv_sec - tv.tv_sec;
+      rt.tv_nsec = abstime->tv_nsec - tv.tv_usec * 1000;
+      if (rt.tv_nsec < 0)
+	{
+	  rt.tv_nsec += 1000000000;
+	  --rt.tv_sec;
+	}
+
+      /* Already timed out?  */
+      if (rt.tv_sec < 0)
+	return ETIMEDOUT;
+
+      // XYZ: Lost the lock to check whether it was private.
+      lll_futex_timed_wait (futex, 2, &rt, private);
+    }
+  while (atomic_compare_and_exchange_bool_acq (futex, 2, 0) != 0);
+
+  return 0;
+}
+
+
+int
+__lll_timedwait_tid (int *tidp, const struct timespec *abstime)
+{
+  int tid;
+
+  if (abstime->tv_nsec < 0 || abstime->tv_nsec >= 1000000000)
+    return EINVAL;
+
+  /* Repeat until thread terminated.  */
+  while ((tid = *tidp) != 0)
+    {
+      struct timeval tv;
+      struct timespec rt;
+
+      /* Get the current time.  */
+      (void) __gettimeofday (&tv, NULL);
+
+      /* Compute relative timeout.  */
+      rt.tv_sec = abstime->tv_sec - tv.tv_sec;
+      rt.tv_nsec = abstime->tv_nsec - tv.tv_usec * 1000;
+      if (rt.tv_nsec < 0)
+	{
+	  rt.tv_nsec += 1000000000;
+	  --rt.tv_sec;
+	}
+
+      /* Already timed out?  */
+      if (rt.tv_sec < 0)
+	return ETIMEDOUT;
+
+      /* Wait until thread terminates.  */
+      // XYZ: Lost the lock to check whether it was private.
+      if (lll_futex_timed_wait (tidp, tid, &rt, LLL_SHARED) == -ETIMEDOUT)
+	return ETIMEDOUT;
+    }
+
+  return 0;
+}
+#endif
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/lowlevellock.h b/sysdeps/unix/sysv/linux/arm/nptl/lowlevellock.h
new file mode 100644
index 0000000000..5d19434cdc
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/lowlevellock.h
@@ -0,0 +1,321 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _LOWLEVELLOCK_H
+#define _LOWLEVELLOCK_H	1
+
+#include <time.h>
+#include <sys/param.h>
+#include <bits/pthreadtypes.h>
+#include <atomic.h>
+#include <sysdep.h>
+#include <kernel-features.h>
+
+#define FUTEX_WAIT		0
+#define FUTEX_WAKE		1
+#define FUTEX_REQUEUE		3
+#define FUTEX_CMP_REQUEUE	4
+#define FUTEX_WAKE_OP		5
+#define FUTEX_OP_CLEAR_WAKE_IF_GT_ONE	((4 << 24) | 1)
+#define FUTEX_LOCK_PI		6
+#define FUTEX_UNLOCK_PI		7
+#define FUTEX_TRYLOCK_PI	8
+#define FUTEX_WAIT_BITSET	9
+#define FUTEX_WAKE_BITSET	10
+#define FUTEX_WAIT_REQUEUE_PI   11
+#define FUTEX_CMP_REQUEUE_PI    12
+#define FUTEX_PRIVATE_FLAG	128
+#define FUTEX_CLOCK_REALTIME	256
+
+#define FUTEX_BITSET_MATCH_ANY	0xffffffff
+
+/* Values for 'private' parameter of locking macros.  Yes, the
+   definition seems to be backwards.  But it is not.  The bit will be
+   reversed before passing to the system call.  */
+#define LLL_PRIVATE	0
+#define LLL_SHARED	FUTEX_PRIVATE_FLAG
+
+
+#if !defined NOT_IN_libc || defined IS_IN_rtld
+/* In libc.so or ld.so all futexes are private.  */
+# ifdef __ASSUME_PRIVATE_FUTEX
+#  define __lll_private_flag(fl, private) \
+  ((fl) | FUTEX_PRIVATE_FLAG)
+# else
+#  define __lll_private_flag(fl, private) \
+  ((fl) | THREAD_GETMEM (THREAD_SELF, header.private_futex))
+# endif
+#else
+# ifdef __ASSUME_PRIVATE_FUTEX
+#  define __lll_private_flag(fl, private) \
+  (((fl) | FUTEX_PRIVATE_FLAG) ^ (private))
+# else
+#  define __lll_private_flag(fl, private) \
+  (__builtin_constant_p (private)					      \
+   ? ((private) == 0							      \
+      ? ((fl) | THREAD_GETMEM (THREAD_SELF, header.private_futex))	      \
+      : (fl))								      \
+   : ((fl) | (((private) ^ FUTEX_PRIVATE_FLAG)				      \
+	      & THREAD_GETMEM (THREAD_SELF, header.private_futex))))
+# endif
+#endif
+
+
+#define lll_futex_wait(futexp, val, private) \
+  lll_futex_timed_wait(futexp, val, NULL, private)
+
+#define lll_futex_timed_wait(futexp, val, timespec, private) \
+  ({									      \
+    INTERNAL_SYSCALL_DECL (__err);					      \
+    long int __ret;							      \
+    __ret = INTERNAL_SYSCALL (futex, __err, 4, (futexp),		      \
+			      __lll_private_flag (FUTEX_WAIT, private),	      \
+			      (val), (timespec));			      \
+    __ret;								      \
+  })
+
+#define lll_futex_timed_wait_bitset(futexp, val, timespec, clockbit, private) \
+  ({									\
+    INTERNAL_SYSCALL_DECL (__err);					\
+    long int __ret;							\
+    int __op = FUTEX_WAIT_BITSET | clockbit;				\
+    __ret = INTERNAL_SYSCALL (futex, __err, 6, (futexp),		\
+			      __lll_private_flag (__op, private),	\
+			      (val), (timespec), NULL /* Unused.  */,	\
+			      FUTEX_BITSET_MATCH_ANY);			\
+    __ret;								\
+  })
+
+#define lll_futex_wake(futexp, nr, private) \
+  ({									      \
+    INTERNAL_SYSCALL_DECL (__err);					      \
+    long int __ret;							      \
+    __ret = INTERNAL_SYSCALL (futex, __err, 4, (futexp),		      \
+			      __lll_private_flag (FUTEX_WAKE, private),	      \
+			      (nr), 0);					      \
+    __ret;								      \
+  })
+
+#define lll_robust_dead(futexv, private) \
+  do									      \
+    {									      \
+      int *__futexp = &(futexv);					      \
+      atomic_or (__futexp, FUTEX_OWNER_DIED);				      \
+      lll_futex_wake (__futexp, 1, private);				      \
+    }									      \
+  while (0)
+
+/* Returns non-zero if error happened, zero if success.  */
+#define lll_futex_requeue(futexp, nr_wake, nr_move, mutex, val, private) \
+  ({									      \
+    INTERNAL_SYSCALL_DECL (__err);					      \
+    long int __ret;							      \
+    __ret = INTERNAL_SYSCALL (futex, __err, 6, (futexp),		      \
+			      __lll_private_flag (FUTEX_CMP_REQUEUE, private),\
+			      (nr_wake), (nr_move), (mutex), (val));	      \
+    INTERNAL_SYSCALL_ERROR_P (__ret, __err);				      \
+  })
+
+
+/* Returns non-zero if error happened, zero if success.  */
+#define lll_futex_wake_unlock(futexp, nr_wake, nr_wake2, futexp2, private) \
+  ({									      \
+    INTERNAL_SYSCALL_DECL (__err);					      \
+    long int __ret;							      \
+    __ret = INTERNAL_SYSCALL (futex, __err, 6, (futexp),		      \
+			      __lll_private_flag (FUTEX_WAKE_OP, private),    \
+			      (nr_wake), (nr_wake2), (futexp2),		      \
+			      FUTEX_OP_CLEAR_WAKE_IF_GT_ONE);		      \
+    INTERNAL_SYSCALL_ERROR_P (__ret, __err);				      \
+  })
+
+/* Priority Inheritance support.  */
+#define lll_futex_wait_requeue_pi(futexp, val, mutex, private) \
+  lll_futex_timed_wait_requeue_pi (futexp, val, NULL, 0, mutex, private)
+
+#define lll_futex_timed_wait_requeue_pi(futexp, val, timespec, clockbit,      \
+					mutex, private)			      \
+  ({									      \
+    INTERNAL_SYSCALL_DECL (__err);					      \
+    int __op = FUTEX_WAIT_REQUEUE_PI | clockbit;			      \
+									      \
+    INTERNAL_SYSCALL (futex, __err, 5, (futexp),			      \
+		      __lll_private_flag (__op, private),		      \
+		      (val), (timespec), mutex); 			      \
+  })
+
+#define lll_futex_cmp_requeue_pi(futexp, nr_wake, nr_move, mutex, val, priv)  \
+  ({									      \
+    INTERNAL_SYSCALL_DECL (__err);					      \
+    long int __ret;							      \
+									      \
+    __ret = INTERNAL_SYSCALL (futex, __err, 6, (futexp),		      \
+			      __lll_private_flag (FUTEX_CMP_REQUEUE_PI, priv),\
+			      (nr_wake), (nr_move), (mutex), (val));	      \
+    INTERNAL_SYSCALL_ERROR_P (__ret, __err);				      \
+  })
+
+
+#define lll_trylock(lock)	\
+  atomic_compare_and_exchange_val_acq(&(lock), 1, 0)
+
+#define lll_cond_trylock(lock)	\
+  atomic_compare_and_exchange_val_acq(&(lock), 2, 0)
+
+#define __lll_robust_trylock(futex, id) \
+  (atomic_compare_and_exchange_val_acq (futex, id, 0) != 0)
+#define lll_robust_trylock(lock, id) \
+  __lll_robust_trylock (&(lock), id)
+
+extern void __lll_lock_wait_private (int *futex) attribute_hidden;
+extern void __lll_lock_wait (int *futex, int private) attribute_hidden;
+extern int __lll_robust_lock_wait (int *futex, int private) attribute_hidden;
+
+#define __lll_lock(futex, private)					      \
+  ((void) ({								      \
+    int *__futex = (futex);						      \
+    if (__builtin_expect (atomic_compare_and_exchange_val_acq (__futex,       \
+								1, 0), 0))    \
+      {									      \
+	if (__builtin_constant_p (private) && (private) == LLL_PRIVATE)	      \
+	  __lll_lock_wait_private (__futex);				      \
+	else								      \
+	  __lll_lock_wait (__futex, private);				      \
+      }									      \
+  }))
+#define lll_lock(futex, private) __lll_lock (&(futex), private)
+
+
+#define __lll_robust_lock(futex, id, private)				      \
+  ({									      \
+    int *__futex = (futex);						      \
+    int __val = 0;							      \
+									      \
+    if (__builtin_expect (atomic_compare_and_exchange_bool_acq (__futex, id,  \
+								0), 0))	      \
+      __val = __lll_robust_lock_wait (__futex, private);		      \
+    __val;								      \
+  })
+#define lll_robust_lock(futex, id, private) \
+  __lll_robust_lock (&(futex), id, private)
+
+
+#define __lll_cond_lock(futex, private)					      \
+  ((void) ({								      \
+    int *__futex = (futex);						      \
+    if (__builtin_expect (atomic_exchange_acq (__futex, 2), 0))		      \
+      __lll_lock_wait (__futex, private);				      \
+  }))
+#define lll_cond_lock(futex, private) __lll_cond_lock (&(futex), private)
+
+
+#define lll_robust_cond_lock(futex, id, private) \
+  __lll_robust_lock (&(futex), (id) | FUTEX_WAITERS, private)
+
+
+extern int __lll_timedlock_wait (int *futex, const struct timespec *,
+				 int private) attribute_hidden;
+extern int __lll_robust_timedlock_wait (int *futex, const struct timespec *,
+					int private) attribute_hidden;
+
+#define __lll_timedlock(futex, abstime, private)			      \
+  ({									      \
+     int *__futex = (futex);						      \
+     int __val = 0;							      \
+									      \
+     if (__builtin_expect (atomic_exchange_acq (__futex, 1), 0))	      \
+       __val = __lll_timedlock_wait (__futex, abstime, private);	      \
+     __val;								      \
+  })
+#define lll_timedlock(futex, abstime, private) \
+  __lll_timedlock (&(futex), abstime, private)
+
+
+#define __lll_robust_timedlock(futex, abstime, id, private)		      \
+  ({									      \
+    int *__futex = (futex);						      \
+    int __val = 0;							      \
+									      \
+    if (__builtin_expect (atomic_compare_and_exchange_bool_acq (__futex, id,  \
+								0), 0))	      \
+      __val = __lll_robust_timedlock_wait (__futex, abstime, private);	      \
+    __val;								      \
+  })
+#define lll_robust_timedlock(futex, abstime, id, private) \
+  __lll_robust_timedlock (&(futex), abstime, id, private)
+
+
+#define __lll_unlock(futex, private) \
+  (void)							\
+    ({ int *__futex = (futex);					\
+       int __oldval = atomic_exchange_rel (__futex, 0);		\
+       if (__builtin_expect (__oldval > 1, 0))			\
+	 lll_futex_wake (__futex, 1, private);			\
+    })
+#define lll_unlock(futex, private) __lll_unlock(&(futex), private)
+
+
+#define __lll_robust_unlock(futex, private) \
+  (void)							\
+    ({ int *__futex = (futex);					\
+       int __oldval = atomic_exchange_rel (__futex, 0);		\
+       if (__builtin_expect (__oldval & FUTEX_WAITERS, 0))	\
+	 lll_futex_wake (__futex, 1, private);			\
+    })
+#define lll_robust_unlock(futex, private) \
+  __lll_robust_unlock(&(futex), private)
+
+
+#define lll_islocked(futex) \
+  (futex != 0)
+
+
+/* Our internal lock implementation is identical to the binary-compatible
+   mutex implementation. */
+
+/* Initializers for lock.  */
+#define LLL_LOCK_INITIALIZER		(0)
+#define LLL_LOCK_INITIALIZER_LOCKED	(1)
+
+/* The states of a lock are:
+    0  -  untaken
+    1  -  taken by one user
+   >1  -  taken by more users */
+
+/* The kernel notifies a process which uses CLONE_CHILD_CLEARTID via futex
+   wakeup when the clone terminates.  The memory location contains the
+   thread ID while the clone is running and is reset to zero
+   afterwards.	*/
+#define lll_wait_tid(tid) \
+  do {					\
+    __typeof (tid) __tid;		\
+    while ((__tid = (tid)) != 0)	\
+      lll_futex_wait (&(tid), __tid, LLL_SHARED);\
+  } while (0)
+
+extern int __lll_timedwait_tid (int *, const struct timespec *)
+     attribute_hidden;
+
+#define lll_timedwait_tid(tid, abstime) \
+  ({							\
+    int __res = 0;					\
+    if ((tid) != 0)					\
+      __res = __lll_timedwait_tid (&(tid), (abstime));	\
+    __res;						\
+  })
+
+#endif	/* lowlevellock.h */
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/nptl-aeabi_unwind_cpp_pr1.c b/sysdeps/unix/sysv/linux/arm/nptl/nptl-aeabi_unwind_cpp_pr1.c
new file mode 100644
index 0000000000..7b83522437
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/nptl-aeabi_unwind_cpp_pr1.c
@@ -0,0 +1 @@
+#include <aeabi_unwind_cpp_pr1.c>
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/pt-vfork.S b/sysdeps/unix/sysv/linux/arm/nptl/pt-vfork.S
new file mode 100644
index 0000000000..7eff08e720
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/pt-vfork.S
@@ -0,0 +1,34 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <tcb-offsets.h>
+
+/* Save the PID value.  */
+#define SAVE_PID \
+	GET_TLS (r2);							\
+	NEGOFF_ADJ_BASE2 (r2, r0, PID_OFFSET); /* Save the TLS addr in r2. */ \
+	ldr	r3, NEGOFF_OFF1 (r2, PID_OFFSET); /* Load the saved PID.  */  \
+	rsb	r0, r3, #0;		/* Negate it.  */		     \
+	str	r0, NEGOFF_OFF1 (r2, PID_OFFSET); /* Store the temp PID.  */
+
+/* Restore the old PID value in the parent.  */
+#define RESTORE_PID \
+	cmp	r0, #0;			/* If we are the parent... */	\
+	it	ne;							\
+	strne	r3, NEGOFF_OFF1 (r2, PID_OFFSET); /* restore the saved PID.  */
+
+#include "../vfork.S"
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/pthread_once.c b/sysdeps/unix/sysv/linux/arm/nptl/pthread_once.c
new file mode 100644
index 0000000000..a063149925
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/pthread_once.c
@@ -0,0 +1,89 @@
+/* Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "pthreadP.h"
+#include <lowlevellock.h>
+
+unsigned long int __fork_generation attribute_hidden;
+
+static void
+clear_once_control (void *arg)
+{
+  pthread_once_t *once_control = (pthread_once_t *) arg;
+
+  *once_control = 0;
+  lll_futex_wake (once_control, INT_MAX, LLL_PRIVATE);
+}
+
+int
+__pthread_once (pthread_once_t *once_control, void (*init_routine) (void))
+{
+  for (;;)
+    {
+      int oldval;
+      int newval;
+
+      /* Pseudo code:
+	 newval = __fork_generation | 1;
+	 oldval = *once_control;
+	 if ((oldval & 2) == 0)
+	   *once_control = newval;
+	 Do this atomically.
+      */
+      do
+	{
+	  newval = __fork_generation | 1;
+	  oldval = *once_control;
+	  if (oldval & 2)
+	    break;
+	} while (atomic_compare_and_exchange_val_acq (once_control, newval, oldval) != oldval);
+
+      /* Check if the initializer has already been done.  */
+      if ((oldval & 2) != 0)
+	return 0;
+
+      /* Check if another thread already runs the initializer.	*/
+      if ((oldval & 1) == 0)
+	break;
+
+      /* Check whether the initializer execution was interrupted by a fork.  */
+      if (oldval != newval)
+	break;
+
+      /* Same generation, some other thread was faster. Wait.  */
+      lll_futex_wait (once_control, oldval, LLL_PRIVATE);
+    }
+
+  /* This thread is the first here.  Do the initialization.
+     Register a cleanup handler so that in case the thread gets
+     interrupted the initialization can be restarted.  */
+  pthread_cleanup_push (clear_once_control, once_control);
+
+  init_routine ();
+
+  pthread_cleanup_pop (0);
+
+  /* Say that the initialisation is done.  */
+  *once_control = __fork_generation | 2;
+
+  /* Wake up all other threads.  */
+  lll_futex_wake (once_control, INT_MAX, LLL_PRIVATE);
+
+  return 0;
+}
+weak_alias (__pthread_once, pthread_once)
+hidden_def (__pthread_once)
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/rt-aeabi_unwind_cpp_pr1.c b/sysdeps/unix/sysv/linux/arm/nptl/rt-aeabi_unwind_cpp_pr1.c
new file mode 100644
index 0000000000..7b83522437
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/rt-aeabi_unwind_cpp_pr1.c
@@ -0,0 +1 @@
+#include <aeabi_unwind_cpp_pr1.c>
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/sysdep-cancel.h b/sysdeps/unix/sysv/linux/arm/nptl/sysdep-cancel.h
new file mode 100644
index 0000000000..118e6c3466
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/sysdep-cancel.h
@@ -0,0 +1,242 @@
+/* Copyright (C) 2003-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <tls.h>
+#ifndef __ASSEMBLER__
+# include <nptl/pthreadP.h>
+#endif
+
+#if !defined NOT_IN_libc || defined IS_IN_libpthread || defined IS_IN_librt
+
+/* NOTE: We do mark syscalls with unwind annotations, for the benefit of
+   cancellation; but they're really only accurate at the point of the
+   syscall.  The ARM unwind directives are not rich enough without adding
+   a custom personality function.  */
+
+# undef PSEUDO
+# define PSEUDO(name, syscall_name, args)				\
+	.text;								\
+  ENTRY (__##syscall_name##_nocancel);					\
+	CFI_SECTIONS;							\
+	DO_CALL (syscall_name, args);					\
+	cmn	r0, $4096;						\
+	PSEUDO_RET;							\
+  END (__##syscall_name##_nocancel);					\
+  ENTRY (name);								\
+	SINGLE_THREAD_P;						\
+	DOARGS_##args;							\
+	bne .Lpseudo_cancel;						\
+	cfi_remember_state;						\
+	ldr	r7, =SYS_ify (syscall_name);				\
+	swi	0x0;							\
+	UNDOARGS_##args;						\
+	cmn	r0, $4096;						\
+	PSEUDO_RET;							\
+	cfi_restore_state;						\
+  .Lpseudo_cancel:							\
+	.fnstart;	/* matched by the .fnend in UNDOARGS below.  */	\
+	DOCARGS_##args;	/* save syscall args etc. around CENABLE.  */	\
+	CENABLE;							\
+	mov ip, r0;		/* put mask in safe place.  */		\
+	UNDOCARGS_##args;	/* restore syscall args.  */		\
+	ldr	r7, =SYS_ify (syscall_name);				\
+	swi	0x0;		/* do the call.  */			\
+	mov	r7, r0;		/* save syscall return value.  */	\
+	mov	r0, ip;		/* get mask back.  */			\
+	CDISABLE;							\
+	mov	r0, r7;		/* retrieve return value.  */		\
+	RESTORE_LR_##args;						\
+	UNDOARGS_##args;						\
+	cmn	r0, $4096
+
+/* DOARGS pushes eight bytes on the stack for five arguments, twelve bytes for
+   six arguments, and four bytes for fewer.  In order to preserve doubleword
+   alignment, sometimes we must save an extra register.  */
+
+# define RESTART_UNWIND				\
+	.fnend;					\
+	.fnstart;				\
+	.save	{r7};				\
+	.save	{lr}
+
+# define DOCARGS_0				\
+	.save {r7};				\
+	push	{lr};				\
+	cfi_adjust_cfa_offset (4);		\
+	cfi_rel_offset (lr, 0);			\
+	.save	{lr}
+# define UNDOCARGS_0
+# define RESTORE_LR_0				\
+	pop	{lr};				\
+	cfi_adjust_cfa_offset (-4);		\
+	cfi_restore (lr)
+
+# define DOCARGS_1				\
+	.save	{r7};				\
+	push	{r0, r1, lr};			\
+	cfi_adjust_cfa_offset (12);		\
+	cfi_rel_offset (lr, 8);			\
+	.save	{lr};				\
+	.pad	#8
+# define UNDOCARGS_1				\
+	ldr r0, [sp], #8;			\
+	cfi_adjust_cfa_offset (-8);		\
+	RESTART_UNWIND
+# define RESTORE_LR_1				\
+	RESTORE_LR_0
+
+# define DOCARGS_2				\
+	.save	{r7};				\
+	push	{r0, r1, lr};			\
+	cfi_adjust_cfa_offset (12);		\
+	cfi_rel_offset (lr, 8);			\
+	.save	{lr};				\
+	.pad	#8
+# define UNDOCARGS_2				\
+	pop	{r0, r1};			\
+	cfi_adjust_cfa_offset (-8);		\
+	RESTART_UNWIND
+# define RESTORE_LR_2				\
+	RESTORE_LR_0
+
+# define DOCARGS_3				\
+	.save	{r7};				\
+	push	{r0, r1, r2, r3, lr};		\
+	cfi_adjust_cfa_offset (20);		\
+	cfi_rel_offset (lr, 16);		\
+	.save	{lr};				\
+	.pad	#16
+# define UNDOCARGS_3				\
+	pop	{r0, r1, r2, r3};		\
+	cfi_adjust_cfa_offset (-16);		\
+	RESTART_UNWIND
+# define RESTORE_LR_3				\
+	RESTORE_LR_0
+
+# define DOCARGS_4				\
+	.save	{r7};				\
+	push	{r0, r1, r2, r3, lr};		\
+	cfi_adjust_cfa_offset (20);		\
+	cfi_rel_offset (lr, 16);		\
+	.save	{lr};				\
+	.pad	#16
+# define UNDOCARGS_4				\
+	pop	{r0, r1, r2, r3};		\
+	cfi_adjust_cfa_offset (-16);		\
+	RESTART_UNWIND
+# define RESTORE_LR_4				\
+	RESTORE_LR_0
+
+/* r4 is only stmfd'ed for correct stack alignment.  */
+# define DOCARGS_5				\
+	.save	{r4, r7};			\
+	push	{r0, r1, r2, r3, r4, lr};	\
+	cfi_adjust_cfa_offset (24);		\
+	cfi_rel_offset (lr, 20);		\
+	.save	{lr};				\
+	.pad	#20
+# define UNDOCARGS_5				\
+	pop	{r0, r1, r2, r3};		\
+	cfi_adjust_cfa_offset (-16);		\
+	.fnend;					\
+	.fnstart;				\
+	.save	{r4, r7};			\
+	.save	{lr};				\
+	.pad	#4
+# define RESTORE_LR_5				\
+	pop	{r4, lr};			\
+	cfi_adjust_cfa_offset (-8);		\
+	/* r4 will be marked as restored later.  */ \
+	cfi_restore (lr)
+
+# define DOCARGS_6				\
+	.save	{r4, r5, r7};			\
+	push	{r0, r1, r2, r3, lr};		\
+	cfi_adjust_cfa_offset (20);		\
+	cfi_rel_offset (lr, 16);		\
+	.save	{lr};				\
+	.pad	#16
+# define UNDOCARGS_6				\
+	pop	{r0, r1, r2, r3};		\
+	cfi_adjust_cfa_offset (-16);		\
+	.fnend;					\
+	.fnstart;				\
+	.save	{r4, r5, r7};			\
+	.save	{lr};
+# define RESTORE_LR_6				\
+	RESTORE_LR_0
+
+# ifdef IS_IN_libpthread
+#  define CENABLE	bl PLTJMP(__pthread_enable_asynccancel)
+#  define CDISABLE	bl PLTJMP(__pthread_disable_asynccancel)
+#  define __local_multiple_threads __pthread_multiple_threads
+# elif !defined NOT_IN_libc
+#  define CENABLE	bl PLTJMP(__libc_enable_asynccancel)
+#  define CDISABLE	bl PLTJMP(__libc_disable_asynccancel)
+#  define __local_multiple_threads __libc_multiple_threads
+# elif defined IS_IN_librt
+#  define CENABLE	bl PLTJMP(__librt_enable_asynccancel)
+#  define CDISABLE	bl PLTJMP(__librt_disable_asynccancel)
+# else
+#  error Unsupported library
+# endif
+
+# if defined IS_IN_libpthread || !defined NOT_IN_libc
+#  ifndef __ASSEMBLER__
+extern int __local_multiple_threads attribute_hidden;
+#   define SINGLE_THREAD_P __builtin_expect (__local_multiple_threads == 0, 1)
+#  else
+#   define SINGLE_THREAD_P						\
+	LDST_PCREL(ldr, ip, ip, __local_multiple_threads);		\
+	teq ip, #0
+#  endif
+# else
+/*  There is no __local_multiple_threads for librt, so use the TCB.  */
+#  ifndef __ASSEMBLER__
+#   define SINGLE_THREAD_P						\
+  __builtin_expect (THREAD_GETMEM (THREAD_SELF,				\
+				   header.multiple_threads) == 0, 1)
+#  else
+#   define SINGLE_THREAD_P						\
+	push	{r0, lr};						\
+	cfi_adjust_cfa_offset (8);					\
+	cfi_rel_offset (lr, 4);						\
+	GET_TLS (lr);							\
+	NEGOFF_ADJ_BASE (r0, MULTIPLE_THREADS_OFFSET);			\
+	ldr	ip, NEGOFF_OFF1 (r0, MULTIPLE_THREADS_OFFSET);		\
+	pop	{r0, lr};						\
+	cfi_adjust_cfa_offset (-8);					\
+	cfi_restore (lr);						\
+	teq	ip, #0
+#   define SINGLE_THREAD_P_PIC(x) SINGLE_THREAD_P
+#  endif
+# endif
+
+#elif !defined __ASSEMBLER__
+
+/* For rtld, et cetera.  */
+# define SINGLE_THREAD_P 1
+# define NO_CANCELLATION 1
+
+#endif
+
+#ifndef __ASSEMBLER__
+# define RTLD_SINGLE_THREAD_P \
+  __builtin_expect (THREAD_GETMEM (THREAD_SELF, \
+				   header.multiple_threads) == 0, 1)
+#endif
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/unwind-forcedunwind.c b/sysdeps/unix/sysv/linux/arm/nptl/unwind-forcedunwind.c
new file mode 100644
index 0000000000..6ccd9b43a1
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/unwind-forcedunwind.c
@@ -0,0 +1,157 @@
+/* Copyright (C) 2003-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Jakub Jelinek <jakub@redhat.com>.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public License as
+   published by the Free Software Foundation; either version 2.1 of the
+   License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <dlfcn.h>
+#include <stdio.h>
+#include <unwind.h>
+#include <pthreadP.h>
+
+static void *libgcc_s_handle;
+static void (*libgcc_s_resume) (struct _Unwind_Exception *exc);
+static _Unwind_Reason_Code (*libgcc_s_personality)
+  (_Unwind_State, struct _Unwind_Exception *, struct _Unwind_Context *);
+static _Unwind_Reason_Code (*libgcc_s_forcedunwind)
+  (struct _Unwind_Exception *, _Unwind_Stop_Fn, void *);
+static _Unwind_Word (*libgcc_s_getcfa) (struct _Unwind_Context *);
+
+void
+__attribute_noinline__
+pthread_cancel_init (void)
+{
+  void *resume, *personality, *forcedunwind, *getcfa;
+  void *handle;
+
+  if (__builtin_expect (libgcc_s_handle != NULL, 1))
+    {
+      /* Force gcc to reload all values.  */
+      asm volatile ("" ::: "memory");
+      return;
+    }
+
+  handle = __libc_dlopen ("libgcc_s.so.1");
+
+  if (handle == NULL
+      || (resume = __libc_dlsym (handle, "_Unwind_Resume")) == NULL
+      || (personality = __libc_dlsym (handle, "__gcc_personality_v0")) == NULL
+      || (forcedunwind = __libc_dlsym (handle, "_Unwind_ForcedUnwind"))
+	 == NULL
+      || (getcfa = __libc_dlsym (handle, "_Unwind_GetCFA")) == NULL
+#ifdef ARCH_CANCEL_INIT
+      || ARCH_CANCEL_INIT (handle)
+#endif
+      )
+    __libc_fatal ("libgcc_s.so.1 must be installed for pthread_cancel to work\n");
+
+  libgcc_s_resume = resume;
+  libgcc_s_personality = personality;
+  libgcc_s_forcedunwind = forcedunwind;
+  libgcc_s_getcfa = getcfa;
+  /* Make sure libgcc_s_getcfa is written last.  Otherwise,
+     pthread_cancel_init might return early even when the pointer the
+     caller is interested in is not initialized yet.  */
+  atomic_write_barrier ();
+  libgcc_s_handle = handle;
+}
+
+void
+__libc_freeres_fn_section
+__unwind_freeres (void)
+{
+  void *handle = libgcc_s_handle;
+  if (handle != NULL)
+    {
+      libgcc_s_handle = NULL;
+      __libc_dlclose (handle);
+    }
+}
+
+/* It's vitally important that _Unwind_Resume not have a stack frame; the
+   ARM unwinder relies on register state at entrance.  So we write this in
+   assembly.  */
+
+#define STR1(S) #S
+#define STR(S)  STR1(S)
+
+asm (
+"	.globl	_Unwind_Resume\n"
+"	.type	_Unwind_Resume, %function\n"
+"_Unwind_Resume:\n"
+"	.cfi_sections .debug_frame\n"
+"	" CFI_STARTPROC "\n"
+"	push	{r4, r5, r6, lr}\n"
+"	" CFI_ADJUST_CFA_OFFSET (16)" \n"
+"	" CFI_REL_OFFSET (r4, 0) "\n"
+"	" CFI_REL_OFFSET (r5, 4) "\n"
+"	" CFI_REL_OFFSET (r6, 8) "\n"
+"	" CFI_REL_OFFSET (lr, 12) "\n"
+"	" CFI_REMEMBER_STATE "\n"
+"	ldr	r4, 1f\n"
+"	ldr	r5, 2f\n"
+"3:	add	r4, pc, r4\n"
+"	ldr	r3, [r4, r5]\n"
+"	mov	r6, r0\n"
+"	cmp	r3, #0\n"
+"	beq	4f\n"
+"5:	mov	r0, r6\n"
+"	pop	{r4, r5, r6, lr}\n"
+"	" CFI_ADJUST_CFA_OFFSET (-16) "\n"
+"	" CFI_RESTORE (r4) "\n"
+"	" CFI_RESTORE (r5) "\n"
+"	" CFI_RESTORE (r6) "\n"
+"	" CFI_RESTORE (lr) "\n"
+"	bx	r3\n"
+"	" CFI_RESTORE_STATE "\n"
+"4:	bl	pthread_cancel_init\n"
+"	ldr	r3, [r4, r5]\n"
+"	b	5b\n"
+"	" CFI_ENDPROC "\n"
+"	.align 2\n"
+"1:	.word	_GLOBAL_OFFSET_TABLE_ - 3b - " STR (PC_OFS) "\n"
+"2:	.word	libgcc_s_resume(GOTOFF)\n"
+"	.size	_Unwind_Resume, .-_Unwind_Resume\n"
+);
+
+_Unwind_Reason_Code
+__gcc_personality_v0 (_Unwind_State state,
+		      struct _Unwind_Exception *ue_header,
+		      struct _Unwind_Context *context)
+{
+  if (__builtin_expect (libgcc_s_personality == NULL, 0))
+    pthread_cancel_init ();
+
+  return libgcc_s_personality (state, ue_header, context);
+}
+
+_Unwind_Reason_Code
+_Unwind_ForcedUnwind (struct _Unwind_Exception *exc, _Unwind_Stop_Fn stop,
+		      void *stop_argument)
+{
+  if (__builtin_expect (libgcc_s_forcedunwind == NULL, 0))
+    pthread_cancel_init ();
+
+  return libgcc_s_forcedunwind (exc, stop, stop_argument);
+}
+
+_Unwind_Word
+_Unwind_GetCFA (struct _Unwind_Context *context)
+{
+  if (__builtin_expect (libgcc_s_getcfa == NULL, 0))
+    pthread_cancel_init ();
+
+  return libgcc_s_getcfa (context);
+}
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/unwind-resume.c b/sysdeps/unix/sysv/linux/arm/nptl/unwind-resume.c
new file mode 100644
index 0000000000..bff3e2b4f1
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/unwind-resume.c
@@ -0,0 +1,100 @@
+/* Copyright (C) 2003-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Jakub Jelinek <jakub@redhat.com>.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public License as
+   published by the Free Software Foundation; either version 2.1 of the
+   License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <dlfcn.h>
+#include <stdio.h>
+#include <unwind.h>
+
+static void (*libgcc_s_resume) (struct _Unwind_Exception *exc);
+static _Unwind_Reason_Code (*libgcc_s_personality)
+  (_Unwind_State, struct _Unwind_Exception *, struct _Unwind_Context *);
+
+static void init (void) __attribute_used__;
+
+static void
+init (void)
+{
+  void *resume, *personality;
+  void *handle;
+
+  handle = __libc_dlopen ("libgcc_s.so.1");
+
+  if (handle == NULL
+      || (resume = __libc_dlsym (handle, "_Unwind_Resume")) == NULL
+      || (personality = __libc_dlsym (handle, "__gcc_personality_v0")) == NULL)
+    __libc_fatal ("libgcc_s.so.1 must be installed for pthread_cancel to work\n");
+
+  libgcc_s_resume = resume;
+  libgcc_s_personality = personality;
+}
+
+/* It's vitally important that _Unwind_Resume not have a stack frame; the
+   ARM unwinder relies on register state at entrance.  So we write this in
+   assembly.  */
+
+#define STR1(S) #S
+#define STR(S)  STR1(S)
+
+asm (
+"	.globl	_Unwind_Resume\n"
+"	.type	_Unwind_Resume, %function\n"
+"_Unwind_Resume:\n"
+"	.cfi_sections .debug_frame\n"
+"	" CFI_STARTPROC "\n"
+"	push	{r4, r5, r6, lr}\n"
+"	" CFI_ADJUST_CFA_OFFSET (16)" \n"
+"	" CFI_REL_OFFSET (r4, 0) "\n"
+"	" CFI_REL_OFFSET (r5, 4) "\n"
+"	" CFI_REL_OFFSET (r6, 8) "\n"
+"	" CFI_REL_OFFSET (lr, 12) "\n"
+"	" CFI_REMEMBER_STATE "\n"
+"	ldr	r4, 1f\n"
+"	ldr	r5, 2f\n"
+"3:	add	r4, pc, r4\n"
+"	ldr	r3, [r4, r5]\n"
+"	mov	r6, r0\n"
+"	cmp	r3, #0\n"
+"	beq	4f\n"
+"5:	mov	r0, r6\n"
+"	pop	{r4, r5, r6, lr}\n"
+"	" CFI_ADJUST_CFA_OFFSET (-16) "\n"
+"	" CFI_RESTORE (r4) "\n"
+"	" CFI_RESTORE (r5) "\n"
+"	" CFI_RESTORE (r6) "\n"
+"	" CFI_RESTORE (lr) "\n"
+"	bx	r3\n"
+"	" CFI_RESTORE_STATE "\n"
+"4:	bl	init\n"
+"	ldr	r3, [r4, r5]\n"
+"	b	5b\n"
+"	" CFI_ENDPROC "\n"
+"	.align 2\n"
+"1:	.word	_GLOBAL_OFFSET_TABLE_ - 3b - " STR (PC_OFS) "\n"
+"2:	.word	libgcc_s_resume(GOTOFF)\n"
+"	.size	_Unwind_Resume, .-_Unwind_Resume\n"
+);
+
+_Unwind_Reason_Code
+__gcc_personality_v0 (_Unwind_State state,
+		      struct _Unwind_Exception *ue_header,
+		      struct _Unwind_Context *context)
+{
+  if (__builtin_expect (libgcc_s_personality == NULL, 0))
+    init ();
+  return libgcc_s_personality (state, ue_header, context);
+}
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/unwind.h b/sysdeps/unix/sysv/linux/arm/nptl/unwind.h
new file mode 100644
index 0000000000..7b71817e89
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/unwind.h
@@ -0,0 +1,278 @@
+/* Header file for the ARM EABI unwinder
+   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+   Contributed by Paul Brook
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 2, or (at your option) any
+   later version.
+
+   In addition to the permissions in the GNU General Public License, the
+   Free Software Foundation gives you unlimited permission to link the
+   compiled version of this file into combinations with other programs,
+   and to distribute those combinations without any restriction coming
+   from the use of this file.  (The General Public License restrictions
+   do apply in other respects; for example, they cover modification of
+   the file, and distribution when not linked into a combine
+   executable.)
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Language-independent unwinder header public defines.  This contains both
+   ABI defined objects, and GNU support routines.  */
+
+#ifndef UNWIND_ARM_H
+#define UNWIND_ARM_H
+
+#define __ARM_EABI_UNWINDER__ 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+  typedef unsigned _Unwind_Word __attribute__((__mode__(__word__)));
+  typedef signed _Unwind_Sword __attribute__((__mode__(__word__)));
+  typedef unsigned _Unwind_Ptr __attribute__((__mode__(__pointer__)));
+  typedef unsigned _Unwind_Internal_Ptr __attribute__((__mode__(__pointer__)));
+  typedef _Unwind_Word _uw;
+  typedef unsigned _uw64 __attribute__((mode(__DI__)));
+  typedef unsigned _uw16 __attribute__((mode(__HI__)));
+  typedef unsigned _uw8 __attribute__((mode(__QI__)));
+
+  typedef enum
+    {
+      _URC_OK = 0,       /* operation completed successfully */
+      _URC_FOREIGN_EXCEPTION_CAUGHT = 1,
+      _URC_END_OF_STACK = 5,
+      _URC_HANDLER_FOUND = 6,
+      _URC_INSTALL_CONTEXT = 7,
+      _URC_CONTINUE_UNWIND = 8,
+      _URC_FAILURE = 9   /* unspecified failure of some kind */
+    }
+  _Unwind_Reason_Code;
+
+  typedef enum
+    {
+      _US_VIRTUAL_UNWIND_FRAME = 0,
+      _US_UNWIND_FRAME_STARTING = 1,
+      _US_UNWIND_FRAME_RESUME = 2,
+      _US_ACTION_MASK = 3,
+      _US_FORCE_UNWIND = 8,
+      _US_END_OF_STACK = 16
+    }
+  _Unwind_State;
+
+  /* Provided only for for compatibility with existing code.  */
+  typedef int _Unwind_Action;
+#define _UA_SEARCH_PHASE	1
+#define _UA_CLEANUP_PHASE	2
+#define _UA_HANDLER_FRAME	4
+#define _UA_FORCE_UNWIND	8
+#define _UA_END_OF_STACK	16
+#define _URC_NO_REASON 	_URC_OK
+
+  typedef struct _Unwind_Control_Block _Unwind_Control_Block;
+  typedef struct _Unwind_Context _Unwind_Context;
+  typedef _uw _Unwind_EHT_Header;
+
+
+  /* UCB: */
+
+  struct _Unwind_Control_Block
+    {
+#ifdef _LIBC
+      /* For the benefit of code which assumes this is a scalar.  All
+	 glibc ever does is clear it.  */
+      _uw64 exception_class;
+#else
+      char exception_class[8];
+#endif
+      void (*exception_cleanup)(_Unwind_Reason_Code, _Unwind_Control_Block *);
+      /* Unwinder cache, private fields for the unwinder's use */
+      struct
+	{
+	  _uw reserved1;  /* Forced unwind stop fn, 0 if not forced */
+	  _uw reserved2;  /* Personality routine address */
+	  _uw reserved3;  /* Saved callsite address */
+	  _uw reserved4;  /* Forced unwind stop arg */
+	  _uw reserved5;
+	}
+      unwinder_cache;
+      /* Propagation barrier cache (valid after phase 1): */
+      struct
+	{
+	  _uw sp;
+	  _uw bitpattern[5];
+	}
+      barrier_cache;
+      /* Cleanup cache (preserved over cleanup): */
+      struct
+	{
+	  _uw bitpattern[4];
+	}
+      cleanup_cache;
+      /* Pr cache (for pr's benefit): */
+      struct
+	{
+	  _uw fnstart;			/* function start address */
+	  _Unwind_EHT_Header *ehtp;	/* pointer to EHT entry header word */
+	  _uw additional;		/* additional data */
+	  _uw reserved1;
+	}
+      pr_cache;
+      long long int :0;	/* Force alignment to 8-byte boundary */
+    };
+
+  /* Virtual Register Set*/
+
+  typedef enum
+    {
+      _UVRSC_CORE = 0,      /* integer register */
+      _UVRSC_VFP = 1,       /* vfp */
+      _UVRSC_FPA = 2,       /* fpa */
+      _UVRSC_WMMXD = 3,     /* Intel WMMX data register */
+      _UVRSC_WMMXC = 4      /* Intel WMMX control register */
+    }
+  _Unwind_VRS_RegClass;
+
+  typedef enum
+    {
+      _UVRSD_UINT32 = 0,
+      _UVRSD_VFPX = 1,
+      _UVRSD_FPAX = 2,
+      _UVRSD_UINT64 = 3,
+      _UVRSD_FLOAT = 4,
+      _UVRSD_DOUBLE = 5
+    }
+  _Unwind_VRS_DataRepresentation;
+
+  typedef enum
+    {
+      _UVRSR_OK = 0,
+      _UVRSR_NOT_IMPLEMENTED = 1,
+      _UVRSR_FAILED = 2
+    }
+  _Unwind_VRS_Result;
+
+  /* Frame unwinding state.  */
+  typedef struct
+    {
+      /* The current word (bytes packed msb first).  */
+      _uw data;
+      /* Pointer to the next word of data.  */
+      _uw *next;
+      /* The number of bytes left in this word.  */
+      _uw8 bytes_left;
+      /* The number of words pointed to by ptr.  */
+      _uw8 words_left;
+    }
+  __gnu_unwind_state;
+
+  typedef _Unwind_Reason_Code (*personality_routine) (_Unwind_State,
+      _Unwind_Control_Block *, _Unwind_Context *);
+
+  _Unwind_VRS_Result _Unwind_VRS_Set(_Unwind_Context *, _Unwind_VRS_RegClass,
+                                     _uw, _Unwind_VRS_DataRepresentation,
+                                     void *);
+
+  _Unwind_VRS_Result _Unwind_VRS_Get(_Unwind_Context *, _Unwind_VRS_RegClass,
+                                     _uw, _Unwind_VRS_DataRepresentation,
+                                     void *);
+
+  _Unwind_VRS_Result _Unwind_VRS_Pop(_Unwind_Context *, _Unwind_VRS_RegClass,
+                                     _uw, _Unwind_VRS_DataRepresentation);
+
+
+  /* Support functions for the PR.  */
+#define _Unwind_Exception _Unwind_Control_Block
+  typedef char _Unwind_Exception_Class[8];
+
+  void * _Unwind_GetLanguageSpecificData (_Unwind_Context *);
+  _Unwind_Ptr _Unwind_GetRegionStart (_Unwind_Context *);
+
+  /* These two should never be used.  */
+  _Unwind_Ptr _Unwind_GetDataRelBase (_Unwind_Context *);
+  _Unwind_Ptr _Unwind_GetTextRelBase (_Unwind_Context *);
+
+  /* Interface functions: */
+  _Unwind_Reason_Code _Unwind_RaiseException(_Unwind_Control_Block *ucbp);
+  void __attribute__((noreturn)) _Unwind_Resume(_Unwind_Control_Block *ucbp);
+  _Unwind_Reason_Code _Unwind_Resume_or_Rethrow (_Unwind_Control_Block *ucbp);
+
+  typedef _Unwind_Reason_Code (*_Unwind_Stop_Fn)
+       (int, _Unwind_Action, _Unwind_Exception_Class,
+	_Unwind_Control_Block *, struct _Unwind_Context *, void *);
+  _Unwind_Reason_Code _Unwind_ForcedUnwind (_Unwind_Control_Block *,
+					    _Unwind_Stop_Fn, void *);
+  _Unwind_Word _Unwind_GetCFA (struct _Unwind_Context *);
+  void _Unwind_Complete(_Unwind_Control_Block *ucbp);
+  void _Unwind_DeleteException (_Unwind_Exception *);
+
+  _Unwind_Reason_Code __gnu_unwind_frame (_Unwind_Control_Block *,
+					  _Unwind_Context *);
+  _Unwind_Reason_Code __gnu_unwind_execute (_Unwind_Context *,
+					    __gnu_unwind_state *);
+
+  /* Decode an R_ARM_TARGET2 relocation.  */
+  static inline _Unwind_Word
+  _Unwind_decode_target2 (_Unwind_Word ptr)
+    {
+      _Unwind_Word tmp;
+
+      tmp = *(_Unwind_Word *) ptr;
+      /* Zero values are always NULL.  */
+      if (!tmp)
+	return 0;
+
+#if defined(linux) || defined(__NetBSD__)
+      /* Pc-relative indirect.  */
+      tmp += ptr;
+      tmp = *(_Unwind_Word *) tmp;
+#elif defined(__symbian__)
+      /* Absolute pointer.  Nothing more to do.  */
+#else
+      /* Pc-relative pointer.  */
+      tmp += ptr;
+#endif
+      return tmp;
+    }
+
+  static inline _Unwind_Word
+  _Unwind_GetGR (_Unwind_Context *context, int regno)
+    {
+      _uw val;
+      _Unwind_VRS_Get (context, _UVRSC_CORE, regno, _UVRSD_UINT32, &val);
+      return val;
+    }
+
+  /* Return the address of the instruction, not the actual IP value.  */
+#define _Unwind_GetIP(context) \
+  (_Unwind_GetGR (context, 15) & ~(_Unwind_Word)1)
+
+  static inline void
+  _Unwind_SetGR (_Unwind_Context *context, int regno, _Unwind_Word val)
+    {
+      _Unwind_VRS_Set (context, _UVRSC_CORE, regno, _UVRSD_UINT32, &val);
+    }
+
+  /* The dwarf unwinder doesn't understand arm/thumb state.  We assume the
+     landing pad uses the same instruction set as the call site.  */
+#define _Unwind_SetIP(context, val) \
+  _Unwind_SetGR (context, 15, val | (_Unwind_GetGR (context, 15) & 1))
+
+typedef _Unwind_Reason_Code (*_Unwind_Trace_Fn)
+     (struct _Unwind_Context *, void *);
+
+extern _Unwind_Reason_Code _Unwind_Backtrace (_Unwind_Trace_Fn, void *);
+
+#ifdef __cplusplus
+}   /* extern "C" */
+#endif
+
+#endif /* defined UNWIND_ARM_H */
diff --git a/sysdeps/unix/sysv/linux/arm/nptl/vfork.S b/sysdeps/unix/sysv/linux/arm/nptl/vfork.S
new file mode 100644
index 0000000000..2e942beba7
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/nptl/vfork.S
@@ -0,0 +1,36 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <tcb-offsets.h>
+
+/* Save the PID value.  */
+#define SAVE_PID \
+	GET_TLS (r2);							\
+	NEGOFF_ADJ_BASE2 (r2, r0, PID_OFFSET); /* Save the TLS addr in r2.  */ \
+	ldr	r3, NEGOFF_OFF1 (r2, PID_OFFSET); /* Load the saved PID.  */   \
+	rsbs	r0, r3, #0;		/* Negate it.  */		      \
+	it	eq;							      \
+	moveq	r0, #0x80000000;	/* Use 0x80000000 if it was 0.  */    \
+	str	r0, NEGOFF_OFF1 (r2, PID_OFFSET); /* Store the temp PID.  */
+
+/* Restore the old PID value in the parent.  */
+#define RESTORE_PID \
+	cmp	r0, #0;		/* If we are the parent... */		\
+	it	ne;							\
+	strne	r3, NEGOFF_OFF1 (r2, PID_OFFSET); /* restore the saved PID.  */
+
+#include "../vfork.S"
diff --git a/sysdeps/unix/sysv/linux/arm/oldgetrlimit.c b/sysdeps/unix/sysv/linux/arm/oldgetrlimit.c
new file mode 100644
index 0000000000..6e25b021ab
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/oldgetrlimit.c
@@ -0,0 +1 @@
+/* Empty.  */
diff --git a/sysdeps/unix/sysv/linux/arm/oldgetrlimit64.c b/sysdeps/unix/sysv/linux/arm/oldgetrlimit64.c
new file mode 100644
index 0000000000..4c27e957bf
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/oldgetrlimit64.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/oldgetrlimit64.c>
diff --git a/sysdeps/unix/sysv/linux/arm/oldsetrlimit.c b/sysdeps/unix/sysv/linux/arm/oldsetrlimit.c
new file mode 100644
index 0000000000..6e25b021ab
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/oldsetrlimit.c
@@ -0,0 +1 @@
+/* Empty.  */
diff --git a/sysdeps/unix/sysv/linux/arm/posix_fadvise.c b/sysdeps/unix/sysv/linux/arm/posix_fadvise.c
new file mode 100644
index 0000000000..281ff5b4ac
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/posix_fadvise.c
@@ -0,0 +1,30 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <fcntl.h>
+
+int __posix_fadvise64_l64 (int fd, off64_t offset, off64_t len, int advise);
+
+/* Advice the system about the expected behaviour of the application with
+   respect to the file associated with FD.  */
+
+int
+posix_fadvise (int fd, off_t offset, off_t len, int advise)
+{
+  /* ARM only has a syscall for fadvise64_64.  */
+  return __posix_fadvise64_l64 (fd, offset, len, advise);
+}
diff --git a/sysdeps/unix/sysv/linux/arm/posix_fadvise64.c b/sysdeps/unix/sysv/linux/arm/posix_fadvise64.c
new file mode 100644
index 0000000000..7c14eec8f8
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/posix_fadvise64.c
@@ -0,0 +1,55 @@
+/* Copyright (C) 2003-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <errno.h>
+#include <fcntl.h>
+#include <sysdep.h>
+
+int __posix_fadvise64_l64 (int fd, off64_t offset, off64_t len, int advise);
+int __posix_fadvise64_l32 (int fd, off64_t offset, size_t len, int advise);
+
+/* Advice the system about the expected behaviour of the application with
+   respect to the file associated with FD.  */
+
+int
+__posix_fadvise64_l64 (int fd, off64_t offset, off64_t len, int advise)
+{
+  INTERNAL_SYSCALL_DECL (err);
+  int ret = INTERNAL_SYSCALL (arm_fadvise64_64, err, 6, fd, advise,
+			      __LONG_LONG_PAIR ((long)(offset >> 32), (long)offset),
+			      __LONG_LONG_PAIR ((long)(len >> 32), (long)len));
+  if (!INTERNAL_SYSCALL_ERROR_P (ret, err))
+    return 0;
+  return INTERNAL_SYSCALL_ERRNO (ret, err);
+}
+
+#include <shlib-compat.h>
+
+#if SHLIB_COMPAT(libc, GLIBC_2_2, GLIBC_2_3_3)
+
+int
+attribute_compat_text_section
+__posix_fadvise64_l32 (int fd, off64_t offset, size_t len, int advise)
+{
+  return __posix_fadvise64_l64 (fd, offset, len, advise);
+}
+
+versioned_symbol (libc, __posix_fadvise64_l64, posix_fadvise64, GLIBC_2_3_3);
+compat_symbol (libc, __posix_fadvise64_l32, posix_fadvise64, GLIBC_2_2);
+#else
+strong_alias (__posix_fadvise64_l64, posix_fadvise64);
+#endif
diff --git a/sysdeps/unix/sysv/linux/arm/pread.c b/sysdeps/unix/sysv/linux/arm/pread.c
new file mode 100644
index 0000000000..97822ad11f
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/pread.c
@@ -0,0 +1,58 @@
+/* Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <errno.h>
+#include <endian.h>
+#include <unistd.h>
+
+#include <sysdep-cancel.h>
+#include <sys/syscall.h>
+
+ssize_t
+__libc_pread (fd, buf, count, offset)
+     int fd;
+     void *buf;
+     size_t count;
+     off_t offset;
+{
+  ssize_t result;
+
+  if (SINGLE_THREAD_P)
+    {
+      /* In the ARM EABI, 64-bit values are aligned to even/odd register
+	 pairs for syscalls.  */
+      result = INLINE_SYSCALL (pread64, 6, fd, buf, count, 0,
+			       __LONG_LONG_PAIR (offset >> 31, offset));
+
+      return result;
+    }
+
+  int oldtype = LIBC_CANCEL_ASYNC ();
+
+  /* In the ARM EABI, 64-bit values are aligned to even/odd register
+     pairs for syscalls.  */
+  result = INLINE_SYSCALL (pread64, 6, fd, buf, count, 0,
+			   __LONG_LONG_PAIR (offset >> 31, offset));
+
+  LIBC_CANCEL_RESET (oldtype);
+
+  return result;
+}
+
+strong_alias (__libc_pread, __pread)
+weak_alias (__libc_pread, pread)
diff --git a/sysdeps/unix/sysv/linux/arm/pread64.c b/sysdeps/unix/sysv/linux/arm/pread64.c
new file mode 100644
index 0000000000..cc75c9582c
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/pread64.c
@@ -0,0 +1,60 @@
+/* Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <errno.h>
+#include <endian.h>
+#include <unistd.h>
+
+#include <sysdep-cancel.h>
+#include <sys/syscall.h>
+
+ssize_t
+__libc_pread64 (fd, buf, count, offset)
+     int fd;
+     void *buf;
+     size_t count;
+     off64_t offset;
+{
+  ssize_t result;
+
+  if (SINGLE_THREAD_P)
+    {
+      /* In the ARM EABI, 64-bit values are aligned to even/odd register
+	 pairs for syscalls.  */
+      result = INLINE_SYSCALL (pread64, 6, fd, buf, count, 0,
+			       __LONG_LONG_PAIR ((off_t) (offset >> 32),
+						 (off_t) (offset & 0xffffffff)));
+
+      return result;
+    }
+
+  int oldtype = LIBC_CANCEL_ASYNC ();
+
+  /* In the ARM EABI, 64-bit values are aligned to even/odd register
+     pairs for syscalls.  */
+  result = INLINE_SYSCALL (pread64, 6, fd, buf, count, 0,
+			   __LONG_LONG_PAIR ((off_t) (offset >> 32),
+					     (off_t) (offset & 0xffffffff)));
+
+  LIBC_CANCEL_RESET (oldtype);
+
+  return result;
+}
+
+weak_alias (__libc_pread64, __pread64)
+weak_alias (__libc_pread64, pread64)
diff --git a/sysdeps/unix/sysv/linux/arm/profil-counter.h b/sysdeps/unix/sysv/linux/arm/profil-counter.h
new file mode 100644
index 0000000000..ddf4d41af2
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/profil-counter.h
@@ -0,0 +1,31 @@
+/* Low-level statistical profiling support function.  Linux/ARM version.
+   Copyright (C) 1996-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <signal.h>
+#include <sigcontextinfo.h>
+
+void
+profil_counter (int signo, const SIGCONTEXT scp)
+{
+  profil_count ((void *) GET_PC (scp));
+
+  /* This is a hack to prevent the compiler from implementing the
+     above function call as a sibcall.  The sibcall would overwrite
+     the signal context.  */
+  asm volatile ("");
+}
diff --git a/sysdeps/unix/sysv/linux/arm/pwrite.c b/sysdeps/unix/sysv/linux/arm/pwrite.c
new file mode 100644
index 0000000000..dfbabda82c
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/pwrite.c
@@ -0,0 +1,58 @@
+/* Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <errno.h>
+#include <endian.h>
+#include <unistd.h>
+
+#include <sysdep-cancel.h>
+#include <sys/syscall.h>
+
+ssize_t
+__libc_pwrite (fd, buf, count, offset)
+     int fd;
+     const void *buf;
+     size_t count;
+     off_t offset;
+{
+  ssize_t result;
+
+  if (SINGLE_THREAD_P)
+    {
+      /* In the ARM EABI, 64-bit values are aligned to even/odd register
+	 pairs for syscalls.  */
+      result = INLINE_SYSCALL (pwrite64, 6, fd, buf, count, 0,
+			       __LONG_LONG_PAIR (offset >> 31, offset));
+
+      return result;
+    }
+
+  int oldtype = LIBC_CANCEL_ASYNC ();
+
+  /* In the ARM EABI, 64-bit values are aligned to even/odd register
+     pairs for syscalls.  */
+  result = INLINE_SYSCALL (pwrite64, 6, fd, buf, count, 0,
+			   __LONG_LONG_PAIR (offset >> 31, offset));
+
+  LIBC_CANCEL_RESET (oldtype);
+
+  return result;
+}
+
+strong_alias (__libc_pwrite, __pwrite)
+weak_alias (__libc_pwrite, pwrite)
diff --git a/sysdeps/unix/sysv/linux/arm/pwrite64.c b/sysdeps/unix/sysv/linux/arm/pwrite64.c
new file mode 100644
index 0000000000..6d551ecd07
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/pwrite64.c
@@ -0,0 +1,61 @@
+/* Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <errno.h>
+#include <endian.h>
+#include <unistd.h>
+
+#include <sysdep-cancel.h>
+#include <sys/syscall.h>
+
+ssize_t
+__libc_pwrite64 (fd, buf, count, offset)
+     int fd;
+     const void *buf;
+     size_t count;
+     off64_t offset;
+{
+  ssize_t result;
+
+  if (SINGLE_THREAD_P)
+    {
+      /* In the ARM EABI, 64-bit values are aligned to even/odd register
+	 pairs for syscalls.  */
+      result = INLINE_SYSCALL (pwrite64, 6, fd, buf, count, 0,
+			       __LONG_LONG_PAIR ((off_t) (offset >> 32),
+						 (off_t) (offset & 0xffffffff)));
+
+      return result;
+    }
+
+  int oldtype = LIBC_CANCEL_ASYNC ();
+
+  /* In the ARM EABI, 64-bit values are aligned to even/odd register
+     pairs for syscalls.  */
+  result = INLINE_SYSCALL (pwrite64, 6, fd, buf, count, 0,
+			   __LONG_LONG_PAIR ((off_t) (offset >> 32),
+					     (off_t) (offset & 0xffffffff)));
+
+  LIBC_CANCEL_RESET (oldtype);
+
+  return result;
+}
+
+weak_alias (__libc_pwrite64, __pwrite64)
+libc_hidden_weak (__pwrite64)
+weak_alias (__libc_pwrite64, pwrite64)
diff --git a/sysdeps/unix/sysv/linux/arm/readahead.c b/sysdeps/unix/sysv/linux/arm/readahead.c
new file mode 100644
index 0000000000..cba460c2b5
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/readahead.c
@@ -0,0 +1,37 @@
+/* Provide kernel hint to read ahead.
+   Copyright (C) 2002-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <errno.h>
+#include <fcntl.h>
+#include <sys/types.h>
+#include <endian.h>
+
+#include <sysdep.h>
+#include <sys/syscall.h>
+
+
+ssize_t
+__readahead (int fd, off64_t offset, size_t count)
+{
+  return INLINE_SYSCALL (readahead, 5, fd, 0,
+			 __LONG_LONG_PAIR ((off_t) (offset >> 32),
+					   (off_t) (offset & 0xffffffff)),
+			 count);
+}
+
+weak_alias (__readahead, readahead)
diff --git a/sysdeps/unix/sysv/linux/arm/readdir64.c b/sysdeps/unix/sysv/linux/arm/readdir64.c
new file mode 100644
index 0000000000..2ea26dd409
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/readdir64.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/readdir64.c>
diff --git a/sysdeps/unix/sysv/linux/arm/readdir64_r.c b/sysdeps/unix/sysv/linux/arm/readdir64_r.c
new file mode 100644
index 0000000000..9f54f897e3
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/readdir64_r.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/readdir64_r.c>
diff --git a/sysdeps/unix/sysv/linux/arm/readelflib.c b/sysdeps/unix/sysv/linux/arm/readelflib.c
new file mode 100644
index 0000000000..a15ebe42a6
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/readelflib.c
@@ -0,0 +1,79 @@
+/* Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Andreas Jaeger <aj@suse.de>, 1999 and
+		  Jakub Jelinek <jakub@redhat.com>, 1999.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+
+int process_elf32_file (const char *file_name, const char *lib, int *flag,
+			unsigned int *osversion, char **soname,
+			void *file_contents, size_t file_length);
+int process_elf64_file (const char *file_name, const char *lib, int *flag,
+			unsigned int *osversion, char **soname,
+			void *file_contents, size_t file_length);
+
+/* Returns 0 if everything is ok, != 0 in case of error.  */
+int
+process_elf_file (const char *file_name, const char *lib, int *flag,
+		  unsigned int *osversion, char **soname, void *file_contents,
+		  size_t file_length)
+{
+  ElfW(Ehdr) *elf_header = (ElfW(Ehdr) *) file_contents;
+  int ret;
+
+  if (elf_header->e_ident [EI_CLASS] == ELFCLASS32)
+    {
+      Elf32_Ehdr *elf32_header = (Elf32_Ehdr *) elf_header;
+
+      ret = process_elf32_file (file_name, lib, flag, osversion, soname,
+				file_contents, file_length);
+
+      if (!ret && EF_ARM_EABI_VERSION (elf32_header->e_flags) == EF_ARM_EABI_VER5)
+	{
+	  if (elf32_header->e_flags & EF_ARM_ABI_FLOAT_HARD)
+	    *flag = FLAG_ARM_LIBHF|FLAG_ELF_LIBC6;
+	  else if (elf32_header->e_flags & EF_ARM_ABI_FLOAT_SOFT)
+	    *flag = FLAG_ARM_LIBSF|FLAG_ELF_LIBC6;
+	  else
+	    /* We must assume the unmarked objects are compatible
+	       with all ABI variants. Such objects may have been
+	       generated in a transitional period when the ABI
+	       tags were not added to all objects.  */
+	    *flag = FLAG_ELF_LIBC6;
+	}
+    }
+  else
+    {
+      ret = process_elf64_file (file_name, lib, flag, osversion, soname,
+				file_contents, file_length);
+      /* AArch64 libraries are always libc.so.6+.  */
+      if (!ret)
+	*flag = FLAG_AARCH64_LIB64|FLAG_ELF_LIBC6;
+    }
+  return ret;
+}
+
+#undef __ELF_NATIVE_CLASS
+#undef process_elf_file
+#define process_elf_file process_elf32_file
+#define __ELF_NATIVE_CLASS 32
+#include "elf/readelflib.c"
+
+#undef __ELF_NATIVE_CLASS
+#undef process_elf_file
+#define process_elf_file process_elf64_file
+#define __ELF_NATIVE_CLASS 64
+#include "elf/readelflib.c"
diff --git a/sysdeps/unix/sysv/linux/arm/register-dump.h b/sysdeps/unix/sysv/linux/arm/register-dump.h
new file mode 100644
index 0000000000..9714a0d8c7
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/register-dump.h
@@ -0,0 +1,136 @@
+/* Dump registers.
+   Copyright (C) 1998-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Philip Blundell <pb@nexus.co.uk>, 1998.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sys/uio.h>
+#include <_itoa.h>
+#include <sys/ucontext.h>
+
+/* We will print the register dump in this format:
+
+ R0: XXXXXXXX   R1: XXXXXXXX   R2: XXXXXXXX   R3: XXXXXXXX
+ R4: XXXXXXXX   R5: XXXXXXXX   R6: XXXXXXXX   R7: XXXXXXXX
+ R8: XXXXXXXX   R9: XXXXXXXX   SL: XXXXXXXX   FP: XXXXXXXX
+ IP: XXXXXXXX   SP: XXXXXXXX   LR: XXXXXXXX   PC: XXXXXXXX
+
+ CPSR: XXXXXXXX
+
+ Trap: XXXXXXXX   Error: XXXXXXXX   OldMask: XXXXXXXX
+ Addr: XXXXXXXX
+
+ */
+
+static void
+hexvalue (unsigned long int value, char *buf, size_t len)
+{
+  char *cp = _itoa_word (value, buf + len, 16, 0);
+  while (cp > buf)
+    *--cp = '0';
+}
+
+static void
+register_dump (int fd, const struct ucontext *ctx)
+{
+  char regs[21][8];
+  struct iovec iov[97];
+  size_t nr = 0;
+
+#define ADD_STRING(str) \
+  iov[nr].iov_base = (char *) str;					      \
+  iov[nr].iov_len = strlen (str);					      \
+  ++nr
+#define ADD_MEM(str, len) \
+  iov[nr].iov_base = str;						      \
+  iov[nr].iov_len = len;						      \
+  ++nr
+
+  /* Generate strings of register contents.  */
+  hexvalue (ctx->uc_mcontext.arm_r0, regs[0], 8);
+  hexvalue (ctx->uc_mcontext.arm_r1, regs[1], 8);
+  hexvalue (ctx->uc_mcontext.arm_r2, regs[2], 8);
+  hexvalue (ctx->uc_mcontext.arm_r3, regs[3], 8);
+  hexvalue (ctx->uc_mcontext.arm_r4, regs[4], 8);
+  hexvalue (ctx->uc_mcontext.arm_r5, regs[5], 8);
+  hexvalue (ctx->uc_mcontext.arm_r6, regs[6], 8);
+  hexvalue (ctx->uc_mcontext.arm_r7, regs[7], 8);
+  hexvalue (ctx->uc_mcontext.arm_r8, regs[8], 8);
+  hexvalue (ctx->uc_mcontext.arm_r9, regs[9], 8);
+  hexvalue (ctx->uc_mcontext.arm_r10, regs[10], 8);
+  hexvalue (ctx->uc_mcontext.arm_fp, regs[11], 8);
+  hexvalue (ctx->uc_mcontext.arm_ip, regs[12], 8);
+  hexvalue (ctx->uc_mcontext.arm_sp, regs[13], 8);
+  hexvalue (ctx->uc_mcontext.arm_lr, regs[14], 8);
+  hexvalue (ctx->uc_mcontext.arm_pc, regs[15], 8);
+  hexvalue (ctx->uc_mcontext.arm_cpsr, regs[16], 8);
+  hexvalue (ctx->uc_mcontext.trap_no, regs[17], 8);
+  hexvalue (ctx->uc_mcontext.error_code, regs[18], 8);
+  hexvalue (ctx->uc_mcontext.oldmask, regs[19], 8);
+  hexvalue (ctx->uc_mcontext.fault_address, regs[20], 8);
+
+  /* Generate the output.  */
+  ADD_STRING ("Register dump:\n\n R0: ");
+  ADD_MEM (regs[0], 8);
+  ADD_STRING ("   R1: ");
+  ADD_MEM (regs[1], 8);
+  ADD_STRING ("   R2: ");
+  ADD_MEM (regs[2], 8);
+  ADD_STRING ("   R3: ");
+  ADD_MEM (regs[3], 8);
+  ADD_STRING ("\n R4: ");
+  ADD_MEM (regs[4], 8);
+  ADD_STRING ("   R5: ");
+  ADD_MEM (regs[5], 8);
+  ADD_STRING ("   R6: ");
+  ADD_MEM (regs[6], 8);
+  ADD_STRING ("   R7: ");
+  ADD_MEM (regs[7], 8);
+  ADD_STRING ("\n R8: ");
+  ADD_MEM (regs[8], 8);
+  ADD_STRING ("   R9: ");
+  ADD_MEM (regs[9], 8);
+  ADD_STRING ("   SL: ");
+  ADD_MEM (regs[10], 8);
+  ADD_STRING ("   FP: ");
+  ADD_MEM (regs[11], 8);
+  ADD_STRING ("\n IP: ");
+  ADD_MEM (regs[12], 8);
+  ADD_STRING ("   SP: ");
+  ADD_MEM (regs[13], 8);
+  ADD_STRING ("   LR: ");
+  ADD_MEM (regs[14], 8);
+  ADD_STRING ("   PC: ");
+  ADD_MEM (regs[15], 8);
+  ADD_STRING ("\n\n CPSR: ");
+  ADD_MEM (regs[16], 8);
+  ADD_STRING ("\n\n Trap: ");
+  ADD_MEM (regs[17], 8);
+  ADD_STRING ("   Error: ");
+  ADD_MEM (regs[18], 8);
+  ADD_STRING ("   OldMask: ");
+  ADD_MEM (regs[19], 8);
+  ADD_STRING ("\n Addr: ");
+  ADD_MEM (regs[20], 8);
+
+  ADD_STRING ("\n");
+
+  /* Write the stuff out.  */
+  writev (fd, iov, nr);
+}
+
+
+#define REGISTER_DUMP register_dump (fd, ctx)
diff --git a/sysdeps/unix/sysv/linux/arm/scandir64.c b/sysdeps/unix/sysv/linux/arm/scandir64.c
new file mode 100644
index 0000000000..506fd8877c
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/scandir64.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/scandir64.c>
diff --git a/sysdeps/unix/sysv/linux/arm/semctl.c b/sysdeps/unix/sysv/linux/arm/semctl.c
new file mode 100644
index 0000000000..a45863bd82
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/semctl.c
@@ -0,0 +1,54 @@
+/* Copyright (C) 1995-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Ulrich Drepper <drepper@gnu.ai.mit.edu>, August 1995.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <errno.h>
+#include <stdarg.h>
+#include <sys/sem.h>
+#include <ipc_priv.h>
+#include <sysdep.h>
+#include <sys/syscall.h>
+
+
+/* Define a `union semun' suitable for Linux here.  */
+union semun
+{
+  int val;			/* value for SETVAL */
+  struct semid_ds *buf;		/* buffer for IPC_STAT & IPC_SET */
+  unsigned short int *array;	/* array for GETALL & SETALL */
+  struct seminfo *__buf;	/* buffer for IPC_INFO */
+};
+
+int
+__new_semctl (int semid, int semnum, int cmd, ...)
+{
+  union semun arg;
+  va_list ap;
+
+  va_start (ap, cmd);
+
+  /* Get the argument.  */
+  arg = va_arg (ap, union semun);
+
+  va_end (ap);
+
+  return INLINE_SYSCALL (semctl, 4, semid, semnum, cmd | __IPC_64,
+			 arg.array);
+}
+
+#include <shlib-compat.h>
+versioned_symbol (libc, __new_semctl, semctl, GLIBC_2_2);
diff --git a/sysdeps/unix/sysv/linux/arm/setcontext.S b/sysdeps/unix/sysv/linux/arm/setcontext.S
new file mode 100644
index 0000000000..7b9b511b80
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/setcontext.S
@@ -0,0 +1,104 @@
+/* Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* ??? Needs more rearrangement for the LDM to handle thumb mode.  */
+#define NO_THUMB
+#include <sysdep.h>
+#include <rtld-global-offsets.h>
+
+#include "ucontext_i.h"
+
+	.syntax unified
+	.text
+
+/* int setcontext (const ucontext_t *ucp) */
+
+ENTRY(__setcontext)
+	mov	r4, r0
+	add	r0, r0, #UCONTEXT_REGSPACE
+
+	/* Restore the VFP registers.  Copied from arm/__longjmp.S.  */
+#ifdef PIC
+	ldr     r2, 1f
+	ldr     r1, .Lrtld_global_ro
+0:      add     r2, pc, r2
+	ldr     r2, [r2, r1]
+	ldr     r2, [r2, #RTLD_GLOBAL_RO_DL_HWCAP_OFFSET]
+#else
+	ldr     r2, .Lhwcap
+	ldr     r2, [r2, #0]
+#endif
+
+#ifdef __SOFTFP__
+	tst     r2, #HWCAP_ARM_VFP
+	beq     .Lno_vfp_sc
+#endif
+
+	/* Following instruction is vldmia r0!, {d8-d15}.  */
+	ldc     p11, cr8, [r0], #64
+	/* Restore the floating-point status register.  */
+	ldr     r1, [r0], #4
+	/* Following instruction is fmxr fpscr, r1.  */
+	mcr     p10, 7, r1, cr1, cr0, 0
+.Lno_vfp_sc:
+	tst     r2, #HWCAP_ARM_IWMMXT
+	beq     .Lno_iwmmxt_sc
+
+	/* Restore the call-preserved iWMMXt registers.  */
+	/* Following instructions are wldrd wr10, [r0], #8 (etc.)  */
+	ldcl    p1, cr10, [r0], #8
+	ldcl    p1, cr11, [r0], #8
+	ldcl    p1, cr12, [r0], #8
+	ldcl    p1, cr13, [r0], #8
+	ldcl    p1, cr14, [r0], #8
+	ldcl    p1, cr15, [r0], #8
+.Lno_iwmmxt_sc:
+
+	/* Now bring back the signal status.  */
+	mov	r0, #SIG_SETMASK
+	add	r1, r4, #UCONTEXT_SIGMASK
+	mov	r2, #0
+	bl	PLTJMP(__sigprocmask)
+
+	/* Loading r0-r3 makes makecontext easier.  */
+	add     r14, r4, #MCONTEXT_ARM_R0
+	ldmia   r14, {r0-r12}
+	ldr     r13, [r14, #(MCONTEXT_ARM_SP - MCONTEXT_ARM_R0)]
+	add     r14, r14, #(MCONTEXT_ARM_LR - MCONTEXT_ARM_R0)
+	ldmia   r14, {r14, pc}
+
+END(setcontext)
+weak_alias(__setcontext, setcontext)
+
+	/* Called when a makecontext() context returns.  Start the
+	   context in R4 or fall through to exit().  */
+ENTRY(__startcontext)
+	movs    r0, r4
+	bne     PLTJMP(__setcontext)
+
+	@ New context was 0 - exit
+	b       PLTJMP(HIDDEN_JUMPTARGET(_exit))
+END(__startcontext)
+
+#ifdef PIC
+1:      .long   _GLOBAL_OFFSET_TABLE_ - 0b - PC_OFS
+.Lrtld_global_ro:
+	.long   C_SYMBOL_NAME(_rtld_global_ro)(GOT)
+#else
+.Lhwcap:
+	.long   C_SYMBOL_NAME(_dl_hwcap)
+#endif
diff --git a/sysdeps/unix/sysv/linux/arm/setegid.c b/sysdeps/unix/sysv/linux/arm/setegid.c
new file mode 100644
index 0000000000..2e3a54c893
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/setegid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/setegid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/seteuid.c b/sysdeps/unix/sysv/linux/arm/seteuid.c
new file mode 100644
index 0000000000..18e41d08c1
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/seteuid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/seteuid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/setfsgid.c b/sysdeps/unix/sysv/linux/arm/setfsgid.c
new file mode 100644
index 0000000000..0886712569
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/setfsgid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/setfsgid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/setfsuid.c b/sysdeps/unix/sysv/linux/arm/setfsuid.c
new file mode 100644
index 0000000000..a9f22eb8ab
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/setfsuid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/setfsuid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/setgid.c b/sysdeps/unix/sysv/linux/arm/setgid.c
new file mode 100644
index 0000000000..377021d9ec
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/setgid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/setgid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/setgroups.c b/sysdeps/unix/sysv/linux/arm/setgroups.c
new file mode 100644
index 0000000000..0e7086278f
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/setgroups.c
@@ -0,0 +1,2 @@
+/* We also have to rewrite the kernel gid_t to the user land type.  */
+#include <sysdeps/unix/sysv/linux/i386/setgroups.c>
diff --git a/sysdeps/unix/sysv/linux/arm/setregid.c b/sysdeps/unix/sysv/linux/arm/setregid.c
new file mode 100644
index 0000000000..99c57ad20f
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/setregid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/setregid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/setresgid.c b/sysdeps/unix/sysv/linux/arm/setresgid.c
new file mode 100644
index 0000000000..daca1a4833
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/setresgid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/setresgid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/setresuid.c b/sysdeps/unix/sysv/linux/arm/setresuid.c
new file mode 100644
index 0000000000..3aeabe9ad7
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/setresuid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/setresuid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/setreuid.c b/sysdeps/unix/sysv/linux/arm/setreuid.c
new file mode 100644
index 0000000000..8ad61226e9
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/setreuid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/setreuid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/setrlimit.c b/sysdeps/unix/sysv/linux/arm/setrlimit.c
new file mode 100644
index 0000000000..bfaef74c38
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/setrlimit.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/setrlimit.c>
diff --git a/sysdeps/unix/sysv/linux/arm/setuid.c b/sysdeps/unix/sysv/linux/arm/setuid.c
new file mode 100644
index 0000000000..de394379be
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/setuid.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/setuid.c>
diff --git a/sysdeps/unix/sysv/linux/arm/shmctl.c b/sysdeps/unix/sysv/linux/arm/shmctl.c
new file mode 100644
index 0000000000..eed4c8dcef
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/shmctl.c
@@ -0,0 +1,34 @@
+/* Copyright (C) 1995-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Ulrich Drepper <drepper@gnu.ai.mit.edu>, August 1995.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <errno.h>
+#include <sys/shm.h>
+#include <ipc_priv.h>
+#include <sysdep.h>
+#include <sys/syscall.h>
+#include <bits/wordsize.h>
+
+
+int
+__new_shmctl (int shmid, int cmd, struct shmid_ds *buf)
+{
+  return INLINE_SYSCALL (shmctl, 3, shmid, cmd | __IPC_64, buf);
+}
+
+#include <shlib-compat.h>
+versioned_symbol (libc, __new_shmctl, shmctl, GLIBC_2_2);
diff --git a/sysdeps/unix/sysv/linux/arm/sigaction.c b/sysdeps/unix/sysv/linux/arm/sigaction.c
new file mode 100644
index 0000000000..21df885a7a
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/sigaction.c
@@ -0,0 +1,110 @@
+/* Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <errno.h>
+#include <signal.h>
+#include <string.h>
+
+#include <sysdep.h>
+#include <sys/syscall.h>
+#include <kernel-features.h>
+
+/* The difference here is that the sigaction structure used in the
+   kernel is not the same as we use in the libc.  Therefore we must
+   translate it here.  */
+#include <kernel_sigaction.h>
+
+#define SA_RESTORER	0x04000000
+
+extern void __default_sa_restorer_v1(void);
+extern void __default_sa_restorer_v2(void);
+extern void __default_rt_sa_restorer_v1(void);
+extern void __default_rt_sa_restorer_v2(void);
+#ifdef __ASSUME_SIGFRAME_V2
+# define __default_sa_restorer __default_sa_restorer_v2
+# define __default_rt_sa_restorer __default_rt_sa_restorer_v2
+#else
+# include <ldsodefs.h>
+# define __default_sa_restorer (GLRO(dl_osversion) >= 0x020612	\
+				 ? __default_sa_restorer_v2	\
+				 : __default_sa_restorer_v1)
+# define __default_rt_sa_restorer (GLRO(dl_osversion) >= 0x020612	\
+				    ? __default_rt_sa_restorer_v2	\
+				    : __default_rt_sa_restorer_v1)
+#endif
+
+/* When RT signals are in use we need to use a different return stub.  */
+#define choose_restorer(flags)					\
+  (flags & SA_SIGINFO) ? __default_rt_sa_restorer		\
+  : __default_sa_restorer
+
+/* If ACT is not NULL, change the action for SIG to *ACT.
+   If OACT is not NULL, put the old action for SIG in *OACT.  */
+int
+__libc_sigaction (sig, act, oact)
+     int sig;
+     const struct sigaction *act;
+     struct sigaction *oact;
+{
+  int result;
+
+  struct kernel_sigaction kact, koact;
+
+  if (act)
+    {
+      kact.k_sa_handler = act->sa_handler;
+      memcpy (&kact.sa_mask, &act->sa_mask, sizeof (sigset_t));
+      kact.sa_flags = act->sa_flags;
+#ifdef HAVE_SA_RESTORER
+      if (kact.sa_flags & SA_RESTORER)
+	kact.sa_restorer = act->sa_restorer;
+      else
+	{
+	  kact.sa_restorer = choose_restorer (kact.sa_flags);
+	  kact.sa_flags |= SA_RESTORER;
+	}
+#endif
+    }
+
+  /* XXX The size argument hopefully will have to be changed to the
+     real size of the user-level sigset_t.  */
+  result = INLINE_SYSCALL (rt_sigaction, 4, sig,
+			   act ? &kact : NULL,
+			   oact ? &koact : NULL, _NSIG / 8);
+
+  if (oact && result >= 0)
+    {
+      oact->sa_handler = koact.k_sa_handler;
+      memcpy (&oact->sa_mask, &koact.sa_mask, sizeof (sigset_t));
+      oact->sa_flags = koact.sa_flags;
+#ifdef HAVE_SA_RESTORER
+      oact->sa_restorer = koact.sa_restorer;
+#endif
+    }
+  return result;
+}
+libc_hidden_def (__libc_sigaction)
+
+#ifdef WRAPPER_INCLUDE
+# include WRAPPER_INCLUDE
+#endif
+
+#ifndef LIBC_SIGACTION
+weak_alias (__libc_sigaction, __sigaction)
+libc_hidden_weak (__sigaction)
+weak_alias (__libc_sigaction, sigaction)
+#endif
diff --git a/sysdeps/unix/sysv/linux/arm/sigcontextinfo.h b/sysdeps/unix/sysv/linux/arm/sigcontextinfo.h
new file mode 100644
index 0000000000..258703dc88
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/sigcontextinfo.h
@@ -0,0 +1,49 @@
+/* Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Philip Blundell <philb@gnu.org>, 1999.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sys/ucontext.h>
+#include "kernel-features.h"
+
+#define SIGCONTEXT siginfo_t *_si, struct ucontext *
+#define SIGCONTEXT_EXTRA_ARGS _si,
+
+/* The sigcontext structure changed between 2.0 and 2.1 kernels.  On any
+   modern system we should be able to assume that the "new" format will be
+   in use.  */
+
+#define GET_PC(ctx)	((void *) (ctx)->uc_mcontext.arm_pc)
+#define GET_FRAME(ctx)	ADVANCE_STACK_FRAME ((void *) ctx->uc_mcontext.arm_fp)
+#define GET_STACK(ctx)	((void *) (ctx)->uc_mcontext.arm_sp)
+
+#define ADVANCE_STACK_FRAME(frm)	\
+			((struct layout *)frm - 1)
+
+#define CALL_SIGHANDLER(handler, signo, ctx) \
+  (handler)((signo), SIGCONTEXT_EXTRA_ARGS (ctx))
+
+/* There is no reliable way to get the sigcontext unless we use a
+   three-argument signal handler.  */
+#define __sigaction(sig, act, oact) ({ \
+  (act)->sa_flags |= SA_SIGINFO; \
+  (__sigaction) (sig, act, oact); \
+})
+
+#define sigaction(sig, act, oact) ({ \
+  (act)->sa_flags |= SA_SIGINFO; \
+  (sigaction) (sig, act, oact); \
+})
diff --git a/sysdeps/unix/sysv/linux/arm/sigrestorer.S b/sysdeps/unix/sysv/linux/arm/sigrestorer.S
new file mode 100644
index 0000000000..566c04aed0
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/sigrestorer.S
@@ -0,0 +1,117 @@
+/* Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+/* If no SA_RESTORER function was specified by the application we use
+   one of these.  This avoids the need for the kernel to synthesise a return
+   instruction on the stack, which would involve expensive cache flushes.
+
+   Nowadays (2.6 series, and somewhat earlier) the kernel uses a high page
+   for signal trampolines, so the cache flushes are not an issue.  But since
+   we do not have a vDSO, continue to use these so that we can provide
+   unwind information.
+
+   Start the unwind tables at least one instruction before the signal
+   trampoline, because the unwinder will assume we are returning after
+   a call site.
+
+   Because the signal frame layout changed in 2.6.18, we provide two
+   copies of these functions with different unwind information.  */
+
+/* Used in ENTRY.  */
+#undef cfi_startproc
+#define cfi_startproc \
+	.cfi_startproc simple; \
+	.cfi_signal_frame
+
+/* The CFA is not computed / used correctly here; this is neither trivial to
+   do, nor is it needed.  */
+#define CFI \
+	cfi_def_cfa (sp, 0); \
+	cfi_offset (r0, OFFSET + 0 * 4); \
+	cfi_offset (r1, OFFSET + 1 * 4); \
+	cfi_offset (r2, OFFSET + 2 * 4); \
+	cfi_offset (r3, OFFSET + 3 * 4); \
+	cfi_offset (r4, OFFSET + 4 * 4); \
+	cfi_offset (r5, OFFSET + 5 * 4); \
+	cfi_offset (r6, OFFSET + 6 * 4); \
+	cfi_offset (r7, OFFSET + 7 * 4); \
+	cfi_offset (r8, OFFSET + 8 * 4); \
+	cfi_offset (r9, OFFSET + 9 * 4); \
+	cfi_offset (r10, OFFSET + 10 * 4); \
+	cfi_offset (r11, OFFSET + 11 * 4); \
+	cfi_offset (r12, OFFSET + 12 * 4); \
+	cfi_offset (r13, OFFSET + 13 * 4); \
+	cfi_offset (r14, OFFSET + 14 * 4); \
+	cfi_offset (r15, OFFSET + 15 * 4)
+
+#ifndef __ASSUME_SIGFRAME_V2
+#define OFFSET 12
+	.fnstart
+	.save {r0-r15}
+	.pad #OFFSET
+	nop
+ENTRY(__default_sa_restorer_v1)
+	CFI
+	mov	r7, $SYS_ify(sigreturn)
+	swi	0x0
+	.fnend
+END(__default_sa_restorer_v1)
+#undef OFFSET
+#endif /* __ASSUME_SIGFRAME_V2 */
+
+#define OFFSET 32
+	.fnstart
+	.save {r0-r15}
+	.pad #OFFSET
+	nop
+ENTRY(__default_sa_restorer_v2)
+	CFI
+	mov	r7, $SYS_ify(sigreturn)
+	swi	0x0
+	.fnend
+END(__default_sa_restorer_v2)
+#undef OFFSET
+
+#ifndef __ASSUME_SIGFRAME_V2
+#define OFFSET 168
+	.fnstart
+	.save {r0-r15}
+	.pad #OFFSET
+	nop
+ENTRY(__default_rt_sa_restorer_v1)
+	CFI
+	mov	r7, $SYS_ify(rt_sigreturn)
+	swi	0x0
+	.fnend
+END(__default_rt_sa_restorer_v1)
+#undef OFFSET
+#endif /* __ASSUME_SIGFRAME_V2 */
+
+#define OFFSET 160
+	.fnstart
+	.save {r0-r15}
+	.pad #OFFSET
+	nop
+ENTRY(__default_rt_sa_restorer_v2)
+	CFI
+	mov	r7, $SYS_ify(rt_sigreturn)
+	swi	0x0
+	.fnend
+END(__default_rt_sa_restorer_v2)
+#undef OFFSET
diff --git a/sysdeps/unix/sysv/linux/arm/swapcontext.S b/sysdeps/unix/sysv/linux/arm/swapcontext.S
new file mode 100644
index 0000000000..65a36d2a4c
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/swapcontext.S
@@ -0,0 +1,63 @@
+/* Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+#include "ucontext_i.h"
+
+	.syntax unified
+	.text
+
+/* int swapcontext (ucontext_t *oucp, const ucontext_t *ucp) */
+
+ENTRY(swapcontext)
+
+	/* Have getcontext() do most of the work then fix up
+	   LR afterwards.  Save R3 to keep the stack aligned.  */
+	push	{r0,r1,r3,r14}
+	cfi_adjust_cfa_offset (16)
+	cfi_rel_offset (r0,0)
+	cfi_rel_offset (r1,4)
+	cfi_rel_offset (r3,8)
+	cfi_rel_offset (r14,12)
+
+	bl	__getcontext
+	mov	r4, r0
+
+	pop	{r0,r1,r3,r14}
+	cfi_adjust_cfa_offset (-16)
+	cfi_restore (r0)
+	cfi_restore (r1)
+	cfi_restore (r3)
+	cfi_restore (r14)
+
+	/* Exit if getcontext() failed.  */
+	cmp 	r4, #0
+	itt	ne
+	movne	r0, r4
+	RETINSTR(ne, r14)
+
+	/* Fix up LR and the PC.  */
+	str	r13,[r0, #MCONTEXT_ARM_SP]
+	str	r14,[r0, #MCONTEXT_ARM_LR]
+	str	r14,[r0, #MCONTEXT_ARM_PC]
+
+	/* And swap using swapcontext().  */
+	mov	r0, r1
+	b	__setcontext
+
+END(swapcontext)
diff --git a/sysdeps/unix/sysv/linux/arm/sys/elf.h b/sysdeps/unix/sysv/linux/arm/sys/elf.h
new file mode 100644
index 0000000000..a03b1ad6ff
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/sys/elf.h
@@ -0,0 +1,25 @@
+/* Copyright (C) 1996-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _SYS_ELF_H
+#define _SYS_ELF_H	1
+
+#warning "This header is obsolete; use <sys/procfs.h> instead."
+
+#include <sys/procfs.h>
+
+#endif	/* sys/elf.h */
diff --git a/sysdeps/unix/sysv/linux/arm/sys/io.h b/sysdeps/unix/sysv/linux/arm/sys/io.h
new file mode 100644
index 0000000000..59d4bbcc4d
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/sys/io.h
@@ -0,0 +1,47 @@
+/* Copyright (C) 1996-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef	_SYS_IO_H
+
+#define	_SYS_IO_H	1
+#include <features.h>
+
+__BEGIN_DECLS
+
+/* If TURN_ON is TRUE, request for permission to do direct i/o on the
+   port numbers in the range [FROM,FROM+NUM-1].  Otherwise, turn I/O
+   permission off for that range.  This call requires root privileges.  */
+extern int ioperm (unsigned long int __from, unsigned long int __num,
+		   int __turn_on) __THROW;
+
+/* Set the I/O privilege level to LEVEL.  If LEVEL is nonzero,
+   permission to access any I/O port is granted.  This call requires
+   root privileges. */
+extern int iopl (int __level) __THROW;
+
+/* The functions that actually perform reads and writes.  */
+extern unsigned char inb (unsigned long int __port) __THROW;
+extern unsigned short int inw (unsigned long int __port) __THROW;
+extern unsigned long int inl (unsigned long int __port) __THROW;
+
+extern void outb (unsigned char __value, unsigned long int __port) __THROW;
+extern void outw (unsigned short __value, unsigned long int __port) __THROW;
+extern void outl (unsigned long __value, unsigned long int __port) __THROW;
+
+__END_DECLS
+
+#endif /* _SYS_IO_H */
diff --git a/sysdeps/unix/sysv/linux/arm/sys/procfs.h b/sysdeps/unix/sysv/linux/arm/sys/procfs.h
new file mode 100644
index 0000000000..415cf8dd49
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/sys/procfs.h
@@ -0,0 +1,122 @@
+/* Copyright (C) 1996-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _SYS_PROCFS_H
+#define _SYS_PROCFS_H	1
+
+/* This is somewhat modelled after the file of the same name on SVR4
+   systems.  It provides a definition of the core file format for ELF
+   used on Linux.  It doesn't have anything to do with the /proc file
+   system, even though Linux has one.
+
+   Anyway, the whole purpose of this file is for GDB and GDB only.
+   Don't read too much into it.  Don't use it for anything other than
+   GDB unless you know what you are doing.  */
+
+#include <features.h>
+#include <sys/time.h>
+#include <sys/types.h>
+#include <sys/user.h>
+
+__BEGIN_DECLS
+
+/* Type for a general-purpose register.  */
+typedef unsigned long elf_greg_t;
+
+/* And the whole bunch of them.  We could have used `struct
+   user_regs' directly in the typedef, but tradition says that
+   the register set is an array, which does have some peculiar
+   semantics, so leave it that way.  */
+#define ELF_NGREG (sizeof (struct user_regs) / sizeof(elf_greg_t))
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+/* Register set for the floating-point registers.  */
+typedef struct user_fpregs elf_fpregset_t;
+
+/* Signal info.  */
+struct elf_siginfo
+  {
+    int si_signo;			/* Signal number.  */
+    int si_code;			/* Extra code.  */
+    int si_errno;			/* Errno.  */
+  };
+
+/* Definitions to generate Intel SVR4-like core files.  These mostly
+   have the same names as the SVR4 types with "elf_" tacked on the
+   front to prevent clashes with Linux definitions, and the typedef
+   forms have been avoided.  This is mostly like the SVR4 structure,
+   but more Linuxy, with things that Linux does not support and which
+   GDB doesn't really use excluded.  */
+
+struct elf_prstatus
+  {
+    struct elf_siginfo pr_info;		/* Info associated with signal.  */
+    short int pr_cursig;		/* Current signal.  */
+    unsigned long int pr_sigpend;	/* Set of pending signals.  */
+    unsigned long int pr_sighold;	/* Set of held signals.  */
+    __pid_t pr_pid;
+    __pid_t pr_ppid;
+    __pid_t pr_pgrp;
+    __pid_t pr_sid;
+    struct timeval pr_utime;		/* User time.  */
+    struct timeval pr_stime;		/* System time.  */
+    struct timeval pr_cutime;		/* Cumulative user time.  */
+    struct timeval pr_cstime;		/* Cumulative system time.  */
+    elf_gregset_t pr_reg;		/* GP registers.  */
+    int pr_fpvalid;			/* True if math copro being used.  */
+  };
+
+
+#define ELF_PRARGSZ     (80)    /* Number of chars for args.  */
+
+struct elf_prpsinfo
+  {
+    char pr_state;			/* Numeric process state.  */
+    char pr_sname;			/* Char for pr_state.  */
+    char pr_zomb;			/* Zombie.  */
+    char pr_nice;			/* Nice val.  */
+    unsigned long int pr_flag;		/* Flags.  */
+    unsigned short int pr_uid;
+    unsigned short int pr_gid;
+    int pr_pid, pr_ppid, pr_pgrp, pr_sid;
+    /* Lots missing */
+    char pr_fname[16];			/* Filename of executable.  */
+    char pr_psargs[ELF_PRARGSZ];	/* Initial part of arg list.  */
+  };
+
+/* The rest of this file provides the types for emulation of the
+   Solaris <proc_service.h> interfaces that should be implemented by
+   users of libthread_db.  */
+
+/* Addresses.  */
+typedef void *psaddr_t;
+
+/* Register sets.  Linux has different names.  */
+typedef elf_gregset_t prgregset_t;
+typedef elf_fpregset_t prfpregset_t;
+
+/* We don't have any differences between processes and threads,
+   therefore have only one PID type.  */
+typedef __pid_t lwpid_t;
+
+/* Process status and info.  In the end we do provide typedefs for them.  */
+typedef struct elf_prstatus prstatus_t;
+typedef struct elf_prpsinfo prpsinfo_t;
+
+__END_DECLS
+
+#endif	/* sys/procfs.h */
diff --git a/sysdeps/unix/sysv/linux/arm/sys/ucontext.h b/sysdeps/unix/sysv/linux/arm/sys/ucontext.h
new file mode 100644
index 0000000000..dbda8303cb
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/sys/ucontext.h
@@ -0,0 +1,112 @@
+/* Copyright (C) 1998-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* System V/ARM ABI compliant context switching support.  */
+
+#ifndef _SYS_UCONTEXT_H
+#define _SYS_UCONTEXT_H	1
+
+#include <features.h>
+#include <signal.h>
+
+/* We need the signal context definitions even if they are not used
+   included in <signal.h>.  */
+#include <bits/sigcontext.h>
+
+typedef int greg_t;
+
+/* Number of general registers.  */
+#define NGREG	18
+
+/* Container for all general registers.  */
+typedef greg_t gregset_t[NGREG];
+
+/* Number of each register is the `gregset_t' array.  */
+enum
+{
+  REG_R0 = 0,
+#define REG_R0	REG_R0
+  REG_R1 = 1,
+#define REG_R1	REG_R1
+  REG_R2 = 2,
+#define REG_R2	REG_R2
+  REG_R3 = 3,
+#define REG_R3	REG_R3
+  REG_R4 = 4,
+#define REG_R4	REG_R4
+  REG_R5 = 5,
+#define REG_R5	REG_R5
+  REG_R6 = 6,
+#define REG_R6	REG_R6
+  REG_R7 = 7,
+#define REG_R7	REG_R7
+  REG_R8 = 8,
+#define REG_R8	REG_R8
+  REG_R9 = 9,
+#define REG_R9	REG_R9
+  REG_R10 = 10,
+#define REG_R10	REG_R10
+  REG_R11 = 11,
+#define REG_R11	REG_R11
+  REG_R12 = 12,
+#define REG_R12	REG_R12
+  REG_R13 = 13,
+#define REG_R13	REG_R13
+  REG_R14 = 14,
+#define REG_R14	REG_R14
+  REG_R15 = 15
+#define REG_R15	REG_R15
+};
+
+struct _libc_fpstate
+{
+  struct
+  {
+    unsigned int sign1:1;
+    unsigned int unused:15;
+    unsigned int sign2:1;
+    unsigned int exponent:14;
+    unsigned int j:1;
+    unsigned int mantissa1:31;
+    unsigned int mantissa0:32;
+  } fpregs[8];
+  unsigned int fpsr:32;
+  unsigned int fpcr:32;
+  unsigned char ftype[8];
+  unsigned int init_flag;
+};
+/* Structure to describe FPU registers.  */
+typedef struct _libc_fpstate fpregset_t;
+
+/* Context to describe whole processor state.  This only describes
+   the core registers; coprocessor registers get saved elsewhere
+   (e.g. in uc_regspace, or somewhere unspecified on the stack
+   during non-RT signal handlers).  */
+typedef struct sigcontext mcontext_t;
+
+/* Userlevel context.  */
+typedef struct ucontext
+  {
+    unsigned long uc_flags;
+    struct ucontext *uc_link;
+    stack_t uc_stack;
+    mcontext_t uc_mcontext;
+    __sigset_t uc_sigmask;
+    unsigned long uc_regspace[128] __attribute__((__aligned__(8)));
+  } ucontext_t;
+
+#endif /* sys/ucontext.h */
diff --git a/sysdeps/unix/sysv/linux/arm/sys/user.h b/sysdeps/unix/sysv/linux/arm/sys/user.h
new file mode 100644
index 0000000000..37fc08b0a7
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/sys/user.h
@@ -0,0 +1,71 @@
+/* Copyright (C) 1998-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _SYS_USER_H
+#define _SYS_USER_H	1
+
+/* The whole purpose of this file is for GDB and GDB only.  Don't read
+   too much into it.  Don't use it for anything other than GDB unless
+   you know what you are doing.  */
+
+struct user_fpregs
+{
+  struct fp_reg
+  {
+    unsigned int sign1:1;
+    unsigned int unused:15;
+    unsigned int sign2:1;
+    unsigned int exponent:14;
+    unsigned int j:1;
+    unsigned int mantissa1:31;
+    unsigned int mantissa0:32;
+  } fpregs[8];
+  unsigned int fpsr:32;
+  unsigned int fpcr:32;
+  unsigned char ftype[8];
+  unsigned int init_flag;
+};
+
+struct user_regs
+{
+  unsigned long int uregs[18];
+};
+
+struct user
+{
+  struct user_regs regs;	/* General registers */
+  int u_fpvalid;		/* True if math co-processor being used. */
+
+  unsigned long int u_tsize;	/* Text segment size (pages). */
+  unsigned long int u_dsize;	/* Data segment size (pages). */
+  unsigned long int u_ssize;	/* Stack segment size (pages). */
+
+  unsigned long start_code;	/* Starting virtual address of text. */
+  unsigned long start_stack;	/* Starting virtual address of stack. */
+
+  long int signal;     		/* Signal that caused the core dump. */
+  int reserved;			/* No longer used */
+  struct user_regs *u_ar0;	/* help gdb to find the general registers. */
+
+  unsigned long magic;		/* uniquely identify a core file */
+  char u_comm[32];		/* User command that was responsible */
+  int u_debugreg[8];
+  struct user_fpregs u_fp;	/* Floating point registers */
+  struct user_fpregs *u_fp0;	/* help gdb to find the FP registers. */
+};
+
+#endif  /* sys/user.h */
diff --git a/sysdeps/unix/sysv/linux/arm/syscall.S b/sysdeps/unix/sysv/linux/arm/syscall.S
new file mode 100644
index 0000000000..c5582f82fd
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/syscall.S
@@ -0,0 +1,48 @@
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+/* In the EABI syscall interface, we don't need a special syscall to
+   implement syscall().  It won't work reliably with 64-bit arguments
+   (but that is true on many modern platforms).  */
+
+ENTRY (syscall)
+	mov	ip, sp
+	push	{r4, r5, r6, r7}
+	cfi_adjust_cfa_offset (16)
+	cfi_rel_offset (r4, 0)
+	cfi_rel_offset (r5, 4)
+	cfi_rel_offset (r6, 8)
+	cfi_rel_offset (r7, 12)
+	mov	r7, r0
+	mov	r0, r1
+	mov	r1, r2
+	mov	r2, r3
+	ldmfd	ip, {r3, r4, r5, r6}
+	swi	0x0
+	pop	{r4, r5, r6, r7}
+	cfi_adjust_cfa_offset (-16)
+	cfi_restore (r4)
+	cfi_restore (r5)
+	cfi_restore (r6)
+	cfi_restore (r7)
+	cmn	r0, #4096
+	it	cc
+	RETINSTR(cc, lr)
+	b	PLTJMP(syscall_error)
+PSEUDO_END (syscall)
diff --git a/sysdeps/unix/sysv/linux/arm/syscalls.list b/sysdeps/unix/sysv/linux/arm/syscalls.list
new file mode 100644
index 0000000000..ba8cdd7e65
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/syscalls.list
@@ -0,0 +1,38 @@
+# File name	Caller	Syscall name	# args	Strong name	Weak names
+
+chown		-	chown32		i:sii	__chown		chown
+
+prlimit64	EXTRA	prlimit64	i:iipp	prlimit64
+
+fanotify_mark	EXTRA	fanotify_mark	i:iiiiis	fanotify_mark
+
+# Semaphore and shm system calls.  msgctl, shmctl, and semctl have C
+# wrappers (to set __IPC_64).
+msgget		-	msgget		i:ii	__msgget	msgget
+msgrcv		-	msgrcv		Ci:ibnii __msgrcv	msgrcv
+msgsnd		-	msgsnd		Ci:ibni	__msgsnd	msgsnd
+shmat		-	shmat		i:ipi	__shmat		shmat
+shmdt		-	shmdt		i:s	__shmdt		shmdt
+shmget		-	shmget		i:iii	__shmget	shmget
+semop		-	semop		i:ipi	__semop		semop
+semtimedop	-	semtimedop	i:ipip	semtimedop
+semget		-	semget		i:iii	__semget	semget
+
+# proper socket implementations:
+accept		-	accept		Ci:iBN	__libc_accept	__accept accept
+bind		-	bind		i:ipi	__bind		bind
+connect		-	connect		Ci:ipi	__libc_connect	__connect connect
+getpeername	-	getpeername	i:ipp	__getpeername	getpeername
+getsockname	-	getsockname	i:ipp	__getsockname	getsockname
+getsockopt	-	getsockopt	i:iiiBN	__getsockopt	getsockopt
+listen		-	listen		i:ii	__listen	listen
+recv		-	recv		Ci:ibni	__libc_recv	__recv recv
+recvfrom	-	recvfrom	Ci:ibniBN	__libc_recvfrom	__recvfrom recvfrom
+recvmsg		-	recvmsg		Ci:ipi	__libc_recvmsg	__recvmsg recvmsg
+send		-	send		Ci:ibni	__libc_send	__send send
+sendmsg		-	sendmsg		Ci:ipi	__libc_sendmsg	__sendmsg sendmsg
+sendto		-	sendto		Ci:ibnibn	__libc_sendto	__sendto sendto
+setsockopt	-	setsockopt	i:iiibn	__setsockopt	setsockopt
+shutdown	-	shutdown	i:ii	__shutdown	shutdown
+socket		-	socket		i:iii	__socket	socket
+socketpair	-	socketpair	i:iiif	__socketpair	socketpair
diff --git a/sysdeps/unix/sysv/linux/arm/sysdep.S b/sysdeps/unix/sysv/linux/arm/sysdep.S
new file mode 100644
index 0000000000..936de45533
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/sysdep.S
@@ -0,0 +1,33 @@
+/* Copyright (C) 1995-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	.text
+
+/* The syscall stubs jump here when they detect an error.
+   The code for Linux is almost identical to the canonical Unix
+   code, except that the error number in R0 is negated.  */
+
+#undef CALL_MCOUNT
+#define CALL_MCOUNT /* Don't insert the profiling call, it clobbers R0.  */
+
+ENTRY (__syscall_error)
+	rsb r0, r0, $0
+
+#define __syscall_error __syscall_error_1
+#include <sysdeps/unix/arm/sysdep.S>
diff --git a/sysdeps/unix/sysv/linux/arm/sysdep.h b/sysdeps/unix/sysv/linux/arm/sysdep.h
new file mode 100644
index 0000000000..dcd99198cc
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/sysdep.h
@@ -0,0 +1,482 @@
+/* Copyright (C) 1992-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Ulrich Drepper, <drepper@gnu.ai.mit.edu>, August 1995.
+   ARM changes by Philip Blundell, <pjb27@cam.ac.uk>, May 1997.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _LINUX_ARM_SYSDEP_H
+#define _LINUX_ARM_SYSDEP_H 1
+
+/* There is some commonality.  */
+#include <sysdeps/unix/arm/sysdep.h>
+
+/* Defines RTLD_PRIVATE_ERRNO and USE_DL_SYSINFO.  */
+#include <dl-sysdep.h>
+
+#include <tls.h>
+
+/* In order to get __set_errno() definition in INLINE_SYSCALL.  */
+#ifndef __ASSEMBLER__
+#include <errno.h>
+#endif
+
+/* For Linux we can use the system call table in the header file
+	/usr/include/asm/unistd.h
+   of the kernel.  But these symbols do not follow the SYS_* syntax
+   so we have to redefine the `SYS_ify' macro here.  */
+#undef SYS_ify
+#define SYS_ify(syscall_name)	(__NR_##syscall_name)
+
+#define _SYS_AUXV_H 1
+#include <bits/hwcap.h>
+
+#ifdef __ASSEMBLER__
+
+#ifndef ARCH_HAS_HARD_TP
+/* Internal macro calling the linux kernel kuser_get_tls helper.
+   Note that in thumb mode, a constant pool break is often out of range, so
+   we always expand the constant inline.  */
+# ifdef __thumb2__
+#  define GET_TLS_BODY			\
+	movw	r0, #0x0fe0;		\
+	movt	r0, #0xffff;		\
+	blx	r0
+# else
+#  define GET_TLS_BODY \
+	mov	r0, #0xffff0fff;	/* Point to the high page.  */	\
+	mov	lr, pc;			/* Save our return address.  */	\
+	sub	pc, r0, #31		/* Jump to the TLS entry.  */
+# endif
+
+/* Helper to get the TLS base pointer.  Save LR in TMP, return in R0,
+   and no other registers clobbered.  TMP may be LR itself to indicate
+   that no save is necessary.  */
+# undef GET_TLS
+# define GET_TLS(TMP)			\
+  .ifnc TMP, lr;			\
+	mov	TMP, lr;		\
+	cfi_register (lr, TMP);		\
+	GET_TLS_BODY;			\
+	mov	lr, TMP;		\
+	cfi_restore (lr);		\
+  .else;				\
+	GET_TLS_BODY;			\
+  .endif
+#endif /* ARCH_HAS_HARD_TP */
+
+/* Linux uses a negative return value to indicate syscall errors,
+   unlike most Unices, which use the condition codes' carry flag.
+
+   Since version 2.1 the return value of a system call might be
+   negative even if the call succeeded.  E.g., the `lseek' system call
+   might return a large offset.  Therefore we must not anymore test
+   for < 0, but test for a real error by making sure the value in R0
+   is a real error number.  Linus said he will make sure the no syscall
+   returns a value in -1 .. -4095 as a valid result so we can safely
+   test with -4095.  */
+
+#undef	PSEUDO
+#define	PSEUDO(name, syscall_name, args)		\
+	.text;						\
+  ENTRY (name);						\
+	DO_CALL (syscall_name, args);			\
+	cmn	r0, $4096;
+
+#define PSEUDO_RET					\
+	it	cc;					\
+	RETINSTR(cc, lr);				\
+	b	PLTJMP(SYSCALL_ERROR)
+#undef ret
+#define ret PSEUDO_RET
+
+#undef	PSEUDO_END
+#define	PSEUDO_END(name)				\
+	SYSCALL_ERROR_HANDLER;				\
+  END (name)
+
+#undef	PSEUDO_NOERRNO
+#define	PSEUDO_NOERRNO(name, syscall_name, args)	\
+	.text;						\
+  ENTRY (name);						\
+	DO_CALL (syscall_name, args);
+
+#define PSEUDO_RET_NOERRNO				\
+	DO_RET (lr);
+
+#undef ret_NOERRNO
+#define ret_NOERRNO PSEUDO_RET_NOERRNO
+
+#undef	PSEUDO_END_NOERRNO
+#define	PSEUDO_END_NOERRNO(name)			\
+  END (name)
+
+/* The function has to return the error code.  */
+#undef	PSEUDO_ERRVAL
+#define	PSEUDO_ERRVAL(name, syscall_name, args)		\
+	.text;						\
+  ENTRY (name)						\
+	DO_CALL (syscall_name, args);			\
+	rsb	r0, r0, #0
+
+#undef	PSEUDO_END_ERRVAL
+#define	PSEUDO_END_ERRVAL(name)				\
+  END (name)
+
+#define ret_ERRVAL PSEUDO_RET_NOERRNO
+
+#if NOT_IN_libc
+# define SYSCALL_ERROR __local_syscall_error
+# if RTLD_PRIVATE_ERRNO
+#  define SYSCALL_ERROR_HANDLER					\
+__local_syscall_error:						\
+	rsb	r0, r0, #0;					\
+	LDST_PCREL(str, r0, r1, C_SYMBOL_NAME(rtld_errno));	\
+	mvn	r0, #0;						\
+	DO_RET(lr)
+# else
+#  if defined(__ARM_ARCH_4T__) && defined(__THUMB_INTERWORK__)
+#   define POP_PC \
+  pop { lr }; \
+  cfi_adjust_cfa_offset (-4); \
+  cfi_restore (lr); \
+  bx lr
+#  else
+#   define POP_PC  pop { pc }
+#  endif
+#  define SYSCALL_ERROR_HANDLER					\
+__local_syscall_error:						\
+	push	{ lr };						\
+	cfi_adjust_cfa_offset (4);				\
+	cfi_rel_offset (lr, 0);					\
+	push	{ r0 };	    					\
+	cfi_adjust_cfa_offset (4);				\
+	bl	PLTJMP(C_SYMBOL_NAME(__errno_location)); 	\
+	pop	{ r1 };						\
+	cfi_adjust_cfa_offset (-4);				\
+	rsb	r1, r1, #0;					\
+	str	r1, [r0];					\
+	mvn	r0, #0;						\
+	POP_PC;
+# endif
+#else
+# define SYSCALL_ERROR_HANDLER	/* Nothing here; code in sysdep.S is used.  */
+# define SYSCALL_ERROR __syscall_error
+#endif
+
+/* The ARM EABI user interface passes the syscall number in r7, instead
+   of in the swi.  This is more efficient, because the kernel does not need
+   to fetch the swi from memory to find out the number; which can be painful
+   with separate I-cache and D-cache.  Make sure to use 0 for the SWI
+   argument; otherwise the (optional) compatibility code for APCS binaries
+   may be invoked.  */
+
+/* Linux takes system call args in registers:
+	arg 1		r0
+	arg 2		r1
+	arg 3		r2
+	arg 4		r3
+	arg 5		r4	(this is different from the APCS convention)
+	arg 6		r5
+	arg 7		r6
+
+   The compiler is going to form a call by coming here, through PSEUDO, with
+   arguments
+   	syscall number	in the DO_CALL macro
+   	arg 1		r0
+   	arg 2		r1
+   	arg 3		r2
+   	arg 4		r3
+   	arg 5		[sp]
+	arg 6		[sp+4]
+	arg 7		[sp+8]
+
+   We need to shuffle values between R4..R6 and the stack so that the
+   caller's v1..v3 and stack frame are not corrupted, and the kernel
+   sees the right arguments.
+
+*/
+
+/* We must save and restore r7 (call-saved) for the syscall number.
+   We never make function calls from inside here (only potentially
+   signal handlers), so we do not bother with doubleword alignment.
+
+   Just like the APCS syscall convention, the EABI syscall convention uses
+   r0 through r6 for up to seven syscall arguments.  None are ever passed to
+   the kernel on the stack, although incoming arguments are on the stack for
+   syscalls with five or more arguments.
+
+   The assembler will convert the literal pool load to a move for most
+   syscalls.  */
+
+#undef	DO_CALL
+#define DO_CALL(syscall_name, args)			\
+	DOARGS_##args;					\
+	ldr	r7, =SYS_ify (syscall_name);		\
+	swi	0x0;					\
+	UNDOARGS_##args
+
+#undef  DOARGS_0
+#define DOARGS_0					\
+	.fnstart;					\
+	push	{ r7 };					\
+	cfi_adjust_cfa_offset (4);			\
+	cfi_rel_offset (r7, 0);				\
+	.save	{ r7 }
+#undef  DOARGS_1
+#define DOARGS_1 DOARGS_0
+#undef  DOARGS_2
+#define DOARGS_2 DOARGS_0
+#undef  DOARGS_3
+#define DOARGS_3 DOARGS_0
+#undef  DOARGS_4
+#define DOARGS_4 DOARGS_0
+#undef  DOARGS_5
+#define DOARGS_5					\
+	.fnstart;					\
+	push	{r4, r7};				\
+	cfi_adjust_cfa_offset (8);			\
+	cfi_rel_offset (r4, 0);				\
+	cfi_rel_offset (r7, 4);				\
+	.save	{ r4, r7 };				\
+	ldr	r4, [sp, #8]
+#undef  DOARGS_6
+#define DOARGS_6					\
+	.fnstart;					\
+	mov	ip, sp;					\
+	push	{r4, r5, r7};				\
+	cfi_adjust_cfa_offset (12);			\
+	cfi_rel_offset (r4, 0);				\
+	cfi_rel_offset (r5, 4);				\
+	cfi_rel_offset (r7, 8);				\
+	.save	{ r4, r5, r7 };				\
+	ldmia	ip, {r4, r5}
+#undef  DOARGS_7
+#define DOARGS_7					\
+	.fnstart;					\
+	mov	ip, sp;					\
+	push	{r4, r5, r6, r7};			\
+	cfi_adjust_cfa_offset (16);			\
+	cfi_rel_offset (r4, 0);				\
+	cfi_rel_offset (r5, 4);				\
+	cfi_rel_offset (r6, 8);				\
+	cfi_rel_offset (r7, 12);			\
+	.save	{ r4, r5, r6, r7 };			\
+	ldmia	ip, {r4, r5, r6}
+
+#undef  UNDOARGS_0
+#define UNDOARGS_0					\
+	pop	{r7};					\
+	cfi_adjust_cfa_offset (-4);			\
+	cfi_restore (r7);				\
+	.fnend
+#undef  UNDOARGS_1
+#define UNDOARGS_1 UNDOARGS_0
+#undef  UNDOARGS_2
+#define UNDOARGS_2 UNDOARGS_0
+#undef  UNDOARGS_3
+#define UNDOARGS_3 UNDOARGS_0
+#undef  UNDOARGS_4
+#define UNDOARGS_4 UNDOARGS_0
+#undef  UNDOARGS_5
+#define UNDOARGS_5					\
+	pop	{r4, r7};				\
+	cfi_adjust_cfa_offset (-8);			\
+	cfi_restore (r4);				\
+	cfi_restore (r7);				\
+	.fnend
+#undef  UNDOARGS_6
+#define UNDOARGS_6					\
+	pop	{r4, r5, r7};				\
+	cfi_adjust_cfa_offset (-12);			\
+	cfi_restore (r4);				\
+	cfi_restore (r5);				\
+	cfi_restore (r7);				\
+	.fnend
+#undef  UNDOARGS_7
+#define UNDOARGS_7					\
+	pop	{r4, r5, r6, r7};			\
+	cfi_adjust_cfa_offset (-16);			\
+	cfi_restore (r4);				\
+	cfi_restore (r5);				\
+	cfi_restore (r6);				\
+	cfi_restore (r7);				\
+	.fnend
+
+#else /* not __ASSEMBLER__ */
+
+/* Define a macro which expands into the inline wrapper code for a system
+   call.  */
+#undef INLINE_SYSCALL
+#define INLINE_SYSCALL(name, nr, args...)				\
+  ({ unsigned int _sys_result = INTERNAL_SYSCALL (name, , nr, args);	\
+     if (__builtin_expect (INTERNAL_SYSCALL_ERROR_P (_sys_result, ), 0))	\
+       {								\
+	 __set_errno (INTERNAL_SYSCALL_ERRNO (_sys_result, ));		\
+	 _sys_result = (unsigned int) -1;				\
+       }								\
+     (int) _sys_result; })
+
+#undef INTERNAL_SYSCALL_DECL
+#define INTERNAL_SYSCALL_DECL(err) do { } while (0)
+
+#if defined(__thumb__)
+/* We can not expose the use of r7 to the compiler.  GCC (as
+   of 4.5) uses r7 as the hard frame pointer for Thumb - although
+   for Thumb-2 it isn't obviously a better choice than r11.
+   And GCC does not support asms that conflict with the frame
+   pointer.
+
+   This would be easier if syscall numbers never exceeded 255,
+   but they do.  For the moment the LOAD_ARGS_7 is sacrificed.
+   We can't use push/pop inside the asm because that breaks
+   unwinding (i.e. thread cancellation) for this frame.  We can't
+   locally save and restore r7, because we do not know if this
+   function uses r7 or if it is our caller's r7; if it is our caller's,
+   then unwinding will fail higher up the stack.  So we move the
+   syscall out of line and provide its own unwind information.  */
+# undef INTERNAL_SYSCALL_RAW
+# define INTERNAL_SYSCALL_RAW(name, err, nr, args...)		\
+  ({								\
+      register int _a1 asm ("a1");				\
+      int _nametmp = name;					\
+      LOAD_ARGS_##nr (args)					\
+      register int _name asm ("ip") = _nametmp;			\
+      asm volatile ("bl      __libc_do_syscall"			\
+                    : "=r" (_a1)				\
+                    : "r" (_name) ASM_ARGS_##nr			\
+                    : "memory", "lr");				\
+      _a1; })
+#else /* ARM */
+# undef INTERNAL_SYSCALL_RAW
+# define INTERNAL_SYSCALL_RAW(name, err, nr, args...)		\
+  ({								\
+       register int _a1 asm ("r0"), _nr asm ("r7");		\
+       LOAD_ARGS_##nr (args)					\
+       _nr = name;						\
+       asm volatile ("swi	0x0	@ syscall " #name	\
+		     : "=r" (_a1)				\
+		     : "r" (_nr) ASM_ARGS_##nr			\
+		     : "memory");				\
+       _a1; })
+#endif
+
+#undef INTERNAL_SYSCALL
+#define INTERNAL_SYSCALL(name, err, nr, args...)		\
+	INTERNAL_SYSCALL_RAW(SYS_ify(name), err, nr, args)
+
+#undef INTERNAL_SYSCALL_ARM
+#define INTERNAL_SYSCALL_ARM(name, err, nr, args...)		\
+	INTERNAL_SYSCALL_RAW(__ARM_NR_##name, err, nr, args)
+
+#undef INTERNAL_SYSCALL_ERROR_P
+#define INTERNAL_SYSCALL_ERROR_P(val, err) \
+  ((unsigned int) (val) >= 0xfffff001u)
+
+#undef INTERNAL_SYSCALL_ERRNO
+#define INTERNAL_SYSCALL_ERRNO(val, err)	(-(val))
+
+#define LOAD_ARGS_0()
+#define ASM_ARGS_0
+#define LOAD_ARGS_1(a1)				\
+  int _a1tmp = (int) (a1);			\
+  LOAD_ARGS_0 ()				\
+  _a1 = _a1tmp;
+#define ASM_ARGS_1	ASM_ARGS_0, "r" (_a1)
+#define LOAD_ARGS_2(a1, a2)			\
+  int _a2tmp = (int) (a2);			\
+  LOAD_ARGS_1 (a1)				\
+  register int _a2 asm ("a2") = _a2tmp;
+#define ASM_ARGS_2	ASM_ARGS_1, "r" (_a2)
+#define LOAD_ARGS_3(a1, a2, a3)			\
+  int _a3tmp = (int) (a3);			\
+  LOAD_ARGS_2 (a1, a2)				\
+  register int _a3 asm ("a3") = _a3tmp;
+#define ASM_ARGS_3	ASM_ARGS_2, "r" (_a3)
+#define LOAD_ARGS_4(a1, a2, a3, a4)		\
+  int _a4tmp = (int) (a4);			\
+  LOAD_ARGS_3 (a1, a2, a3)			\
+  register int _a4 asm ("a4") = _a4tmp;
+#define ASM_ARGS_4	ASM_ARGS_3, "r" (_a4)
+#define LOAD_ARGS_5(a1, a2, a3, a4, a5)		\
+  int _v1tmp = (int) (a5);			\
+  LOAD_ARGS_4 (a1, a2, a3, a4)			\
+  register int _v1 asm ("v1") = _v1tmp;
+#define ASM_ARGS_5	ASM_ARGS_4, "r" (_v1)
+#define LOAD_ARGS_6(a1, a2, a3, a4, a5, a6)	\
+  int _v2tmp = (int) (a6);			\
+  LOAD_ARGS_5 (a1, a2, a3, a4, a5)		\
+  register int _v2 asm ("v2") = _v2tmp;
+#define ASM_ARGS_6	ASM_ARGS_5, "r" (_v2)
+#ifndef __thumb__
+# define LOAD_ARGS_7(a1, a2, a3, a4, a5, a6, a7)	\
+  int _v3tmp = (int) (a7);				\
+  LOAD_ARGS_6 (a1, a2, a3, a4, a5, a6)			\
+  register int _v3 asm ("v3") = _v3tmp;
+# define ASM_ARGS_7	ASM_ARGS_6, "r" (_v3)
+#endif
+
+/* For EABI, non-constant syscalls are actually pretty easy...  */
+#undef INTERNAL_SYSCALL_NCS
+#define INTERNAL_SYSCALL_NCS(number, err, nr, args...)          \
+  INTERNAL_SYSCALL_RAW (number, err, nr, args)
+
+#endif	/* __ASSEMBLER__ */
+
+/* Pointer mangling support.  */
+#if (defined NOT_IN_libc && defined IS_IN_rtld) || \
+  (!defined SHARED && (!defined NOT_IN_libc || defined IS_IN_libpthread))
+# ifdef __ASSEMBLER__
+#  define PTR_MANGLE_LOAD(guard, tmp)					\
+  LDST_PCREL(ldr, guard, tmp, C_SYMBOL_NAME(__pointer_chk_guard_local));
+#  define PTR_MANGLE(dst, src, guard, tmp)				\
+  PTR_MANGLE_LOAD(guard, tmp);						\
+  PTR_MANGLE2(dst, src, guard)
+/* Use PTR_MANGLE2 for efficiency if guard is already loaded.  */
+#  define PTR_MANGLE2(dst, src, guard)		\
+  eor dst, src, guard
+#  define PTR_DEMANGLE(dst, src, guard, tmp)	\
+  PTR_MANGLE (dst, src, guard, tmp)
+#  define PTR_DEMANGLE2(dst, src, guard)	\
+  PTR_MANGLE2 (dst, src, guard)
+# else
+extern uintptr_t __pointer_chk_guard_local attribute_relro attribute_hidden;
+#  define PTR_MANGLE(var) \
+  (var) = (__typeof (var)) ((uintptr_t) (var) ^ __pointer_chk_guard_local)
+#  define PTR_DEMANGLE(var)     PTR_MANGLE (var)
+# endif
+#else
+# ifdef __ASSEMBLER__
+#  define PTR_MANGLE_LOAD(guard, tmp)					\
+  LDST_GLOBAL(ldr, guard, tmp, C_SYMBOL_NAME(__pointer_chk_guard));
+#  define PTR_MANGLE(dst, src, guard, tmp)				\
+  PTR_MANGLE_LOAD(guard, tmp);						\
+  PTR_MANGLE2(dst, src, guard)
+/* Use PTR_MANGLE2 for efficiency if guard is already loaded.  */
+#  define PTR_MANGLE2(dst, src, guard)		\
+  eor dst, src, guard
+#  define PTR_DEMANGLE(dst, src, guard, tmp)	\
+  PTR_MANGLE (dst, src, guard, tmp)
+#  define PTR_DEMANGLE2(dst, src, guard)	\
+  PTR_MANGLE2 (dst, src, guard)
+# else
+extern uintptr_t __pointer_chk_guard attribute_relro;
+#  define PTR_MANGLE(var) \
+  (var) = (__typeof (var)) ((uintptr_t) (var) ^ __pointer_chk_guard)
+#  define PTR_DEMANGLE(var)     PTR_MANGLE (var)
+# endif
+#endif
+
+#endif /* linux/arm/sysdep.h */
diff --git a/sysdeps/unix/sysv/linux/arm/truncate64.c b/sysdeps/unix/sysv/linux/arm/truncate64.c
new file mode 100644
index 0000000000..dbbb5fcb44
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/truncate64.c
@@ -0,0 +1,35 @@
+/* Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sys/types.h>
+#include <endian.h>
+#include <errno.h>
+#include <unistd.h>
+
+#include <sysdep.h>
+#include <sys/syscall.h>
+
+/* Truncate the file FD refers to to LENGTH bytes.  */
+int
+truncate64 (const char *path, off64_t length)
+{
+  unsigned int low = length & 0xffffffff;
+  unsigned int high = length >> 32;
+  int result = INLINE_SYSCALL (truncate64, 4, path, 0,
+			       __LONG_LONG_PAIR (high, low));
+  return result;
+}
diff --git a/sysdeps/unix/sysv/linux/arm/ucontext_i.sym b/sysdeps/unix/sysv/linux/arm/ucontext_i.sym
new file mode 100644
index 0000000000..306292f1f8
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/ucontext_i.sym
@@ -0,0 +1,30 @@
+#include <inttypes.h>
+#include <signal.h>
+#include <stddef.h>
+#include <sys/ucontext.h>
+
+SIG_BLOCK
+SIG_SETMASK
+
+-- Offsets of the fields in the ucontext_t structure.
+#define ucontext(member)	offsetof (ucontext_t, member)
+#define mcontext(member)	ucontext (uc_mcontext.member)
+
+UCONTEXT_FLAGS			ucontext (uc_flags)
+UCONTEXT_LINK			ucontext (uc_link)
+UCONTEXT_STACK			ucontext (uc_stack)
+UCONTEXT_MCONTEXT		ucontext (uc_mcontext)
+UCONTEXT_SIGMASK		ucontext (uc_sigmask)
+
+UCONTEXT_REGSPACE		ucontext (uc_regspace)
+
+MCONTEXT_TRAP_NO		mcontext (trap_no)
+MCONTEXT_ERROR_CODE		mcontext (error_code)
+MCONTEXT_OLDMASK		mcontext (oldmask)
+MCONTEXT_ARM_R0			mcontext (arm_r0)
+MCONTEXT_ARM_R4			mcontext (arm_r4)
+MCONTEXT_ARM_SP			mcontext (arm_sp)
+MCONTEXT_ARM_LR			mcontext (arm_lr)
+MCONTEXT_ARM_PC			mcontext (arm_pc)
+MCONTEXT_ARM_CPSR		mcontext (arm_cpsr)
+MCONTEXT_FAULT_ADDRESS		mcontext (fault_address)
diff --git a/sysdeps/unix/sysv/linux/arm/umount.c b/sysdeps/unix/sysv/linux/arm/umount.c
new file mode 100644
index 0000000000..b8e499d8c4
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/umount.c
@@ -0,0 +1,30 @@
+/* Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David Huggins-Daines <dhd@debian.org>, 2000.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Since we don't have an oldumount system call, do what the kernel
+   does down here.  */
+
+extern long int __umount2 (const char *name, int flags);
+
+long int
+__umount (const char *name)
+{
+  return __umount2 (name, 0);
+}
+
+weak_alias (__umount, umount);
diff --git a/sysdeps/unix/sysv/linux/arm/versionsort64.c b/sysdeps/unix/sysv/linux/arm/versionsort64.c
new file mode 100644
index 0000000000..144b691e56
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/versionsort64.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/versionsort64.c>
diff --git a/sysdeps/unix/sysv/linux/arm/vfork.S b/sysdeps/unix/sysv/linux/arm/vfork.S
new file mode 100644
index 0000000000..1ac67881c9
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/vfork.S
@@ -0,0 +1,61 @@
+/* Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Philip Blundell <philb@gnu.org>.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#define _ERRNO_H	1
+#include <bits/errno.h>
+
+/* Clone the calling process, but without copying the whole address space.
+   The calling process is suspended until the new process exits or is
+   replaced by a call to `execve'.  Return -1 for errors, 0 to the new process,
+   and the process ID of the new process to the old process.  */
+
+ENTRY (__vfork)
+#ifdef SAVE_PID
+	SAVE_PID
+#endif
+	/* The DO_CALL macro saves r7 on the stack, to enable generation
+	   of ARM unwind info.  Since the stack is initially shared between
+	   parent and child of vfork, that saved value could be corrupted.
+	   To avoid this problem, we save r7 into ip as well, and restore
+	   from there.  */
+	mov	ip, r7
+	cfi_register (r7, ip)
+	.fnstart
+	push	{ r7 }
+	cfi_adjust_cfa_offset (4)
+	.save { r7 }
+	ldr	r7, =SYS_ify (vfork)
+	swi	0x0
+	.fnend
+	add	sp, sp, #4
+	cfi_adjust_cfa_offset (-4)
+	mov	r7, ip
+	cfi_restore (r7);
+#ifdef RESTORE_PID
+	RESTORE_PID
+#endif
+	cmn	a1, #4096
+	it	cc
+	RETINSTR(cc, lr)
+
+	b	PLTJMP(SYSCALL_ERROR)
+PSEUDO_END (__vfork)
+libc_hidden_def (__vfork)
+
+weak_alias (__vfork, vfork)
diff --git a/sysdeps/unix/sysv/linux/arm/xstat.c b/sysdeps/unix/sysv/linux/arm/xstat.c
new file mode 100644
index 0000000000..e9869f5508
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/arm/xstat.c
@@ -0,0 +1 @@
+#include <sysdeps/unix/sysv/linux/i386/xstat.c>