diff options
Diffstat (limited to 'sysdeps/x86_64')
3 files changed, 3 insertions, 3 deletions
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S index 8fa4255d6d..64c91e6e2c 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S @@ -41,7 +41,7 @@ b) Calculate 2 polynomials for sin and cos: RS = X * ( A0 + X^2 * (A1 + x^2 * (A2 + x^2 * (A3)))); RC = B0 + X^2 * (B1 + x^2 * (B2 + x^2 * (B3 + x^2 * (B4)))); - c) Swap RS & RC if if first bit of obtained value after + c) Swap RS & RC if first bit of obtained value after Right Shifting is set to 1. Using And, Andnot & Or operations. 3) Destination sign setting a) Set shifted destination sign using XOR operation: diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S index 74a6ac1157..748646e8d9 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S @@ -42,7 +42,7 @@ ENTRY (_ZGVbN4vl4l4_sincosf_sse4) b) Calculate 2 polynomials for sin and cos: RS = X * ( A0 + X^2 * (A1 + x^2 * (A2 + x^2 * (A3)))); RC = B0 + X^2 * (B1 + x^2 * (B2 + x^2 * (B3 + x^2 * (B4)))); - c) Swap RS & RC if if first bit of obtained value after + c) Swap RS & RC if first bit of obtained value after Right Shifting is set to 1. Using And, Andnot & Or operations. 3) Destination sign setting a) Set shifted destination sign using XOR operation: diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S index 9e4e2c71c5..aadf45dcb3 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S @@ -42,7 +42,7 @@ ENTRY (_ZGVdN8vl4l4_sincosf_avx2) b) Calculate 2 polynomials for sin and cos: RS = X * ( A0 + X^2 * (A1 + x^2 * (A2 + x^2 * (A3)))); RC = B0 + X^2 * (B1 + x^2 * (B2 + x^2 * (B3 + x^2 * (B4)))); - c) Swap RS & RC if if first bit of obtained value after + c) Swap RS & RC if first bit of obtained value after Right Shifting is set to 1. Using And, Andnot & Or operations. 3) Destination sign setting a) Set shifted destination sign using XOR operation: |