diff options
Diffstat (limited to 'sysdeps/x86')
| -rw-r--r-- | sysdeps/x86/cacheinfo.c | 12 | ||||
| -rw-r--r-- | sysdeps/x86/cpu-features.c | 436 | ||||
| -rw-r--r-- | sysdeps/x86/cpu-features.h | 258 | ||||
| -rw-r--r-- | sysdeps/x86/cpu-tunables.c | 168 | ||||
| -rw-r--r-- | sysdeps/x86/dl-cet.c | 4 | ||||
| -rw-r--r-- | sysdeps/x86/tst-get-cpu-features.c | 122 |
6 files changed, 561 insertions, 439 deletions
diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c index 5366a37ea0..217c21c34f 100644 --- a/sysdeps/x86/cacheinfo.c +++ b/sysdeps/x86/cacheinfo.c @@ -583,7 +583,7 @@ get_common_cache_info (long int *shared_ptr, unsigned int *threads_ptr, /* A value of 0 for the HTT bit indicates there is only a single logical processor. */ - if (HAS_CPU_FEATURE (HTT)) + if (CPU_FEATURE_USABLE (HTT)) { /* Figure out the number of logical threads that share the highest cache level. */ @@ -732,7 +732,7 @@ intel_bug_no_cache_info: /* Assume that all logical threads share the highest cache level. */ threads - = ((cpu_features->cpuid[COMMON_CPUID_INDEX_1].ebx + = ((cpu_features->features[COMMON_CPUID_INDEX_1].cpuid.ebx >> 16) & 0xff); } @@ -867,14 +867,14 @@ init_cacheinfo (void) unsigned int minimum_rep_movsb_threshold; /* NB: The default REP MOVSB threshold is 2048 * (VEC_SIZE / 16). */ unsigned int rep_movsb_threshold; - if (CPU_FEATURES_ARCH_P (cpu_features, AVX512F_Usable) - && !CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_AVX512)) + if (CPU_FEATURE_USABLE_P (cpu_features, AVX512F) + && !CPU_FEATURE_PREFERRED_P (cpu_features, Prefer_No_AVX512)) { rep_movsb_threshold = 2048 * (64 / 16); minimum_rep_movsb_threshold = 64 * 8; } - else if (CPU_FEATURES_ARCH_P (cpu_features, - AVX_Fast_Unaligned_Load)) + else if (CPU_FEATURE_PREFERRED_P (cpu_features, + AVX_Fast_Unaligned_Load)) { rep_movsb_threshold = 2048 * (32 / 16); minimum_rep_movsb_threshold = 32 * 8; diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index c7673a2eb9..4c24ba7c31 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -42,73 +42,109 @@ extern void TUNABLE_CALLBACK (set_x86_shstk) (tunable_val_t *) #endif static void -get_extended_indices (struct cpu_features *cpu_features) +update_usable (struct cpu_features *cpu_features) { - unsigned int eax, ebx, ecx, edx; - __cpuid (0x80000000, eax, ebx, ecx, edx); - if (eax >= 0x80000001) - __cpuid (0x80000001, - cpu_features->cpuid[COMMON_CPUID_INDEX_80000001].eax, - cpu_features->cpuid[COMMON_CPUID_INDEX_80000001].ebx, - cpu_features->cpuid[COMMON_CPUID_INDEX_80000001].ecx, - cpu_features->cpuid[COMMON_CPUID_INDEX_80000001].edx); - if (eax >= 0x80000007) - __cpuid (0x80000007, - cpu_features->cpuid[COMMON_CPUID_INDEX_80000007].eax, - cpu_features->cpuid[COMMON_CPUID_INDEX_80000007].ebx, - cpu_features->cpuid[COMMON_CPUID_INDEX_80000007].ecx, - cpu_features->cpuid[COMMON_CPUID_INDEX_80000007].edx); - if (eax >= 0x80000008) - __cpuid (0x80000008, - cpu_features->cpuid[COMMON_CPUID_INDEX_80000008].eax, - cpu_features->cpuid[COMMON_CPUID_INDEX_80000008].ebx, - cpu_features->cpuid[COMMON_CPUID_INDEX_80000008].ecx, - cpu_features->cpuid[COMMON_CPUID_INDEX_80000008].edx); -} - -static void -get_common_indices (struct cpu_features *cpu_features, - unsigned int *family, unsigned int *model, - unsigned int *extended_model, unsigned int *stepping) -{ - if (family) - { - unsigned int eax; - __cpuid (1, eax, cpu_features->cpuid[COMMON_CPUID_INDEX_1].ebx, - cpu_features->cpuid[COMMON_CPUID_INDEX_1].ecx, - cpu_features->cpuid[COMMON_CPUID_INDEX_1].edx); - cpu_features->cpuid[COMMON_CPUID_INDEX_1].eax = eax; - *family = (eax >> 8) & 0x0f; - *model = (eax >> 4) & 0x0f; - *extended_model = (eax >> 12) & 0xf0; - *stepping = eax & 0x0f; - if (*family == 0x0f) - { - *family += (eax >> 20) & 0xff; - *model += *extended_model; - } - } - - if (cpu_features->basic.max_cpuid >= 7) - { - __cpuid_count (7, 0, - cpu_features->cpuid[COMMON_CPUID_INDEX_7].eax, - cpu_features->cpuid[COMMON_CPUID_INDEX_7].ebx, - cpu_features->cpuid[COMMON_CPUID_INDEX_7].ecx, - cpu_features->cpuid[COMMON_CPUID_INDEX_7].edx); - __cpuid_count (7, 1, - cpu_features->cpuid[COMMON_CPUID_INDEX_7_ECX_1].eax, - cpu_features->cpuid[COMMON_CPUID_INDEX_7_ECX_1].ebx, - cpu_features->cpuid[COMMON_CPUID_INDEX_7_ECX_1].ecx, - cpu_features->cpuid[COMMON_CPUID_INDEX_7_ECX_1].edx); - } - - if (cpu_features->basic.max_cpuid >= 0xd) - __cpuid_count (0xd, 1, - cpu_features->cpuid[COMMON_CPUID_INDEX_D_ECX_1].eax, - cpu_features->cpuid[COMMON_CPUID_INDEX_D_ECX_1].ebx, - cpu_features->cpuid[COMMON_CPUID_INDEX_D_ECX_1].ecx, - cpu_features->cpuid[COMMON_CPUID_INDEX_D_ECX_1].edx); + /* Before COMMON_CPUID_INDEX_80000001, copy the cpuid array elements to + the usable array. */ + unsigned int i; + for (i = 0; i < COMMON_CPUID_INDEX_80000001; i++) + cpu_features->features[i].usable = cpu_features->features[i].cpuid; + + /* Before COMMON_CPUID_INDEX_80000001, clear the unknown usable bits + and the always zero bits. */ + CPU_FEATURE_UNSET (cpu_features, INDEX_1_ECX_16); + CPU_FEATURE_UNSET (cpu_features, INDEX_1_ECX_31); + CPU_FEATURE_UNSET (cpu_features, INDEX_1_EDX_10); + CPU_FEATURE_UNSET (cpu_features, INDEX_1_EDX_20); + CPU_FEATURE_UNSET (cpu_features, INDEX_1_EDX_30); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_EBX_6); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_EBX_22); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_ECX_13); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_ECX_15); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_ECX_16); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_ECX_23); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_ECX_24); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_ECX_26); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_0); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_1); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_5); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_6); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_7); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_9); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_11); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_12); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_13); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_17); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_19); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_21); + CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_23); + + /* EAX/EBX from COMMON_CPUID_INDEX_1 and EAX from COMMON_CPUID_INDEX_7 + aren't used for CPU feature detection. */ + cpu_features->features[COMMON_CPUID_INDEX_1].usable.eax = 0; + cpu_features->features[COMMON_CPUID_INDEX_1].usable.ebx = 0; + cpu_features->features[COMMON_CPUID_INDEX_7].usable.eax = 0; + + /* Starting from COMMON_CPUID_INDEX_80000001, copy the cpuid bits to + usable bits. */ + CPU_FEATURE_SET_USABLE (cpu_features, LAHF64_SAHF64); + CPU_FEATURE_SET_USABLE (cpu_features, SVM); + CPU_FEATURE_SET_USABLE (cpu_features, LZCNT); + CPU_FEATURE_SET_USABLE (cpu_features, SSE4A); + CPU_FEATURE_SET_USABLE (cpu_features, PREFETCHW); + CPU_FEATURE_SET_USABLE (cpu_features, XOP); + CPU_FEATURE_SET_USABLE (cpu_features, LWP); + CPU_FEATURE_SET_USABLE (cpu_features, FMA4); + CPU_FEATURE_SET_USABLE (cpu_features, TBM); + CPU_FEATURE_SET_USABLE (cpu_features, SYSCALL_SYSRET); + CPU_FEATURE_SET_USABLE (cpu_features, NX); + CPU_FEATURE_SET_USABLE (cpu_features, PAGE1GB); + CPU_FEATURE_SET_USABLE (cpu_features, RDTSCP); + CPU_FEATURE_SET_USABLE (cpu_features, LM); + CPU_FEATURE_SET_USABLE (cpu_features, XSAVEOPT); + CPU_FEATURE_SET_USABLE (cpu_features, XSAVEC); + CPU_FEATURE_SET_USABLE (cpu_features, XGETBV_ECX_1); + CPU_FEATURE_SET_USABLE (cpu_features, XSAVES); + CPU_FEATURE_SET_USABLE (cpu_features, XFD); + CPU_FEATURE_SET_USABLE (cpu_features, INVARIANT_TSC); + CPU_FEATURE_SET_USABLE (cpu_features, WBNOINVD); + CPU_FEATURE_SET_USABLE (cpu_features, AVX512_BF16); + + /* MPX has been deprecated. */ + CPU_FEATURE_UNSET (cpu_features, MPX); + + /* Clear the usable bits which require OS support. */ + CPU_FEATURE_UNSET (cpu_features, FMA); + CPU_FEATURE_UNSET (cpu_features, AVX); + CPU_FEATURE_UNSET (cpu_features, F16C); + CPU_FEATURE_UNSET (cpu_features, AVX2); + CPU_FEATURE_UNSET (cpu_features, AVX512F); + CPU_FEATURE_UNSET (cpu_features, AVX512DQ); + CPU_FEATURE_UNSET (cpu_features, AVX512_IFMA); + CPU_FEATURE_UNSET (cpu_features, AVX512PF); + CPU_FEATURE_UNSET (cpu_features, AVX512ER); + CPU_FEATURE_UNSET (cpu_features, AVX512CD); + CPU_FEATURE_UNSET (cpu_features, AVX512BW); + CPU_FEATURE_UNSET (cpu_features, AVX512VL); + CPU_FEATURE_UNSET (cpu_features, AVX512_VBMI); + CPU_FEATURE_UNSET (cpu_features, PKU); + CPU_FEATURE_UNSET (cpu_features, AVX512_VBMI2); + CPU_FEATURE_UNSET (cpu_features, VAES); + CPU_FEATURE_UNSET (cpu_features, VPCLMULQDQ); + CPU_FEATURE_UNSET (cpu_features, AVX512_VNNI); + CPU_FEATURE_UNSET (cpu_features, AVX512_BITALG); + CPU_FEATURE_UNSET (cpu_features, AVX512_VPOPCNTDQ); + CPU_FEATURE_UNSET (cpu_features, AVX512_4VNNIW); + CPU_FEATURE_UNSET (cpu_features, AVX512_4FMAPS); + CPU_FEATURE_UNSET (cpu_features, AVX512_VP2INTERSECT); + CPU_FEATURE_UNSET (cpu_features, AMX_BF16); + CPU_FEATURE_UNSET (cpu_features, AMX_TILE); + CPU_FEATURE_UNSET (cpu_features, AMX_INT8); + CPU_FEATURE_UNSET (cpu_features, XOP); + CPU_FEATURE_UNSET (cpu_features, FMA4); + CPU_FEATURE_UNSET (cpu_features, XSAVEC); + CPU_FEATURE_UNSET (cpu_features, XFD); + CPU_FEATURE_UNSET (cpu_features, AVX512_BF16); /* Can we call xgetbv? */ if (CPU_FEATURES_CPU_P (cpu_features, OSXSAVE)) @@ -123,40 +159,28 @@ get_common_indices (struct cpu_features *cpu_features, /* Determine if AVX is usable. */ if (CPU_FEATURES_CPU_P (cpu_features, AVX)) { - cpu_features->usable[index_arch_AVX_Usable] - |= bit_arch_AVX_Usable; + CPU_FEATURE_SET (cpu_features, AVX); /* The following features depend on AVX being usable. */ /* Determine if AVX2 is usable. */ if (CPU_FEATURES_CPU_P (cpu_features, AVX2)) - { - cpu_features->usable[index_arch_AVX2_Usable] - |= bit_arch_AVX2_Usable; - - /* Unaligned load with 256-bit AVX registers are faster on - Intel/AMD processors with AVX2. */ - cpu_features->preferred[index_arch_AVX_Fast_Unaligned_Load] - |= bit_arch_AVX_Fast_Unaligned_Load; - } + { + CPU_FEATURE_SET (cpu_features, AVX2); + + /* Unaligned load with 256-bit AVX registers are faster + on Intel/AMD processors with AVX2. */ + cpu_features->preferred[index_arch_AVX_Fast_Unaligned_Load] + |= bit_arch_AVX_Fast_Unaligned_Load; + } /* Determine if FMA is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, FMA)) - cpu_features->usable[index_arch_FMA_Usable] - |= bit_arch_FMA_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, FMA); /* Determine if VAES is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, VAES)) - cpu_features->usable[index_arch_VAES_Usable] - |= bit_arch_VAES_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, VAES); /* Determine if VPCLMULQDQ is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, VPCLMULQDQ)) - cpu_features->usable[index_arch_VPCLMULQDQ_Usable] - |= bit_arch_VPCLMULQDQ_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, VPCLMULQDQ); /* Determine if XOP is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, XOP)) - cpu_features->usable[index_arch_XOP_Usable] - |= bit_arch_XOP_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, XOP); /* Determine if F16C is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, F16C)) - cpu_features->usable[index_arch_F16C_Usable] - |= bit_arch_F16C_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, F16C); } /* Check if OPMASK state, upper 256-bit of ZMM0-ZMM15 and @@ -168,73 +192,41 @@ get_common_indices (struct cpu_features *cpu_features, /* Determine if AVX512F is usable. */ if (CPU_FEATURES_CPU_P (cpu_features, AVX512F)) { - cpu_features->usable[index_arch_AVX512F_Usable] - |= bit_arch_AVX512F_Usable; + CPU_FEATURE_SET (cpu_features, AVX512F); /* Determine if AVX512CD is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AVX512CD)) - cpu_features->usable[index_arch_AVX512CD_Usable] - |= bit_arch_AVX512CD_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AVX512CD); /* Determine if AVX512ER is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AVX512ER)) - cpu_features->usable[index_arch_AVX512ER_Usable] - |= bit_arch_AVX512ER_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AVX512ER); /* Determine if AVX512PF is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AVX512PF)) - cpu_features->usable[index_arch_AVX512PF_Usable] - |= bit_arch_AVX512PF_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AVX512PF); /* Determine if AVX512VL is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AVX512VL)) - cpu_features->usable[index_arch_AVX512VL_Usable] - |= bit_arch_AVX512VL_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AVX512VL); /* Determine if AVX512DQ is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AVX512DQ)) - cpu_features->usable[index_arch_AVX512DQ_Usable] - |= bit_arch_AVX512DQ_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AVX512DQ); /* Determine if AVX512BW is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AVX512BW)) - cpu_features->usable[index_arch_AVX512BW_Usable] - |= bit_arch_AVX512BW_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AVX512BW); /* Determine if AVX512_4FMAPS is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AVX512_4FMAPS)) - cpu_features->usable[index_arch_AVX512_4FMAPS_Usable] - |= bit_arch_AVX512_4FMAPS_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AVX512_4FMAPS); /* Determine if AVX512_4VNNIW is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AVX512_4VNNIW)) - cpu_features->usable[index_arch_AVX512_4VNNIW_Usable] - |= bit_arch_AVX512_4VNNIW_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AVX512_4VNNIW); /* Determine if AVX512_BITALG is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AVX512_BITALG)) - cpu_features->usable[index_arch_AVX512_BITALG_Usable] - |= bit_arch_AVX512_BITALG_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AVX512_BITALG); /* Determine if AVX512_IFMA is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AVX512_IFMA)) - cpu_features->usable[index_arch_AVX512_IFMA_Usable] - |= bit_arch_AVX512_IFMA_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AVX512_IFMA); /* Determine if AVX512_VBMI is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AVX512_VBMI)) - cpu_features->usable[index_arch_AVX512_VBMI_Usable] - |= bit_arch_AVX512_VBMI_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AVX512_VBMI); /* Determine if AVX512_VBMI2 is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AVX512_VBMI2)) - cpu_features->usable[index_arch_AVX512_VBMI2_Usable] - |= bit_arch_AVX512_VBMI2_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AVX512_VBMI2); /* Determine if is AVX512_VNNI usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AVX512_VNNI)) - cpu_features->usable[index_arch_AVX512_VNNI_Usable] - |= bit_arch_AVX512_VNNI_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AVX512_VNNI); /* Determine if AVX512_VPOPCNTDQ is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AVX512_VPOPCNTDQ)) - cpu_features->usable[index_arch_AVX512_VPOPCNTDQ_Usable] - |= bit_arch_AVX512_VPOPCNTDQ_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, + AVX512_VPOPCNTDQ); /* Determine if AVX512_VP2INTERSECT is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, - AVX512_VP2INTERSECT)) - cpu_features->usable[index_arch_AVX512_VP2INTERSECT_Usable] - |= bit_arch_AVX512_VP2INTERSECT_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, + AVX512_VP2INTERSECT); /* Determine if AVX512_BF16 is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AVX512_BF16)) - cpu_features->usable[index_arch_AVX512_BF16_Usable] - |= bit_arch_AVX512_BF16_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AVX512_BF16); } } } @@ -244,19 +236,17 @@ get_common_indices (struct cpu_features *cpu_features, == (bit_XTILECFG_state | bit_XTILEDATA_state)) { /* Determine if AMX_BF16 is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AMX_BF16)) - cpu_features->usable[index_arch_AMX_BF16_Usable] - |= bit_arch_AMX_BF16_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AMX_BF16); /* Determine if AMX_TILE is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AMX_TILE)) - cpu_features->usable[index_arch_AMX_TILE_Usable] - |= bit_arch_AMX_TILE_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AMX_TILE); /* Determine if AMX_INT8 is usable. */ - if (CPU_FEATURES_CPU_P (cpu_features, AMX_INT8)) - cpu_features->usable[index_arch_AMX_INT8_Usable] - |= bit_arch_AMX_INT8_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, AMX_INT8); } + + /* XFD is usable only when OSXSAVE is enabled. */ + CPU_FEATURE_SET_USABLE (cpu_features, XFD); + /* For _dl_runtime_resolve, set xsave_state_size to xsave area size + integer register save size and align it to 64 bytes. */ if (cpu_features->basic.max_cpuid >= 0xd) @@ -318,8 +308,7 @@ get_common_indices (struct cpu_features *cpu_features, { cpu_features->xsave_state_size = ALIGN_UP (size + STATE_SAVE_OFFSET, 64); - cpu_features->usable[index_arch_XSAVEC_Usable] - |= bit_arch_XSAVEC_Usable; + CPU_FEATURE_SET (cpu_features, XSAVEC); } } } @@ -328,8 +317,79 @@ get_common_indices (struct cpu_features *cpu_features, /* Determine if PKU is usable. */ if (CPU_FEATURES_CPU_P (cpu_features, OSPKE)) - cpu_features->usable[index_arch_PKU_Usable] - |= bit_arch_PKU_Usable; + CPU_FEATURE_SET (cpu_features, PKU); +} + +static void +get_extended_indices (struct cpu_features *cpu_features) +{ + unsigned int eax, ebx, ecx, edx; + __cpuid (0x80000000, eax, ebx, ecx, edx); + if (eax >= 0x80000001) + __cpuid (0x80000001, + cpu_features->features[COMMON_CPUID_INDEX_80000001].cpuid.eax, + cpu_features->features[COMMON_CPUID_INDEX_80000001].cpuid.ebx, + cpu_features->features[COMMON_CPUID_INDEX_80000001].cpuid.ecx, + cpu_features->features[COMMON_CPUID_INDEX_80000001].cpuid.edx); + if (eax >= 0x80000007) + __cpuid (0x80000007, + cpu_features->features[COMMON_CPUID_INDEX_80000007].cpuid.eax, + cpu_features->features[COMMON_CPUID_INDEX_80000007].cpuid.ebx, + cpu_features->features[COMMON_CPUID_INDEX_80000007].cpuid.ecx, + cpu_features->features[COMMON_CPUID_INDEX_80000007].cpuid.edx); + if (eax >= 0x80000008) + __cpuid (0x80000008, + cpu_features->features[COMMON_CPUID_INDEX_80000008].cpuid.eax, + cpu_features->features[COMMON_CPUID_INDEX_80000008].cpuid.ebx, + cpu_features->features[COMMON_CPUID_INDEX_80000008].cpuid.ecx, + cpu_features->features[COMMON_CPUID_INDEX_80000008].cpuid.edx); +} + +static void +get_common_indices (struct cpu_features *cpu_features, + unsigned int *family, unsigned int *model, + unsigned int *extended_model, unsigned int *stepping) +{ + if (family) + { + unsigned int eax; + __cpuid (1, eax, + cpu_features->features[COMMON_CPUID_INDEX_1].cpuid.ebx, + cpu_features->features[COMMON_CPUID_INDEX_1].cpuid.ecx, + cpu_features->features[COMMON_CPUID_INDEX_1].cpuid.edx); + cpu_features->features[COMMON_CPUID_INDEX_1].cpuid.eax = eax; + *family = (eax >> 8) & 0x0f; + *model = (eax >> 4) & 0x0f; + *extended_model = (eax >> 12) & 0xf0; + *stepping = eax & 0x0f; + if (*family == 0x0f) + { + *family += (eax >> 20) & 0xff; + *model += *extended_model; + } + } + + if (cpu_features->basic.max_cpuid >= 7) + { + __cpuid_count (7, 0, + cpu_features->features[COMMON_CPUID_INDEX_7].cpuid.eax, + cpu_features->features[COMMON_CPUID_INDEX_7].cpuid.ebx, + cpu_features->features[COMMON_CPUID_INDEX_7].cpuid.ecx, + cpu_features->features[COMMON_CPUID_INDEX_7].cpuid.edx); + __cpuid_count (7, 1, + cpu_features->features[COMMON_CPUID_INDEX_7_ECX_1].cpuid.eax, + cpu_features->features[COMMON_CPUID_INDEX_7_ECX_1].cpuid.ebx, + cpu_features->features[COMMON_CPUID_INDEX_7_ECX_1].cpuid.ecx, + cpu_features->features[COMMON_CPUID_INDEX_7_ECX_1].cpuid.edx); + } + + if (cpu_features->basic.max_cpuid >= 0xd) + __cpuid_count (0xd, 1, + cpu_features->features[COMMON_CPUID_INDEX_D_ECX_1].cpuid.eax, + cpu_features->features[COMMON_CPUID_INDEX_D_ECX_1].cpuid.ebx, + cpu_features->features[COMMON_CPUID_INDEX_D_ECX_1].cpuid.ecx, + cpu_features->features[COMMON_CPUID_INDEX_D_ECX_1].cpuid.edx); + } _Static_assert (((index_arch_Fast_Unaligned_Load @@ -353,8 +413,6 @@ init_cpu_features (struct cpu_features *cpu_features) unsigned int stepping = 0; enum cpu_features_kind kind; - cpu_features->usable_p = cpu_features->usable; - #if !HAS_CPUID if (__get_cpuid_max (0, 0) == 0) { @@ -377,6 +435,8 @@ init_cpu_features (struct cpu_features *cpu_features) get_extended_indices (cpu_features); + update_usable (cpu_features); + if (family == 0x06) { model += extended_model; @@ -473,7 +533,7 @@ init_cpu_features (struct cpu_features *cpu_features) with stepping >= 4) to avoid TSX on kernels that weren't updated with the latest microcode package (which disables broken feature by default). */ - cpu_features->cpuid[index_cpu_RTM].reg_RTM &= ~bit_cpu_RTM; + CPU_FEATURE_UNSET (cpu_features, RTM); break; } } @@ -502,15 +562,15 @@ init_cpu_features (struct cpu_features *cpu_features) get_extended_indices (cpu_features); - ecx = cpu_features->cpuid[COMMON_CPUID_INDEX_1].ecx; + update_usable (cpu_features); - if (HAS_ARCH_FEATURE (AVX_Usable)) + ecx = cpu_features->features[COMMON_CPUID_INDEX_1].cpuid.ecx; + + if (CPU_FEATURE_USABLE_P (cpu_features, AVX)) { /* Since the FMA4 bit is in COMMON_CPUID_INDEX_80000001 and FMA4 requires AVX, determine if FMA4 is usable here. */ - if (CPU_FEATURES_CPU_P (cpu_features, FMA4)) - cpu_features->usable[index_arch_FMA4_Usable] - |= bit_arch_FMA4_Usable; + CPU_FEATURE_SET_USABLE (cpu_features, FMA4); } if (family == 0x15) @@ -541,13 +601,15 @@ init_cpu_features (struct cpu_features *cpu_features) get_extended_indices (cpu_features); + update_usable (cpu_features); + model += extended_model; if (family == 0x6) { if (model == 0xf || model == 0x19) { - cpu_features->usable[index_arch_AVX_Usable] - &= ~(bit_arch_AVX_Usable | bit_arch_AVX2_Usable); + CPU_FEATURE_UNSET (cpu_features, AVX); + CPU_FEATURE_UNSET (cpu_features, AVX2); cpu_features->preferred[index_arch_Slow_SSE4_2] |= bit_arch_Slow_SSE4_2; @@ -560,8 +622,8 @@ init_cpu_features (struct cpu_features *cpu_features) { if (model == 0x1b) { - cpu_features->usable[index_arch_AVX_Usable] - &= ~(bit_arch_AVX_Usable | bit_arch_AVX2_Usable); + CPU_FEATURE_UNSET (cpu_features, AVX); + CPU_FEATURE_UNSET (cpu_features, AVX2); cpu_features->preferred[index_arch_Slow_SSE4_2] |= bit_arch_Slow_SSE4_2; @@ -571,8 +633,8 @@ init_cpu_features (struct cpu_features *cpu_features) } else if (model == 0x3b) { - cpu_features->usable[index_arch_AVX_Usable] - &= ~(bit_arch_AVX_Usable | bit_arch_AVX2_Usable); + CPU_FEATURE_UNSET (cpu_features, AVX); + CPU_FEATURE_UNSET (cpu_features, AVX2); cpu_features->preferred[index_arch_AVX_Fast_Unaligned_Load] &= ~bit_arch_AVX_Fast_Unaligned_Load; @@ -583,6 +645,7 @@ init_cpu_features (struct cpu_features *cpu_features) { kind = arch_kind_other; get_common_indices (cpu_features, NULL, NULL, NULL, NULL); + update_usable (cpu_features); } /* Support i586 if CX8 is available. */ @@ -629,31 +692,30 @@ no_cpuid: { const char *platform = NULL; - if (CPU_FEATURES_ARCH_P (cpu_features, AVX512F_Usable) - && CPU_FEATURES_CPU_P (cpu_features, AVX512CD)) + if (CPU_FEATURE_USABLE_P (cpu_features, AVX512CD)) { - if (CPU_FEATURES_CPU_P (cpu_features, AVX512ER)) + if (CPU_FEATURE_USABLE_P (cpu_features, AVX512ER)) { - if (CPU_FEATURES_CPU_P (cpu_features, AVX512PF)) + if (CPU_FEATURE_USABLE_P (cpu_features, AVX512PF)) platform = "xeon_phi"; } else { - if (CPU_FEATURES_CPU_P (cpu_features, AVX512BW) - && CPU_FEATURES_CPU_P (cpu_features, AVX512DQ) - && CPU_FEATURES_CPU_P (cpu_features, AVX512VL)) + if (CPU_FEATURE_USABLE_P (cpu_features, AVX512BW) + && CPU_FEATURE_USABLE_P (cpu_features, AVX512DQ) + && CPU_FEATURE_USABLE_P (cpu_features, AVX512VL)) GLRO(dl_hwcap) |= HWCAP_X86_AVX512_1; } } if (platform == NULL - && CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable) - && CPU_FEATURES_ARCH_P (cpu_features, FMA_Usable) - && CPU_FEATURES_CPU_P (cpu_features, BMI1) - && CPU_FEATURES_CPU_P (cpu_features, BMI2) - && CPU_FEATURES_CPU_P (cpu_features, LZCNT) - && CPU_FEATURES_CPU_P (cpu_features, MOVBE) - && CPU_FEATURES_CPU_P (cpu_features, POPCNT)) + && CPU_FEATURE_USABLE_P (cpu_features, AVX2) + && CPU_FEATURE_USABLE_P (cpu_features, FMA) + && CPU_FEATURE_USABLE_P (cpu_features, BMI1) + && CPU_FEATURE_USABLE_P (cpu_features, BMI2) + && CPU_FEATURE_USABLE_P (cpu_features, LZCNT) + && CPU_FEATURE_USABLE_P (cpu_features, MOVBE) + && CPU_FEATURE_USABLE_P (cpu_features, POPCNT)) platform = "haswell"; if (platform != NULL) @@ -661,7 +723,7 @@ no_cpuid: } #else GLRO(dl_hwcap) = 0; - if (CPU_FEATURES_CPU_P (cpu_features, SSE2)) + if (CPU_FEATURE_USABLE_P (cpu_features, SSE2)) GLRO(dl_hwcap) |= HWCAP_X86_SSE2; if (CPU_FEATURES_ARCH_P (cpu_features, I686)) @@ -696,9 +758,9 @@ no_cpuid: GLIBC_TUNABLES=glibc.cpu.hwcaps=-IBT,-SHSTK */ unsigned int cet_feature = 0; - if (!HAS_CPU_FEATURE (IBT)) + if (!CPU_FEATURE_USABLE (IBT)) cet_feature |= GNU_PROPERTY_X86_FEATURE_1_IBT; - if (!HAS_CPU_FEATURE (SHSTK)) + if (!CPU_FEATURE_USABLE (SHSTK)) cet_feature |= GNU_PROPERTY_X86_FEATURE_1_SHSTK; if (cet_feature) diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h index 0383131057..a0b9b9177c 100644 --- a/sysdeps/x86/cpu-features.h +++ b/sysdeps/x86/cpu-features.h @@ -20,15 +20,6 @@ enum { - /* The integer bit array index for the first set of usable feature - bits. */ - USABLE_FEATURE_INDEX_1 = 0, - /* The current maximum size of the feature integer bit array. */ - USABLE_FEATURE_INDEX_MAX -}; - -enum -{ /* The integer bit array index for the first set of preferred feature bits. */ PREFERRED_FEATURE_INDEX_1 = 0, @@ -57,6 +48,12 @@ struct cpuid_registers unsigned int edx; }; +struct cpuid_features +{ + struct cpuid_registers cpuid; + struct cpuid_registers usable; +}; + enum cpu_features_kind { arch_kind_unknown = 0, @@ -78,9 +75,7 @@ struct cpu_features_basic struct cpu_features { struct cpu_features_basic basic; - unsigned int *usable_p; - struct cpuid_registers cpuid[COMMON_CPUID_INDEX_MAX]; - unsigned int usable[USABLE_FEATURE_INDEX_MAX]; + struct cpuid_features features[COMMON_CPUID_INDEX_MAX]; unsigned int preferred[PREFERRED_FEATURE_INDEX_MAX]; /* The state size for XSAVEC or XSAVE. The type must be unsigned long int so that we use @@ -91,7 +86,7 @@ struct cpu_features unsigned long int xsave_state_size; /* The full state size for XSAVE when XSAVEC is disabled by - GLIBC_TUNABLES=glibc.cpu.hwcaps=-XSAVEC_Usable + GLIBC_TUNABLES=glibc.cpu.hwcaps=-XSAVEC */ unsigned int xsave_state_full_size; /* Data cache size for use in memory and string routines, typically @@ -114,117 +109,40 @@ extern const struct cpu_features *__get_cpu_features (void) __attribute__ ((const)); /* Only used directly in cpu-features.c. */ -# define CPU_FEATURES_CPU_P(ptr, name) \ - ((ptr->cpuid[index_cpu_##name].reg_##name & (bit_cpu_##name)) != 0) -# define CPU_FEATURES_ARCH_P(ptr, name) \ - ((ptr->feature_##name[index_arch_##name] & (bit_arch_##name)) != 0) +#define CPU_FEATURE_CHECK_P(ptr, name, check) \ + ((ptr->features[index_cpu_##name].check.reg_##name \ + & bit_cpu_##name) != 0) +#define CPU_FEATURE_SET(ptr, name) \ + ptr->features[index_cpu_##name].usable.reg_##name |= bit_cpu_##name; +#define CPU_FEATURE_UNSET(ptr, name) \ + ptr->features[index_cpu_##name].usable.reg_##name &= ~bit_cpu_##name; +#define CPU_FEATURE_SET_USABLE(ptr, name) \ + ptr->features[index_cpu_##name].usable.reg_##name \ + |= ptr->features[index_cpu_##name].cpuid.reg_##name & bit_cpu_##name; +#define CPU_FEATURE_PREFERRED_P(ptr, name) \ + ((ptr->preferred[index_arch_##name] & bit_arch_##name) != 0) +#define CPU_FEATURE_CPU_P(ptr, name) \ + CPU_FEATURE_CHECK_P (ptr, name, cpuid) +#define CPU_FEATURE_USABLE_P(ptr, name) \ + CPU_FEATURE_CHECK_P (ptr, name, usable) /* HAS_CPU_FEATURE evaluates to true if CPU supports the feature. */ #define HAS_CPU_FEATURE(name) \ - CPU_FEATURES_CPU_P (__get_cpu_features (), name) -/* HAS_ARCH_FEATURE evaluates to true if we may use the feature at - runtime. */ -# define HAS_ARCH_FEATURE(name) \ - CPU_FEATURES_ARCH_P (__get_cpu_features (), name) + CPU_FEATURE_CPU_P (__get_cpu_features (), name) /* CPU_FEATURE_USABLE evaluates to true if the feature is usable. */ #define CPU_FEATURE_USABLE(name) \ - HAS_ARCH_FEATURE (name##_Usable) - -/* Architecture features. */ - -/* USABLE_FEATURE_INDEX_1. */ -#define bit_arch_AVX_Usable (1u << 0) -#define bit_arch_AVX2_Usable (1u << 1) -#define bit_arch_AVX512F_Usable (1u << 2) -#define bit_arch_AVX512CD_Usable (1u << 3) -#define bit_arch_AVX512ER_Usable (1u << 4) -#define bit_arch_AVX512PF_Usable (1u << 5) -#define bit_arch_AVX512VL_Usable (1u << 6) -#define bit_arch_AVX512DQ_Usable (1u << 7) -#define bit_arch_AVX512BW_Usable (1u << 8) -#define bit_arch_AVX512_4FMAPS_Usable (1u << 9) -#define bit_arch_AVX512_4VNNIW_Usable (1u << 10) -#define bit_arch_AVX512_BITALG_Usable (1u << 11) -#define bit_arch_AVX512_IFMA_Usable (1u << 12) -#define bit_arch_AVX512_VBMI_Usable (1u << 13) -#define bit_arch_AVX512_VBMI2_Usable (1u << 14) -#define bit_arch_AVX512_VNNI_Usable (1u << 15) -#define bit_arch_AVX512_VPOPCNTDQ_Usable (1u << 16) -#define bit_arch_FMA_Usable (1u << 17) -#define bit_arch_FMA4_Usable (1u << 18) -#define bit_arch_VAES_Usable (1u << 19) -#define bit_arch_VPCLMULQDQ_Usable (1u << 20) -#define bit_arch_XOP_Usable (1u << 21) -#define bit_arch_XSAVEC_Usable (1u << 22) -#define bit_arch_F16C_Usable (1u << 23) -#define bit_arch_AVX512_VP2INTERSECT_Usable (1u << 24) -#define bit_arch_AVX512_BF16_Usable (1u << 25) -#define bit_arch_PKU_Usable (1u << 26) -#define bit_arch_AMX_BF16_Usable (1u << 27) -#define bit_arch_AMX_TILE_Usable (1u << 28) -#define bit_arch_AMX_INT8_Usable (1u << 29) - -#define index_arch_AVX_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX2_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512F_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512CD_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512ER_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512PF_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512VL_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512BW_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512DQ_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512_4FMAPS_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512_4VNNIW_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512_BITALG_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512_IFMA_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512_VBMI_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512_VBMI2_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512_VNNI_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512_VPOPCNTDQ_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_FMA_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_FMA4_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_VAES_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_VPCLMULQDQ_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_XOP_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_XSAVEC_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_F16C_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512_VP2INTERSECT_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AVX512_BF16_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_PKU_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AMX_BF16_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AMX_TILE_Usable USABLE_FEATURE_INDEX_1 -#define index_arch_AMX_INT8_Usable USABLE_FEATURE_INDEX_1 - -#define feature_AVX_Usable usable -#define feature_AVX2_Usable usable -#define feature_AVX512F_Usable usable -#define feature_AVX512CD_Usable usable -#define feature_AVX512ER_Usable usable -#define feature_AVX512PF_Usable usable -#define feature_AVX512VL_Usable usable -#define feature_AVX512BW_Usable usable -#define feature_AVX512DQ_Usable usable -#define feature_AVX512_4FMAPS_Usable usable -#define feature_AVX512_4VNNIW_Usable usable -#define feature_AVX512_BITALG_Usable usable -#define feature_AVX512_IFMA_Usable usable -#define feature_AVX512_VBMI_Usable usable -#define feature_AVX512_VBMI2_Usable usable -#define feature_AVX512_VNNI_Usable usable -#define feature_AVX512_VPOPCNTDQ_Usable usable -#define feature_FMA_Usable usable -#define feature_FMA4_Usable usable -#define feature_VAES_Usable usable -#define feature_VPCLMULQDQ_Usable usable -#define feature_XOP_Usable usable -#define feature_XSAVEC_Usable usable -#define feature_F16C_Usable usable -#define feature_AVX512_VP2INTERSECT_Usable usable -#define feature_AVX512_BF16_Usable usable -#define feature_PKU_Usable usable -#define feature_AMX_BF16_Usable usable -#define feature_AMX_TILE_Usable usable -#define feature_AMX_INT8_Usable usable + CPU_FEATURE_USABLE_P (__get_cpu_features (), name) +/* CPU_FEATURE_PREFER evaluates to true if we prefer the feature at + runtime. */ +#define CPU_FEATURE_PREFERRED(name) \ + CPU_FEATURE_PREFERRED_P(__get_cpu_features (), name) + +#define CPU_FEATURES_CPU_P(ptr, name) \ + CPU_FEATURE_CPU_P (ptr, name) +#define CPU_FEATURES_ARCH_P(ptr, name) \ + CPU_FEATURE_PREFERRED_P (ptr, name) +#define HAS_ARCH_FEATURE(name) \ + CPU_FEATURE_PREFERRED (name) /* CPU features. */ @@ -247,6 +165,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define bit_cpu_CMPXCHG16B (1u << 13) #define bit_cpu_XTPRUPDCTRL (1u << 14) #define bit_cpu_PDCM (1u << 15) +#define bit_cpu_INDEX_1_ECX_16 (1u << 16) #define bit_cpu_PCID (1u << 17) #define bit_cpu_DCA (1u << 18) #define bit_cpu_SSE4_1 (1u << 19) @@ -261,6 +180,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define bit_cpu_AVX (1u << 28) #define bit_cpu_F16C (1u << 29) #define bit_cpu_RDRAND (1u << 30) +#define bit_cpu_INDEX_1_ECX_31 (1u << 31) /* EDX. */ #define bit_cpu_FPU (1u << 0) @@ -273,6 +193,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define bit_cpu_MCE (1u << 7) #define bit_cpu_CX8 (1u << 8) #define bit_cpu_APIC (1u << 9) +#define bit_cpu_INDEX_1_EDX_10 (1u << 10) #define bit_cpu_SEP (1u << 11) #define bit_cpu_MTRR (1u << 12) #define bit_cpu_PGE (1u << 13) @@ -282,6 +203,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define bit_cpu_PSE_36 (1u << 17) #define bit_cpu_PSN (1u << 18) #define bit_cpu_CLFSH (1u << 19) +#define bit_cpu_INDEX_1_EDX_20 (1u << 20) #define bit_cpu_DS (1u << 21) #define bit_cpu_ACPI (1u << 22) #define bit_cpu_MMX (1u << 23) @@ -291,6 +213,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define bit_cpu_SS (1u << 27) #define bit_cpu_HTT (1u << 28) #define bit_cpu_TM (1u << 29) +#define bit_cpu_INDEX_1_EDX_30 (1u << 30) #define bit_cpu_PBE (1u << 31) /* COMMON_CPUID_INDEX_7. */ @@ -302,12 +225,14 @@ extern const struct cpu_features *__get_cpu_features (void) #define bit_cpu_BMI1 (1u << 3) #define bit_cpu_HLE (1u << 4) #define bit_cpu_AVX2 (1u << 5) +#define bit_cpu_INDEX_7_EBX_6 (1u << 6) #define bit_cpu_SMEP (1u << 7) #define bit_cpu_BMI2 (1u << 8) #define bit_cpu_ERMS (1u << 9) #define bit_cpu_INVPCID (1u << 10) #define bit_cpu_RTM (1u << 11) #define bit_cpu_PQM (1u << 12) +#define bit_cpu_DEPR_FPU_CS_DS (1u << 13) #define bit_cpu_MPX (1u << 14) #define bit_cpu_PQE (1u << 15) #define bit_cpu_AVX512F (1u << 16) @@ -316,6 +241,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define bit_cpu_ADX (1u << 19) #define bit_cpu_SMAP (1u << 20) #define bit_cpu_AVX512_IFMA (1u << 21) +#define bit_cpu_INDEX_7_EBX_22 (1u << 22) #define bit_cpu_CLFLUSHOPT (1u << 23) #define bit_cpu_CLWB (1u << 24) #define bit_cpu_TRACE (1u << 25) @@ -340,9 +266,17 @@ extern const struct cpu_features *__get_cpu_features (void) #define bit_cpu_VPCLMULQDQ (1u << 10) #define bit_cpu_AVX512_VNNI (1u << 11) #define bit_cpu_AVX512_BITALG (1u << 12) +#define bit_cpu_INDEX_7_ECX_13 (1u << 13) #define bit_cpu_AVX512_VPOPCNTDQ (1u << 14) +#define bit_cpu_INDEX_7_ECX_15 (1u << 15) +#define bit_cpu_INDEX_7_ECX_16 (1u << 16) +/* Note: Bits 17-21: The value of MAWAU used by the BNDLDX and BNDSTX + instructions in 64-bit mode. */ #define bit_cpu_RDPID (1u << 22) +#define bit_cpu_INDEX_7_ECX_23 (1u << 23) +#define bit_cpu_INDEX_7_ECX_24 (1u << 24) #define bit_cpu_CLDEMOTE (1u << 25) +#define bit_cpu_INDEX_7_ECX_26 (1u << 26) #define bit_cpu_MOVDIRI (1u << 27) #define bit_cpu_MOVDIR64B (1u << 28) #define bit_cpu_ENQCMD (1u << 29) @@ -350,17 +284,30 @@ extern const struct cpu_features *__get_cpu_features (void) #define bit_cpu_PKS (1u << 31) /* EDX. */ +#define bit_cpu_INDEX_7_EDX_0 (1u << 0) +#define bit_cpu_INDEX_7_EDX_1 (1u << 1) #define bit_cpu_AVX512_4VNNIW (1u << 2) #define bit_cpu_AVX512_4FMAPS (1u << 3) #define bit_cpu_FSRM (1u << 4) +#define bit_cpu_INDEX_7_EDX_5 (1u << 5) +#define bit_cpu_INDEX_7_EDX_6 (1u << 6) +#define bit_cpu_INDEX_7_EDX_7 (1u << 7) #define bit_cpu_AVX512_VP2INTERSECT (1u << 8) +#define bit_cpu_INDEX_7_EDX_9 (1u << 9) #define bit_cpu_MD_CLEAR (1u << 10) +#define bit_cpu_INDEX_7_EDX_11 (1u << 11) +#define bit_cpu_INDEX_7_EDX_12 (1u << 12) +#define bit_cpu_INDEX_7_EDX_13 (1u << 13) #define bit_cpu_SERIALIZE (1u << 14) #define bit_cpu_HYBRID (1u << 15) #define bit_cpu_TSXLDTRK (1u << 16) +#define bit_cpu_INDEX_7_EDX_17 (1u << 17) #define bit_cpu_PCONFIG (1u << 18) +#define bit_cpu_INDEX_7_EDX_19 (1u << 19) #define bit_cpu_IBT (1u << 20) +#define bit_cpu_INDEX_7_EDX_21 (1u << 21) #define bit_cpu_AMX_BF16 (1u << 22) +#define bit_cpu_INDEX_7_EDX_23 (1u << 23) #define bit_cpu_AMX_TILE (1u << 24) #define bit_cpu_AMX_INT8 (1u << 25) #define bit_cpu_IBRS_IBPB (1u << 26) @@ -433,6 +380,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define index_cpu_CMPXCHG16B COMMON_CPUID_INDEX_1 #define index_cpu_XTPRUPDCTRL COMMON_CPUID_INDEX_1 #define index_cpu_PDCM COMMON_CPUID_INDEX_1 +#define index_cpu_INDEX_1_ECX_16 COMMON_CPUID_INDEX_1 #define index_cpu_PCID COMMON_CPUID_INDEX_1 #define index_cpu_DCA COMMON_CPUID_INDEX_1 #define index_cpu_SSE4_1 COMMON_CPUID_INDEX_1 @@ -447,6 +395,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define index_cpu_AVX COMMON_CPUID_INDEX_1 #define index_cpu_F16C COMMON_CPUID_INDEX_1 #define index_cpu_RDRAND COMMON_CPUID_INDEX_1 +#define index_cpu_INDEX_1_ECX_31 COMMON_CPUID_INDEX_1 /* ECX. */ #define index_cpu_FPU COMMON_CPUID_INDEX_1 @@ -459,6 +408,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define index_cpu_MCE COMMON_CPUID_INDEX_1 #define index_cpu_CX8 COMMON_CPUID_INDEX_1 #define index_cpu_APIC COMMON_CPUID_INDEX_1 +#define index_cpu_INDEX_1_EDX_10 COMMON_CPUID_INDEX_1 #define index_cpu_SEP COMMON_CPUID_INDEX_1 #define index_cpu_MTRR COMMON_CPUID_INDEX_1 #define index_cpu_PGE COMMON_CPUID_INDEX_1 @@ -468,6 +418,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define index_cpu_PSE_36 COMMON_CPUID_INDEX_1 #define index_cpu_PSN COMMON_CPUID_INDEX_1 #define index_cpu_CLFSH COMMON_CPUID_INDEX_1 +#define index_cpu_INDEX_1_EDX_20 COMMON_CPUID_INDEX_1 #define index_cpu_DS COMMON_CPUID_INDEX_1 #define index_cpu_ACPI COMMON_CPUID_INDEX_1 #define index_cpu_MMX COMMON_CPUID_INDEX_1 @@ -477,6 +428,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define index_cpu_SS COMMON_CPUID_INDEX_1 #define index_cpu_HTT COMMON_CPUID_INDEX_1 #define index_cpu_TM COMMON_CPUID_INDEX_1 +#define index_cpu_INDEX_1_EDX_30 COMMON_CPUID_INDEX_1 #define index_cpu_PBE COMMON_CPUID_INDEX_1 /* COMMON_CPUID_INDEX_7. */ @@ -488,12 +440,14 @@ extern const struct cpu_features *__get_cpu_features (void) #define index_cpu_BMI1 COMMON_CPUID_INDEX_7 #define index_cpu_HLE COMMON_CPUID_INDEX_7 #define index_cpu_AVX2 COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_EBX_6 COMMON_CPUID_INDEX_7 #define index_cpu_SMEP COMMON_CPUID_INDEX_7 #define index_cpu_BMI2 COMMON_CPUID_INDEX_7 #define index_cpu_ERMS COMMON_CPUID_INDEX_7 #define index_cpu_INVPCID COMMON_CPUID_INDEX_7 #define index_cpu_RTM COMMON_CPUID_INDEX_7 #define index_cpu_PQM COMMON_CPUID_INDEX_7 +#define index_cpu_DEPR_FPU_CS_DS COMMON_CPUID_INDEX_7 #define index_cpu_MPX COMMON_CPUID_INDEX_7 #define index_cpu_PQE COMMON_CPUID_INDEX_7 #define index_cpu_AVX512F COMMON_CPUID_INDEX_7 @@ -502,6 +456,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define index_cpu_ADX COMMON_CPUID_INDEX_7 #define index_cpu_SMAP COMMON_CPUID_INDEX_7 #define index_cpu_AVX512_IFMA COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_EBX_22 COMMON_CPUID_INDEX_7 #define index_cpu_CLFLUSHOPT COMMON_CPUID_INDEX_7 #define index_cpu_CLWB COMMON_CPUID_INDEX_7 #define index_cpu_TRACE COMMON_CPUID_INDEX_7 @@ -526,9 +481,15 @@ extern const struct cpu_features *__get_cpu_features (void) #define index_cpu_VPCLMULQDQ COMMON_CPUID_INDEX_7 #define index_cpu_AVX512_VNNI COMMON_CPUID_INDEX_7 #define index_cpu_AVX512_BITALG COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_ECX_13 COMMON_CPUID_INDEX_7 #define index_cpu_AVX512_VPOPCNTDQ COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_ECX_15 COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_ECX_16 COMMON_CPUID_INDEX_7 #define index_cpu_RDPID COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_ECX_23 COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_ECX_24 COMMON_CPUID_INDEX_7 #define index_cpu_CLDEMOTE COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_ECX_26 COMMON_CPUID_INDEX_7 #define index_cpu_MOVDIRI COMMON_CPUID_INDEX_7 #define index_cpu_MOVDIR64B COMMON_CPUID_INDEX_7 #define index_cpu_ENQCMD COMMON_CPUID_INDEX_7 @@ -536,17 +497,30 @@ extern const struct cpu_features *__get_cpu_features (void) #define index_cpu_PKS COMMON_CPUID_INDEX_7 /* EDX. */ +#define index_cpu_INDEX_7_EDX_0 COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_EDX_1 COMMON_CPUID_INDEX_7 #define index_cpu_AVX512_4VNNIW COMMON_CPUID_INDEX_7 #define index_cpu_AVX512_4FMAPS COMMON_CPUID_INDEX_7 #define index_cpu_FSRM COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_EDX_5 COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_EDX_6 COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_EDX_7 COMMON_CPUID_INDEX_7 #define index_cpu_AVX512_VP2INTERSECT COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_EDX_9 COMMON_CPUID_INDEX_7 #define index_cpu_MD_CLEAR COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_EDX_11 COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_EDX_12 COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_EDX_13 COMMON_CPUID_INDEX_7 #define index_cpu_SERIALIZE COMMON_CPUID_INDEX_7 #define index_cpu_HYBRID COMMON_CPUID_INDEX_7 #define index_cpu_TSXLDTRK COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_EDX_17 COMMON_CPUID_INDEX_7 #define index_cpu_PCONFIG COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_EDX_19 COMMON_CPUID_INDEX_7 #define index_cpu_IBT COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_EDX_21 COMMON_CPUID_INDEX_7 #define index_cpu_AMX_BF16 COMMON_CPUID_INDEX_7 +#define index_cpu_INDEX_7_EDX_23 COMMON_CPUID_INDEX_7 #define index_cpu_AMX_TILE COMMON_CPUID_INDEX_7 #define index_cpu_AMX_INT8 COMMON_CPUID_INDEX_7 #define index_cpu_IBRS_IBPB COMMON_CPUID_INDEX_7 @@ -619,6 +593,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define reg_CMPXCHG16B ecx #define reg_XTPRUPDCTRL ecx #define reg_PDCM ecx +#define reg_INDEX_1_ECX_16 ecx #define reg_PCID ecx #define reg_DCA ecx #define reg_SSE4_1 ecx @@ -633,6 +608,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define reg_AVX ecx #define reg_F16C ecx #define reg_RDRAND ecx +#define reg_INDEX_1_ECX_31 ecx /* EDX. */ #define reg_FPU edx @@ -645,6 +621,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define reg_MCE edx #define reg_CX8 edx #define reg_APIC edx +#define reg_INDEX_1_EDX_10 edx #define reg_SEP edx #define reg_MTRR edx #define reg_PGE edx @@ -654,6 +631,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define reg_PSE_36 edx #define reg_PSN edx #define reg_CLFSH edx +#define reg_INDEX_1_EDX_20 edx #define reg_DS edx #define reg_ACPI edx #define reg_MMX edx @@ -663,6 +641,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define reg_SS edx #define reg_HTT edx #define reg_TM edx +#define reg_INDEX_1_EDX_30 edx #define reg_PBE edx /* COMMON_CPUID_INDEX_7. */ @@ -675,11 +654,13 @@ extern const struct cpu_features *__get_cpu_features (void) #define reg_HLE ebx #define reg_BMI2 ebx #define reg_AVX2 ebx +#define reg_INDEX_7_EBX_6 ebx #define reg_SMEP ebx #define reg_ERMS ebx #define reg_INVPCID ebx #define reg_RTM ebx #define reg_PQM ebx +#define reg_DEPR_FPU_CS_DS ebx #define reg_MPX ebx #define reg_PQE ebx #define reg_AVX512F ebx @@ -688,6 +669,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define reg_ADX ebx #define reg_SMAP ebx #define reg_AVX512_IFMA ebx +#define reg_INDEX_7_EBX_22 ebx #define reg_CLFLUSHOPT ebx #define reg_CLWB ebx #define reg_TRACE ebx @@ -712,9 +694,15 @@ extern const struct cpu_features *__get_cpu_features (void) #define reg_VPCLMULQDQ ecx #define reg_AVX512_VNNI ecx #define reg_AVX512_BITALG ecx +#define reg_INDEX_7_ECX_13 ecx #define reg_AVX512_VPOPCNTDQ ecx +#define reg_INDEX_7_ECX_15 ecx +#define reg_INDEX_7_ECX_16 ecx #define reg_RDPID ecx +#define reg_INDEX_7_ECX_23 ecx +#define reg_INDEX_7_ECX_24 ecx #define reg_CLDEMOTE ecx +#define reg_INDEX_7_ECX_26 ecx #define reg_MOVDIRI ecx #define reg_MOVDIR64B ecx #define reg_ENQCMD ecx @@ -722,17 +710,30 @@ extern const struct cpu_features *__get_cpu_features (void) #define reg_PKS ecx /* EDX. */ +#define reg_INDEX_7_EDX_0 edx +#define reg_INDEX_7_EDX_1 edx #define reg_AVX512_4VNNIW edx #define reg_AVX512_4FMAPS edx #define reg_FSRM edx +#define reg_INDEX_7_EDX_5 edx +#define reg_INDEX_7_EDX_6 edx +#define reg_INDEX_7_EDX_7 edx #define reg_AVX512_VP2INTERSECT edx +#define reg_INDEX_7_EDX_9 edx #define reg_MD_CLEAR edx +#define reg_INDEX_7_EDX_11 edx +#define reg_INDEX_7_EDX_12 edx +#define reg_INDEX_7_EDX_13 edx #define reg_SERIALIZE edx #define reg_HYBRID edx #define reg_TSXLDTRK edx +#define reg_INDEX_7_EDX_17 edx #define reg_PCONFIG edx +#define reg_INDEX_7_EDX_19 edx #define reg_IBT edx +#define reg_INDEX_7_EDX_21 edx #define reg_AMX_BF16 edx +#define reg_INDEX_7_EDX_23 edx #define reg_AMX_TILE edx #define reg_AMX_INT8 edx #define reg_IBRS_IBPB edx @@ -821,23 +822,6 @@ extern const struct cpu_features *__get_cpu_features (void) #define index_arch_MathVec_Prefer_No_AVX512 PREFERRED_FEATURE_INDEX_1 #define index_arch_Prefer_FSRM PREFERRED_FEATURE_INDEX_1 -#define feature_Fast_Rep_String preferred -#define feature_Fast_Copy_Backward preferred -#define feature_Slow_BSF preferred -#define feature_Fast_Unaligned_Load preferred -#define feature_Prefer_PMINUB_for_stringop preferred -#define feature_Fast_Unaligned_Copy preferred -#define feature_I586 preferred -#define feature_I686 preferred -#define feature_Slow_SSE4_2 preferred -#define feature_AVX_Fast_Unaligned_Load preferred -#define feature_Prefer_MAP_32BIT_EXEC preferred -#define feature_Prefer_No_VZEROUPPER preferred -#define feature_Prefer_ERMS preferred -#define feature_Prefer_No_AVX512 preferred -#define feature_MathVec_Prefer_No_AVX512 preferred -#define feature_Prefer_FSRM preferred - /* XCR0 Feature flags. */ #define bit_XMM_state (1u << 1) #define bit_YMM_state (1u << 2) @@ -851,8 +835,6 @@ extern const struct cpu_features *__get_cpu_features (void) /* Unused for x86. */ # define INIT_ARCH() # define __get_cpu_features() (&GLRO(dl_x86_cpu_features)) -# define x86_get_cpuid_registers(i) \ - (&(GLRO(dl_x86_cpu_features).cpuid[i])) # endif #ifdef __x86_64__ diff --git a/sysdeps/x86/cpu-tunables.c b/sysdeps/x86/cpu-tunables.c index 666ec571f2..588bbf9448 100644 --- a/sysdeps/x86/cpu-tunables.c +++ b/sysdeps/x86/cpu-tunables.c @@ -43,66 +43,45 @@ extern __typeof (memcmp) DEFAULT_MEMCMP; _Static_assert (sizeof (#name) - 1 == len, #name " != " #len); \ if (!DEFAULT_MEMCMP (f, #name, len)) \ { \ - cpu_features->cpuid[index_cpu_##name].reg_##name \ - &= ~bit_cpu_##name; \ + CPU_FEATURE_UNSET (cpu_features, name) \ break; \ } -/* Disable an ARCH feature NAME. We don't enable an ARCH feature which - isn't available. */ -# define CHECK_GLIBC_IFUNC_ARCH_OFF(f, cpu_features, name, len) \ +/* Disable a preferred feature NAME. We don't enable a preferred feature + which isn't available. */ +# define CHECK_GLIBC_IFUNC_PREFERRED_OFF(f, cpu_features, name, len) \ _Static_assert (sizeof (#name) - 1 == len, #name " != " #len); \ if (!DEFAULT_MEMCMP (f, #name, len)) \ { \ - cpu_features->feature_##name[index_arch_##name] \ + cpu_features->preferred[index_arch_##name] \ &= ~bit_arch_##name; \ break; \ } -/* Enable/disable an ARCH feature NAME. */ -# define CHECK_GLIBC_IFUNC_ARCH_BOTH(f, cpu_features, name, disable, \ - len) \ +/* Enable/disable a preferred feature NAME. */ +# define CHECK_GLIBC_IFUNC_PREFERRED_BOTH(f, cpu_features, name, \ + disable, len) \ _Static_assert (sizeof (#name) - 1 == len, #name " != " #len); \ if (!DEFAULT_MEMCMP (f, #name, len)) \ { \ if (disable) \ - cpu_features->feature_##name[index_arch_##name] \ - &= ~bit_arch_##name; \ + cpu_features->preferred[index_arch_##name] &= ~bit_arch_##name; \ else \ - cpu_features->feature_##name[index_arch_##name] \ - |= bit_arch_##name; \ + cpu_features->preferred[index_arch_##name] |= bit_arch_##name; \ break; \ } -/* Enable/disable an ARCH feature NAME. Enable an ARCH feature only - if the ARCH feature NEED is also enabled. */ -# define CHECK_GLIBC_IFUNC_ARCH_NEED_ARCH_BOTH(f, cpu_features, name, \ +/* Enable/disable a preferred feature NAME. Enable a preferred feature + only if the feature NEED is usable. */ +# define CHECK_GLIBC_IFUNC_PREFERRED_NEED_BOTH(f, cpu_features, name, \ need, disable, len) \ _Static_assert (sizeof (#name) - 1 == len, #name " != " #len); \ if (!DEFAULT_MEMCMP (f, #name, len)) \ { \ if (disable) \ - cpu_features->feature_##name[index_arch_##name] \ - &= ~bit_arch_##name; \ - else if (CPU_FEATURES_ARCH_P (cpu_features, need)) \ - cpu_features->feature_##name[index_arch_##name] \ - |= bit_arch_##name; \ - break; \ - } - -/* Enable/disable an ARCH feature NAME. Enable an ARCH feature only - if the CPU feature NEED is also enabled. */ -# define CHECK_GLIBC_IFUNC_ARCH_NEED_CPU_BOTH(f, cpu_features, name, \ - need, disable, len) \ - _Static_assert (sizeof (#name) - 1 == len, #name " != " #len); \ - if (!DEFAULT_MEMCMP (f, #name, len)) \ - { \ - if (disable) \ - cpu_features->feature_##name[index_arch_##name] \ - &= ~bit_arch_##name; \ - else if (CPU_FEATURES_CPU_P (cpu_features, need)) \ - cpu_features->feature_##name[index_arch_##name] \ - |= bit_arch_##name; \ + cpu_features->preferred[index_arch_##name] &= ~bit_arch_##name; \ + else if (CPU_FEATURE_USABLE_P (cpu_features, need)) \ + cpu_features->preferred[index_arch_##name] |= bit_arch_##name; \ break; \ } @@ -178,8 +157,8 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, ERMS, 4); CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, FMA4, 4); CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, SSE2, 4); - CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features, I586, 4); - CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features, I686, 4); + CHECK_GLIBC_IFUNC_PREFERRED_OFF (n, cpu_features, I586, 4); + CHECK_GLIBC_IFUNC_PREFERRED_OFF (n, cpu_features, I686, 4); } break; case 5: @@ -197,6 +176,13 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, POPCNT, 6); CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, SSE4_1, 6); CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, SSE4_2, 6); + if (!DEFAULT_MEMCMP (n, "XSAVEC", 6)) + { + /* Update xsave_state_size to XSAVE state size. */ + cpu_features->xsave_state_size + = cpu_features->xsave_state_full_size; + CPU_FEATURE_UNSET (cpu_features, XSAVEC); + } } break; case 7: @@ -216,115 +202,85 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, AVX512PF, 8); CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, AVX512VL, 8); } - CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features, Slow_BSF, - disable, 8); - break; - case 10: - if (disable) - { - CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features, AVX_Usable, - 10); - CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features, FMA_Usable, - 10); - } + CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features, Slow_BSF, + disable, 8); break; case 11: - if (disable) { - CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features, AVX2_Usable, - 11); - CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features, FMA4_Usable, - 11); - } - CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features, Prefer_ERMS, - disable, 11); - CHECK_GLIBC_IFUNC_ARCH_NEED_CPU_BOTH (n, cpu_features, - Slow_SSE4_2, SSE4_2, + CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features, + Prefer_ERMS, disable, 11); - CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features, Prefer_FSRM, - disable, 11); - break; - case 13: - if (disable) - { - /* Update xsave_state_size to XSAVE state size. */ - cpu_features->xsave_state_size - = cpu_features->xsave_state_full_size; - CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features, - XSAVEC_Usable, 13); - } - break; - case 14: - if (disable) - { - CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features, - AVX512F_Usable, 14); + CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features, + Prefer_FSRM, + disable, 11); + CHECK_GLIBC_IFUNC_PREFERRED_NEED_BOTH (n, cpu_features, + Slow_SSE4_2, + SSE4_2, + disable, 11); } break; case 15: - if (disable) { - CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features, - AVX512DQ_Usable, 15); + CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features, + Fast_Rep_String, + disable, 15); } - CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features, Fast_Rep_String, - disable, 15); break; case 16: { - CHECK_GLIBC_IFUNC_ARCH_NEED_ARCH_BOTH - (n, cpu_features, Prefer_No_AVX512, AVX512F_Usable, + CHECK_GLIBC_IFUNC_PREFERRED_NEED_BOTH + (n, cpu_features, Prefer_No_AVX512, AVX512F, disable, 16); } break; case 18: { - CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features, - Fast_Copy_Backward, disable, - 18); + CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features, + Fast_Copy_Backward, + disable, 18); } break; case 19: { - CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features, - Fast_Unaligned_Load, disable, - 19); - CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features, - Fast_Unaligned_Copy, disable, - 19); + CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features, + Fast_Unaligned_Load, + disable, 19); + CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features, + Fast_Unaligned_Copy, + disable, 19); } break; case 20: { - CHECK_GLIBC_IFUNC_ARCH_NEED_ARCH_BOTH - (n, cpu_features, Prefer_No_VZEROUPPER, AVX_Usable, - disable, 20); + CHECK_GLIBC_IFUNC_PREFERRED_NEED_BOTH + (n, cpu_features, Prefer_No_VZEROUPPER, AVX, disable, + 20); } break; case 21: { - CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features, - Prefer_MAP_32BIT_EXEC, disable, - 21); + CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features, + Prefer_MAP_32BIT_EXEC, + disable, 21); } break; case 23: { - CHECK_GLIBC_IFUNC_ARCH_NEED_ARCH_BOTH - (n, cpu_features, AVX_Fast_Unaligned_Load, AVX_Usable, + CHECK_GLIBC_IFUNC_PREFERRED_NEED_BOTH + (n, cpu_features, AVX_Fast_Unaligned_Load, AVX, disable, 23); } break; case 24: { - CHECK_GLIBC_IFUNC_ARCH_NEED_ARCH_BOTH - (n, cpu_features, MathVec_Prefer_No_AVX512, - AVX512F_Usable, disable, 24); + CHECK_GLIBC_IFUNC_PREFERRED_NEED_BOTH + (n, cpu_features, MathVec_Prefer_No_AVX512, AVX512F, + disable, 24); } break; case 26: { - CHECK_GLIBC_IFUNC_ARCH_NEED_CPU_BOTH + CHECK_GLIBC_IFUNC_PREFERRED_NEED_BOTH (n, cpu_features, Prefer_PMINUB_for_stringop, SSE2, disable, 26); } diff --git a/sysdeps/x86/dl-cet.c b/sysdeps/x86/dl-cet.c index 5524b66038..03572f7af6 100644 --- a/sysdeps/x86/dl-cet.c +++ b/sysdeps/x86/dl-cet.c @@ -74,10 +74,10 @@ dl_cet_check (struct link_map *m, const char *program) GLIBC_TUNABLES=glibc.cpu.hwcaps=-IBT,-SHSTK */ - enable_ibt &= (HAS_CPU_FEATURE (IBT) + enable_ibt &= (CPU_FEATURE_USABLE (IBT) && (enable_ibt_type == cet_always_on || (m->l_cet & lc_ibt) != 0)); - enable_shstk &= (HAS_CPU_FEATURE (SHSTK) + enable_shstk &= (CPU_FEATURE_USABLE (SHSTK) && (enable_shstk_type == cet_always_on || (m->l_cet & lc_shstk) != 0)); } diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c index 2cff2e86ba..080c58e70b 100644 --- a/sysdeps/x86/tst-get-cpu-features.c +++ b/sysdeps/x86/tst-get-cpu-features.c @@ -139,6 +139,7 @@ do_test (void) CHECK_CPU_FEATURE (INVPCID); CHECK_CPU_FEATURE (RTM); CHECK_CPU_FEATURE (PQM); + CHECK_CPU_FEATURE (DEPR_FPU_CS_DS); CHECK_CPU_FEATURE (MPX); CHECK_CPU_FEATURE (PQE); CHECK_CPU_FEATURE (AVX512F); @@ -220,35 +221,156 @@ do_test (void) CHECK_CPU_FEATURE (AVX512_BF16); printf ("Usable CPU features:\n"); + CHECK_CPU_FEATURE_USABLE (SSE3); + CHECK_CPU_FEATURE_USABLE (PCLMULQDQ); + CHECK_CPU_FEATURE_USABLE (DTES64); + CHECK_CPU_FEATURE_USABLE (MONITOR); + CHECK_CPU_FEATURE_USABLE (DS_CPL); + CHECK_CPU_FEATURE_USABLE (VMX); + CHECK_CPU_FEATURE_USABLE (SMX); + CHECK_CPU_FEATURE_USABLE (EST); + CHECK_CPU_FEATURE_USABLE (TM2); + CHECK_CPU_FEATURE_USABLE (SSSE3); + CHECK_CPU_FEATURE_USABLE (CNXT_ID); + CHECK_CPU_FEATURE_USABLE (SDBG); CHECK_CPU_FEATURE_USABLE (FMA); + CHECK_CPU_FEATURE_USABLE (CMPXCHG16B); + CHECK_CPU_FEATURE_USABLE (XTPRUPDCTRL); + CHECK_CPU_FEATURE_USABLE (PDCM); + CHECK_CPU_FEATURE_USABLE (PCID); + CHECK_CPU_FEATURE_USABLE (DCA); + CHECK_CPU_FEATURE_USABLE (SSE4_1); + CHECK_CPU_FEATURE_USABLE (SSE4_2); + CHECK_CPU_FEATURE_USABLE (X2APIC); + CHECK_CPU_FEATURE_USABLE (MOVBE); + CHECK_CPU_FEATURE_USABLE (POPCNT); + CHECK_CPU_FEATURE_USABLE (TSC_DEADLINE); + CHECK_CPU_FEATURE_USABLE (AES); + CHECK_CPU_FEATURE_USABLE (XSAVE); + CHECK_CPU_FEATURE_USABLE (OSXSAVE); CHECK_CPU_FEATURE_USABLE (AVX); CHECK_CPU_FEATURE_USABLE (F16C); + CHECK_CPU_FEATURE_USABLE (RDRAND); + CHECK_CPU_FEATURE_USABLE (FPU); + CHECK_CPU_FEATURE_USABLE (VME); + CHECK_CPU_FEATURE_USABLE (DE); + CHECK_CPU_FEATURE_USABLE (PSE); + CHECK_CPU_FEATURE_USABLE (TSC); + CHECK_CPU_FEATURE_USABLE (MSR); + CHECK_CPU_FEATURE_USABLE (PAE); + CHECK_CPU_FEATURE_USABLE (MCE); + CHECK_CPU_FEATURE_USABLE (CX8); + CHECK_CPU_FEATURE_USABLE (APIC); + CHECK_CPU_FEATURE_USABLE (SEP); + CHECK_CPU_FEATURE_USABLE (MTRR); + CHECK_CPU_FEATURE_USABLE (PGE); + CHECK_CPU_FEATURE_USABLE (MCA); + CHECK_CPU_FEATURE_USABLE (CMOV); + CHECK_CPU_FEATURE_USABLE (PAT); + CHECK_CPU_FEATURE_USABLE (PSE_36); + CHECK_CPU_FEATURE_USABLE (PSN); + CHECK_CPU_FEATURE_USABLE (CLFSH); + CHECK_CPU_FEATURE_USABLE (DS); + CHECK_CPU_FEATURE_USABLE (ACPI); + CHECK_CPU_FEATURE_USABLE (MMX); + CHECK_CPU_FEATURE_USABLE (FXSR); + CHECK_CPU_FEATURE_USABLE (SSE); + CHECK_CPU_FEATURE_USABLE (SSE2); + CHECK_CPU_FEATURE_USABLE (SS); + CHECK_CPU_FEATURE_USABLE (HTT); + CHECK_CPU_FEATURE_USABLE (TM); + CHECK_CPU_FEATURE_USABLE (PBE); + CHECK_CPU_FEATURE_USABLE (FSGSBASE); + CHECK_CPU_FEATURE_USABLE (TSC_ADJUST); + CHECK_CPU_FEATURE_USABLE (SGX); + CHECK_CPU_FEATURE_USABLE (BMI1); + CHECK_CPU_FEATURE_USABLE (HLE); CHECK_CPU_FEATURE_USABLE (AVX2); + CHECK_CPU_FEATURE_USABLE (SMEP); + CHECK_CPU_FEATURE_USABLE (BMI2); + CHECK_CPU_FEATURE_USABLE (ERMS); + CHECK_CPU_FEATURE_USABLE (INVPCID); + CHECK_CPU_FEATURE_USABLE (RTM); + CHECK_CPU_FEATURE_USABLE (PQM); + CHECK_CPU_FEATURE_USABLE (DEPR_FPU_CS_DS); + CHECK_CPU_FEATURE_USABLE (MPX); + CHECK_CPU_FEATURE_USABLE (PQE); CHECK_CPU_FEATURE_USABLE (AVX512F); CHECK_CPU_FEATURE_USABLE (AVX512DQ); + CHECK_CPU_FEATURE_USABLE (RDSEED); + CHECK_CPU_FEATURE_USABLE (ADX); + CHECK_CPU_FEATURE_USABLE (SMAP); CHECK_CPU_FEATURE_USABLE (AVX512_IFMA); + CHECK_CPU_FEATURE_USABLE (CLFLUSHOPT); + CHECK_CPU_FEATURE_USABLE (CLWB); + CHECK_CPU_FEATURE_USABLE (TRACE); CHECK_CPU_FEATURE_USABLE (AVX512PF); CHECK_CPU_FEATURE_USABLE (AVX512ER); CHECK_CPU_FEATURE_USABLE (AVX512CD); + CHECK_CPU_FEATURE_USABLE (SHA); CHECK_CPU_FEATURE_USABLE (AVX512BW); CHECK_CPU_FEATURE_USABLE (AVX512VL); + CHECK_CPU_FEATURE_USABLE (PREFETCHWT1); CHECK_CPU_FEATURE_USABLE (AVX512_VBMI); + CHECK_CPU_FEATURE_USABLE (UMIP); CHECK_CPU_FEATURE_USABLE (PKU); + CHECK_CPU_FEATURE_USABLE (OSPKE); + CHECK_CPU_FEATURE_USABLE (WAITPKG); CHECK_CPU_FEATURE_USABLE (AVX512_VBMI2); + CHECK_CPU_FEATURE_USABLE (SHSTK); + CHECK_CPU_FEATURE_USABLE (GFNI); CHECK_CPU_FEATURE_USABLE (VAES); CHECK_CPU_FEATURE_USABLE (VPCLMULQDQ); CHECK_CPU_FEATURE_USABLE (AVX512_VNNI); CHECK_CPU_FEATURE_USABLE (AVX512_BITALG); CHECK_CPU_FEATURE_USABLE (AVX512_VPOPCNTDQ); + CHECK_CPU_FEATURE_USABLE (RDPID); + CHECK_CPU_FEATURE_USABLE (CLDEMOTE); + CHECK_CPU_FEATURE_USABLE (MOVDIRI); + CHECK_CPU_FEATURE_USABLE (MOVDIR64B); + CHECK_CPU_FEATURE_USABLE (ENQCMD); + CHECK_CPU_FEATURE_USABLE (SGX_LC); + CHECK_CPU_FEATURE_USABLE (PKS); CHECK_CPU_FEATURE_USABLE (AVX512_4VNNIW); CHECK_CPU_FEATURE_USABLE (AVX512_4FMAPS); + CHECK_CPU_FEATURE_USABLE (FSRM); CHECK_CPU_FEATURE_USABLE (AVX512_VP2INTERSECT); + CHECK_CPU_FEATURE_USABLE (MD_CLEAR); + CHECK_CPU_FEATURE_USABLE (SERIALIZE); + CHECK_CPU_FEATURE_USABLE (HYBRID); + CHECK_CPU_FEATURE_USABLE (TSXLDTRK); + CHECK_CPU_FEATURE_USABLE (PCONFIG); + CHECK_CPU_FEATURE_USABLE (IBT); CHECK_CPU_FEATURE_USABLE (AMX_BF16); CHECK_CPU_FEATURE_USABLE (AMX_TILE); CHECK_CPU_FEATURE_USABLE (AMX_INT8); + CHECK_CPU_FEATURE_USABLE (IBRS_IBPB); + CHECK_CPU_FEATURE_USABLE (STIBP); + CHECK_CPU_FEATURE_USABLE (L1D_FLUSH); + CHECK_CPU_FEATURE_USABLE (ARCH_CAPABILITIES); + CHECK_CPU_FEATURE_USABLE (CORE_CAPABILITIES); + CHECK_CPU_FEATURE_USABLE (SSBD); + CHECK_CPU_FEATURE_USABLE (LAHF64_SAHF64); + CHECK_CPU_FEATURE_USABLE (SVM); + CHECK_CPU_FEATURE_USABLE (LZCNT); + CHECK_CPU_FEATURE_USABLE (SSE4A); + CHECK_CPU_FEATURE_USABLE (PREFETCHW); CHECK_CPU_FEATURE_USABLE (XOP); + CHECK_CPU_FEATURE_USABLE (LWP); CHECK_CPU_FEATURE_USABLE (FMA4); + CHECK_CPU_FEATURE_USABLE (TBM); + CHECK_CPU_FEATURE_USABLE (SYSCALL_SYSRET); + CHECK_CPU_FEATURE_USABLE (NX); + CHECK_CPU_FEATURE_USABLE (PAGE1GB); + CHECK_CPU_FEATURE_USABLE (RDTSCP); + CHECK_CPU_FEATURE_USABLE (LM); + CHECK_CPU_FEATURE_USABLE (XSAVEOPT); CHECK_CPU_FEATURE_USABLE (XSAVEC); + CHECK_CPU_FEATURE_USABLE (XGETBV_ECX_1); + CHECK_CPU_FEATURE_USABLE (XSAVES); + CHECK_CPU_FEATURE_USABLE (XFD); + CHECK_CPU_FEATURE_USABLE (INVARIANT_TSC); + CHECK_CPU_FEATURE_USABLE (WBNOINVD); CHECK_CPU_FEATURE_USABLE (AVX512_BF16); return 0; |