diff options
Diffstat (limited to 'sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S')
| -rw-r--r-- | sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S | 50 |
1 files changed, 32 insertions, 18 deletions
diff --git a/sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S b/sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S index 40a7a24f19..91ac4366c0 100644 --- a/sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S +++ b/sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S @@ -1,5 +1,5 @@ /* Jump to a new context powerpc32 common. - Copyright (C) 2005, 2006 Free Software Foundation, Inc. + Copyright (C) 2005, 2006, 2008 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -71,33 +71,34 @@ ENTRY(__CONTEXT_FUNC_NAME) cmpwi r3,0 bne 3f /* L(error_exit) */ -#ifdef __CONTEXT_ENABLE_FPRS -# ifdef __CONTEXT_ENABLE_VRS -# ifdef PIC +#ifdef PIC mflr r8 -# ifdef HAVE_ASM_PPC_REL16 +# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r7 addis r7,r7,_GLOBAL_OFFSET_TABLE_-1b@ha addi r7,r7,_GLOBAL_OFFSET_TABLE_-1b@l -# else +# else bl _GLOBAL_OFFSET_TABLE_@local-4 mflr r7 -# endif -# ifdef SHARED +# endif +# ifdef SHARED lwz r7,_rtld_global_ro@got(r7) mtlr r8 - lwz r7,RTLD_GLOBAL_RO_DL_HWCAP_OFFSET(r7) -# else + lwz r7,RTLD_GLOBAL_RO_DL_HWCAP_OFFSET+4(r7) +# else lwz r7,_dl_hwcap@got(r7) mtlr r8 - lwz r7,0(r7) -# endif -# else - lis r7,_dl_hwcap@ha - lwz r7,_dl_hwcap@l(r7) -# endif - andis. r7,r7,(PPC_FEATURE_HAS_ALTIVEC >> 16) + lwz r7,4(r7) +# endif +#else + lis r7,(_dl_hwcap+4)@ha + lwz r7,(_dl_hwcap+4)@l(r7) +#endif + +#ifdef __CONTEXT_ENABLE_FPRS +# ifdef __CONTEXT_ENABLE_VRS + andis. r6,r7,(PPC_FEATURE_HAS_ALTIVEC >> 16) la r10,(_UC_VREGS)(r31) beq 2f /* L(has_no_vec) */ @@ -199,7 +200,20 @@ ENTRY(__CONTEXT_FUNC_NAME) /* Restore the floating-point registers */ lfd fp31,_UC_FREGS+(32*8)(r31) lfd fp0,_UC_FREGS+(0*8)(r31) - mtfsf 0xff,fp31 +# ifdef _ARCH_PWR6 + /* Use the extended four-operand version of the mtfsf insn. */ + mtfsf 0xff,fp0,1,0 +# else + /* Availability of DFP indicates a 64-bit FPSCR. */ + andi. r6,r7,PPC_FEATURE_HAS_DFP + beq 7f + /* Use the extended four-operand version of the mtfsf insn. */ + mtfsf 0xff,fp31,1,0 + b 8f + /* Continue to operate on the FPSCR as if it were 32-bits. */ +7: mtfsf 0xff,fp31 +8: +# endif /* _ARCH_PWR6 */ lfd fp1,_UC_FREGS+(1*8)(r31) lfd fp2,_UC_FREGS+(2*8)(r31) lfd fp3,_UC_FREGS+(3*8)(r31) |