diff options
Diffstat (limited to 'sysdeps/powerpc')
| -rw-r--r-- | sysdeps/powerpc/fpu/bits/mathinline.h | 6 | ||||
| -rw-r--r-- | sysdeps/powerpc/fpu/e_sqrt.c | 4 | ||||
| -rw-r--r-- | sysdeps/powerpc/fpu/e_sqrtf.c | 4 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc32/bits/atomic.h | 15 |
4 files changed, 22 insertions, 7 deletions
diff --git a/sysdeps/powerpc/fpu/bits/mathinline.h b/sysdeps/powerpc/fpu/bits/mathinline.h index 15da56384e..aed899e882 100644 --- a/sysdeps/powerpc/fpu/bits/mathinline.h +++ b/sysdeps/powerpc/fpu/bits/mathinline.h @@ -129,7 +129,7 @@ __NTH (fdimf (float __x, float __y)) #include <ldsodefs.h> #include <dl-procinfo.h> -# if __WORDSIZE == 64 +# if __WORDSIZE == 64 || defined _ARCH_PWR4 # define __CPU_HAS_FSQRT 1 # else # define __CPU_HAS_FSQRT ((GLRO(dl_hwcap) & PPC_FEATURE_64) != 0) @@ -141,7 +141,7 @@ __NTH (__ieee754_sqrt (double __x)) { double __z; - /* If the CPU is 64-bit we can use the optional FP instructions we. */ + /* If the CPU is 64-bit we can use the optional FP instructions. */ if (__CPU_HAS_FSQRT) { /* Volatile is required to prevent the compiler from moving the @@ -163,7 +163,7 @@ __NTH (__ieee754_sqrtf (float __x)) { float __z; - /* If the CPU is 64-bit we can use the optional FP instructions we. */ + /* If the CPU is 64-bit we can use the optional FP instructions. */ if (__CPU_HAS_FSQRT) { /* Volatile is required to prevent the compiler from moving the diff --git a/sysdeps/powerpc/fpu/e_sqrt.c b/sysdeps/powerpc/fpu/e_sqrt.c index e6ba1f979f..540b924656 100644 --- a/sysdeps/powerpc/fpu/e_sqrt.c +++ b/sysdeps/powerpc/fpu/e_sqrt.c @@ -169,8 +169,8 @@ __ieee754_sqrt (x) { double z; - /* If the CPU is 64-bit we can use the optional FP instructions we. */ - if ((GLRO (dl_hwcap) & PPC_FEATURE_64) != 0) + /* If the CPU is 64-bit we can use the optional FP instructions. */ + if (__CPU_HAS_FSQRT) { /* Volatile is required to prevent the compiler from moving the fsqrt instruction above the branch. */ diff --git a/sysdeps/powerpc/fpu/e_sqrtf.c b/sysdeps/powerpc/fpu/e_sqrtf.c index 335935bb18..b63d31472b 100644 --- a/sysdeps/powerpc/fpu/e_sqrtf.c +++ b/sysdeps/powerpc/fpu/e_sqrtf.c @@ -146,8 +146,8 @@ __ieee754_sqrtf (x) { double z; - /* If the CPU is 64-bit we can use the optional FP instructions we. */ - if ((GLRO (dl_hwcap) & PPC_FEATURE_64) != 0) + /* If the CPU is 64-bit we can use the optional FP instructions. */ + if (__CPU_HAS_FSQRT) { /* Volatile is required to prevent the compiler from moving the fsqrt instruction above the branch. */ diff --git a/sysdeps/powerpc/powerpc32/bits/atomic.h b/sysdeps/powerpc/powerpc32/bits/atomic.h index 0f1a72335f..6fcc669fb1 100644 --- a/sysdeps/powerpc/powerpc32/bits/atomic.h +++ b/sysdeps/powerpc/powerpc32/bits/atomic.h @@ -89,12 +89,27 @@ # define __arch_atomic_decrement_if_positive_64(mem) \ ({ abort (); (*mem)--; }) +#ifdef _ARCH_PWR4 +/* + * Newer powerpc64 processors support the new "light weight" sync (lwsync) + * So if the build is using -mcpu=[power4,power5,power5+,970] we can + * safely use lwsync. + */ +# define atomic_read_barrier() __asm ("lwsync" ::: "memory") +/* + * "light weight" sync can also be used for the release barrier. + */ +# ifndef UP +# define __ARCH_REL_INSTR "lwsync" +# endif +#else /* * Older powerpc32 processors don't support the new "light weight" * sync (lwsync). So the only safe option is to use normal sync * for all powerpc32 applications. */ # define atomic_read_barrier() __asm ("sync" ::: "memory") +#endif /* * Include the rest of the atomic ops macros which are common to both |