diff options
Diffstat (limited to 'sysdeps/powerpc/powerpc32/bits')
-rw-r--r-- | sysdeps/powerpc/powerpc32/bits/atomic.h | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/sysdeps/powerpc/powerpc32/bits/atomic.h b/sysdeps/powerpc/powerpc32/bits/atomic.h index 6fcc669fb1..0f1a72335f 100644 --- a/sysdeps/powerpc/powerpc32/bits/atomic.h +++ b/sysdeps/powerpc/powerpc32/bits/atomic.h @@ -89,27 +89,12 @@ # define __arch_atomic_decrement_if_positive_64(mem) \ ({ abort (); (*mem)--; }) -#ifdef _ARCH_PWR4 -/* - * Newer powerpc64 processors support the new "light weight" sync (lwsync) - * So if the build is using -mcpu=[power4,power5,power5+,970] we can - * safely use lwsync. - */ -# define atomic_read_barrier() __asm ("lwsync" ::: "memory") -/* - * "light weight" sync can also be used for the release barrier. - */ -# ifndef UP -# define __ARCH_REL_INSTR "lwsync" -# endif -#else /* * Older powerpc32 processors don't support the new "light weight" * sync (lwsync). So the only safe option is to use normal sync * for all powerpc32 applications. */ # define atomic_read_barrier() __asm ("sync" ::: "memory") -#endif /* * Include the rest of the atomic ops macros which are common to both |